December 2018 - U-Boot

[U-Boot] [RESENT PATCH v3] rockchip: update emmc/sd index for distro boot order
by Kever Yang 24 Jan '19

24 Jan '19

According to the emmc/sdcard index in dts alias, emmc is always 0 and sdcard index is 1, let's update to using correct mmc number for distro boot order in common header. SD card suppost to have higher priority so that people can boot into the firmware in SD card, this is very convenient for developer try with distro img from SUSE, Fedora and etc. Developer only need to 'dd' the Distro image(which id download from OS vendor release) into SD card without any modify and then we can boot it up directly. Signed-off-by: Kever Yang <kever.yang(a)rock-chips.com> --- Changes in v3: - update the commit message Series-changes: 2 - update the commit message include/configs/rockchip-common.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h index 68e1105a4b..8a72613e52 100644 --- a/include/configs/rockchip-common.h +++ b/include/configs/rockchip-common.h @@ -11,11 +11,11 @@ #ifndef CONFIG_SPL_BUILD -/* First try to boot from SD (index 0), then eMMC (index 1) */ +/* First try to boot from SD (index 1), then eMMC (index 0) */ #if CONFIG_IS_ENABLED(CMD_MMC) #define BOOT_TARGET_MMC(func) \ - func(MMC, mmc, 0) \ - func(MMC, mmc, 1) + func(MMC, mmc, 1) \ + func(MMC, mmc, 0) #else #define BOOT_TARGET_MMC(func) #endif -- 2.18.0

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[U-Boot] [PATCH] rsa: read out public_exponent value based on 32-bit alignment
by Ooi, Joyce 24 Jan '19

24 Jan '19

Public_exponent is a 64-bit data, which is stored in the device tree blob in a 32-bit alignment address. This causes a problem for ARM64 when public_exponent is read out one shot as a 64-bit data from an unaligned address. Hence, to solve this problem, public_exponent is read out as two 32-bit datas, and then concatenating them. Signed-off-by: Ooi, Joyce <joyce.ooi(a)intel.com> --- lib/rsa/rsa-mod-exp.c | 6 ++++-- 1 files changed, 4 insertions(+), 2 deletions(-) diff --git a/lib/rsa/rsa-mod-exp.c b/lib/rsa/rsa-mod-exp.c index 9d78aa1..3eace38 100644 --- a/lib/rsa/rsa-mod-exp.c +++ b/lib/rsa/rsa-mod-exp.c @@ -252,6 +252,9 @@ int rsa_mod_exp_sw(const uint8_t *sig, uint32_t sig_len, { struct rsa_public_key key; int ret; + uint64_t exponent = + (uint64_t)(*((uint32_t *)(prop->public_exponent + 4))) << 32 | + *((uint32_t *)(prop->public_exponent)); if (!prop) { debug("%s: Skipping invalid prop", __func__); @@ -263,8 +266,7 @@ int rsa_mod_exp_sw(const uint8_t *sig, uint32_t sig_len, if (!prop->public_exponent) key.exponent = RSA_DEFAULT_PUBEXP; else - key.exponent = - fdt64_to_cpu(*((uint64_t *)(prop->public_exponent))); + key.exponent = fdt64_to_cpu(exponent); if (!key.len || !prop->modulus || !prop->rr) { debug("%s: Missing RSA key info", __func__); -- 1.7.1

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[U-Boot] [PATCH 0/2] net: phy: allow disabling SmartEEE for Atheros PHYs
by Vladimir Oltean 22 Jan '19

22 Jan '19

The first patch moves the implementations of phy_read_mmd_indirect and phy_write_mmd_indirect from the TI PHY driver into the core PHY driver code, and the second patch makes use of these functions to allow users to disable SmartEEE. Vladimir Oltean (2): net: phy: promote phy_{read,write}_mmd_indirect from ti.c to generic code net: phy: at803x: Address packet drops at low traffic rate due to SmartEEE feature drivers/net/phy/Kconfig | 21 +++++++++++++ drivers/net/phy/atheros.c | 28 +++++++++++++++++ drivers/net/phy/phy.c | 68 ++++++++++++++++++++++++++++++++++++++++++ drivers/net/phy/ti.c | 76 ----------------------------------------------- include/linux/mdio.h | 10 +++++++ include/phy.h | 37 +++++++++++++++++++++++ 6 files changed, 164 insertions(+), 76 deletions(-) -- 2.7.4

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[U-Boot] [PATCH v5 00/26] clk: Add Allwinner CLK, RESET support
by Jagan Teki 22 Jan '19

22 Jan '19

Although the previous version[1] is properly handled the clock gates with enable and disable management, but this series is trying to add some more complex Allwinner CLK architecture by handling parent clock and other CLK attributes. Allwinner Clock control unit comprises of parent clocks, gates, multiplexers, dividers, multipliers, pre/post dividers and flags etc. So, the U-Boot implementation of ccu has divided into gates and tree. gates are generic clock configuration of enable/disable bit management and these can be handled via ccu_clock_gate, which is almost same as previous version changes. Tree clock has more Allwinner CLK attributes like clock type, fixed clocks, misc clocks, mp, nk, nkm, nkmp, pre/post div, flags etc and these can be managed via ccu_clock_tree. On top of initial clock gates supported from previous version, this series is trying to add support for MP, NK, MISC, FIXED clock types with get_rate functionality and that can eventually used by uart driver. On the summary, this would be an initial infrasture that can fit into remaining clock handle support like set_rate, so the rest of code will add on the requirement basics. Once this is fine, I will try to add code for other parts especially for MMC since we have migration deadline for BLK, MMC, SCSI. So, please do let me know if anyone have any inputs. All these changes available at u-boot-sunxi/clk-next thanks, Jagan. [1] https://patchwork.ozlabs.org/cover/962226/ Jagan Teki (26): clk: Add Allwinner A64 CLK driver reset: Add Allwinner RESET driver clk: sunxi: Add Allwinner H3/H5 CLK driver clk: sunxi: Add Allwinner A10/A20 CLK driver clk: sunxi: Add Allwinner A10s/A13 CLK driver clk: sunxi: Add Allwinner A31 CLK driver clk: sunxi: Add Allwinner A23/A33 CLK driver clk: sunxi: Add Allwinner A83T CLK driver clk: sunxi: Add Allwinner R40 CLK driver clk: sunxi: Add Allwinner V3S CLK driver clk: sunxi: Implement UART clocks clk: sunxi: Implement UART resets clk: sunxi: Add Allwinner H6 CLK driver sunxi: A64: Update sun50i-a64-ccu.h clk: sunxi: Add ccu clock tree support sunxi: Enable CLK phy: sun4i-usb: Use CLK and RESET support reset: Add reset valid musb-new: sunxi: Use CLK and RESET support sunxi: usb: Switch to Generic host controllers usb: host: Drop [e-o]hci-sunxi drivers clk: sunxi: Implement SPI clocks spi: sun4i: Add CLK support clk: sunxi: Implement A64 SPI clocks, resets spi: Add Allwinner A31 SPI driver board: sopine: Enable SPI/SPI-FLASH .../sun50i-a64-sopine-baseboard-u-boot.dtsi | 16 + arch/arm/include/asm/arch-sunxi/ccu.h | 284 +++++++++++++ arch/arm/mach-sunxi/Kconfig | 12 + configs/A10-OLinuXino-Lime_defconfig | 1 + configs/A10s-OLinuXino-M_defconfig | 1 + configs/A13-OLinuXinoM_defconfig | 1 + configs/A13-OLinuXino_defconfig | 1 + configs/A20-OLinuXino-Lime2-eMMC_defconfig | 1 + configs/A20-OLinuXino-Lime2_defconfig | 1 + configs/A20-OLinuXino-Lime_defconfig | 1 + configs/A20-Olimex-SOM204-EVB_defconfig | 1 + configs/Auxtek-T003_defconfig | 1 + configs/Auxtek-T004_defconfig | 1 + configs/Bananapi_defconfig | 1 + configs/Bananapi_m2m_defconfig | 1 + configs/Bananapro_defconfig | 1 + configs/CHIP_defconfig | 1 + configs/CHIP_pro_defconfig | 1 + configs/CSQ_CS908_defconfig | 1 + configs/Colombus_defconfig | 1 + configs/Cubieboard2_defconfig | 1 + configs/Cubieboard_defconfig | 1 + configs/Cubietruck_plus_defconfig | 1 + configs/Hummingbird_A31_defconfig | 1 + configs/Itead_Ibox_A20_defconfig | 1 + configs/Linksprite_pcDuino3_Nano_defconfig | 1 + configs/Linksprite_pcDuino3_defconfig | 1 + configs/Linksprite_pcDuino_defconfig | 1 + configs/MK808C_defconfig | 1 + configs/Marsboard_A10_defconfig | 1 + configs/Mele_A1000G_quad_defconfig | 1 + configs/Mele_A1000_defconfig | 1 + configs/Mele_I7_defconfig | 1 + configs/Mele_M3_defconfig | 1 + configs/Mele_M5_defconfig | 1 + configs/Mele_M9_defconfig | 1 + configs/Mini-X_defconfig | 1 + configs/Orangepi_defconfig | 1 + configs/Orangepi_mini_defconfig | 1 + configs/Sinlinx_SinA31s_defconfig | 1 + configs/Sinlinx_SinA33_defconfig | 1 + configs/Sinovoip_BPI_M2_Plus_defconfig | 1 + configs/Sinovoip_BPI_M2_defconfig | 1 + configs/Sinovoip_BPI_M3_defconfig | 1 + configs/Wexler_TAB7200_defconfig | 1 + configs/Wobo_i5_defconfig | 1 + configs/a64-olinuxino_defconfig | 1 + configs/ba10_tv_box_defconfig | 1 + configs/bananapi_m1_plus_defconfig | 1 + configs/bananapi_m64_defconfig | 1 + configs/ga10h_v1_1_defconfig | 1 + configs/h8_homlet_v2_defconfig | 1 + configs/i12-tvbox_defconfig | 1 + configs/icnova-a20-swac_defconfig | 1 + configs/inet1_defconfig | 1 + configs/inet_q972_defconfig | 1 + configs/jesurun_q5_defconfig | 1 + configs/libretech_all_h3_cc_h2_plus_defconfig | 1 + configs/libretech_all_h3_cc_h3_defconfig | 1 + configs/libretech_all_h3_cc_h5_defconfig | 1 + configs/mixtile_loftq_defconfig | 1 + configs/mk802_a10s_defconfig | 1 + configs/mk802_defconfig | 1 + configs/mk802ii_defconfig | 1 + configs/nanopi_a64_defconfig | 1 + configs/nanopi_m1_defconfig | 1 + configs/nanopi_m1_plus_defconfig | 1 + configs/nanopi_neo2_defconfig | 1 + configs/nanopi_neo_air_defconfig | 1 + configs/nanopi_neo_defconfig | 1 + configs/nanopi_neo_plus2_defconfig | 1 + configs/orangepi_2_defconfig | 1 + configs/orangepi_lite_defconfig | 1 + configs/orangepi_one_defconfig | 1 + configs/orangepi_pc2_defconfig | 1 + configs/orangepi_pc_defconfig | 1 + configs/orangepi_pc_plus_defconfig | 1 + configs/orangepi_plus2e_defconfig | 1 + configs/orangepi_plus_defconfig | 1 + configs/orangepi_prime_defconfig | 1 + configs/orangepi_r1_defconfig | 1 + configs/orangepi_win_defconfig | 1 + configs/orangepi_zero_defconfig | 1 + configs/orangepi_zero_plus2_defconfig | 1 + configs/orangepi_zero_plus_defconfig | 1 + configs/parrot_r16_defconfig | 1 + configs/pine64_plus_defconfig | 1 + configs/r7-tv-dongle_defconfig | 1 + configs/sopine_baseboard_defconfig | 8 + configs/sun8i_a23_evb_defconfig | 1 + configs/sunxi_Gemei_G9_defconfig | 1 + configs/tbs_a711_defconfig | 1 + drivers/clk/Kconfig | 1 + drivers/clk/Makefile | 1 + drivers/clk/sunxi/Kconfig | 82 ++++ drivers/clk/sunxi/Makefile | 18 + drivers/clk/sunxi/clk_a10.c | 77 ++++ drivers/clk/sunxi/clk_a10s.c | 68 +++ drivers/clk/sunxi/clk_a23.c | 75 ++++ drivers/clk/sunxi/clk_a31.c | 82 ++++ drivers/clk/sunxi/clk_a64.c | 125 ++++++ drivers/clk/sunxi/clk_a83t.c | 75 ++++ drivers/clk/sunxi/clk_h3.c | 89 ++++ drivers/clk/sunxi/clk_h6.c | 53 +++ drivers/clk/sunxi/clk_r40.c | 88 ++++ drivers/clk/sunxi/clk_sunxi.c | 256 +++++++++++ drivers/clk/sunxi/clk_v3s.c | 59 +++ drivers/phy/allwinner/phy-sun4i-usb.c | 77 +++- drivers/reset/Kconfig | 8 + drivers/reset/Makefile | 1 + drivers/reset/reset-sunxi.c | 125 ++++++ drivers/spi/Kconfig | 6 + drivers/spi/Makefile | 1 + drivers/spi/sun4i_spi.c | 46 +- drivers/spi/sun6i_spi.c | 398 ++++++++++++++++++ drivers/usb/host/Kconfig | 2 + drivers/usb/host/Makefile | 2 - drivers/usb/host/ehci-sunxi.c | 204 --------- drivers/usb/host/ohci-sunxi.c | 233 ---------- drivers/usb/musb-new/sunxi.c | 81 ++-- include/configs/sun4i.h | 4 - include/configs/sun50i.h | 5 - include/configs/sun5i.h | 4 - include/configs/sun6i.h | 4 - include/configs/sun7i.h | 4 - include/configs/sun8i.h | 4 - include/configs/sunxi-common.h | 1 - include/dt-bindings/clock/sun50i-a64-ccu.h | 2 + include/reset.h | 11 + scripts/config_whitelist.txt | 2 - 130 files changed, 2248 insertions(+), 534 deletions(-) create mode 100644 arch/arm/dts/sun50i-a64-sopine-baseboard-u-boot.dtsi create mode 100644 arch/arm/include/asm/arch-sunxi/ccu.h create mode 100644 drivers/clk/sunxi/Kconfig create mode 100644 drivers/clk/sunxi/Makefile create mode 100644 drivers/clk/sunxi/clk_a10.c create mode 100644 drivers/clk/sunxi/clk_a10s.c create mode 100644 drivers/clk/sunxi/clk_a23.c create mode 100644 drivers/clk/sunxi/clk_a31.c create mode 100644 drivers/clk/sunxi/clk_a64.c create mode 100644 drivers/clk/sunxi/clk_a83t.c create mode 100644 drivers/clk/sunxi/clk_h3.c create mode 100644 drivers/clk/sunxi/clk_h6.c create mode 100644 drivers/clk/sunxi/clk_r40.c create mode 100644 drivers/clk/sunxi/clk_sunxi.c create mode 100644 drivers/clk/sunxi/clk_v3s.c create mode 100644 drivers/reset/reset-sunxi.c create mode 100644 drivers/spi/sun6i_spi.c delete mode 100644 drivers/usb/host/ehci-sunxi.c delete mode 100644 drivers/usb/host/ohci-sunxi.c -- 2.18.0.321.gffc6fa0e3

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[U-Boot] [PATCH 0/1] Extend malloc() pool for Zynq devices
by Anton Gerasimov 22 Jan '19

22 Jan '19

I'm getting -ENOMEM on Z-Turn board already, other boards are probably still allright if no one complains, but might hit the limit soon. Anton Gerasimov (1): zynq: Kconfig: extend the bootstrap malloc() pool arch/arm/mach-zynq/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.19.0

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[U-Boot] [PATCH 0/4] Topic board support updates
by Mike Looijmans 22 Jan '19

22 Jan '19

There have been hardware changes to a few topic-miami boards, these are included in these commits (the production version of the "lite" became cheaper, the "plus" was made faster). Also improvements for usability. @Michal: These also apply cleanly to u-boot-xlnx, it'd be great if they could be included there as well. Mike Looijmans (4): topic-miamiplus: Run CPU at 800MHz for speedgrade-2 board: topic_miamilite: Support cost-reduced version configs/topic_miami.h: Use same partitioning for USB boot as for SD board: topic-miamiplus: Run IO PLL at 1000 MHz arch/arm/dts/zynq-topic-miamilite.dts | 7 +++-- arch/arm/dts/zynq-topic-miamiplus.dts | 9 ++++++ .../topic/zynq/zynq-topic-miamilite/ps7_init_gpl.c | 14 ++++----- board/topic/zynq/zynq-topic-miamilite/ps7_regs.txt | 14 ++++----- .../topic/zynq/zynq-topic-miamiplus/ps7_init_gpl.c | 34 ++++++++++------------ include/configs/topic_miami.h | 19 +++++++----- include/configs/topic_miamilite.h | 11 +++++++ 7 files changed, 65 insertions(+), 43 deletions(-) create mode 100644 include/configs/topic_miamilite.h -- 1.9.1

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[U-Boot] [RFC PATCH] bitops: Fix GENMASK definition for Sandbox
by Vignesh R 21 Jan '19

21 Jan '19

In arch/sandbox/include/asm/types.h we have Therefore for 32 bit Sandbox build BITS_PER_LONG turns out to be 32 as CONFIG_PHYS64 is not set This messes up the current logic of GENMASK macro due to mismatch b/w size of unsigned long (64 bit) and that of BITS_PER_LONG. Fix this by using CONFIG_SANDBOX_BITS_PER_LONG which is set to 64/32 based on the host machine on which its being compiled. Without this patch: GENMASK(14,0) => 0x7fffffffffff After this patch: GENMASK(14,0) => 0x7fff Signed-off-by: Vignesh R <vigneshr(a)ti.com> --- I marked it as RFC because, I am not really sure if I am running Sandbox tests properly. My host machine is x86_64 (Ubuntu 18.04). Running below command[1] with some of my yet to be upstreamed patches that use GENMASK macro shows this issue. [1]: $ make check include/linux/bitops.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/include/linux/bitops.h b/include/linux/bitops.h index a47f6d17bb5f..259df43fb00f 100644 --- a/include/linux/bitops.h +++ b/include/linux/bitops.h @@ -21,8 +21,13 @@ * position @h. For example * GENMASK_ULL(39, 21) gives us the 64bit vector 0x000000ffffe00000. */ +#ifdef CONFIG_SANDBOX +#define GENMASK(h, l) \ + (((~0UL) << (l)) & (~0UL >> (CONFIG_SANDBOX_BITS_PER_LONG - 1 - (h)))) +#else #define GENMASK(h, l) \ (((~0UL) << (l)) & (~0UL >> (BITS_PER_LONG - 1 - (h)))) +#endif #define GENMASK_ULL(h, l) \ (((~0ULL) << (l)) & (~0ULL >> (BITS_PER_LONG_LONG - 1 - (h)))) -- 2.20.1

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[U-Boot] boot.bin on SD Card for SAMA5D3 Xplained
by Daniel Evans 21 Jan '19

21 Jan '19

Trying to get uboot SPL boot.bin to run on an SD card for the sama5d3 xplained board. All I get is RomBOOT and no other messages. I have tried throwing in a couple test pins to toggle in board_early_init_f but still not getting any debug. I can get at91bootstrap to produce a boot.bin that works on the sama5d3 xplained so I am assuming I don’t have a bad board. My boot partition is FAT16. To compile I just run the following on Debian Buster : make mrproper make sama5d3_xplained_mmc_defconfig make Cross Compiler is gcc-linaro-6.4.1-2018.05-x86_64_arm-linux-gnueabihf When finished compiling I just copy the boot.bin to my BOOT partition. Has to be something obvious that I am missing. Any insight is appreciated… Dan

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[U-Boot] [PATCH v2 1/1] arm64: mvebu: defconfig: enable CONFIG_CMD_NVME
by Heinrich Schuchardt 21 Jan '19

21 Jan '19

An NVME drive may be installed on the MACCHIATObin board using the PCIe slot or on the Clearfog Pro using mini a PCI-e slot. With the configuration change it becomes usable. Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- configs/clearfog_gt_8k_defconfig | 2 ++ configs/mvebu_db_armada8k_defconfig | 2 ++ configs/mvebu_mcbin-88f8040_defconfig | 2 ++ 3 files changed, 6 insertions(+) diff --git a/configs/clearfog_gt_8k_defconfig b/configs/clearfog_gt_8k_defconfig index 8f766c176be..5f538d6163f 100644 --- a/configs/clearfog_gt_8k_defconfig +++ b/configs/clearfog_gt_8k_defconfig @@ -41,6 +41,7 @@ CONFIG_DM_I2C=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_MISC=y CONFIG_DM_MMC=y +CONFIG_CMD_NVME=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_XENON=y CONFIG_SPI_FLASH=y @@ -50,6 +51,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_PHYLIB=y CONFIG_PHY_GIGE=y +CONFIG_NVME=y CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_PCIE_DW_MVEBU=y diff --git a/configs/mvebu_db_armada8k_defconfig b/configs/mvebu_db_armada8k_defconfig index bb29d2574d2..7b4e7152683 100644 --- a/configs/mvebu_db_armada8k_defconfig +++ b/configs/mvebu_db_armada8k_defconfig @@ -20,6 +20,7 @@ CONFIG_BOARD_EARLY_INIT_F=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y +CONFIG_CMD_NVME=y CONFIG_CMD_PCI=y CONFIG_CMD_SF=y CONFIG_CMD_SPI=y @@ -47,6 +48,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_MVPP2=y +CONFIG_NVME=y CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_PCIE_DW_MVEBU=y diff --git a/configs/mvebu_mcbin-88f8040_defconfig b/configs/mvebu_mcbin-88f8040_defconfig index 9df4c51c6f1..882169be2ce 100644 --- a/configs/mvebu_mcbin-88f8040_defconfig +++ b/configs/mvebu_mcbin-88f8040_defconfig @@ -20,6 +20,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y +CONFIG_CMD_NVME=y CONFIG_CMD_PCI=y CONFIG_CMD_SF=y CONFIG_CMD_SPI=y @@ -51,6 +52,7 @@ CONFIG_SPI_FLASH_WINBOND=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_MVPP2=y +CONFIG_NVME=y CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_PCIE_DW_MVEBU=y -- 2.19.2

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[U-Boot] [PATCH v3 1/1] arm64: dts: marvell: armada-ap806: reserve PSCI area
by Heinrich Schuchardt 21 Jan '19

21 Jan '19

The memory area [0x4000000-0x4200000[ is occupied by the PSCI firmware. Any attempt to access it from U-Boot leads to an immediate crash. So let's make the same memory reservation as the vendor device tree. Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- cf. https://lkml.org/lkml/2018/12/21/253 v3 Move change from armada-8040-mcbin.dts to armada-ap806.dtsi. I only have a MACCHIATObin for testing. But in https://github.com/MarvellEmbeddedProcessors/linux-marvell it is done in the same way. v2 add missing right brace --- arch/arm/dts/armada-ap806.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm/dts/armada-ap806.dtsi b/arch/arm/dts/armada-ap806.dtsi index ebdee514c0..d28c0822f8 100644 --- a/arch/arm/dts/armada-ap806.dtsi +++ b/arch/arm/dts/armada-ap806.dtsi @@ -64,6 +64,17 @@ method = "smc"; }; + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + psci-area@4000000 { + reg = <0x0 0x4000000 0x0 0x200000>; + no-map; + }; + }; + ap806 { #address-cells = <2>; #size-cells = <2>; -- 2.19.2

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