November 2018 - U-Boot

[U-Boot] [PATCH v3 00/21] spl: Add features for passing info from SPL to U-Boot proper
by Simon Glass 27 Nov '18

27 Nov '18

At present we have no standard way of passing information from SPL to U-Boot. Such information may be the size of DRAM banks or some information about the reset state of the machine,for example. This series first adds a bloblist, which allows a list of 'blobs' to be created, each with a tag so that subsystems can store data and retrieve it later. Then it adds the SPL 'handoff' information, which uses bloblist. Various minor sandbox enhancements are provided to make this easier, or to support testing. Changes in v3: - Add comments to the log_ret() functions to indicate usage - Update log_msg_ret() to make use of the message and avoid a warning - Correct CONFIG_BLOBLIST_ADDR to have a default only for sandbox - Drop patch 'spl: Print a message if we are unable to load an image' Changes in v2: - Fix several typos - Add back a blank line, and put one in the new function too - Drop the wildcard in the .lds file as it is not needed Simon Glass (21): spl: Add support for logging in SPL and TPL Add core support for a bloblist to convey data from SPL spl: Set up the bloblist in SPL bloblist: Locate bloblist in U-Boot test: Add a simple test for bloblist Add bloblist documentation spl: Support hash, input, pch, pci, rtc, tpm in SPL spl: Add a define for SPL_TPL_PROMPT spl: Make SPL_DISABLE_BANNER_PRINT a positive option spl: Add a comment to spl_set_bd() sandbox: Add a memory map to the sandbox README test/py: Add a way to pass flags to sandbox sandbox: Add an option to display of-platdata in SPL sandbox: Drop the deprecated 'sb' command sandbox: Add a new 'sb' command sandbox: Allow puts() output before global_data is set up sandbox: Refactor code to create os_jump_to_file() sandbox: Use malloc() and free() from os layer sandbox: Filter arguments when starting U-Boot sandbox: Boot in U-Boot through the standard call spl: Add support for passing handoff info to U-Boot proper arch/Kconfig | 1 + arch/powerpc/include/asm/spl.h | 3 - arch/sandbox/cpu/eth-raw-os.c | 9 +- arch/sandbox/cpu/os.c | 115 +++++++++----- arch/sandbox/cpu/spl.c | 31 +++- arch/sandbox/cpu/start.c | 19 +++ arch/sandbox/cpu/u-boot-spl.lds | 2 +- arch/sandbox/include/asm/handoff.h | 18 +++ arch/sandbox/include/asm/state.h | 8 + board/sandbox/README.sandbox | 14 +- cmd/Makefile | 1 + cmd/host.c | 5 - cmd/sb.c | 65 ++++++++ common/Kconfig | 84 +++++++++- common/Makefile | 5 +- common/bloblist.c | 239 +++++++++++++++++++++++++++++ common/board_f.c | 49 ++++++ common/console.c | 7 + common/init/Makefile | 1 + common/init/handoff.c | 47 ++++++ common/spl/Kconfig | 95 +++++++++++- common/spl/spl.c | 135 ++++++++++++---- configs/sandbox_spl_defconfig | 1 + doc/README.bloblist | 82 ++++++++++ doc/README.trace | 2 +- drivers/Makefile | 11 +- include/asm-generic/global_data.h | 7 + include/bloblist.h | 195 +++++++++++++++++++++++ include/handoff.h | 36 +++++ include/log.h | 20 ++- include/spl.h | 41 +++++ include/test/suites.h | 1 + test/Makefile | 1 + test/bloblist.c | 187 ++++++++++++++++++++++ test/cmd_ut.c | 3 + test/dm/sf.c | 2 +- test/py/tests/test_fit.py | 12 +- test/py/tests/test_handoff.py | 14 ++ test/py/tests/test_ofplatdata.py | 31 +++- test/py/tests/test_vboot.py | 2 +- test/py/u_boot_console_base.py | 2 +- test/py/u_boot_console_sandbox.py | 18 +++ test/run | 2 +- 43 files changed, 1516 insertions(+), 107 deletions(-) create mode 100644 arch/sandbox/include/asm/handoff.h create mode 100644 cmd/sb.c create mode 100644 common/bloblist.c create mode 100644 common/init/handoff.c create mode 100644 doc/README.bloblist create mode 100644 include/bloblist.h create mode 100644 include/handoff.h create mode 100644 test/bloblist.c create mode 100644 test/py/tests/test_handoff.py -- 2.19.1.1215.g8438c0b245-goog

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[U-Boot] [PATCH] mmc: tmio: Reorder TMIO clock handling
by Marek Vasut 26 Nov '18

26 Nov '18

Reorder the tmio_sd_set_clk_rate() function such that it handles all of the clock requiests correctly. Specifically, before this patch, clock request with (mmc->clock == 0 && mmc->clk_disable) could leave the clock enabled, as the function would exit on if (!mmc->clock) condition on top and will not handle the mmc->clk_disable at all. Rather than band-aid fixing just that particular problem, reorder the entire function to make it easier to understand and verify that all the cases are covered. The function has three sections now: First, if mmc->clock != 0, we calculate divider for the SD block. Second, if mmc->clock != 0 and SD block clock are enabled and current divider is not equal to the new divider, then stop the clock and update the divider. Third, if mmc->clk_disable is set, disable the clock, otherwise enable the clock. This happens independently of divider update now. Signed-off-by: Marek Vasut <marek.vasut+renesas(a)gmail.com> Cc: Masahiro Yamada <yamada.masahiro(a)socionext.com> --- drivers/mmc/tmio-common.c | 105 ++++++++++++++++++++------------------ 1 file changed, 54 insertions(+), 51 deletions(-) diff --git a/drivers/mmc/tmio-common.c b/drivers/mmc/tmio-common.c index fad2816ca5..201492001f 100644 --- a/drivers/mmc/tmio-common.c +++ b/drivers/mmc/tmio-common.c @@ -560,68 +560,71 @@ static ulong tmio_sd_clk_get_rate(struct tmio_sd_priv *priv) return priv->clk_get_rate(priv); } -static void tmio_sd_set_clk_rate(struct tmio_sd_priv *priv, - struct mmc *mmc) +static void tmio_sd_set_clk_rate(struct tmio_sd_priv *priv, struct mmc *mmc) { unsigned int divisor; - u32 val, tmp; + u32 tmp, val = 0; ulong mclk; - if (!mmc->clock) - return; - - mclk = tmio_sd_clk_get_rate(priv); - - divisor = DIV_ROUND_UP(mclk, mmc->clock); - - /* Do not set divider to 0xff in DDR mode */ - if (mmc->ddr_mode && (divisor == 1)) - divisor = 2; - - if (divisor <= 1) - val = (priv->caps & TMIO_SD_CAP_RCAR) ? - TMIO_SD_CLKCTL_RCAR_DIV1 : TMIO_SD_CLKCTL_DIV1; - else if (divisor <= 2) - val = TMIO_SD_CLKCTL_DIV2; - else if (divisor <= 4) - val = TMIO_SD_CLKCTL_DIV4; - else if (divisor <= 8) - val = TMIO_SD_CLKCTL_DIV8; - else if (divisor <= 16) - val = TMIO_SD_CLKCTL_DIV16; - else if (divisor <= 32) - val = TMIO_SD_CLKCTL_DIV32; - else if (divisor <= 64) - val = TMIO_SD_CLKCTL_DIV64; - else if (divisor <= 128) - val = TMIO_SD_CLKCTL_DIV128; - else if (divisor <= 256) - val = TMIO_SD_CLKCTL_DIV256; - else if (divisor <= 512 || !(priv->caps & TMIO_SD_CAP_DIV1024)) - val = TMIO_SD_CLKCTL_DIV512; - else - val = TMIO_SD_CLKCTL_DIV1024; + if (mmc->clock) { + mclk = tmio_sd_clk_get_rate(priv); + + divisor = DIV_ROUND_UP(mclk, mmc->clock); + + /* Do not set divider to 0xff in DDR mode */ + if (mmc->ddr_mode && (divisor == 1)) + divisor = 2; + + if (divisor <= 1) + val = (priv->caps & TMIO_SD_CAP_RCAR) ? + TMIO_SD_CLKCTL_RCAR_DIV1 : TMIO_SD_CLKCTL_DIV1; + else if (divisor <= 2) + val = TMIO_SD_CLKCTL_DIV2; + else if (divisor <= 4) + val = TMIO_SD_CLKCTL_DIV4; + else if (divisor <= 8) + val = TMIO_SD_CLKCTL_DIV8; + else if (divisor <= 16) + val = TMIO_SD_CLKCTL_DIV16; + else if (divisor <= 32) + val = TMIO_SD_CLKCTL_DIV32; + else if (divisor <= 64) + val = TMIO_SD_CLKCTL_DIV64; + else if (divisor <= 128) + val = TMIO_SD_CLKCTL_DIV128; + else if (divisor <= 256) + val = TMIO_SD_CLKCTL_DIV256; + else if (divisor <= 512 || !(priv->caps & TMIO_SD_CAP_DIV1024)) + val = TMIO_SD_CLKCTL_DIV512; + else + val = TMIO_SD_CLKCTL_DIV1024; + } tmp = tmio_sd_readl(priv, TMIO_SD_CLKCTL); - if (tmp & TMIO_SD_CLKCTL_SCLKEN && - (tmp & TMIO_SD_CLKCTL_DIV_MASK) == val) - return; - - /* stop the clock before changing its rate to avoid a glitch signal */ - tmp &= ~TMIO_SD_CLKCTL_SCLKEN; - tmio_sd_writel(priv, tmp, TMIO_SD_CLKCTL); + if (mmc->clock && + !((tmp & TMIO_SD_CLKCTL_SCLKEN) && + ((tmp & TMIO_SD_CLKCTL_DIV_MASK) == val))) { + /* + * Stop the clock before changing its rate + * to avoid a glitch signal + */ + tmp &= ~TMIO_SD_CLKCTL_SCLKEN; + tmio_sd_writel(priv, tmp, TMIO_SD_CLKCTL); - tmp &= ~TMIO_SD_CLKCTL_DIV_MASK; - tmp |= val; - tmio_sd_writel(priv, tmp, TMIO_SD_CLKCTL); + /* Change the clock rate. */ + tmp &= ~TMIO_SD_CLKCTL_DIV_MASK; + tmp |= val; + } - if (!mmc->clk_disable) { - tmp &= ~TMIO_SD_CLKCTL_OFFEN; - tmp |= TMIO_SD_CLKCTL_SCLKEN; - } else { + /* Enable or Disable the clock */ + if (mmc->clk_disable) { tmp |= TMIO_SD_CLKCTL_OFFEN; tmp &= ~TMIO_SD_CLKCTL_SCLKEN; + } else { + tmp &= ~TMIO_SD_CLKCTL_OFFEN; + tmp |= TMIO_SD_CLKCTL_SCLKEN; } + tmio_sd_writel(priv, tmp, TMIO_SD_CLKCTL); udelay(1000); -- 2.18.0

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[U-Boot] [PATCH] fs-test.sh: Update to use 'host' not 'sb'
by Tom Rini 26 Nov '18

26 Nov '18

For a long time now, 'sb' has been deprecated as a command in favor of using 'host' for the sandbox hostfs interface, switch. Signed-off-by: Tom Rini <trini(a)konsulko.com> --- test/fs/fs-test.sh | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/test/fs/fs-test.sh b/test/fs/fs-test.sh index 86308cfe2dbd..721af71d44ca 100755 --- a/test/fs/fs-test.sh +++ b/test/fs/fs-test.sh @@ -194,7 +194,7 @@ function test_image() { ;; sb) - PREFIX="sb " + PREFIX="host " WRITE="save" SUFFIX="fs -" ;; @@ -217,11 +217,11 @@ function test_image() { # In u-boot commands, <interface> stands for host or hostfs # hostfs maps to the host fs. - # host maps to the "sb bind" that we do + # host maps to the "host bind" that we do $UBOOT << EOF sb=$5 -setenv bind 'if test "\$sb" != sb; then sb bind 0 "$1"; fi' +setenv bind 'if test "\$sb" != sb; then host bind 0 "$1"; fi' run bind # Test Case 1 - ls ${PREFIX}ls host${SUFFIX} $6 @@ -229,7 +229,7 @@ ${PREFIX}ls host${SUFFIX} $6 ${PREFIX}ls host${SUFFIX} invalid_d # # We want ${PREFIX}size host 0:0 $3 for host commands and -# sb size hostfs - $3 for hostfs commands. +# host size hostfs - $3 for hostfs commands. # 1MB is 0x0010 0000 # Test Case 2a - size of small file ${PREFIX}size host${SUFFIX} ${FPATH}$FILE_SMALL @@ -575,7 +575,7 @@ TOTAL_PASS=0 # In each loop, for a given file system image, we test both the # fs command, like load/size/write, the file system specific command -# like: ext4load/ext4size/ext4write and the sb load/ls/save commands. +# like: ext4load/ext4size/ext4write and the host load/ls/save commands. for fs in ext4 fat16 fat32; do echo "Creating $fs image if not already present." @@ -583,11 +583,11 @@ for fs in ext4 fat16 fat32; do MD5_FILE_FS="${MD5_FILE}.${fs}" create_image $IMAGE $fs - # sb commands test + # host commands test echo "Creating files in $fs image if not already present." create_files $IMAGE $MD5_FILE_FS - # Lets mount the image and test sb hostfs commands + # Lets mount the image and test host hostfs commands mkdir -p "$MOUNT_DIR" case "$fs" in fat*) -- 2.7.4

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[U-Boot] [PATCH v3 1/3] spi: pl022: Simplify platdata code
by Jagan Teki 26 Nov '18

26 Nov '18

pl022 spi driver support both OF_CONTROL and PLATDATA, this patch is trying to simplify the code that differentiating platdata vs of_control. - Move OF_CONTROL code at one place - Handle clock setup code directly in pl022_spi_ofdata_to_platdata Cc: Quentin Schulz <quentin.schulz(a)bootlin.com> Signed-off-by: Jagan Teki <jagan(a)amarulasolutions.com> --- Changes for v3: - none Changes for v2: - Update commit message - Use struct clk for clkdev drivers/spi/pl022_spi.c | 48 ++++++++++++---------------- include/dm/platform_data/pl022_spi.h | 9 ------ 2 files changed, 20 insertions(+), 37 deletions(-) diff --git a/drivers/spi/pl022_spi.c b/drivers/spi/pl022_spi.c index 86b71d2e21..05f4f6f481 100644 --- a/drivers/spi/pl022_spi.c +++ b/drivers/spi/pl022_spi.c @@ -72,11 +72,7 @@ struct pl022_spi_slave { void *base; -#if !CONFIG_IS_ENABLED(OF_PLATDATA) - struct clk clk; -#else unsigned int freq; -#endif }; /* @@ -96,30 +92,13 @@ static int pl022_is_supported(struct pl022_spi_slave *ps) return 0; } -#if !CONFIG_IS_ENABLED(OF_PLATDATA) -static int pl022_spi_ofdata_to_platdata(struct udevice *bus) -{ - struct pl022_spi_pdata *plat = bus->platdata; - const void *fdt = gd->fdt_blob; - int node = dev_of_offset(bus); - - plat->addr = fdtdec_get_addr_size(fdt, node, "reg", &plat->size); - - return clk_get_by_index(bus, 0, &plat->clk); -} -#endif - static int pl022_spi_probe(struct udevice *bus) { struct pl022_spi_pdata *plat = dev_get_platdata(bus); struct pl022_spi_slave *ps = dev_get_priv(bus); ps->base = ioremap(plat->addr, plat->size); -#if !CONFIG_IS_ENABLED(OF_PLATDATA) - ps->clk = plat->clk; -#else ps->freq = plat->freq; -#endif /* Check the PL022 version */ if (!pl022_is_supported(ps)) @@ -240,11 +219,7 @@ static int pl022_spi_set_speed(struct udevice *bus, uint speed) u16 scr = SSP_SCR_MIN, cr0 = 0, cpsr = SSP_CPSR_MIN, best_scr = scr, best_cpsr = cpsr; u32 min, max, best_freq = 0, tmp; -#if !CONFIG_IS_ENABLED(OF_PLATDATA) - u32 rate = clk_get_rate(&ps->clk); -#else u32 rate = ps->freq; -#endif bool found = false; max = spi_rate(rate, SSP_CPSR_MIN, SSP_SCR_MIN); @@ -316,6 +291,25 @@ static const struct dm_spi_ops pl022_spi_ops = { }; #if !CONFIG_IS_ENABLED(OF_PLATDATA) +static int pl022_spi_ofdata_to_platdata(struct udevice *bus) +{ + struct pl022_spi_pdata *plat = bus->platdata; + const void *fdt = gd->fdt_blob; + int node = dev_of_offset(bus); + struct clk clkdev; + int ret; + + plat->addr = fdtdec_get_addr_size(fdt, node, "reg", &plat->size); + + ret = clk_get_by_index(bus, 0, &clkdev); + if (ret) + return ret; + + plat->freq = clk_get_rate(&clkdev); + + return 0; +} + static const struct udevice_id pl022_spi_ids[] = { { .compatible = "arm,pl022-spi" }, { } @@ -327,11 +321,9 @@ U_BOOT_DRIVER(pl022_spi) = { .id = UCLASS_SPI, #if !CONFIG_IS_ENABLED(OF_PLATDATA) .of_match = pl022_spi_ids, -#endif - .ops = &pl022_spi_ops, -#if !CONFIG_IS_ENABLED(OF_PLATDATA) .ofdata_to_platdata = pl022_spi_ofdata_to_platdata, #endif + .ops = &pl022_spi_ops, .platdata_auto_alloc_size = sizeof(struct pl022_spi_pdata), .priv_auto_alloc_size = sizeof(struct pl022_spi_slave), .probe = pl022_spi_probe, diff --git a/include/dm/platform_data/pl022_spi.h b/include/dm/platform_data/pl022_spi.h index 77fe6da3cb..57d12ac912 100644 --- a/include/dm/platform_data/pl022_spi.h +++ b/include/dm/platform_data/pl022_spi.h @@ -10,19 +10,10 @@ #ifndef __PL022_SPI_H__ #define __PL022_SPI_H__ -#if !CONFIG_IS_ENABLED(OF_PLATDATA) -#include <clk.h> -#endif -#include <fdtdec.h> - struct pl022_spi_pdata { fdt_addr_t addr; fdt_size_t size; -#if !CONFIG_IS_ENABLED(OF_PLATDATA) - struct clk clk; -#else unsigned int freq; -#endif }; #endif -- 2.18.0.321.gffc6fa0e3

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[U-Boot] [PATCH u-boot v2 00/19] Amlogic Meson cleanup for AXG SoC support
by Neil Armstrong 26 Nov '18

26 Nov '18

This patchset will refactor the Amlogic Meson SoC support in order to easily add support for the Amlogic AXg SoC family, and later the G12x SoCs. In order : - Cleanup the mach-meson configs - Move board support to reference design common boards - Move board Kconfig into mach-meson - Add AXG pinctrl & clock support - Add AXG device tree and mach-meson support - Add support for S400 reference design - Do a final factorization of the code - Add USB boot support in U-boot At the end of the patches, the board code is lighter and we maintain only the reference designs, where each board will differ in the defconfig. It will be simpler to add custom board support for future boards with more changes against the reference designs. The complete AXG support depends on the : - mmc: meson-gx: Add AXG compatible - net: designware: add meson meson axg compatible patches submitted to the U-Boot mailing list. Changes since v1: - Fixed AXG pinctrl request and AO pin count - Fixed tabs/spaces issues on s400 README Jerome Brunet (12): ARM: meson: clean-up platform selection configs: meson: remove unnecessary MESON_FDTFILE_SETTING board: amlogic: remove p212 derivatives board: amlogic: factorise gxbb boards ARM: rework amlogic configuration configs: meson: change default load addresses pinctrl: meson: rework gx pmx function pinctrl: meson: select generic pinctrl pinctrl: meson: add axg support clk: meson: silence debug print ARM: meson: rework soc arch file to prepare for new SoC ARM: meson: factorize common code out amlogic's boards Neil Armstrong (7): board: amlogic: move khadas-vim2 as q200 ref board clk: meson: add static to meson_gates table ARM: meson: Add support for AXG family ARM: dts: Sync Amlogic Meson AXG DT from Linux 4.20-rc1 clk: Add clock driver for AXG board: amlogic: add support for S400 board ARM: meson: Add boot device discovery arch/arm/dts/Makefile | 3 +- arch/arm/dts/meson-axg-s400.dts | 554 ++++++ arch/arm/dts/meson-axg.dtsi | 1589 +++++++++++++++++ arch/arm/include/asm/arch-meson/axg.h | 52 + arch/arm/include/asm/arch-meson/boot.h | 20 + arch/arm/include/asm/arch-meson/clock-axg.h | 104 ++ .../asm/arch-meson/{clock.h => clock-gx.h} | 4 +- arch/arm/include/asm/arch-meson/eth.h | 6 +- arch/arm/include/asm/arch-meson/gx.h | 1 + arch/arm/include/asm/arch-meson/mem.h | 3 +- arch/arm/mach-meson/Kconfig | 132 +- arch/arm/mach-meson/Makefile | 4 +- arch/arm/mach-meson/board-axg.c | 118 ++ arch/arm/mach-meson/board-common.c | 117 ++ arch/arm/mach-meson/{board.c => board-gx.c} | 106 +- arch/arm/mach-meson/eth.c | 53 - arch/arm/mach-meson/sm.c | 1 - board/amlogic/khadas-vim/Kconfig | 12 - board/amlogic/khadas-vim/MAINTAINERS | 6 - board/amlogic/khadas-vim/khadas-vim.c | 57 - board/amlogic/khadas-vim2/Kconfig | 12 - board/amlogic/libretech-cc/Kconfig | 12 - board/amlogic/libretech-cc/MAINTAINERS | 6 - board/amlogic/libretech-cc/Makefile | 6 - board/amlogic/libretech-cc/libretech-cc.c | 57 - board/amlogic/nanopi-k2/Kconfig | 12 - board/amlogic/nanopi-k2/MAINTAINERS | 6 - board/amlogic/nanopi-k2/Makefile | 7 - board/amlogic/nanopi-k2/nanopi-k2.c | 55 - board/amlogic/odroid-c2/Kconfig | 12 - board/amlogic/odroid-c2/MAINTAINERS | 1 + .../README => odroid-c2/README.nanopi-k2} | 0 .../odroid-c2/{README => README.odroid-c2} | 0 board/amlogic/odroid-c2/odroid-c2.c | 16 +- board/amlogic/p212/Kconfig | 12 - .../README => p212/README.khadas-vim} | 0 .../README => p212/README.libretech-cc} | 0 board/amlogic/p212/{README => README.p212} | 0 board/amlogic/p212/p212.c | 16 +- .../amlogic/{khadas-vim2 => q200}/MAINTAINERS | 6 +- board/amlogic/{khadas-vim => q200}/Makefile | 2 +- .../README => q200/README.khadas-vim2} | 0 board/amlogic/q200/README.q200 | 102 ++ .../khadas-vim2.c => q200/q200.c} | 14 +- board/amlogic/s400/MAINTAINERS | 6 + board/amlogic/{khadas-vim2 => s400}/Makefile | 2 +- board/amlogic/s400/README | 110 ++ board/amlogic/s400/s400.c | 21 + configs/khadas-vim2_defconfig | 1 - configs/khadas-vim_defconfig | 1 - configs/libretech-cc_defconfig | 1 - configs/nanopi-k2_defconfig | 2 - configs/odroid-c2_defconfig | 1 - configs/p212_defconfig | 1 - configs/s400_defconfig | 38 + drivers/clk/Makefile | 2 +- drivers/clk/clk_meson.c | 6 +- drivers/clk/clk_meson_axg.c | 316 ++++ drivers/pinctrl/meson/Kconfig | 18 +- drivers/pinctrl/meson/Makefile | 3 + drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c | 125 ++ drivers/pinctrl/meson/pinctrl-meson-axg.c | 979 ++++++++++ drivers/pinctrl/meson/pinctrl-meson-axg.h | 66 + drivers/pinctrl/meson/pinctrl-meson-gx-pmx.c | 97 + drivers/pinctrl/meson/pinctrl-meson-gx.h | 48 + drivers/pinctrl/meson/pinctrl-meson-gxbb.c | 6 +- drivers/pinctrl/meson/pinctrl-meson-gxl.c | 6 +- drivers/pinctrl/meson/pinctrl-meson.c | 109 +- drivers/pinctrl/meson/pinctrl-meson.h | 37 +- include/configs/khadas-vim.h | 16 - include/configs/khadas-vim2.h | 18 - include/configs/libretech-cc.h | 16 - .../configs/{meson-gx-common.h => meson64.h} | 49 +- include/configs/nanopi-k2.h | 16 - include/configs/odroid-c2.h | 16 - include/configs/p212.h | 18 - include/dt-bindings/clock/axg-aoclkc.h | 26 + include/dt-bindings/clock/axg-audio-clkc.h | 94 + include/dt-bindings/clock/axg-clkc.h | 76 + include/dt-bindings/gpio/meson-axg-gpio.h | 116 ++ .../reset/amlogic,meson-axg-audio-arb.h | 17 + .../reset/amlogic,meson-axg-reset.h | 124 ++ include/dt-bindings/reset/axg-aoclkc.h | 20 + 83 files changed, 5166 insertions(+), 754 deletions(-) create mode 100644 arch/arm/dts/meson-axg-s400.dts create mode 100644 arch/arm/dts/meson-axg.dtsi create mode 100644 arch/arm/include/asm/arch-meson/axg.h create mode 100644 arch/arm/include/asm/arch-meson/boot.h create mode 100644 arch/arm/include/asm/arch-meson/clock-axg.h rename arch/arm/include/asm/arch-meson/{clock.h => clock-gx.h} (98%) create mode 100644 arch/arm/mach-meson/board-axg.c create mode 100644 arch/arm/mach-meson/board-common.c rename arch/arm/mach-meson/{board.c => board-gx.c} (59%) delete mode 100644 arch/arm/mach-meson/eth.c delete mode 100644 board/amlogic/khadas-vim/Kconfig delete mode 100644 board/amlogic/khadas-vim/MAINTAINERS delete mode 100644 board/amlogic/khadas-vim/khadas-vim.c delete mode 100644 board/amlogic/khadas-vim2/Kconfig delete mode 100644 board/amlogic/libretech-cc/Kconfig delete mode 100644 board/amlogic/libretech-cc/MAINTAINERS delete mode 100644 board/amlogic/libretech-cc/Makefile delete mode 100644 board/amlogic/libretech-cc/libretech-cc.c delete mode 100644 board/amlogic/nanopi-k2/Kconfig delete mode 100644 board/amlogic/nanopi-k2/MAINTAINERS delete mode 100644 board/amlogic/nanopi-k2/Makefile delete mode 100644 board/amlogic/nanopi-k2/nanopi-k2.c delete mode 100644 board/amlogic/odroid-c2/Kconfig rename board/amlogic/{nanopi-k2/README => odroid-c2/README.nanopi-k2} (100%) rename board/amlogic/odroid-c2/{README => README.odroid-c2} (100%) delete mode 100644 board/amlogic/p212/Kconfig rename board/amlogic/{khadas-vim/README => p212/README.khadas-vim} (100%) rename board/amlogic/{libretech-cc/README => p212/README.libretech-cc} (100%) rename board/amlogic/p212/{README => README.p212} (100%) rename board/amlogic/{khadas-vim2 => q200}/MAINTAINERS (54%) rename board/amlogic/{khadas-vim => q200}/Makefile (85%) rename board/amlogic/{khadas-vim2/README => q200/README.khadas-vim2} (100%) create mode 100644 board/amlogic/q200/README.q200 rename board/amlogic/{khadas-vim2/khadas-vim2.c => q200/q200.c} (85%) create mode 100644 board/amlogic/s400/MAINTAINERS rename board/amlogic/{khadas-vim2 => s400}/Makefile (84%) create mode 100644 board/amlogic/s400/README create mode 100644 board/amlogic/s400/s400.c create mode 100644 configs/s400_defconfig create mode 100644 drivers/clk/clk_meson_axg.c create mode 100644 drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c create mode 100644 drivers/pinctrl/meson/pinctrl-meson-axg.c create mode 100644 drivers/pinctrl/meson/pinctrl-meson-axg.h create mode 100644 drivers/pinctrl/meson/pinctrl-meson-gx-pmx.c create mode 100644 drivers/pinctrl/meson/pinctrl-meson-gx.h delete mode 100644 include/configs/khadas-vim.h delete mode 100644 include/configs/khadas-vim2.h delete mode 100644 include/configs/libretech-cc.h rename include/configs/{meson-gx-common.h => meson64.h} (51%) delete mode 100644 include/configs/nanopi-k2.h delete mode 100644 include/configs/odroid-c2.h delete mode 100644 include/configs/p212.h create mode 100644 include/dt-bindings/clock/axg-aoclkc.h create mode 100644 include/dt-bindings/clock/axg-audio-clkc.h create mode 100644 include/dt-bindings/clock/axg-clkc.h create mode 100644 include/dt-bindings/gpio/meson-axg-gpio.h create mode 100644 include/dt-bindings/reset/amlogic,meson-axg-audio-arb.h create mode 100644 include/dt-bindings/reset/amlogic,meson-axg-reset.h create mode 100644 include/dt-bindings/reset/axg-aoclkc.h -- 2.19.1

2 22

[U-Boot] [PATCH v2 01/58] mpc83xx: Introduce ARCH_MPC830*
by Mario Six 26 Nov '18

26 Nov '18

Replace CONFIG_MPC830* with proper CONFIG_ARCH_MPC830* Kconfig options. Signed-off-by: Mario Six <mario.six(a)gdsys.cc> --- v1 -> v2: * Removed config options from whitelist --- arch/powerpc/cpu/mpc83xx/Kconfig | 17 +++++++++++++ arch/powerpc/cpu/mpc83xx/spd_sdram.c | 2 +- arch/powerpc/cpu/mpc83xx/speed.c | 38 ++++++++++++++-------------- arch/powerpc/include/asm/arch-mpc83xx/gpio.h | 2 +- arch/powerpc/include/asm/fsl_lbc.h | 2 +- arch/powerpc/include/asm/global_data.h | 6 ++--- arch/powerpc/include/asm/immap_83xx.h | 10 ++++---- arch/powerpc/include/asm/mpc8xxx_spi.h | 2 +- board/keymile/km83xx/km83xx.c | 2 +- drivers/qe/qe.c | 2 +- drivers/ram/mpc83xx_sdram.c | 4 +-- include/configs/MPC8308RDB.h | 2 -- include/configs/hrcon.h | 2 -- include/configs/km/km8309-common.h | 2 -- include/configs/km/km83xx-common.h | 2 +- include/configs/mpc8308_p1m.h | 2 -- include/configs/strider.h | 2 -- include/linux/immap_qe.h | 2 +- include/mpc83xx.h | 24 +++++++++--------- scripts/config_whitelist.txt | 3 --- 20 files changed, 66 insertions(+), 62 deletions(-) diff --git a/arch/powerpc/cpu/mpc83xx/Kconfig b/arch/powerpc/cpu/mpc83xx/Kconfig index 571cf8fc2ef..142b9247860 100644 --- a/arch/powerpc/cpu/mpc83xx/Kconfig +++ b/arch/powerpc/cpu/mpc83xx/Kconfig @@ -10,6 +10,7 @@ choice config TARGET_MPC8308_P1M bool "Support mpc8308_p1m" + select ARCH_MPC8308 config TARGET_SBC8349 bool "Support sbc8349" @@ -22,6 +23,7 @@ config TARGET_VME8349 config TARGET_MPC8308RDB bool "Support MPC8308RDB" + select ARCH_MPC8308 select SYS_FSL_ERRATUM_ESDHC111 config TARGET_MPC8313ERDB @@ -74,6 +76,8 @@ config TARGET_KM8360 config TARGET_SUVD3 bool "Support suvd3" + select ARCH_MPC8309 if SYS_EXTRA_OPTIONS="KMTEGR1" + select ARCH_MPC8309 if SYS_EXTRA_OPTIONS="KMVECT1" imply CMD_CRAMFS imply FS_CRAMFS @@ -87,15 +91,28 @@ config TARGET_TQM834X config TARGET_HRCON bool "Support hrcon" + select ARCH_MPC8308 select SYS_FSL_ERRATUM_ESDHC111 config TARGET_STRIDER bool "Support strider" + select ARCH_MPC8308 select SYS_FSL_ERRATUM_ESDHC111 imply CMD_PCA953X endchoice +config ARCH_MPC830X + bool + +config ARCH_MPC8308 + bool + select ARCH_MPC830X + +config ARCH_MPC8309 + bool + select ARCH_MPC830X + source "board/esd/vme8349/Kconfig" source "board/freescale/mpc8308rdb/Kconfig" source "board/freescale/mpc8313erdb/Kconfig" diff --git a/arch/powerpc/cpu/mpc83xx/spd_sdram.c b/arch/powerpc/cpu/mpc83xx/spd_sdram.c index 328a018eb6f..97ef77121b5 100644 --- a/arch/powerpc/cpu/mpc83xx/spd_sdram.c +++ b/arch/powerpc/cpu/mpc83xx/spd_sdram.c @@ -31,7 +31,7 @@ void board_add_ram_info(int use_default) printf(" (DDR%d", ((ddr->sdram_cfg & SDRAM_CFG_SDRAM_TYPE_MASK) >> SDRAM_CFG_SDRAM_TYPE_SHIFT) - 1); -#if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) +#if defined(CONFIG_ARCH_MPC8308) || defined(CONFIG_MPC831x) if ((ddr->sdram_cfg & SDRAM_CFG_DBW_MASK) == SDRAM_CFG_DBW_16) puts(", 16-bit"); else if ((ddr->sdram_cfg & SDRAM_CFG_DBW_MASK) == SDRAM_CFG_DBW_32) diff --git a/arch/powerpc/cpu/mpc83xx/speed.c b/arch/powerpc/cpu/mpc83xx/speed.c index 39bc1c53406..d537af5130a 100644 --- a/arch/powerpc/cpu/mpc83xx/speed.c +++ b/arch/powerpc/cpu/mpc83xx/speed.c @@ -85,12 +85,12 @@ int get_clocks(void) u32 lcrr; u32 csb_clk; -#if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \ +#if defined(CONFIG_ARCH_MPC8308) || defined(CONFIG_MPC831x) || \ defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x) u32 tsec1_clk; u32 tsec2_clk; u32 usbdr_clk; -#elif defined(CONFIG_MPC8309) +#elif defined(CONFIG_ARCH_MPC8309) u32 usbdr_clk; #endif #ifdef CONFIG_MPC834x @@ -107,7 +107,7 @@ int get_clocks(void) #if defined(CONFIG_FSL_ESDHC) u32 sdhc_clk; #endif -#if !defined(CONFIG_MPC8309) +#if !defined(CONFIG_ARCH_MPC8309) u32 enc_clk; #endif u32 lbiu_clk; @@ -122,7 +122,7 @@ int get_clocks(void) u32 qe_clk; u32 brg_clk; #endif -#if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \ +#if defined(CONFIG_ARCH_MPC8308) || defined(CONFIG_MPC831x) || \ defined(CONFIG_MPC837x) u32 pciexp1_clk; u32 pciexp2_clk; @@ -155,7 +155,7 @@ int get_clocks(void) sccr = im->clk.sccr; -#if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \ +#if defined(CONFIG_ARCH_MPC8308) || defined(CONFIG_MPC831x) || \ defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x) switch ((sccr & SCCR_TSEC1CM) >> SCCR_TSEC1CM_SHIFT) { case 0: @@ -176,7 +176,7 @@ int get_clocks(void) } #endif -#if defined(CONFIG_MPC830x) || defined(CONFIG_MPC831x) || \ +#if defined(CONFIG_ARCH_MPC830X) || defined(CONFIG_MPC831x) || \ defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x) switch ((sccr & SCCR_USBDRCM) >> SCCR_USBDRCM_SHIFT) { case 0: @@ -197,7 +197,7 @@ int get_clocks(void) } #endif -#if defined(CONFIG_MPC8308) || defined(CONFIG_MPC8315) || \ +#if defined(CONFIG_ARCH_MPC8308) || defined(CONFIG_MPC8315) || \ defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x) switch ((sccr & SCCR_TSEC2CM) >> SCCR_TSEC2CM_SHIFT) { case 0: @@ -252,7 +252,7 @@ int get_clocks(void) return -6; } #endif -#if !defined(CONFIG_MPC8309) +#if !defined(CONFIG_ARCH_MPC8309) switch ((sccr & SCCR_ENCCM) >> SCCR_ENCCM_SHIFT) { case 0: enc_clk = 0; @@ -317,20 +317,20 @@ int get_clocks(void) i2c1_clk = csb_clk; #elif defined(CONFIG_MPC832x) i2c1_clk = enc_clk; -#elif defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) +#elif defined(CONFIG_ARCH_MPC8308) || defined(CONFIG_MPC831x) i2c1_clk = enc_clk; #elif defined(CONFIG_FSL_ESDHC) i2c1_clk = sdhc_clk; #elif defined(CONFIG_MPC837x) i2c1_clk = enc_clk; -#elif defined(CONFIG_MPC8309) +#elif defined(CONFIG_ARCH_MPC8309) i2c1_clk = csb_clk; #endif #if !defined(CONFIG_MPC832x) i2c2_clk = csb_clk; /* i2c-2 clk is equal to csb clk */ #endif -#if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \ +#if defined(CONFIG_ARCH_MPC8308) || defined(CONFIG_MPC831x) || \ defined(CONFIG_MPC837x) switch ((sccr & SCCR_PCIEXP1CM) >> SCCR_PCIEXP1CM_SHIFT) { case 0: @@ -448,12 +448,12 @@ int get_clocks(void) #endif gd->arch.csb_clk = csb_clk; -#if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \ +#if defined(CONFIG_ARCH_MPC8308) || defined(CONFIG_MPC831x) || \ defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x) gd->arch.tsec1_clk = tsec1_clk; gd->arch.tsec2_clk = tsec2_clk; gd->arch.usbdr_clk = usbdr_clk; -#elif defined(CONFIG_MPC8309) +#elif defined(CONFIG_ARCH_MPC8309) gd->arch.usbdr_clk = usbdr_clk; #endif #if defined(CONFIG_MPC834x) @@ -470,7 +470,7 @@ int get_clocks(void) #if !defined(CONFIG_MPC832x) gd->arch.i2c2_clk = i2c2_clk; #endif -#if !defined(CONFIG_MPC8309) +#if !defined(CONFIG_ARCH_MPC8309) gd->arch.enc_clk = enc_clk; #endif gd->arch.lbiu_clk = lbiu_clk; @@ -483,7 +483,7 @@ int get_clocks(void) gd->arch.qe_clk = qe_clk; gd->arch.brg_clk = brg_clk; #endif -#if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \ +#if defined(CONFIG_ARCH_MPC8308) || defined(CONFIG_MPC831x) || \ defined(CONFIG_MPC837x) gd->arch.pciexp1_clk = pciexp1_clk; gd->arch.pciexp2_clk = pciexp2_clk; @@ -540,7 +540,7 @@ static int do_clocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) printf(" DDR Secondary: %-4s MHz\n", strmhz(buf, gd->arch.mem_sec_clk)); #endif -#if !defined(CONFIG_MPC8309) +#if !defined(CONFIG_ARCH_MPC8309) printf(" SEC: %-4s MHz\n", strmhz(buf, gd->arch.enc_clk)); #endif @@ -558,7 +558,7 @@ static int do_clocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) printf(" SDHC: %-4s MHz\n", strmhz(buf, gd->arch.sdhc_clk)); #endif -#if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \ +#if defined(CONFIG_ARCH_MPC8308) || defined(CONFIG_MPC831x) || \ defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x) printf(" TSEC1: %-4s MHz\n", strmhz(buf, gd->arch.tsec1_clk)); @@ -566,7 +566,7 @@ static int do_clocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) strmhz(buf, gd->arch.tsec2_clk)); printf(" USB DR: %-4s MHz\n", strmhz(buf, gd->arch.usbdr_clk)); -#elif defined(CONFIG_MPC8309) +#elif defined(CONFIG_ARCH_MPC8309) printf(" USB DR: %-4s MHz\n", strmhz(buf, gd->arch.usbdr_clk)); #endif @@ -574,7 +574,7 @@ static int do_clocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) printf(" USB MPH: %-4s MHz\n", strmhz(buf, gd->arch.usbmph_clk)); #endif -#if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \ +#if defined(CONFIG_ARCH_MPC8308) || defined(CONFIG_MPC831x) || \ defined(CONFIG_MPC837x) printf(" PCIEXP1: %-4s MHz\n", strmhz(buf, gd->arch.pciexp1_clk)); diff --git a/arch/powerpc/include/asm/arch-mpc83xx/gpio.h b/arch/powerpc/include/asm/arch-mpc83xx/gpio.h index 57f783ba14a..4e5a352ac67 100644 --- a/arch/powerpc/include/asm/arch-mpc83xx/gpio.h +++ b/arch/powerpc/include/asm/arch-mpc83xx/gpio.h @@ -6,7 +6,7 @@ /* * The MCP83xx's 1-2 GPIO controllers each with 32 bits. */ -#if defined(CONFIG_MPC8313) || defined(CONFIG_MPC8308) || \ +#if defined(CONFIG_MPC8313) || defined(CONFIG_ARCH_MPC8308) || \ defined(CONFIG_MPC8315) #define MPC83XX_GPIO_CTRLRS 1 #elif defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x) diff --git a/arch/powerpc/include/asm/fsl_lbc.h b/arch/powerpc/include/asm/fsl_lbc.h index b076d5e838d..cf89e186a67 100644 --- a/arch/powerpc/include/asm/fsl_lbc.h +++ b/arch/powerpc/include/asm/fsl_lbc.h @@ -133,7 +133,7 @@ void lbc_sdram_init(void); #define OR_GPCM_EHTR_SHIFT 1 #define OR_GPCM_EHTR_CLEAR 0x00000000 #define OR_GPCM_EHTR_SET 0x00000002 -#if !defined(CONFIG_MPC8308) +#if !defined(CONFIG_ARCH_MPC8308) #define OR_GPCM_EAD 0x00000001 #define OR_GPCM_EAD_SHIFT 0 #endif diff --git a/arch/powerpc/include/asm/global_data.h b/arch/powerpc/include/asm/global_data.h index d00cee95fbb..700e2be0ee2 100644 --- a/arch/powerpc/include/asm/global_data.h +++ b/arch/powerpc/include/asm/global_data.h @@ -35,12 +35,12 @@ struct arch_global_data { #else /* There are other clocks in the MPC83XX */ u32 csb_clk; -# if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \ +# if defined(CONFIG_ARCH_MPC8308) || defined(CONFIG_MPC831x) || \ defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x) u32 tsec1_clk; u32 tsec2_clk; u32 usbdr_clk; -# elif defined(CONFIG_MPC8309) +# elif defined(CONFIG_ARCH_MPC8309) u32 usbdr_clk; # endif # if defined(CONFIG_MPC834x) @@ -53,7 +53,7 @@ struct arch_global_data { u32 enc_clk; u32 lbiu_clk; u32 lclk_clk; -# if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \ +# if defined(CONFIG_ARCH_MPC8308) || defined(CONFIG_MPC831x) || \ defined(CONFIG_MPC837x) u32 pciexp1_clk; u32 pciexp2_clk; diff --git a/arch/powerpc/include/asm/immap_83xx.h b/arch/powerpc/include/asm/immap_83xx.h index afef36f2628..b10feb546c6 100644 --- a/arch/powerpc/include/asm/immap_83xx.h +++ b/arch/powerpc/include/asm/immap_83xx.h @@ -59,12 +59,12 @@ typedef struct sysconf83xx { u32 obir; /* Output Buffer Impedance Register */ u8 res8[0xC]; u32 pecr1; /* PCI Express control register 1 */ -#if defined(CONFIG_MPC830x) +#if defined(CONFIG_ARCH_MPC830X) u32 sdhccr; /* eSDHC Control Registers for MPC830x */ #else u32 pecr2; /* PCI Express control register 2 */ #endif -#if defined(CONFIG_MPC8309) +#if defined(CONFIG_ARCH_MPC8309) u32 can_dbg_ctrl; u32 res9a; u32 gpr1; @@ -604,7 +604,7 @@ typedef struct serdes83xx { * On Chip ROM */ typedef struct rom83xx { -#if defined(CONFIG_MPC8309) +#if defined(CONFIG_ARCH_MPC8309) u8 mem[0x8000]; #else u8 mem[0x10000]; @@ -714,7 +714,7 @@ typedef struct immap { u8 res7[0xC0000]; } immap_t; -#elif defined(CONFIG_MPC8308) || defined(CONFIG_MPC8315) +#elif defined(CONFIG_ARCH_MPC8308) || defined(CONFIG_MPC8315) typedef struct immap { sysconf83xx_t sysconf; /* System configuration */ wdt83xx_t wdt; /* Watch Dog Timer (WDT) Registers */ @@ -879,7 +879,7 @@ typedef struct immap { u8 res8[0xC0000]; u8 qe[0x100000]; /* QE block */ } immap_t; -#elif defined(CONFIG_MPC8309) +#elif defined(CONFIG_ARCH_MPC8309) typedef struct immap { sysconf83xx_t sysconf; /* System configuration */ wdt83xx_t wdt; /* Watch Dog Timer (WDT) Registers */ diff --git a/arch/powerpc/include/asm/mpc8xxx_spi.h b/arch/powerpc/include/asm/mpc8xxx_spi.h index 432be054696..518d0c388a7 100644 --- a/arch/powerpc/include/asm/mpc8xxx_spi.h +++ b/arch/powerpc/include/asm/mpc8xxx_spi.h @@ -10,7 +10,7 @@ #include <asm/types.h> -#if defined(CONFIG_MPC8308) || \ +#if defined(CONFIG_ARCH_MPC8308) || \ defined(CONFIG_MPC8313) || \ defined(CONFIG_MPC8315) || \ defined(CONFIG_MPC834x) || \ diff --git a/board/keymile/km83xx/km83xx.c b/board/keymile/km83xx/km83xx.c index 4818a4994a0..ce5126aae6b 100644 --- a/board/keymile/km83xx/km83xx.c +++ b/board/keymile/km83xx/km83xx.c @@ -56,7 +56,7 @@ const qe_iop_conf_t qe_iop_conf_tab[] = { {5, 2, 1, 0, 1}, /* UART2_RTS */ {5, 3, 2, 0, 2}, /* UART2_SIN */ {5, 1, 2, 0, 3}, /* UART2_CTS */ -#elif !defined(CONFIG_MPC8309) +#elif !defined(CONFIG_ARCH_MPC8309) /* Local Bus */ {0, 16, 1, 0, 3}, /* LA00 */ {0, 17, 1, 0, 3}, /* LA01 */ diff --git a/drivers/qe/qe.c b/drivers/qe/qe.c index 7010bbc2308..f5547d3b199 100644 --- a/drivers/qe/qe.c +++ b/drivers/qe/qe.c @@ -116,7 +116,7 @@ static void qe_sdma_init(void) */ static u8 thread_snum[] = { /* Evthreads 16-29 are not supported in MPC8309 */ -#if !defined(CONFIG_MPC8309) +#if !defined(CONFIG_ARCH_MPC8309) 0x04, 0x05, 0x0c, 0x0d, 0x14, 0x15, 0x1c, 0x1d, 0x24, 0x25, 0x2c, 0x2d, diff --git a/drivers/ram/mpc83xx_sdram.c b/drivers/ram/mpc83xx_sdram.c index 441baeb6f1a..e3523299812 100644 --- a/drivers/ram/mpc83xx_sdram.c +++ b/drivers/ram/mpc83xx_sdram.c @@ -179,7 +179,7 @@ static int mpc83xx_sdram_static_init(ofnode node, u32 cs, u32 mapaddr, u32 size) case ODT_RD_NEVER: case ODT_RD_ONLY_CURRENT: case ODT_RD_ONLY_OTHER_CS: - if (!IS_ENABLED(CONFIG_MPC830x) && + if (!IS_ENABLED(CONFIG_ARCH_MPC830X) && !IS_ENABLED(CONFIG_MPC831x) && !IS_ENABLED(CONFIG_MPC8360) && !IS_ENABLED(CONFIG_MPC837x)) { @@ -210,7 +210,7 @@ static int mpc83xx_sdram_static_init(ofnode node, u32 cs, u32 mapaddr, u32 size) case ODT_WR_NEVER: case ODT_WR_ONLY_CURRENT: case ODT_WR_ONLY_OTHER_CS: - if (!IS_ENABLED(CONFIG_MPC830x) && + if (!IS_ENABLED(CONFIG_ARCH_MPC830X) && !IS_ENABLED(CONFIG_MPC831x) && !IS_ENABLED(CONFIG_MPC8360) && !IS_ENABLED(CONFIG_MPC837x)) { diff --git a/include/configs/MPC8308RDB.h b/include/configs/MPC8308RDB.h index 3827ea464b4..7bf91524c88 100644 --- a/include/configs/MPC8308RDB.h +++ b/include/configs/MPC8308RDB.h @@ -12,8 +12,6 @@ * High Level Configuration Options */ #define CONFIG_E300 1 /* E300 family */ -#define CONFIG_MPC830x 1 /* MPC830x family */ -#define CONFIG_MPC8308 1 /* MPC8308 CPU specific */ #ifdef CONFIG_MMC #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC83xx_ESDHC_ADDR diff --git a/include/configs/hrcon.h b/include/configs/hrcon.h index 52e62778a3c..23ed4e54c72 100644 --- a/include/configs/hrcon.h +++ b/include/configs/hrcon.h @@ -13,8 +13,6 @@ */ #define CONFIG_E300 1 /* E300 family */ #define CONFIG_MPC83xx 1 /* MPC83xx family */ -#define CONFIG_MPC830x 1 /* MPC830x family */ -#define CONFIG_MPC8308 1 /* MPC8308 CPU specific */ #define CONFIG_HRCON 1 /* HRCON board specific */ #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC83xx_ESDHC_ADDR diff --git a/include/configs/km/km8309-common.h b/include/configs/km/km8309-common.h index 0e0b1b4605b..3bd334c5152 100644 --- a/include/configs/km/km8309-common.h +++ b/include/configs/km/km8309-common.h @@ -14,8 +14,6 @@ */ #define CONFIG_E300 1 /* E300 family */ #define CONFIG_QE 1 /* Has QE */ -#define CONFIG_MPC830x 1 /* MPC830x family */ -#define CONFIG_MPC8309 1 /* MPC8309 CPU specific */ #define CONFIG_KM_DEF_ARCH "arch=ppc_82xx\0" diff --git a/include/configs/km/km83xx-common.h b/include/configs/km/km83xx-common.h index a76f606e3ed..fb2a1cb39a0 100644 --- a/include/configs/km/km83xx-common.h +++ b/include/configs/km/km83xx-common.h @@ -135,7 +135,7 @@ #define CONFIG_UEC_ETH #define CONFIG_ETHPRIME "UEC0" -#if !defined(CONFIG_MPC8309) +#if !defined(CONFIG_ARCH_MPC8309) #define CONFIG_UEC_ETH1 /* GETH1 */ #define UEC_VERBOSE_DEBUG 1 #endif diff --git a/include/configs/mpc8308_p1m.h b/include/configs/mpc8308_p1m.h index 98f030388cd..c007877276b 100644 --- a/include/configs/mpc8308_p1m.h +++ b/include/configs/mpc8308_p1m.h @@ -12,8 +12,6 @@ * High Level Configuration Options */ #define CONFIG_E300 1 /* E300 family */ -#define CONFIG_MPC830x 1 /* MPC830x family */ -#define CONFIG_MPC8308 1 /* MPC8308 CPU specific */ /* * On-board devices diff --git a/include/configs/strider.h b/include/configs/strider.h index 972543d6bd1..89e0610871e 100644 --- a/include/configs/strider.h +++ b/include/configs/strider.h @@ -13,8 +13,6 @@ */ #define CONFIG_E300 1 /* E300 family */ #define CONFIG_MPC83xx 1 /* MPC83xx family */ -#define CONFIG_MPC830x 1 /* MPC830x family */ -#define CONFIG_MPC8308 1 /* MPC8308 CPU specific */ #define CONFIG_STRIDER 1 /* STRIDER board specific */ #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC83xx_ESDHC_ADDR diff --git a/include/linux/immap_qe.h b/include/linux/immap_qe.h index 51800096b2c..f7bc503ea33 100644 --- a/include/linux/immap_qe.h +++ b/include/linux/immap_qe.h @@ -16,7 +16,7 @@ #define QE_MURAM_SIZE 0xc000UL #define MAX_QE_RISC 2 #define QE_NUM_OF_SNUM 28 -#elif defined(CONFIG_MPC832x) || defined(CONFIG_MPC8309) +#elif defined(CONFIG_MPC832x) || defined(CONFIG_ARCH_MPC8309) #define QE_MURAM_SIZE 0x4000UL #define MAX_QE_RISC 1 #define QE_NUM_OF_SNUM 28 diff --git a/include/mpc83xx.h b/include/mpc83xx.h index a4c5bd38376..e93f50d0b33 100644 --- a/include/mpc83xx.h +++ b/include/mpc83xx.h @@ -129,7 +129,7 @@ #define SPCR_TSEC2EP 0x00000003 #define SPCR_TSEC2EP_SHIFT (31-31) -#elif defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \ +#elif defined(CONFIG_ARCH_MPC8308) || defined(CONFIG_MPC831x) || \ defined(CONFIG_MPC837x) /* SPCR bits - MPC8308, MPC831x and MPC837x specific */ /* TSEC data priority */ @@ -336,7 +336,7 @@ #define SICRH_SPI 0x00000003 #define SICRH_SPI_SD 0x00000001 -#elif defined(CONFIG_MPC8308) +#elif defined(CONFIG_ARCH_MPC8308) /* SICRL bits - MPC8308 specific */ #define SICRL_SPI_PF0 (0 << 28) #define SICRL_SPI_PF1 (1 << 28) @@ -384,7 +384,7 @@ #define SICRH_TSOBI2_V3P3 (0 << 0) #define SICRH_TSOBI2_V2P5 (1 << 0) -#elif defined(CONFIG_MPC8309) +#elif defined(CONFIG_ARCH_MPC8309) /* SICR_1 */ #define SICR_1_UART1_UART1S (0 << (30-2)) #define SICR_1_UART1_UART1RTS (1 << (30-2)) @@ -639,7 +639,7 @@ #define HRCWL_CE_TO_PLL_1X30 0x0000001E #define HRCWL_CE_TO_PLL_1X31 0x0000001F -#elif defined(CONFIG_MPC8308) || defined(CONFIG_MPC8315) +#elif defined(CONFIG_ARCH_MPC8308) || defined(CONFIG_MPC8315) #define HRCWL_SVCOD 0x30000000 #define HRCWL_SVCOD_SHIFT 28 #define HRCWL_SVCOD_DIV_2 0x00000000 @@ -654,7 +654,7 @@ #define HRCWL_SVCOD_DIV_8 0x10000000 #define HRCWL_SVCOD_DIV_2 0x20000000 #define HRCWL_SVCOD_DIV_1 0x30000000 -#elif defined(CONFIG_MPC8309) +#elif defined(CONFIG_ARCH_MPC8309) #define HRCWL_CEVCOD 0x000000C0 #define HRCWL_CEVCOD_SHIFT 6 @@ -765,7 +765,7 @@ #define HRCWH_ROM_LOC_LOCAL_16BIT 0x00600000 #define HRCWH_ROM_LOC_LOCAL_32BIT 0x00700000 -#if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \ +#if defined(CONFIG_ARCH_MPC8308) || defined(CONFIG_MPC831x) || \ defined(CONFIG_MPC837x) #define HRCWH_ROM_LOC_NAND_SP_8BIT 0x00100000 #define HRCWH_ROM_LOC_NAND_SP_16BIT 0x00200000 @@ -818,7 +818,7 @@ /* * RSR - Reset Status Register */ -#if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \ +#if defined(CONFIG_ARCH_MPC8308) || defined(CONFIG_MPC831x) || \ defined(CONFIG_MPC837x) #define RSR_RSTSRC 0xF0000000 /* Reset source */ #define RSR_RSTSRC_SHIFT 28 @@ -986,7 +986,7 @@ #define SCCR_USBDRCM_2 0x00200000 #define SCCR_USBDRCM_3 0x00300000 -#elif defined(CONFIG_MPC8308) || defined(CONFIG_MPC8315) +#elif defined(CONFIG_ARCH_MPC8308) || defined(CONFIG_MPC8315) /* SCCR bits - MPC8315/MPC8308 specific */ #define SCCR_TSEC1CM 0xc0000000 #define SCCR_TSEC1CM_SHIFT 30 @@ -1071,7 +1071,7 @@ #define SCCR_SATACM_1 0x00000055 #define SCCR_SATACM_2 0x000000aa #define SCCR_SATACM_3 0x000000ff -#elif defined(CONFIG_MPC8309) +#elif defined(CONFIG_ARCH_MPC8309) /* SCCR bits - MPC8309 specific */ #define SCCR_SDHCCM 0x0c000000 #define SCCR_SDHCCM_SHIFT 26 @@ -1117,7 +1117,7 @@ */ #define CSCONFIG_EN 0x80000000 #define CSCONFIG_AP 0x00800000 -#if defined(CONFIG_MPC830x) || defined(CONFIG_MPC831x) +#if defined(CONFIG_ARCH_MPC830X) || defined(CONFIG_MPC831x) #define CSCONFIG_ODT_RD_NEVER 0x00000000 #define CSCONFIG_ODT_RD_ONLY_CURRENT 0x00100000 #define CSCONFIG_ODT_RD_ONLY_OTHER_CS 0x00200000 @@ -1239,14 +1239,14 @@ #define SDRAM_CFG_SDRAM_TYPE_MASK 0x07000000 #define SDRAM_CFG_SDRAM_TYPE_SHIFT 24 #define SDRAM_CFG_DYN_PWR 0x00200000 -#if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) +#if defined(CONFIG_ARCH_MPC8308) || defined(CONFIG_MPC831x) #define SDRAM_CFG_DBW_MASK 0x00180000 #define SDRAM_CFG_DBW_16 0x00100000 #define SDRAM_CFG_DBW_32 0x00080000 #else #define SDRAM_CFG_32_BE 0x00080000 #endif -#if !defined(CONFIG_MPC8308) +#if !defined(CONFIG_ARCH_MPC8308) #define SDRAM_CFG_8_BE 0x00040000 #endif #define SDRAM_CFG_NCAP 0x00020000 diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 94c0f1ff828..84fa848f4dc 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -1259,9 +1259,6 @@ CONFIG_MMC_SPI_SPEED CONFIG_MMC_SUNXI_SLOT CONFIG_MMU CONFIG_MONITOR_IS_IN_RAM -CONFIG_MPC8308 -CONFIG_MPC8309 -CONFIG_MPC830x CONFIG_MPC8313 CONFIG_MPC8313ERDB CONFIG_MPC8315 -- 2.11.0

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Re: [U-Boot] [PATCH v4 0/3] RISC-V S-mode support
by Rick Chen 26 Nov '18

26 Nov '18

> Hi All, > > > > Is it possible to include this series for next U-Boot release? Hi Anup Yes. I will do some verification. And prepare the PR ASAP. Can you prepare a version which will be rebase on the latest u-boot-riscv.git Thanks Rick > > > > Regards, > > Anup >

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Re: [U-Boot] [PATCH v4 0/3] RISC-V S-mode support
by Rick Chen 26 Nov '18

26 Nov '18

> > Subject: [PATCH v4 0/3] RISC-V S-mode support > > > > This patchset allows us runing u-boot in S-mode which is useful on platforms > > where M-mode runtime firmware is an independent firmware and u-boot is used > > as last stage OS bootloader. > > > > The patchset based upon git://git.denx.de/u-boot-riscv.git Hi Anup I apply your patch-sets fail on u-boot-riscv.git Can you tell me which commit id I shall base on ? Rick > > and is tested on QEMU in both M-mode and S-mode. > > > > For S-mode testing, we have used u-boot.bin as payload of latest BBL (at commit > > 6ebd0f2a46255d0c76dad3c05b16c1d154795d26) > > applied with following changes: > > > > diff --git a/machine/emulation.c b/machine/emulation.c index 132e977..def75e1 > > 100644 > > --- a/machine/emulation.c > > +++ b/machine/emulation.c > > @@ -162,6 +162,12 @@ static inline int emulate_read_csr(int num, uintptr_t > > mstatus, uintptr_t* result > > > > switch (num) > > { > > + case CSR_MISA: > > + *result = read_csr(misa); > > + return 0; > > + case CSR_MHARTID: > > + *result = read_csr(mhartid); > > + return 0; > > case CSR_CYCLE: > > if (!((counteren >> (CSR_CYCLE - CSR_CYCLE)) & 1)) > > return -1; > > > > Changes since v3: > > - Replaced 'u-boot' with 'U-Boot' in commit message > > - Dropped 'an' in RISCV_SMODE kconfig option help message > > - Added appropriate #ifdef in arch/riscv/lib/interrupts.c > > > > Changes since v2: > > - Dropped 'default n" from RISCV_SMODE kconfig option > > - Replaced '-smode_' in defconfig names with '_smode_' > > > > Changes since v1: > > - Rebased upon latest git://git.denx.de/u-boot-riscv.git > > - Add details in cover letter for running u-boot in S-mode > > using BBL > > > > Anup Patel (3): > > riscv: Add kconfig option to run U-Boot in S-mode > > riscv: qemu: Use different SYS_TEXT_BASE for S-mode > > riscv: Add S-mode defconfigs for QEMU virt machine > > > > arch/riscv/Kconfig | 5 ++++ > > arch/riscv/cpu/start.S | 33 +++++++++++++++++++++++ > > arch/riscv/include/asm/encoding.h | 2 ++ > > arch/riscv/lib/interrupts.c | 36 +++++++++++++++++++------- > > board/emulation/qemu-riscv/Kconfig | 3 ++- > > board/emulation/qemu-riscv/MAINTAINERS | 2 ++ > > configs/qemu-riscv32_smode_defconfig | 10 +++++++ > > configs/qemu-riscv64_smode_defconfig | 11 ++++++++ > > 8 files changed, 92 insertions(+), 10 deletions(-) create mode 100644 > > configs/qemu-riscv32_smode_defconfig > > create mode 100644 configs/qemu-riscv64_smode_defconfig > > > > -- > > 2.17.1 >

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[U-Boot] [PATCH v4 0/3] RISC-V S-mode support
by Anup Patel 26 Nov '18

26 Nov '18

This patchset allows us runing u-boot in S-mode which is useful on platforms where M-mode runtime firmware is an independent firmware and u-boot is used as last stage OS bootloader. The patchset based upon git://git.denx.de/u-boot-riscv.git and is tested on QEMU in both M-mode and S-mode. For S-mode testing, we have used u-boot.bin as payload of latest BBL (at commit 6ebd0f2a46255d0c76dad3c05b16c1d154795d26) applied with following changes: diff --git a/machine/emulation.c b/machine/emulation.c index 132e977..def75e1 100644 --- a/machine/emulation.c +++ b/machine/emulation.c @@ -162,6 +162,12 @@ static inline int emulate_read_csr(int num, uintptr_t mstatus, uintptr_t* result switch (num) { + case CSR_MISA: + *result = read_csr(misa); + return 0; + case CSR_MHARTID: + *result = read_csr(mhartid); + return 0; case CSR_CYCLE: if (!((counteren >> (CSR_CYCLE - CSR_CYCLE)) & 1)) return -1; Changes since v3: - Replaced 'u-boot' with 'U-Boot' in commit message - Dropped 'an' in RISCV_SMODE kconfig option help message - Added appropriate #ifdef in arch/riscv/lib/interrupts.c Changes since v2: - Dropped 'default n" from RISCV_SMODE kconfig option - Replaced '-smode_' in defconfig names with '_smode_' Changes since v1: - Rebased upon latest git://git.denx.de/u-boot-riscv.git - Add details in cover letter for running u-boot in S-mode using BBL Anup Patel (3): riscv: Add kconfig option to run U-Boot in S-mode riscv: qemu: Use different SYS_TEXT_BASE for S-mode riscv: Add S-mode defconfigs for QEMU virt machine arch/riscv/Kconfig | 5 ++++ arch/riscv/cpu/start.S | 33 +++++++++++++++++++++++ arch/riscv/include/asm/encoding.h | 2 ++ arch/riscv/lib/interrupts.c | 36 +++++++++++++++++++------- board/emulation/qemu-riscv/Kconfig | 3 ++- board/emulation/qemu-riscv/MAINTAINERS | 2 ++ configs/qemu-riscv32_smode_defconfig | 10 +++++++ configs/qemu-riscv64_smode_defconfig | 11 ++++++++ 8 files changed, 92 insertions(+), 10 deletions(-) create mode 100644 configs/qemu-riscv32_smode_defconfig create mode 100644 configs/qemu-riscv64_smode_defconfig -- 2.17.1

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[U-Boot] [PATCH 1/1] efi_selftest: incorrect use of bitwise or
by Heinrich Schuchardt 25 Nov '18

25 Nov '18

We should use a logical or when combining logical values. Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- lib/efi_selftest/efi_selftest_loaded_image.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/efi_selftest/efi_selftest_loaded_image.c b/lib/efi_selftest/efi_selftest_loaded_image.c index f9b54ae2635..ea2b380a777 100644 --- a/lib/efi_selftest/efi_selftest_loaded_image.c +++ b/lib/efi_selftest/efi_selftest_loaded_image.c @@ -53,7 +53,7 @@ static int execute(void) efi_st_error("ProtocolsPerHandle failed\n"); return EFI_ST_FAILURE; } - if (!protocol_buffer_count | !protocol_buffer) { + if (!protocol_buffer_count || !protocol_buffer) { efi_st_error("ProtocolsPerHandle returned no protocol\n"); return EFI_ST_FAILURE; } -- 2.19.1

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