November 2018 - U-Boot

[U-Boot] [PATCH] drivers: regulator: regulator-uclass: disallow disable of always-on
by Richard Röjfors 27 Nov '18

27 Nov '18

It does not make sense to allow disable of a regulator that is defined always on. I found this because the new mmc code that tests if the mmc power can be switched off. That results in the rk3288 firefly board to die since the regulator, which is always-on, is shared with more than just mmc. Signed-off-by: Richard Röjfors <richard(a)puffinpack.se> --- drivers/power/regulator/regulator-uclass.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/power/regulator/regulator-uclass.c b/drivers/power/regulator/regulator-uclass.c index 4da8e43259..d5be6ef424 100644 --- a/drivers/power/regulator/regulator-uclass.c +++ b/drivers/power/regulator/regulator-uclass.c @@ -106,10 +106,15 @@ int regulator_get_enable(struct udevice *dev) int regulator_set_enable(struct udevice *dev, bool enable) { const struct dm_regulator_ops *ops = dev_get_driver_ops(dev); + struct dm_regulator_uclass_platdata *uc_pdata; if (!ops || !ops->set_enable) return -ENOSYS; + uc_pdata = dev_get_uclass_platdata(dev); + if (uc_pdata->always_on && !enable) + return -EINVAL; + return ops->set_enable(dev, enable); } -- 2.19.1

4 3

[U-Boot] [PATCH u-boot v3 0/3] Add Amlogic Meson SPI Flash Controller driver
by Neil Armstrong 27 Nov '18

27 Nov '18

The Amlogic Meson SoCs embeds a Flash oriented SPI Controller name SPIFC. This patchset add the driver ported from linux, but also import the regmap regmap_read_poll_timeout() to implify the register polling in the driver. Neil Armstrong (3): regmap: add regmap_read_poll_timeout() helper test: regmap: add regmap_read_poll_timeout test spi: Add Amlogic Meson SPI Flash Controller driver drivers/spi/Kconfig | 8 + drivers/spi/Makefile | 1 + drivers/spi/meson_spifc.c | 320 ++++++++++++++++++++++++++++++++++++++ include/regmap.h | 38 +++++ test/dm/regmap.c | 26 ++++ 5 files changed, 393 insertions(+) create mode 100644 drivers/spi/meson_spifc.c -- 2.19.1

3 6

[U-Boot] [PATCH V3 1/6] mmc: tmio: Switch to clock framework
by Marek Vasut 27 Nov '18

27 Nov '18

Switch the driver to using clk_get_rate()/clk_set_rate() instead of caching the mclk frequency in it's private data. This is required on the SDHI variant of the controller, where the upstream mclk need to be adjusted when using UHS modes. Platforms which do not support clock framework or do not support it in eg. SPL default to 100 MHz clock. Signed-off-by: Marek Vasut <marek.vasut+renesas(a)gmail.com> Cc: Masahiro Yamada <yamada.masahiro(a)socionext.com> --- V2: - Fix build on certain platforms using SPL without clock framework V3: - Turn clk_get_rate into a callback and fill it as needed on both renesas and socionext platforms --- drivers/mmc/renesas-sdhi.c | 21 +++++++++++++-------- drivers/mmc/tmio-common.c | 17 ++++++++++++++--- drivers/mmc/tmio-common.h | 5 ++++- drivers/mmc/uniphier-sd.c | 30 ++++++++++++++++++++---------- 4 files changed, 51 insertions(+), 22 deletions(-) diff --git a/drivers/mmc/renesas-sdhi.c b/drivers/mmc/renesas-sdhi.c index e7f96f8bf2..f4283d055f 100644 --- a/drivers/mmc/renesas-sdhi.c +++ b/drivers/mmc/renesas-sdhi.c @@ -358,15 +358,21 @@ static const struct udevice_id renesas_sdhi_match[] = { { /* sentinel */ } }; +static ulong renesas_sdhi_clk_get_rate(struct tmio_sd_priv *priv) +{ + return clk_get_rate(&priv->clk); +} + static int renesas_sdhi_probe(struct udevice *dev) { struct tmio_sd_priv *priv = dev_get_priv(dev); u32 quirks = dev_get_driver_data(dev); struct fdt_resource reg_res; - struct clk clk; DECLARE_GLOBAL_DATA_PTR; int ret; + priv->clk_get_rate = renesas_sdhi_clk_get_rate; + if (quirks == RENESAS_GEN2_QUIRKS) { ret = fdt_get_resource(gd->fdt_blob, dev_of_offset(dev), "reg", 0, &reg_res); @@ -380,22 +386,21 @@ static int renesas_sdhi_probe(struct udevice *dev) quirks |= TMIO_SD_CAP_16BIT; } - ret = clk_get_by_index(dev, 0, &clk); + ret = clk_get_by_index(dev, 0, &priv->clk); if (ret < 0) { dev_err(dev, "failed to get host clock\n"); return ret; } /* set to max rate */ - priv->mclk = clk_set_rate(&clk, ULONG_MAX); - if (IS_ERR_VALUE(priv->mclk)) { + ret = clk_set_rate(&priv->clk, 200000000); + if (ret < 0) { dev_err(dev, "failed to set rate for host clock\n"); - clk_free(&clk); - return priv->mclk; + clk_free(&priv->clk); + return ret; } - ret = clk_enable(&clk); - clk_free(&clk); + ret = clk_enable(&priv->clk); if (ret) { dev_err(dev, "failed to enable host clock\n"); return ret; diff --git a/drivers/mmc/tmio-common.c b/drivers/mmc/tmio-common.c index 0eca83a0f4..3ba2f07460 100644 --- a/drivers/mmc/tmio-common.c +++ b/drivers/mmc/tmio-common.c @@ -555,16 +555,24 @@ static void tmio_sd_set_ddr_mode(struct tmio_sd_priv *priv, tmio_sd_writel(priv, tmp, TMIO_SD_IF_MODE); } +static ulong tmio_sd_clk_get_rate(struct tmio_sd_priv *priv) +{ + return priv->clk_get_rate(priv); +} + static void tmio_sd_set_clk_rate(struct tmio_sd_priv *priv, struct mmc *mmc) { unsigned int divisor; u32 val, tmp; + ulong mclk; if (!mmc->clock) return; - divisor = DIV_ROUND_UP(priv->mclk, mmc->clock); + mclk = tmio_sd_clk_get_rate(priv); + + divisor = DIV_ROUND_UP(mclk, mmc->clock); if (divisor <= 1) val = (priv->caps & TMIO_SD_CAP_RCAR) ? @@ -708,6 +716,7 @@ int tmio_sd_probe(struct udevice *dev, u32 quirks) struct tmio_sd_priv *priv = dev_get_priv(dev); struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); fdt_addr_t base; + ulong mclk; int ret; base = devfdt_get_addr(dev); @@ -750,10 +759,12 @@ int tmio_sd_probe(struct udevice *dev, u32 quirks) tmio_sd_host_init(priv); + mclk = tmio_sd_clk_get_rate(priv); + plat->cfg.voltages = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34; - plat->cfg.f_min = priv->mclk / + plat->cfg.f_min = mclk / (priv->caps & TMIO_SD_CAP_DIV1024 ? 1024 : 512); - plat->cfg.f_max = priv->mclk; + plat->cfg.f_max = mclk; plat->cfg.b_max = U32_MAX; /* max value of TMIO_SD_SECCNT */ upriv->mmc = &plat->mmc; diff --git a/drivers/mmc/tmio-common.h b/drivers/mmc/tmio-common.h index 792b1ba5ae..6591c61c3c 100644 --- a/drivers/mmc/tmio-common.h +++ b/drivers/mmc/tmio-common.h @@ -117,7 +117,6 @@ struct tmio_sd_plat { struct tmio_sd_priv { void __iomem *regbase; - unsigned long mclk; unsigned int version; u32 caps; #define TMIO_SD_CAP_NONREMOVABLE BIT(0) /* Nonremovable e.g. eMMC */ @@ -133,6 +132,10 @@ struct tmio_sd_priv { #ifdef CONFIG_DM_REGULATOR struct udevice *vqmmc_dev; #endif +#if CONFIG_IS_ENABLED(CLK) + struct clk clk; +#endif + ulong (*clk_get_rate)(struct tmio_sd_priv *); }; int tmio_sd_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, diff --git a/drivers/mmc/uniphier-sd.c b/drivers/mmc/uniphier-sd.c index 813c28494c..6539880ab5 100644 --- a/drivers/mmc/uniphier-sd.c +++ b/drivers/mmc/uniphier-sd.c @@ -31,35 +31,45 @@ static const struct udevice_id uniphier_sd_match[] = { { /* sentinel */ } }; +static ulong uniphier_sd_clk_get_rate(struct tmio_sd_priv *priv) +{ +#if CONFIG_IS_ENABLED(CLK) + return clk_get_rate(&priv->clk); +#elif CONFIG_SPL_BUILD + return 100000000; +#else + return 0; +#endif +} + static int uniphier_sd_probe(struct udevice *dev) { struct tmio_sd_priv *priv = dev_get_priv(dev); + + priv->clk_get_rate = uniphier_sd_clk_get_rate; + #ifndef CONFIG_SPL_BUILD - struct clk clk; int ret; - ret = clk_get_by_index(dev, 0, &clk); + ret = clk_get_by_index(dev, 0, &priv->clk); if (ret < 0) { dev_err(dev, "failed to get host clock\n"); return ret; } /* set to max rate */ - priv->mclk = clk_set_rate(&clk, ULONG_MAX); - if (IS_ERR_VALUE(priv->mclk)) { + ret = clk_set_rate(&priv->clk, ULONG_MAX); + if (ret < 0) { dev_err(dev, "failed to set rate for host clock\n"); - clk_free(&clk); - return priv->mclk; + clk_free(&priv->clk); + return ret; } - ret = clk_enable(&clk); - clk_free(&clk); + ret = clk_enable(&priv->clk); if (ret) { dev_err(dev, "failed to enable host clock\n"); return ret; } -#else - priv->mclk = 100000000; #endif return tmio_sd_probe(dev, 0); -- 2.18.0

2 10

[U-Boot] i.MX needs prior to DM conversion?
by Tom Rini 27 Nov '18

27 Nov '18

Hey guys, So, from the BLK conversion thread, I'd like to bring up and ask what needs to happen before we can consider the i.MX families ready for bulk conversion to using DM (and OF_CONTROL and BLK and ..) at least in full U-Boot. I know some things have been converted already and some platforms do make use of it, but we have some missing items too. For example, both drivers/mmc/fsl_esdhc.c and drivers/ata/dwc_ahsata.c need conversion. Is anyone able to start on either of these soon? Thanks! -- Tom

3 3

[U-Boot] [PATCH v3 0/5] Submit upstream changes made while porting a customer board to mainline
by Otavio Salvador 27 Nov '18

27 Nov '18

Those changes are intended to easy the process of using U-Boot mainline with rv1108 based boards. Please give them a good review and if possible, merge them as they are in use for some time on our custom tree and working fine. Changes in v3: - rework commit log - rework commit log - rework commit log Changes in v2: - new patch - split bounce buffer change on a new patch Otavio Salvador (5): clk_rv1108: Sync with vendor tree ARM: rockchip: rv1108: Enable BOUNCE_BUFFER ARM: dts: rockchip: Add rv1108 eMMC pinctrl ARM: rockchip: rv1108: Make USB OTG functional ARM: rockchip: rv1108: Add support for default distro_bootcmd arch/arm/dts/rv1108.dtsi | 74 ++- .../include/asm/arch-rockchip/cru_rv1108.h | 143 +++++- arch/arm/mach-rockchip/Makefile | 1 + arch/arm/mach-rockchip/rv1108-board.c | 81 ++++ drivers/clk/rockchip/clk_rv1108.c | 457 +++++++++++++++++- include/configs/rv1108_common.h | 18 + include/dt-bindings/clock/rv1108-cru.h | 154 ++++-- 7 files changed, 877 insertions(+), 51 deletions(-) create mode 100644 arch/arm/mach-rockchip/rv1108-board.c -- 2.19.2

1 5

[U-Boot] [PATCH 1/1] armv8:LX2160: Adds distro secure boot support.
by Udit Agarwal 27 Nov '18

27 Nov '18

Adds esbc validate command for verification of MC and DPC firmware. Adds secure boot defconfig. Signed-off-by: Udit Agarwal <udit.agarwal(a)nxp.com> --- configs/lx2160ardb_tfa_SECURE_BOOT_defconfig | 86 ++++++++++++++++++++ include/configs/lx2160a_common.h | 10 +++ 2 files changed, 96 insertions(+) create mode 100644 configs/lx2160ardb_tfa_SECURE_BOOT_defconfig diff --git a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig new file mode 100644 index 0000000000..b7e3967ad9 --- /dev/null +++ b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig @@ -0,0 +1,86 @@ +CONFIG_ARM=y +CONFIG_TARGET_LX2160ARDB=y +CONFIG_SYS_TEXT_BASE=0x82000000 +CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y +CONFIG_SECURE_BOOT=y +CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2160a-rdb" +CONFIG_NR_DRAM_BANKS=3 +CONFIG_DM=y +CONFIG_FIT_VERBOSE=y +CONFIG_OF_BOARD_SETUP=y +CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_TFABOOT=y +CONFIG_USE_BOOTARGS=y +CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x21c0000 ramdisk_size=0x2000000 default_hugepagesz=1024m hugepagesz=1024m hugepages=2 pci=pcie_bus_perf" +# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_CMD_GREPENV=y +CONFIG_CMD_EEPROM=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +CONFIG_CMD_USB=y +CONFIG_CMD_CACHE=y +CONFIG_MP=y +CONFIG_OF_CONTROL=y +CONFIG_ENV_IS_NOWHERE=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_DM_SERIAL=y +CONFIG_SERIAL_PROBE_ALL=y +CONFIG_CONS_INDEX=0 +CONFIG_FSL_CAAM=y +CONFIG_FSL_ESDHC=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_MICRON=y +CONFIG_SPI_FLASH_USE_4K_SECTORS=n +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_NXP_FSPI=y +CONFIG_FSPI_AHB_EN_4BYTE=y +CONFIG_SYS_FSPI_AHB_INIT=y +CONFIG_PHYLIB=y +CONFIG_NETDEVICES=y +CONFIG_PHY_GIGE=y +CONFIG_CMD_NET=y +CONFIG_CMD_PING=y +CONFIG_CMD_PXE=y +CONFIG_CMD_MII=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_FAT=y +CONFIG_CMD_EXT2=y +CONFIG_PCI=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_LX=y +CONFIG_E1000=y +CONFIG_NET=y +CONFIG_DM_MMC=y +CONFIG_DM_MMC_OPS=n +CONFIG_BLK=n +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_STORAGE=y +CONFIG_EFI_LOADER_BOUNCE_BUFFER=y +CONFIG_SCSI_AHCI=y +CONFIG_SCSI=y +# CONFIG_SYS_FSL_DDR_PHY is not set +CONFIG_SYS_GEN2_DDR_PHY=y +CONFIG_SYS_MALLOC_F=y +CONFIG_SYS_MALLOC_F_LEN=0x6000 +CONFIG_PHYLIB_10G=y +CONFIG_PHY_AQUANTIA=y +CONFIG_PHY_CORTINA=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_INPHI=y +CONFIG_INPHI_25G=y +CONFIG_HUSH_PARSER=y +CONFIG_EMC2305=y +CONFIG_RSA=y +CONFIG_SPL_RSA=y +CONFIG_RSA_SOFTWARE_EXP=y diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h index fa554bc2f5..dbeeae9a89 100644 --- a/include/configs/lx2160a_common.h +++ b/include/configs/lx2160a_common.h @@ -198,11 +198,19 @@ unsigned long get_board_ddr_clk(void); /* Initial environment variables */ #define XSPI_MC_INIT_CMD \ + "env exists secureboot && " \ + "esbc_validate 0x20700000 && " \ + "esbc_validate 0x20740000 ;" \ "fsl_mc start mc 0x20a00000 0x20e00000\0" #define SD_MC_INIT_CMD \ "mmc read 0x80000000 0x5000 0x800;" \ "mmc read 0x80100000 0x7000 0x800;" \ + "env exists secureboot && " \ + "mmc read 0x80700000 0x3800 0x10 && " \ + "mmc read 0x80740000 0x3A00 0x10 && " \ + "esbc_validate 0x80700000 && " \ + "esbc_validate 0x80740000 ;" \ "fsl_mc start mc 0x80000000 0x80100000\0" #define EXTRA_ENV_SETTINGS \ @@ -224,7 +232,9 @@ unsigned long get_board_ddr_clk(void); "load_addr=0xa0000000\0" \ "kernel_size=0x2800000\0" \ "kernel_addr_sd=0x8000\0" \ + "kernelhdr_addr_sd=0x4000\0" \ "kernel_size_sd=0x1d000\0" \ + "kernelhdr_size_sd=0x10\0" \ "console=ttyAMA0,38400n8\0" \ BOOTENV \ "mcmemsize=0x70000000\0" \ -- 2.17.1

1 0

[U-Boot] [PATCH 0/5] Improve identification of ARC cores
by Alexey Brodkin 27 Nov '18

27 Nov '18

Print more complex information about ARC core we're running on. This includes smarts for ARC core template detection, CPU clock frequency, human-readable board·description etc. Alexey Brodkin (5): ARC: Improve identification of ARC cores arc: Get rid of board-specific print_cpuinfo() arc: emsdp: Read real CPU clock value from hardware arc: emsdp: Refactor register and bit accesses arc: devboards: Implement checkboard() arch/arc/include/asm/arcregs.h | 25 +++- arch/arc/lib/cpu.c | 200 ++++++++++++++++++++++--- board/synopsys/axs10x/axs10x.c | 8 + board/synopsys/emsdp/emsdp.c | 70 +++++++-- board/synopsys/hsdk/hsdk.c | 8 +- board/synopsys/iot_devkit/iot_devkit.c | 10 -- 6 files changed, 273 insertions(+), 48 deletions(-) -- 2.19.1

1 5

[U-Boot] [PATCH] arc: emsdp: Bump RAM size to 16 Mb
by Alexey Brodkin 27 Nov '18

27 Nov '18

On v2 boards that will hit real stock we'll have 16 Mb of RAM. Note on v1 boards (if anybody ever get one out of trash bin) this leads to U-Boot execution freeze in the middle ofthe relocation so don't be surprised. Signed-off-by: Alexey Brodkin <abrodkin(a)synopsys.com> --- include/configs/emsdp.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/emsdp.h b/include/configs/emsdp.h index 385d59e33875..9a205edc7c0d 100644 --- a/include/configs/emsdp.h +++ b/include/configs/emsdp.h @@ -11,7 +11,7 @@ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_SDRAM_BASE 0x10000000 -#define CONFIG_SYS_SDRAM_SIZE SZ_8M +#define CONFIG_SYS_SDRAM_SIZE SZ_16M #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_1M) -- 2.19.1

1 0

Re: [U-Boot] Uboot send pull request
by Rick Chen 27 Nov '18

27 Nov '18

> > > Hi Tom, > > > > > > Please pull the following patch from u-boot-riscv into your tree. > > > Thanks! > > > > In the future can you please include a short summary here if you aren't using a > > signed tag? Thanks! Hi Tom Sorry about that ! I will use a signed tag or include a short summary in the future. Thanks a lot. Rick > > > > > > > > The following changes since commit > > 5830791d91d1200854ef78fcb32f808c8080f0f0: > > > > > > Merge tag 'pull-tg18' of git://git.denx.de/u-boot-dm (2018-11-23 > > > 17:25:27 -0500) > > > > > > are available in the Git repository at: > > > > > > git://git.denx.de/u-boot-riscv.git > > > > > > for you to fetch changes up to 52923c6db7f00e0197ec894c8c1bb8a7681974bb: > > > > > > riscv: cache: Implement i/dcache [status, enable, disable] > > > (2018-11-26 13:58:01 +0800) > > > > > > > With a tweak to the MAINTAINERS file for the new configs, applied to > > u-boot/master, thanks! > > > > -- > > Tom

1 0

[U-Boot] [PATCH] pxe: Try even board specific boot
by michal.hrusecky＠nic.cz 27 Nov '18

27 Nov '18

From: Michal Hrusecky <michal.hrusecky(a)nic.cz> Add path containing board name (if available) to the list of paths tried via PXE by default. Some SoC families are quite diverse and sometimes it makes sense to have special image just for a specific boards. Signed-off-by: Michal Hrusecky <michal.hrusecky(a)nic.cz> --- cmd/pxe.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/cmd/pxe.c b/cmd/pxe.c index 274555319b..0742b3b4f9 100644 --- a/cmd/pxe.c +++ b/cmd/pxe.c @@ -21,6 +21,9 @@ #define MAX_TFTP_PATH_LEN 127 const char *pxe_default_paths[] = { +#ifdef CONFIG_SYS_BOARD + "default-" CONFIG_SYS_ARCH "-" CONFIG_SYS_SOC "-" CONFIG_SYS_BOARD, +#endif #ifdef CONFIG_SYS_SOC "default-" CONFIG_SYS_ARCH "-" CONFIG_SYS_SOC, #endif -- 2.19.1

2 1