January 2018 - U-Boot

[U-Boot] [RFC PATCH] ubifs: Remove functions which call functions which are not present
by Michal Simek 04 Jan '18

04 Jan '18

The patch: "ubifs: Import atomic_long operations from Linux" (sha1: dc2884315d492b1eefd9d32443c1f0aa3c0a991e) added copy of atomic-long.h from Linux kernel but when BITS_PER_LONG == 64 several functions are not present. The patch is removing these warnings when UBIFS is enabled: include/asm-generic/atomic-long.h:73:9: warning: implicit declaration of function ‘atomic64_sub_and_test’ [-Wimplicit-function-declaration] return atomic64_sub_and_test(i, v); ^~~~~~~~~~~~~~~~~~~~~ include/asm-generic/atomic-long.h: In function ‘atomic_long_dec_and_test’: include/asm-generic/atomic-long.h:80:9: warning: implicit declaration of function ‘atomic64_dec_and_test’ [-Wimplicit-function-declaration] return atomic64_dec_and_test(v); ^~~~~~~~~~~~~~~~~~~~~ include/asm-generic/atomic-long.h: In function ‘atomic_long_inc_and_test’: include/asm-generic/atomic-long.h:87:9: warning: implicit declaration of function ‘atomic64_inc_and_test’ [-Wimplicit-function-declaration] return atomic64_inc_and_test(v); ^~~~~~~~~~~~~~~~~~~~~ include/asm-generic/atomic-long.h: In function ‘atomic_long_add_negative’: include/asm-generic/atomic-long.h:94:9: warning: implicit declaration of function ‘atomic64_add_negative’ [-Wimplicit-function-declaration] return atomic64_add_negative(i, v); ^~~~~~~~~~~~~~~~~~~~~ include/asm-generic/atomic-long.h: In function ‘atomic_long_add_return’: include/asm-generic/atomic-long.h:101:15: warning: implicit declaration of function ‘atomic64_add_return’ [-Wimplicit-function-declaration] return (long)atomic64_add_return(i, v); ^~~~~~~~~~~~~~~~~~~ include/asm-generic/atomic-long.h: In function ‘atomic_long_sub_return’: include/asm-generic/atomic-long.h:108:15: warning: implicit declaration of function ‘atomic64_sub_return’ [-Wimplicit-function-declaration] return (long)atomic64_sub_return(i, v); ^~~~~~~~~~~~~~~~~~~ include/asm-generic/atomic-long.h: In function ‘atomic_long_inc_return’: include/asm-generic/atomic-long.h:115:15: warning: implicit declaration of function ‘atomic64_inc_return’ [-Wimplicit-function-declaration] return (long)atomic64_inc_return(v); ^~~~~~~~~~~~~~~~~~~ include/asm-generic/atomic-long.h: In function ‘atomic_long_dec_return’: include/asm-generic/atomic-long.h:122:15: warning: implicit declaration of function ‘atomic64_dec_return’ [-Wimplicit-function-declaration] return (long)atomic64_dec_return(v); ^~~~~~~~~~~~~~~~~~~ include/asm-generic/atomic-long.h: In function ‘atomic_long_add_unless’: include/asm-generic/atomic-long.h:129:15: warning: implicit declaration of function ‘atomic64_add_unless’ [-Wimplicit-function-declaration] return (long)atomic64_add_unless(v, a, u); Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- include/asm-generic/atomic-long.h | 63 --------------------------------------- 1 file changed, 63 deletions(-) diff --git a/include/asm-generic/atomic-long.h b/include/asm-generic/atomic-long.h index d0469ef2e336..d2b86e2684ca 100644 --- a/include/asm-generic/atomic-long.h +++ b/include/asm-generic/atomic-long.h @@ -66,69 +66,6 @@ static inline void atomic_long_sub(long i, atomic_long_t *l) atomic64_sub(i, v); } -static inline int atomic_long_sub_and_test(long i, atomic_long_t *l) -{ - atomic64_t *v = (atomic64_t *)l; - - return atomic64_sub_and_test(i, v); -} - -static inline int atomic_long_dec_and_test(atomic_long_t *l) -{ - atomic64_t *v = (atomic64_t *)l; - - return atomic64_dec_and_test(v); -} - -static inline int atomic_long_inc_and_test(atomic_long_t *l) -{ - atomic64_t *v = (atomic64_t *)l; - - return atomic64_inc_and_test(v); -} - -static inline int atomic_long_add_negative(long i, atomic_long_t *l) -{ - atomic64_t *v = (atomic64_t *)l; - - return atomic64_add_negative(i, v); -} - -static inline long atomic_long_add_return(long i, atomic_long_t *l) -{ - atomic64_t *v = (atomic64_t *)l; - - return (long)atomic64_add_return(i, v); -} - -static inline long atomic_long_sub_return(long i, atomic_long_t *l) -{ - atomic64_t *v = (atomic64_t *)l; - - return (long)atomic64_sub_return(i, v); -} - -static inline long atomic_long_inc_return(atomic_long_t *l) -{ - atomic64_t *v = (atomic64_t *)l; - - return (long)atomic64_inc_return(v); -} - -static inline long atomic_long_dec_return(atomic_long_t *l) -{ - atomic64_t *v = (atomic64_t *)l; - - return (long)atomic64_dec_return(v); -} - -static inline long atomic_long_add_unless(atomic_long_t *l, long a, long u) -{ - atomic64_t *v = (atomic64_t *)l; - - return (long)atomic64_add_unless(v, a, u); -} - #define atomic_long_inc_not_zero(l) atomic64_inc_not_zero((atomic64_t *)(l)) #define atomic_long_cmpxchg(l, old, new) \ -- 1.9.1

1 0

Re: [U-Boot] QSPI "sf probe ...", "sf read ..." on Altera SoC FPGA
by Goldschmidt Simon 04 Jan '18

04 Jan '18

On Wed, 03/01/2018 14:51, Jagan Teki wrote: >> There were already patches posted on this list by me and others, but >> unfortunately they haven't made it into the repository, yet. >> >> Jagan, could you comment on the status of these fixes? I can search >> for the patchwork items related if you want me to. > > 2 out of 1 of this[1] have some discussion still going is it? > > [1] https://patchwork.ozlabs.org/patch/838195/ No, that series should be dropped. I don't know if I can do anything about that in patchwork though? Let me check the patches from my upstreaming queue when I'm back at work tomorrow. I'll send a list of patchwork items I needed to get QSPI running on mach-socfpga. Thanks, Simon

2 1

[U-Boot] [PATCH 1/2] imx7: spl: Use SPL boot device MMC1 for all of the SOCs MMC/SD boot devices
by Eran Matityahu 04 Jan '18

04 Jan '18

Use only one SPL MMC device, similarly to the iMX6 code Signed-off-by: Eran Matityahu <eran.m(a)variscite.com> --- arch/arm/mach-imx/spl.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/arm/mach-imx/spl.c b/arch/arm/mach-imx/spl.c index d0d1b73aa6..6b5bd8990c 100644 --- a/arch/arm/mach-imx/spl.c +++ b/arch/arm/mach-imx/spl.c @@ -106,10 +106,9 @@ u32 spl_boot_device(void) switch (boot_device_spl) { case SD1_BOOT: case MMC1_BOOT: - return BOOT_DEVICE_MMC1; case SD2_BOOT: case MMC2_BOOT: - return BOOT_DEVICE_MMC2; + return BOOT_DEVICE_MMC1; case SPI_NOR_BOOT: return BOOT_DEVICE_SPI; default: -- 2.16.0-rc0

3 12

[U-Boot] [PATCH v3 00/11] rockchip: add tpl and OPTEE support for rk3229
by Kever Yang 04 Jan '18

04 Jan '18

Add some generic options for TPL support for arm 32bit, and then and TPL support for rk3229(cortex-A7), and then add OPTEE support in SPL. Tested on latest u-boot-rockchip master. Changes in v3: - do not init ddr region in spl Changes in v2: - update subject with ARCH_MEM info - Add new image type like ATF - Using new image type for op-tee - Make the its as common file used for all armv7 with op-tee - update defconfig option Kever Yang (11): lib: add TPL_OF_LIBFDT option for TPL arm: add option for TPL ARCH_MEM in arm 32bit arm: add a separate stack for TPL rockchip: rk322x: enable tpl support sysreset: enable driver support in SPL/TPL image: add os type for OP-TEE spl: add support to booting with OP-TEE rockchip: rk322x: dts: enable uart2 for SPL/TPL rockchip: add fit source file for pack itb with op-tee rockchip: evb-rk3229: add README file for OP-TEE support rockchip: evb-rk322x: update defconfig with tpl and optee support arch/arm/Kconfig | 29 +++++++++ arch/arm/dts/rk3229-evb.dts | 1 + arch/arm/lib/crt0.S | 4 +- arch/arm/mach-rockchip/Kconfig | 9 +++ arch/arm/mach-rockchip/Makefile | 3 +- arch/arm/mach-rockchip/fit_spl_optee.its | 50 ++++++++++++++++ arch/arm/mach-rockchip/rk322x-board-spl.c | 63 +++++-------------- arch/arm/mach-rockchip/rk322x-board-tpl.c | 90 ++++++++++++++++++++++++++++ arch/arm/mach-rockchip/rk322x/u-boot-tpl.lds | 13 ++++ board/rockchip/evb_rk3229/README | 72 ++++++++++++++++++++++ common/image.c | 1 + common/spl/Kconfig | 7 +++ common/spl/Makefile | 1 + common/spl/spl.c | 8 +++ common/spl/spl_optee.S | 13 ++++ configs/evb-rk3229_defconfig | 26 +++++++- drivers/sysreset/Kconfig | 18 ++++++ drivers/sysreset/Makefile | 2 +- include/configs/rk322x_common.h | 9 ++- include/image.h | 1 + include/spl.h | 9 +++ lib/Kconfig | 10 ++++ 22 files changed, 381 insertions(+), 58 deletions(-) create mode 100644 arch/arm/mach-rockchip/fit_spl_optee.its create mode 100644 arch/arm/mach-rockchip/rk322x-board-tpl.c create mode 100644 arch/arm/mach-rockchip/rk322x/u-boot-tpl.lds create mode 100644 board/rockchip/evb_rk3229/README create mode 100644 common/spl/spl_optee.S -- 1.9.1

4 37

[U-Boot] [PATCH] mx6ull: Handle the CONFIG_MX6ULL cases correctly
by Fabio Estevam 04 Jan '18

04 Jan '18

From: Fabio Estevam <fabio.estevam(a)nxp.com> Since commit 051ba9e082f7 ("Kconfig: mx6ull: Deselect MX6UL from CONFIG_MX6ULL") CONFIG_MX6ULL does not select CONFIG_MX6UL anymore, so take this into consideration in all the checks for CONFIG_MX6UL. Reported-by: Stefan Agner <stefan(a)agner.ch> Signed-off-by: Fabio Estevam <fabio.estevam(a)nxp.com> --- arch/arm/include/asm/arch-mx6/imx-regs.h | 20 ++++++++++---------- arch/arm/include/asm/arch-mx6/mx6-ddr.h | 2 +- arch/arm/include/asm/arch-mx6/mx6ul-ddr.h | 2 +- arch/arm/include/asm/mach-imx/iomux-v3.h | 4 ++-- arch/arm/include/asm/mach-imx/regs-lcdif.h | 9 ++++++--- arch/arm/mach-imx/mx6/ddr.c | 2 +- drivers/gpio/mxc_gpio.c | 4 ++-- include/configs/mx6_common.h | 4 ++-- 8 files changed, 25 insertions(+), 22 deletions(-) diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h index 7736b6a..8c7ff6a 100644 --- a/arch/arm/include/asm/arch-mx6/imx-regs.h +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h @@ -17,7 +17,7 @@ #define GPU_2D_ARB_END_ADDR 0x02203FFF #define OPENVG_ARB_BASE_ADDR 0x02204000 #define OPENVG_ARB_END_ADDR 0x02207FFF -#elif (defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL)) +#elif (defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)) #define CAAM_ARB_BASE_ADDR 0x00100000 #define CAAM_ARB_END_ADDR 0x00107FFF #define GPU_ARB_BASE_ADDR 0x01800000 @@ -46,7 +46,7 @@ #define MXS_BCH_BASE (APBH_DMA_ARB_BASE_ADDR + 0x04000) /* GPV - PL301 configuration ports */ -#if (defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || \ +#if (defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL) || \ defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL)) #define GPV2_BASE_ADDR 0x00D00000 #define GPV3_BASE_ADDR 0x00E00000 @@ -88,7 +88,7 @@ #define QSPI0_AMBA_END 0x6FFFFFFF #define QSPI1_AMBA_BASE 0x70000000 #define QSPI1_AMBA_END 0x7FFFFFFF -#elif defined(CONFIG_MX6UL) +#elif (defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)) #define WEIM_ARB_BASE_ADDR 0x50000000 #define WEIM_ARB_END_ADDR 0x57FFFFFF #define QSPI0_AMBA_BASE 0x60000000 @@ -109,7 +109,7 @@ #endif #if (defined(CONFIG_MX6SLL) || defined(CONFIG_MX6SL) || \ - defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL)) + defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)) #define MMDC0_ARB_BASE_ADDR 0x80000000 #define MMDC0_ARB_END_ADDR 0xFFFFFFFF #define MMDC1_ARB_BASE_ADDR 0xC0000000 @@ -262,7 +262,7 @@ #define MMDC_P0_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x30000) /* i.MX6SL/SLL */ #define RNGB_IPS_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x34000) -#ifdef CONFIG_MX6UL +#if (defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)) #define ENET2_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x34000) #else /* i.MX6SX */ @@ -288,7 +288,7 @@ #define IP2APB_PERFMON3_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x4C000) #endif #define IP2APB_TZASC1_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x50000) -#ifdef CONFIG_MX6UL +#if (defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)) #define QSPI0_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x60000) #define UART6_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x7C000) #elif defined(CONFIG_MX6SX) @@ -337,7 +337,7 @@ #define PWM6_BASE_ADDR (AIPS3_ARB_BASE_ADDR + 0xA8000) #define PWM7_BASE_ADDR (AIPS3_ARB_BASE_ADDR + 0xAC000) #define PWM8_BASE_ADDR (AIPS3_ARB_BASE_ADDR + 0xB0000) -#elif defined(CONFIG_MX6ULL) +#elif (defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)) #define AIPS3_CONFIG_BASE_ADDR (AIPS3_ARB_BASE_ADDR + 0x7C000) #define DCP_BASE_ADDR (AIPS3_ARB_BASE_ADDR + 0x80000) #define RNGB_BASE_ADDR (AIPS3_ARB_BASE_ADDR + 0x84000) @@ -354,7 +354,7 @@ #define MX6SX_LCDIF1_BASE_ADDR (AIPS3_ARB_BASE_ADDR + 0x20000) #define MX6SX_WDOG3_BASE_ADDR (AIPS3_ARB_BASE_ADDR + 0x88000) -#if !(defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || \ +#if !(defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL) || \ defined(CONFIG_MX6SLL) || defined(CONFIG_MX6SL)) #define IRAM_SIZE 0x00040000 #else @@ -573,7 +573,7 @@ struct src { #define IOMUXC_GPR12_LOS_LEVEL (0x1f << 4) struct iomuxc { -#if (defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL)) +#if (defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)) u8 reserved[0x4000]; #endif u32 gpr[14]; @@ -700,7 +700,7 @@ struct cspi_regs { #define MXC_CSPICON_SSPOL 12 /* SS polarity */ #define MXC_CSPICON_CTL 20 /* inactive state of SCLK */ #if defined(CONFIG_MX6SLL) || defined(CONFIG_MX6SL) || \ - defined(CONFIG_MX6DL) || defined(CONFIG_MX6UL) + defined(CONFIG_MX6DL) || defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL) #define MXC_SPI_BASE_ADDRESSES \ ECSPI1_BASE_ADDR, \ ECSPI2_BASE_ADDR, \ diff --git a/arch/arm/include/asm/arch-mx6/mx6-ddr.h b/arch/arm/include/asm/arch-mx6/mx6-ddr.h index 2a8d443..19d2f1d 100644 --- a/arch/arm/include/asm/arch-mx6/mx6-ddr.h +++ b/arch/arm/include/asm/arch-mx6/mx6-ddr.h @@ -16,7 +16,7 @@ #ifdef CONFIG_MX6SX #include "mx6sx-ddr.h" #else -#ifdef CONFIG_MX6UL +#if defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL) #include "mx6ul-ddr.h" #else #ifdef CONFIG_MX6SL diff --git a/arch/arm/include/asm/arch-mx6/mx6ul-ddr.h b/arch/arm/include/asm/arch-mx6/mx6ul-ddr.h index ed11c4b..518b812 100644 --- a/arch/arm/include/asm/arch-mx6/mx6ul-ddr.h +++ b/arch/arm/include/asm/arch-mx6/mx6ul-ddr.h @@ -7,7 +7,7 @@ #ifndef __ASM_ARCH_MX6UL_DDR_H__ #define __ASM_ARCH_MX6UL_DDR_H__ -#ifndef CONFIG_MX6UL +#if !(defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)) #error "wrong CPU" #endif diff --git a/arch/arm/include/asm/mach-imx/iomux-v3.h b/arch/arm/include/asm/mach-imx/iomux-v3.h index ad35e01..9fba8d1 100644 --- a/arch/arm/include/asm/mach-imx/iomux-v3.h +++ b/arch/arm/include/asm/mach-imx/iomux-v3.h @@ -127,7 +127,7 @@ typedef u64 iomux_v3_cfg_t; #define PAD_CTL_ODE (1 << 11) -#if defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) +#if defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL) #define PAD_CTL_SPEED_LOW (0 << 6) #else #define PAD_CTL_SPEED_LOW (1 << 6) @@ -253,7 +253,7 @@ if (is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D)) { \ imx_iomux_v3_setup_pad(MX6Q_##def); #define SETUP_IOMUX_PADS(x) \ imx_iomux_v3_setup_multiple_pads(x, ARRAY_SIZE(x)) -#elif defined(CONFIG_MX6UL) +#elif defined(CONFIG_MX6UL)|| defined(CONFIG_MX6ULL) #define IOMUX_PADS(x) MX6_##x #define SETUP_IOMUX_PAD(def) \ imx_iomux_v3_setup_pad(MX6_##def); diff --git a/arch/arm/include/asm/mach-imx/regs-lcdif.h b/arch/arm/include/asm/mach-imx/regs-lcdif.h index 4de401b..17ae503 100644 --- a/arch/arm/include/asm/mach-imx/regs-lcdif.h +++ b/arch/arm/include/asm/mach-imx/regs-lcdif.h @@ -20,7 +20,8 @@ struct mxs_lcdif_regs { mxs_reg_32(hw_lcdif_ctrl) /* 0x00 */ mxs_reg_32(hw_lcdif_ctrl1) /* 0x10 */ #if defined(CONFIG_MX28) || defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || \ - defined(CONFIG_MX7) || defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL) + defined(CONFIG_MX7) || defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL) || \ + defined(CONFIG_MX6ULL) mxs_reg_32(hw_lcdif_ctrl2) /* 0x20 */ #endif mxs_reg_32(hw_lcdif_transfer_count) /* 0x20/0x30 */ @@ -56,7 +57,9 @@ struct mxs_lcdif_regs { mxs_reg_32(hw_lcdif_data) /* 0x1b0/0x180 */ mxs_reg_32(hw_lcdif_bm_error_stat) /* 0x1c0/0x190 */ #if defined(CONFIG_MX28) || defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || \ - defined(CONFIG_MX7) || defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL) + defined(CONFIG_MX7) || defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL) || \ + defined(CONFIG_MX6ULL) + mxs_reg_32(hw_lcdif_crc_stat) /* 0x1a0 */ #endif mxs_reg_32(hw_lcdif_lcdif_stat) /* 0x1d0/0x1b0 */ @@ -65,7 +68,7 @@ struct mxs_lcdif_regs { mxs_reg_32(hw_lcdif_debug1) /* 0x200/0x1e0 */ mxs_reg_32(hw_lcdif_debug2) /* 0x1f0 */ #if defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || defined(CONFIG_MX7) || \ - defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL) + defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL) || defined(CONFIG_MX6ULL) mxs_reg_32(hw_lcdif_thres) mxs_reg_32(hw_lcdif_as_ctrl) mxs_reg_32(hw_lcdif_as_buf) diff --git a/arch/arm/mach-imx/mx6/ddr.c b/arch/arm/mach-imx/mx6/ddr.c index 0cf391e..52a9a25 100644 --- a/arch/arm/mach-imx/mx6/ddr.c +++ b/arch/arm/mach-imx/mx6/ddr.c @@ -631,7 +631,7 @@ void mx6sx_dram_iocfg(unsigned width, } #endif -#ifdef CONFIG_MX6UL +#if defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL) void mx6ul_dram_iocfg(unsigned width, const struct mx6ul_iomux_ddr_regs *ddr, const struct mx6ul_iomux_grp_regs *grp) diff --git a/drivers/gpio/mxc_gpio.c b/drivers/gpio/mxc_gpio.c index c480eba..cfa620b 100644 --- a/drivers/gpio/mxc_gpio.c +++ b/drivers/gpio/mxc_gpio.c @@ -47,12 +47,12 @@ static unsigned long gpio_ports[] = { #if defined(CONFIG_MX27) || defined(CONFIG_MX53) || defined(CONFIG_MX6) || \ defined(CONFIG_MX7) [4] = GPIO5_BASE_ADDR, -#ifndef CONFIG_MX6UL +#if !(defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)) [5] = GPIO6_BASE_ADDR, #endif #endif #if defined(CONFIG_MX53) || defined(CONFIG_MX6) || defined(CONFIG_MX7) -#ifndef CONFIG_MX6UL +#if !(defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)) [6] = GPIO7_BASE_ADDR, #endif #endif diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h index 5fb85a1..f72c7ed 100644 --- a/include/configs/mx6_common.h +++ b/include/configs/mx6_common.h @@ -7,7 +7,7 @@ #ifndef __MX6_COMMON_H #define __MX6_COMMON_H -#ifndef CONFIG_MX6UL +#if !(defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)) #ifndef CONFIG_SYS_L2CACHE_OFF #define CONFIG_SYS_L2_PL310 #define CONFIG_SYS_PL310_BASE L2_PL310_BASE @@ -38,7 +38,7 @@ /* Boot options */ #if (defined(CONFIG_MX6SX) || defined(CONFIG_MX6SL) || \ - defined(CONFIG_MX6UL) || defined(CONFIG_MX6SLL)) + defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)|| defined(CONFIG_MX6SLL)) #define CONFIG_LOADADDR 0x82000000 #ifndef CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_TEXT_BASE 0x87800000 -- 2.7.4

3 5

[U-Boot] [PATCH] imx: mx7: psci: add system reset support
by Anson Huang 04 Jan '18

04 Jan '18

Add i.MX7 PSCI system reset support, linux kernel now can use "reboot" command to reset system. Signed-off-by: Anson Huang <Anson.Huang(a)nxp.com> --- arch/arm/mach-imx/mx7/psci-mx7.c | 5 +++++ arch/arm/mach-imx/mx7/psci.S | 7 +++++++ 2 files changed, 12 insertions(+) diff --git a/arch/arm/mach-imx/mx7/psci-mx7.c b/arch/arm/mach-imx/mx7/psci-mx7.c index 7f429b0..7093e44 100644 --- a/arch/arm/mach-imx/mx7/psci-mx7.c +++ b/arch/arm/mach-imx/mx7/psci-mx7.c @@ -74,3 +74,8 @@ __secure int imx_cpu_off(int cpu) writel(0, SRC_BASE_ADDR + cpu * 8 + SRC_GPR1_MX7D + 4); return 0; } + +__secure void imx_system_reset(void) +{ + reset_cpu(0); +} diff --git a/arch/arm/mach-imx/mx7/psci.S b/arch/arm/mach-imx/mx7/psci.S index fc5eb34..59f98cd 100644 --- a/arch/arm/mach-imx/mx7/psci.S +++ b/arch/arm/mach-imx/mx7/psci.S @@ -43,4 +43,11 @@ psci_cpu_off: 1: wfi b 1b +.globl psci_system_reset +psci_system_reset: + b imx_system_reset + +2: wfi + b 2b + .popsection -- 1.9.1

1 0

[U-Boot] [PATCH 0/7] Add support of SD3.0 UHS modes for ZynqMP
by Siva Durga Prasad Paladugu 04 Jan '18

04 Jan '18

This patch series is meant to add SD3.0 support for ZynqMP platform. The first five patches in the series mostly setting up things in sdhci layer to support SD3.0 , the sixth patch is to add SD3.0 support for ZynqMP platform and the last patch is to enable this support for ZynqMP zcu102 rev1.0 eval board. Repo: u-boot-mmc.git Branch: hs200-working Siva Durga Prasad Paladugu (7): mmc: sdhci: Add support for disabling clock mmc: sdhci: Handle execute tuning command in sdhci_send_command sdhci: Add new sdhci ops for platform specific tuning and delays mmc: sdhci: Invoke platform specific tuning and delay routines mmc : sdhci: Read capabilities register1 and update host caps mmc: zynq_sdhci: Add support for SD3.0 zynqmp: zcu102: Enable UHS support for ZCU102 Rev1.0 board board/xilinx/zynqmp/Makefile | 2 + board/xilinx/zynqmp/tap_delays.c | 230 ++++++++++++++++++++++++++ configs/xilinx_zynqmp_zcu102_rev1_0_defconfig | 2 + drivers/mmc/sdhci.c | 67 +++++++- drivers/mmc/zynq_sdhci.c | 230 +++++++++++++++++++++++++- include/sdhci.h | 9 + 6 files changed, 530 insertions(+), 10 deletions(-) create mode 100644 board/xilinx/zynqmp/tap_delays.c -- 2.7.4

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[U-Boot] [PULL] Please pull u-boot-rockchip/master
by Dr. Philipp Tomsich 04 Jan '18

04 Jan '18

Tom, As mentioned earlier, we had another round of last-minute stabilisation fixes in-flight for the Rockchip tree. Here’s the (hopefully final) pull-request with these fixes for inclusion in 2018.1, which includes the following changes: (a) a config adjustment for the RK3368-uQ7 (Lion) board to make sure that the environment does not run into the TPL stage (b) an additional config option to disable passing a platform-specific parameter to the ATF (BL31) for backwards-compatibility with some deployed ATF releases: this affect the Firefly-RK3399 board. Thanks, Philipp. The following changes since commit 1314bd1192b4c67d28bdae7eee639588e88090cd: boards: amlogic: khadas-vim: Typo fixup (2018-01-02 07:57:34 -0500) are available in the git repository at: git://git.denx.de/u-boot-rockchip.git master for you to fetch changes up to e2a75f022d3503b6a5bfcbee660e56383666d107: rockchip: firefly-rk3399: enable SPL_ATF_NO_PLATFORM_PARAM (2018-01-03 14:27:11 +0100) ---------------------------------------------------------------- Philipp Tomsich (3): rockchip: board: lion-rk3368: reduce env-size default to 8KiB spl: atf: add SPL_ATF_NO_PLATFORM_PARAM option rockchip: firefly-rk3399: enable SPL_ATF_NO_PLATFORM_PARAM board/theobroma-systems/lion_rk3368/Kconfig | 6 ++++++ common/spl/Kconfig | 18 ++++++++++++++++-- common/spl/spl_atf.c | 12 +++++++++++- configs/firefly-rk3399_defconfig | 1 + 4 files changed, 34 insertions(+), 3 deletions(-)

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[U-Boot] Please pull u-boot-video/master
by Anatolij Gustschin 04 Jan '18

04 Jan '18

Hi Tom, please pull two fixes for video drivers. With these patches applied the full build passed: https://travis-ci.org/vdsao/u-boot-video/builds/324540944 The following changes since commit 1314bd1192b4c67d28bdae7eee639588e88090cd: boards: amlogic: khadas-vim: Typo fixup (2018-01-02 07:57:34 -0500) are available in the git repository at: git://git.denx.de/u-boot-video.git master for you to fetch changes up to f9d891f0a903820100b42f25ba47593519b6b516: video: Support multiple lines version string display (2018-01-03 11:53:48 +0100) ---------------------------------------------------------------- Peng Fan (2): video: ipu: Fix dereferencing NULL pointer problem video: Support multiple lines version string display drivers/video/cfb_console.c | 30 +++++++++++++++++++++++------- drivers/video/ipu_common.c | 6 +++++- 2 files changed, 28 insertions(+), 8 deletions(-) Thanks, Anatolij

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[U-Boot] [PATCH V2 1/2] ARMv8: add optional Linux kernel image header
by Stephen Warren 03 Jan '18

03 Jan '18

From: Stephen Warren <swarren(a)nvidia.com> Allow placing a Linux kernel image header at the start of the U-Boot binary. This is useful since the image header reports the amount of memory (BSS and similar) that U-Boot needs to use, but that isn't part of the binary size. This can be used by the code that loads U-Boot into memory to determine where to load U-Boot, based on other users of memory. Signed-off-by: Stephen Warren <swarren(a)nvidia.com> --- v2: Update Kconfig description with link to documentation for the kernel image header format. This series relies (at the very least for diff context) on the previous series I sent Dec 19: ARM: tegra: don't use CONFIG_SPL_TEXT_BASE when no SPL ... ARM: tegra: use CONFIG_SYS_INIT_SP_BSS_OFFSET. --- arch/arm/Kconfig | 17 +++++ .../arm/cpu/armv8/linux-kernel-image-header-vars.h | 86 ++++++++++++++++++++++ arch/arm/cpu/armv8/start.S | 4 +- arch/arm/cpu/armv8/u-boot.lds | 4 + arch/arm/include/asm/boot0-linux-kernel-header.h | 49 ++++++++++++ 5 files changed, 159 insertions(+), 1 deletion(-) create mode 100644 arch/arm/cpu/armv8/linux-kernel-image-header-vars.h create mode 100644 arch/arm/include/asm/boot0-linux-kernel-header.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 93b93c142929..b9249fbea500 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -32,6 +32,23 @@ config SYS_INIT_SP_BSS_OFFSET calculate the stack pointer. This offset should be large enough so that the early malloc region, global data (gd), and early stack usage do not overlap any appended DTB. + +config LINUX_KERNEL_IMAGE_HEADER + bool + help + Place a Linux kernel image header at the start of the U-Boot binary. + The format of the header is described in the Linux kernel source at + Documentation/arm64/booting.txt. This feature is useful since the + image header reports the amount of memory (BSS and similar) that + U-Boot needs to use, but which isn't part of the binary. + +if LINUX_KERNEL_IMAGE_HEADER +config LNX_KRNL_IMG_TEXT_OFFSET_BASE + hex + help + The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the + TEXT_OFFSET value written in to the Linux kernel image header. +endif endif config STATIC_RELA diff --git a/arch/arm/cpu/armv8/linux-kernel-image-header-vars.h b/arch/arm/cpu/armv8/linux-kernel-image-header-vars.h new file mode 100644 index 000000000000..3e720937f012 --- /dev/null +++ b/arch/arm/cpu/armv8/linux-kernel-image-header-vars.h @@ -0,0 +1,86 @@ +/* + * (C) Copyright 2017 NVIDIA Corporation <www.nvidia.com> + * + * Derived from Linux kernel v4.14 files: + * + * arch/arm64/include/asm/assembler.h: + * Based on arch/arm/include/asm/assembler.h, arch/arm/mm/proc-macros.S + * Copyright (C) 1996-2000 Russell King + * Copyright (C) 2012 ARM Ltd. + * + * arch/arm64/kernel/head.S: + * Based on arch/arm/kernel/head.S + * Copyright (C) 1994-2002 Russell King + * Copyright (C) 2003-2012 ARM Ltd. + * Authors: Catalin Marinas <catalin.marinas(a)arm.com> + * Will Deacon <will.deacon(a)arm.com> + * + * arch/arm64/kernel/image.h: + * Copyright (C) 2014 ARM Ltd. + * + * SPDX-License-Identifier: GPL-2.0 + */ + +/* + * There aren't any ELF relocations we can use to endian-swap values known only + * at link time (e.g. the subtraction of two symbol addresses), so we must get + * the linker to endian-swap certain values before emitting them. + * + * Note that, in order for this to work when building the ELF64 PIE executable + * (for KASLR), these values should not be referenced via R_AARCH64_ABS64 + * relocations, since these are fixed up at runtime rather than at build time + * when PIE is in effect. So we need to split them up in 32-bit high and low + * words. + */ +#ifdef CONFIG_CPU_BIG_ENDIAN +#define DATA_LE32(data) \ + ((((data) & 0x000000ff) << 24) | \ + (((data) & 0x0000ff00) << 8) | \ + (((data) & 0x00ff0000) >> 8) | \ + (((data) & 0xff000000) >> 24)) +#else +#define DATA_LE32(data) ((data) & 0xffffffff) +#endif + +#define DEFINE_IMAGE_LE64(sym, data) \ + sym##_lo32 = DATA_LE32((data) & 0xffffffff); \ + sym##_hi32 = DATA_LE32((data) >> 32) + +#define __MAX(a, b) (((a) > (b)) ? (a) : (b)) +#define __CODE_DATA_SIZE (__bss_start - _start) +#define __BSS_SIZE (__bss_end - __bss_start) +#ifdef CONFIG_SYS_INIT_SP_BSS_OFFSET +#define __MAX_EXTRA_RAM_USAGE __MAX(__BSS_SIZE, CONFIG_SYS_INIT_SP_BSS_OFFSET) +#else +#define __MAX_EXTRA_RAM_USAGE __BSS_SIZE +#endif +#define __MEM_USAGE (__CODE_DATA_SIZE + __MAX_EXTRA_RAM_USAGE) + +#ifdef CONFIG_CPU_BIG_ENDIAN +#define __HEAD_FLAG_BE 1 +#else +#define __HEAD_FLAG_BE 0 +#endif + +#define __HEAD_FLAG_PAGE_SIZE 1 /* 4K hard-coded */ + +#define __HEAD_FLAG_PHYS_BASE 1 + +#define __HEAD_FLAGS ((__HEAD_FLAG_BE << 0) | \ + (__HEAD_FLAG_PAGE_SIZE << 1) | \ + (__HEAD_FLAG_PHYS_BASE << 3)) + +#define TEXT_OFFSET (CONFIG_SYS_TEXT_BASE - \ + CONFIG_LNX_KRNL_IMG_TEXT_OFFSET_BASE) + +/* + * These will output as part of the Image header, which should be little-endian + * regardless of the endianness of the kernel. While constant values could be + * endian swapped in head.S, all are done here for consistency. + */ +#define HEAD_SYMBOLS \ + DEFINE_IMAGE_LE64(_kernel_size_le, __MEM_USAGE); \ + DEFINE_IMAGE_LE64(_kernel_offset_le, TEXT_OFFSET); \ + DEFINE_IMAGE_LE64(_kernel_flags_le, __HEAD_FLAGS); + + HEAD_SYMBOLS diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S index 03e744e4a673..7c6807f4e1fd 100644 --- a/arch/arm/cpu/armv8/start.S +++ b/arch/arm/cpu/armv8/start.S @@ -19,7 +19,9 @@ .globl _start _start: -#ifdef CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK +#if defined(LINUX_KERNEL_IMAGE_HEADER) +#include <asm/boot0-linux-kernel-header.h> +#elif defined(CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK) /* * Various SoCs need something special and SoC-specific up front in * order to boot, allow them to set that in their boot0.h file and then diff --git a/arch/arm/cpu/armv8/u-boot.lds b/arch/arm/cpu/armv8/u-boot.lds index 22195b8834b5..7b76e0f9f08e 100644 --- a/arch/arm/cpu/armv8/u-boot.lds +++ b/arch/arm/cpu/armv8/u-boot.lds @@ -159,4 +159,8 @@ SECTIONS /DISCARD/ : { *(.plt*) } /DISCARD/ : { *(.interp*) } /DISCARD/ : { *(.gnu*) } + +#ifdef CONFIG_LINUX_KERNEL_IMAGE_HEADER +#include "linux-kernel-image-header-vars.h" +#endif } diff --git a/arch/arm/include/asm/boot0-linux-kernel-header.h b/arch/arm/include/asm/boot0-linux-kernel-header.h new file mode 100644 index 000000000000..ca28780daac5 --- /dev/null +++ b/arch/arm/include/asm/boot0-linux-kernel-header.h @@ -0,0 +1,49 @@ +/* + * (C) Copyright 2017 NVIDIA Corporation <www.nvidia.com> + * + * Derived from Linux kernel v4.14 files: + * + * arch/arm64/include/asm/assembler.h: + * Based on arch/arm/include/asm/assembler.h, arch/arm/mm/proc-macros.S + * Copyright (C) 1996-2000 Russell King + * Copyright (C) 2012 ARM Ltd. + * + * arch/arm64/kernel/head.S: + * Based on arch/arm/kernel/head.S + * Copyright (C) 1994-2002 Russell King + * Copyright (C) 2003-2012 ARM Ltd. + * Authors: Catalin Marinas <catalin.marinas(a)arm.com> + * Will Deacon <will.deacon(a)arm.com> + * + * arch/arm64/kernel/image.h: + * Copyright (C) 2014 ARM Ltd. + * + * SPDX-License-Identifier: GPL-2.0 + */ + + /* + * Emit a 64-bit absolute little endian symbol reference in a way that + * ensures that it will be resolved at build time, even when building a + * PIE binary. This requires cooperation from the linker script, which + * must emit the lo32/hi32 halves individually. + */ + .macro le64sym, sym + .long \sym\()_lo32 + .long \sym\()_hi32 + .endm + +.globl _start +_start: + /* + * DO NOT MODIFY. Image header expected by Linux boot-loaders. + */ + b reset /* branch to kernel start, magic */ + .long 0 /* reserved */ + le64sym _kernel_offset_le /* Image load offset from start of RAM, little-endian */ + le64sym _kernel_size_le /* Effective size of kernel image, little-endian */ + le64sym _kernel_flags_le /* Informative flags, little-endian */ + .quad 0 /* reserved */ + .quad 0 /* reserved */ + .quad 0 /* reserved */ + .ascii "ARM\x64" /* Magic number */ + .long 0 /* reserved */ -- 2.15.1

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