January 2018 - U-Boot

[U-Boot] [PATCH 1/2] ARM: Tegra186: calculate load addresses at boot
by Stephen Warren 09 Jan '18

09 Jan '18

From: Stephen Warren <swarren(a)nvidia.com> In the presence of potentially fragemented memory, we cannot hard-code addresses into environment variables such as kernel_addr_r. Instead, we must calculate those addresses at run-time based on available memory locations. Implement the code to perform such runtime calculation, based on requirements described in environment variables, to allow the user full control over the allocation. Signed-off-by: Stephen Warren <swarren(a)nvidia.com> --- arch/arm/mach-tegra/tegra186/nvtboot_board.c | 265 ++++++++++++++++++++++++++- 1 file changed, 264 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-tegra/tegra186/nvtboot_board.c b/arch/arm/mach-tegra/tegra186/nvtboot_board.c index b94eb424aaa2..8ecb45444349 100644 --- a/arch/arm/mach-tegra/tegra186/nvtboot_board.c +++ b/arch/arm/mach-tegra/tegra186/nvtboot_board.c @@ -1,16 +1,278 @@ /* - * Copyright (c) 2016, NVIDIA CORPORATION. + * Copyright (c) 2016-2018, NVIDIA CORPORATION. * * SPDX-License-Identifier: GPL-2.0+ */ +#include <stdlib.h> #include <common.h> #include <fdt_support.h> #include <fdtdec.h> #include <asm/arch/tegra.h> +#include <asm/armv8/mmu.h> + +DECLARE_GLOBAL_DATA_PTR; extern unsigned long nvtboot_boot_x0; +/* + * The following few functions run late during the boot process and dynamically + * calculate the load address of various binaries. To keep track of multiple + * allocations, some writable list of RAM banks must be used. tegra_mem_map[] + * is used for this purpose to avoid making yet another copy of the list of RAM + * banks. This is safe because tegra_mem_map[] is only used once during very + * early boot to create U-Boot's page tables, long before this code runs. If + * this assumption becomes invalid later, we can just fix the code to copy the + * list of RAM banks into some private data structure before running. + */ + +extern struct mm_region tegra_mem_map[]; + +static char *gen_varname(const char *var, const char *ext) +{ + size_t len_var = strlen(var); + size_t len_ext = strlen(ext); + size_t len = len_var + len_ext + 1; + char *varext = malloc(len); + + if (!varext) + return 0; + strcpy(varext, var); + strcpy(varext + len_var, ext); + return varext; +} + +static void mark_ram_allocated(int bank, u64 allocated_start, u64 allocated_end) +{ + u64 bank_start = tegra_mem_map[bank].virt; + u64 bank_size = tegra_mem_map[bank].size; + u64 bank_end = bank_start + bank_size; + bool keep_front = allocated_start != bank_start; + bool keep_tail = allocated_end != bank_end; + + if (keep_front && keep_tail) { + /* + * There are CONFIG_NR_DRAM_BANKS DRAM entries in the array, + * starting at index 1 (index 0 is MMIO). So, we are at DRAM + * entry "bank" not "bank - 1" as for a typical 0-base array. + * The number of remaining DRAM entries is therefore + * "CONFIG_NR_DRAM_BANKS - bank". We want to duplicate the + * current entry and shift up the remaining entries, dropping + * the last one. Thus, we must copy one fewer entry than the + * number remaining. + */ + memmove(&tegra_mem_map[bank + 1], &tegra_mem_map[bank], + CONFIG_NR_DRAM_BANKS - bank - 1); + tegra_mem_map[bank].size = allocated_start - bank_start; + bank++; + tegra_mem_map[bank].virt = allocated_end; + tegra_mem_map[bank].phys = allocated_end; + tegra_mem_map[bank].size = bank_end - allocated_end; + } else if (keep_front) { + tegra_mem_map[bank].size = allocated_start - bank_start; + } else if (keep_tail) { + tegra_mem_map[bank].virt = allocated_end; + tegra_mem_map[bank].phys = allocated_end; + tegra_mem_map[bank].size = bank_end - allocated_end; + } else { + /* + * We could move all subsequent banks down in the array but + * that's not necessary for subsequent allocations to work, so + * we skip doing so. + */ + tegra_mem_map[bank].size = 0; + } +} + +static void reserve_ram(u64 start, u64 size) +{ + int bank; + u64 end = start + size; + + for (bank = 1; bank <= CONFIG_NR_DRAM_BANKS; bank++) { + u64 bank_start = tegra_mem_map[bank].virt; + u64 bank_size = tegra_mem_map[bank].size; + u64 bank_end = bank_start + bank_size; + + if (end <= bank_start || start > bank_end) + continue; + mark_ram_allocated(bank, start, end); + break; + } +} + +static u64 alloc_ram(u64 size, u64 align, u64 offset) +{ + int bank; + + for (bank = 1; bank <= CONFIG_NR_DRAM_BANKS; bank++) { + u64 bank_start = tegra_mem_map[bank].virt; + u64 bank_size = tegra_mem_map[bank].size; + u64 bank_end = bank_start + bank_size; + u64 allocated = ROUND(bank_start, align) + offset; + u64 allocated_end = allocated + size; + + if (allocated_end > bank_end) + continue; + mark_ram_allocated(bank, allocated, allocated_end); + return allocated; + } + return 0; +} + +static void set_calculated_aliases(char *aliases, u64 address) +{ + char *tmp, *alias; + int err; + + aliases = strdup(aliases); + if (!aliases) { + pr_err("strdup(aliases) failed"); + return; + } + + tmp = aliases; + while (true) { + alias = strsep(&tmp, " "); + if (!alias) + break; + debug("%s: alias: %s\n", __func__, alias); + err = env_set_hex(alias, address); + if (err) + pr_err("Could not set %s\n", alias); + } + + free(aliases); +} + +static void set_calculated_env_var(const char *var) +{ + char *var_size; + char *var_align; + char *var_offset; + char *var_aliases; + u64 size; + u64 align; + u64 offset; + char *aliases; + u64 address; + int err; + + var_size = gen_varname(var, "_size"); + if (!var_size) + return; + var_align = gen_varname(var, "_align"); + if (!var_align) + goto out_free_var_size; + var_offset = gen_varname(var, "_offset"); + if (!var_offset) + goto out_free_var_align; + var_aliases = gen_varname(var, "_aliases"); + if (!var_aliases) + goto out_free_var_offset; + + size = env_get_hex(var_size, 0); + if (!size) { + pr_err("%s not set or zero\n", var_size); + goto out_free_var_aliases; + } + align = env_get_hex(var_align, 1); + /* Handle extant variables, but with a value of 0 */ + if (!align) + align = 1; + offset = env_get_hex(var_offset, 0); + aliases = env_get(var_aliases); + + debug("%s: Calc var %s; size=%llx, align=%llx, offset=%llx\n", + __func__, var, size, align, offset); + if (aliases) + debug("%s: Aliases: %s\n", __func__, aliases); + + address = alloc_ram(size, align, offset); + if (!address) { + pr_err("Could not allocate %s\n", var); + goto out_free_var_aliases; + } + debug("%s: Address %llx\n", __func__, address); + + err = env_set_hex(var, address); + if (err) + pr_err("Could not set %s\n", var); + if (aliases) + set_calculated_aliases(aliases, address); + +out_free_var_aliases: + free(var_aliases); +out_free_var_offset: + free(var_offset); +out_free_var_align: + free(var_align); +out_free_var_size: + free(var_size); +} + +#ifdef DEBUG +static void dump_ram_banks(void) +{ + int bank; + + for (bank = 1; bank <= CONFIG_NR_DRAM_BANKS; bank++) { + u64 bank_start = tegra_mem_map[bank].virt; + u64 bank_size = tegra_mem_map[bank].size; + u64 bank_end = bank_start + bank_size; + + if (!bank_size) + continue; + printf("%d: %010llx..%010llx (+%010llx)\n", bank - 1, + bank_start, bank_end, bank_size); + } +} +#endif + +static void set_calculated_env_vars(void) +{ + char *vars, *tmp, *var; + +#ifdef DEBUG + printf("RAM banks before any calculated env. var.s:\n"); + dump_ram_banks(); +#endif + + reserve_ram(nvtboot_boot_x0, fdt_totalsize(nvtboot_boot_x0)); + +#ifdef DEBUG + printf("RAM after reserving cboot DTB:\n"); + dump_ram_banks(); +#endif + + vars = env_get("calculated_vars"); + if (!vars) { + debug("%s: No env var calculated_vars\n", __func__); + return; + } + + vars = strdup(vars); + if (!vars) { + pr_err("strdup(calculated_vars) failed"); + return; + } + + tmp = vars; + while (true) { + var = strsep(&tmp, " "); + if (!var) + break; + debug("%s: var: %s\n", __func__, var); + set_calculated_env_var(var); +#ifdef DEBUG + printf("RAM banks affter allocating %s:\n", var); + dump_ram_banks(); +#endif + } + + free(vars); +} + static int set_fdt_addr(void) { int ret; @@ -60,6 +322,7 @@ static int set_ethaddr_from_nvtboot(void) int tegra_soc_board_init_late(void) { + set_calculated_env_vars(); /* * Ignore errors here; the value may not be used depending on * extlinux.conf or boot script content. -- 2.15.1

1 1

[U-Boot] [PATCH v3 1/1] vsprintf.c: add EFI device path printing
by Heinrich Schuchardt 09 Jan '18

09 Jan '18

For debugging efi_loader we need the capability to print EFI device paths. With this patch we can write: debug("device path: %pD", dp); A possible output would be device path: /MemoryMapped(0x0,0x3ff93a82,0x3ff93a82) This enhancement is not available when building without EFI support and neither in the SPL nor in the API example. Cc: Wolfgang Denk <wd(a)denx.de> Cc: Simon Glass <sjg(a)chromium.org> Suggested-by: Rob Clark <robdclark(a)gmail.com> Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- I propose Alex picks up this patch for the EFI tree. v3: Return -ENOMEM if out of memory. Avoid missing dependency error when building the SPL of the API example. v2: Panic if out of memory. Wolfgang suggested not to silently ignore an out of memory situation. --- examples/api/Makefile | 3 +++ lib/vsprintf.c | 47 +++++++++++++++++++++++++++++++++++++++++------ 2 files changed, 44 insertions(+), 6 deletions(-) diff --git a/examples/api/Makefile b/examples/api/Makefile index 899527267d4..9068727b98b 100644 --- a/examples/api/Makefile +++ b/examples/api/Makefile @@ -4,6 +4,9 @@ # SPDX-License-Identifier: GPL-2.0+ # +# Provide symbol API_BUILD to signal that the API example is being built. +KBUILD_CPPFLAGS += -DAPI_BUILD + ifeq ($(ARCH),powerpc) LOAD_ADDR = 0x40000 endif diff --git a/lib/vsprintf.c b/lib/vsprintf.c index dd572d2868a..5447a2cc740 100644 --- a/lib/vsprintf.c +++ b/lib/vsprintf.c @@ -11,16 +11,17 @@ * from hush: simple_itoa() was lifted from boa-0.93.15 */ -#include <stdarg.h> -#include <linux/types.h> -#include <linux/string.h> -#include <linux/ctype.h> - #include <common.h> #include <charset.h> +#include <efi_loader.h> +#include <div64.h> #include <uuid.h> +#include <stdarg.h> +#include <linux/ctype.h> +#include <linux/err.h> +#include <linux/types.h> +#include <linux/string.h> -#include <div64.h> #define noinline __attribute__((noinline)) /* we use this so that we can do without the ctype library */ @@ -292,6 +293,26 @@ static char *string16(char *buf, char *end, u16 *s, int field_width, return buf; } +#if defined(CONFIG_EFI_LOADER) && \ + !defined(CONFIG_SPL_BUILD) && !defined(API_BUILD) +static char *device_path_string(char *buf, char *end, void *dp, int field_width, + int precision, int flags) +{ + u16 *str; + + if (!dp) + return "<NULL>"; + + str = efi_dp_str((struct efi_device_path *)dp); + if (!str) + return ERR_PTR(-ENOMEM); + + buf = string16(buf, end, str, field_width, precision, flags); + efi_free_pool(str); + return buf; +} +#endif + #ifdef CONFIG_CMD_NET static const char hex_asc[] = "0123456789abcdef"; #define hex_asc_lo(x) hex_asc[((x) & 0x0f)] @@ -435,6 +456,12 @@ static char *pointer(const char *fmt, char *buf, char *end, void *ptr, #endif switch (*fmt) { +#if defined(CONFIG_EFI_LOADER) && \ + !defined(CONFIG_SPL_BUILD) && !defined(API_BUILD) + case 'D': + return device_path_string(buf, end, ptr, field_width, + precision, flags); +#endif #ifdef CONFIG_CMD_NET case 'a': flags |= SPECIAL | ZEROPAD; @@ -604,6 +631,8 @@ repeat: str = pointer(fmt + 1, str, end, va_arg(args, void *), field_width, precision, flags); + if (IS_ERR(str)) + return PTR_ERR(str); /* Skip all alphanumeric pointer suffixes */ while (isalnum(fmt[1])) fmt++; @@ -768,6 +797,9 @@ int printf(const char *fmt, ...) i = vscnprintf(printbuffer, sizeof(printbuffer), fmt, args); va_end(args); + /* Handle error */ + if (i <= 0) + return i; /* Print the string */ puts(printbuffer); return i; @@ -784,6 +816,9 @@ int vprintf(const char *fmt, va_list args) */ i = vscnprintf(printbuffer, sizeof(printbuffer), fmt, args); + /* Handle error */ + if (i <= 0) + return i; /* Print the string */ puts(printbuffer); return i; -- 2.11.0

2 4

[U-Boot] [PATCH 1/2] cmd: go: Make do_go available to outside boot.c
by Emmanuel Vadot 08 Jan '18

08 Jan '18

Some commands (like sysboot) might want to call go as they can encounter a raw binary. Make do_go callable for everyone. Signed-off-by: Emmanuel Vadot <manu(a)freebsd.org> --- cmd/boot.c | 2 +- include/command.h | 4 ++++ 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/cmd/boot.c b/cmd/boot.c index 72f2cf362d..5691c5f883 100644 --- a/cmd/boot.c +++ b/cmd/boot.c @@ -22,7 +22,7 @@ unsigned long do_go_exec(ulong (*entry)(int, char * const []), int argc, return entry (argc, argv); } -static int do_go(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +int do_go(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { ulong addr, rc; int rcode = 0; diff --git a/include/command.h b/include/command.h index 767cabb3df..377e2eadd4 100644 --- a/include/command.h +++ b/include/command.h @@ -105,6 +105,10 @@ extern int do_bootz(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]); extern int do_booti(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]); +#ifdef CONFIG_CMD_GO +extern int do_go(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]); +#endif + extern int common_diskboot(cmd_tbl_t *cmdtp, const char *intf, int argc, char *const argv[]); -- 2.15.1

3 7

[U-Boot] [PULL] Please pull u-boot-imx
by Stefano Babic 08 Jan '18

08 Jan '18

Hi Tom, some fixes, please pull from u-boot-imx, thanks ! The following changes since commit 1314bd1192b4c67d28bdae7eee639588e88090cd: boards: amlogic: khadas-vim: Typo fixup (2018-01-02 07:57:34 -0500) are available in the git repository at: git://www.denx.de/git/u-boot-imx.git master for you to fetch changes up to ca9d211e2c7801bc3e194d325ece0d3b583b32d2: mtd: nand: mxs_nand_spl: Remove nand size print (2018-01-08 17:37:12 +0100) ---------------------------------------------------------------- Christopher Spinrath (3): ARM: imx: cm_fx6: env: use standard variables ARM: imx: cm_fx6: env: support distro boot command ARM: imx: cm_fx6: env: don't run boot scripts twice Eran Matityahu (1): imx: spl: Fix NAND bootmode detection Eric Nelson (1): mx6: Add board mx6memcal for use in validating DDR Fabio Estevam (1): mx6ull: Handle the CONFIG_MX6ULL cases correctly Jagan Teki (2): board: engicam: Fix to remove legacy board/icorem6_rqs mtd: nand: mxs_nand_spl: Remove nand size print Stefan Agner (3): imx: move CONFIG_SYSCOUNTER_TIMER to Kconfig imx: introduce CONFIG_GPT_TIMER imx: initialize and use generic timer on i.MX 6UL/ULL arch/arm/include/asm/arch-mx6/imx-regs.h | 24 +++-- arch/arm/include/asm/arch-mx6/mx6-ddr.h | 2 +- arch/arm/include/asm/arch-mx6/mx6ul-ddr.h | 2 +- arch/arm/include/asm/mach-imx/iomux-v3.h | 4 +- arch/arm/include/asm/mach-imx/regs-lcdif.h | 19 ++-- arch/arm/include/asm/mach-imx/sys_proto.h | 3 +- arch/arm/mach-imx/Kconfig | 6 ++ arch/arm/mach-imx/Makefile | 5 +- arch/arm/mach-imx/mx5/Kconfig | 1 + arch/arm/mach-imx/mx6/Kconfig | 14 ++- arch/arm/mach-imx/mx6/ddr.c | 2 +- arch/arm/mach-imx/mx7/Kconfig | 1 + arch/arm/mach-imx/spl.c | 2 +- board/engicam/common/board.c | 2 +- board/engicam/icorem6_rqs/icorem6_rqs.c | 48 --------- board/freescale/mx6memcal/Kconfig | 235 ++++++++++++++++++++++++++++++++++++++++++++ board/freescale/mx6memcal/MAINTAINERS | 7 ++ board/freescale/mx6memcal/Makefile | 13 +++ board/freescale/mx6memcal/README | 49 ++++++++++ board/freescale/mx6memcal/mx6memcal.c | 32 ++++++ board/freescale/mx6memcal/spl.c | 456 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ configs/cm_fx6_defconfig | 2 + configs/mx6memcal_defconfig | 33 +++++++ drivers/gpio/mxc_gpio.c | 4 +- drivers/mtd/nand/mxs_nand_spl.c | 2 - include/configs/cm_fx6.h | 80 ++++++++------- include/configs/imx6_spl.h | 3 +- include/configs/mx6_common.h | 10 +- include/configs/mx6memcal.h | 59 +++++++++++ include/configs/mx7_common.h | 1 - scripts/config_whitelist.txt | 2 +- 31 files changed, 1001 insertions(+), 122 deletions(-) delete mode 100644 board/engicam/icorem6_rqs/icorem6_rqs.c create mode 100644 board/freescale/mx6memcal/Kconfig create mode 100644 board/freescale/mx6memcal/MAINTAINERS create mode 100644 board/freescale/mx6memcal/Makefile create mode 100644 board/freescale/mx6memcal/README create mode 100644 board/freescale/mx6memcal/mx6memcal.c create mode 100644 board/freescale/mx6memcal/spl.c create mode 100644 configs/mx6memcal_defconfig create mode 100644 include/configs/mx6memcal.h -- ===================================================================== DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic(a)denx.de =====================================================================

2 4

[U-Boot] [PATCH 1/2] ARMv8: add optional Linux kernel image header
by Stephen Warren 08 Jan '18

08 Jan '18

From: Stephen Warren <swarren(a)nvidia.com> Allow placing a Linux kernel image header at the start of the U-Boot binary. This is useful since the image header reports the amount of memory (BSS and similar) that U-Boot needs to use, but that isn't part of the binary size. This can be used by the code that loads U-Boot into memory to determine where to load U-Boot, based on other users of memory. Signed-off-by: Stephen Warren <swarren(a)nvidia.com> --- This series relies (at the very least for diff context) on the previous series I sent Dec 19: ARM: tegra: don't use CONFIG_SPL_TEXT_BASE when no SPL ... ARM: tegra: use CONFIG_SYS_INIT_SP_BSS_OFFSET. arch/arm/Kconfig | 16 ++++ .../arm/cpu/armv8/linux-kernel-image-header-vars.h | 86 ++++++++++++++++++++++ arch/arm/cpu/armv8/start.S | 4 +- arch/arm/cpu/armv8/u-boot.lds | 4 + arch/arm/include/asm/boot0-linux-kernel-header.h | 49 ++++++++++++ 5 files changed, 158 insertions(+), 1 deletion(-) create mode 100644 arch/arm/cpu/armv8/linux-kernel-image-header-vars.h create mode 100644 arch/arm/include/asm/boot0-linux-kernel-header.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 93b93c142929..69f304b6d7e6 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -32,6 +32,22 @@ config SYS_INIT_SP_BSS_OFFSET calculate the stack pointer. This offset should be large enough so that the early malloc region, global data (gd), and early stack usage do not overlap any appended DTB. + +config LINUX_KERNEL_IMAGE_HEADER + bool + help + Place a Linux kernel image header at the start of the U-Boot binary. + This is useful since the image header reports the amount of memory + (BSS and similar) that U-Boot needs to use, but that isn't part of + the binary size. + +if LINUX_KERNEL_IMAGE_HEADER +config LNX_KRNL_IMG_TEXT_OFFSET_BASE + hex + help + The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the + TEXT_OFFSET value written in to the Linux kernel image header. +endif endif config STATIC_RELA diff --git a/arch/arm/cpu/armv8/linux-kernel-image-header-vars.h b/arch/arm/cpu/armv8/linux-kernel-image-header-vars.h new file mode 100644 index 000000000000..3e720937f012 --- /dev/null +++ b/arch/arm/cpu/armv8/linux-kernel-image-header-vars.h @@ -0,0 +1,86 @@ +/* + * (C) Copyright 2017 NVIDIA Corporation <www.nvidia.com> + * + * Derived from Linux kernel v4.14 files: + * + * arch/arm64/include/asm/assembler.h: + * Based on arch/arm/include/asm/assembler.h, arch/arm/mm/proc-macros.S + * Copyright (C) 1996-2000 Russell King + * Copyright (C) 2012 ARM Ltd. + * + * arch/arm64/kernel/head.S: + * Based on arch/arm/kernel/head.S + * Copyright (C) 1994-2002 Russell King + * Copyright (C) 2003-2012 ARM Ltd. + * Authors: Catalin Marinas <catalin.marinas(a)arm.com> + * Will Deacon <will.deacon(a)arm.com> + * + * arch/arm64/kernel/image.h: + * Copyright (C) 2014 ARM Ltd. + * + * SPDX-License-Identifier: GPL-2.0 + */ + +/* + * There aren't any ELF relocations we can use to endian-swap values known only + * at link time (e.g. the subtraction of two symbol addresses), so we must get + * the linker to endian-swap certain values before emitting them. + * + * Note that, in order for this to work when building the ELF64 PIE executable + * (for KASLR), these values should not be referenced via R_AARCH64_ABS64 + * relocations, since these are fixed up at runtime rather than at build time + * when PIE is in effect. So we need to split them up in 32-bit high and low + * words. + */ +#ifdef CONFIG_CPU_BIG_ENDIAN +#define DATA_LE32(data) \ + ((((data) & 0x000000ff) << 24) | \ + (((data) & 0x0000ff00) << 8) | \ + (((data) & 0x00ff0000) >> 8) | \ + (((data) & 0xff000000) >> 24)) +#else +#define DATA_LE32(data) ((data) & 0xffffffff) +#endif + +#define DEFINE_IMAGE_LE64(sym, data) \ + sym##_lo32 = DATA_LE32((data) & 0xffffffff); \ + sym##_hi32 = DATA_LE32((data) >> 32) + +#define __MAX(a, b) (((a) > (b)) ? (a) : (b)) +#define __CODE_DATA_SIZE (__bss_start - _start) +#define __BSS_SIZE (__bss_end - __bss_start) +#ifdef CONFIG_SYS_INIT_SP_BSS_OFFSET +#define __MAX_EXTRA_RAM_USAGE __MAX(__BSS_SIZE, CONFIG_SYS_INIT_SP_BSS_OFFSET) +#else +#define __MAX_EXTRA_RAM_USAGE __BSS_SIZE +#endif +#define __MEM_USAGE (__CODE_DATA_SIZE + __MAX_EXTRA_RAM_USAGE) + +#ifdef CONFIG_CPU_BIG_ENDIAN +#define __HEAD_FLAG_BE 1 +#else +#define __HEAD_FLAG_BE 0 +#endif + +#define __HEAD_FLAG_PAGE_SIZE 1 /* 4K hard-coded */ + +#define __HEAD_FLAG_PHYS_BASE 1 + +#define __HEAD_FLAGS ((__HEAD_FLAG_BE << 0) | \ + (__HEAD_FLAG_PAGE_SIZE << 1) | \ + (__HEAD_FLAG_PHYS_BASE << 3)) + +#define TEXT_OFFSET (CONFIG_SYS_TEXT_BASE - \ + CONFIG_LNX_KRNL_IMG_TEXT_OFFSET_BASE) + +/* + * These will output as part of the Image header, which should be little-endian + * regardless of the endianness of the kernel. While constant values could be + * endian swapped in head.S, all are done here for consistency. + */ +#define HEAD_SYMBOLS \ + DEFINE_IMAGE_LE64(_kernel_size_le, __MEM_USAGE); \ + DEFINE_IMAGE_LE64(_kernel_offset_le, TEXT_OFFSET); \ + DEFINE_IMAGE_LE64(_kernel_flags_le, __HEAD_FLAGS); + + HEAD_SYMBOLS diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S index 03e744e4a673..7c6807f4e1fd 100644 --- a/arch/arm/cpu/armv8/start.S +++ b/arch/arm/cpu/armv8/start.S @@ -19,7 +19,9 @@ .globl _start _start: -#ifdef CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK +#if defined(LINUX_KERNEL_IMAGE_HEADER) +#include <asm/boot0-linux-kernel-header.h> +#elif defined(CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK) /* * Various SoCs need something special and SoC-specific up front in * order to boot, allow them to set that in their boot0.h file and then diff --git a/arch/arm/cpu/armv8/u-boot.lds b/arch/arm/cpu/armv8/u-boot.lds index 22195b8834b5..7b76e0f9f08e 100644 --- a/arch/arm/cpu/armv8/u-boot.lds +++ b/arch/arm/cpu/armv8/u-boot.lds @@ -159,4 +159,8 @@ SECTIONS /DISCARD/ : { *(.plt*) } /DISCARD/ : { *(.interp*) } /DISCARD/ : { *(.gnu*) } + +#ifdef CONFIG_LINUX_KERNEL_IMAGE_HEADER +#include "linux-kernel-image-header-vars.h" +#endif } diff --git a/arch/arm/include/asm/boot0-linux-kernel-header.h b/arch/arm/include/asm/boot0-linux-kernel-header.h new file mode 100644 index 000000000000..ca28780daac5 --- /dev/null +++ b/arch/arm/include/asm/boot0-linux-kernel-header.h @@ -0,0 +1,49 @@ +/* + * (C) Copyright 2017 NVIDIA Corporation <www.nvidia.com> + * + * Derived from Linux kernel v4.14 files: + * + * arch/arm64/include/asm/assembler.h: + * Based on arch/arm/include/asm/assembler.h, arch/arm/mm/proc-macros.S + * Copyright (C) 1996-2000 Russell King + * Copyright (C) 2012 ARM Ltd. + * + * arch/arm64/kernel/head.S: + * Based on arch/arm/kernel/head.S + * Copyright (C) 1994-2002 Russell King + * Copyright (C) 2003-2012 ARM Ltd. + * Authors: Catalin Marinas <catalin.marinas(a)arm.com> + * Will Deacon <will.deacon(a)arm.com> + * + * arch/arm64/kernel/image.h: + * Copyright (C) 2014 ARM Ltd. + * + * SPDX-License-Identifier: GPL-2.0 + */ + + /* + * Emit a 64-bit absolute little endian symbol reference in a way that + * ensures that it will be resolved at build time, even when building a + * PIE binary. This requires cooperation from the linker script, which + * must emit the lo32/hi32 halves individually. + */ + .macro le64sym, sym + .long \sym\()_lo32 + .long \sym\()_hi32 + .endm + +.globl _start +_start: + /* + * DO NOT MODIFY. Image header expected by Linux boot-loaders. + */ + b reset /* branch to kernel start, magic */ + .long 0 /* reserved */ + le64sym _kernel_offset_le /* Image load offset from start of RAM, little-endian */ + le64sym _kernel_size_le /* Effective size of kernel image, little-endian */ + le64sym _kernel_flags_le /* Informative flags, little-endian */ + .quad 0 /* reserved */ + .quad 0 /* reserved */ + .quad 0 /* reserved */ + .ascii "ARM\x64" /* Magic number */ + .long 0 /* reserved */ -- 2.15.1

3 7

[U-Boot] [PATCH] freescale: vid: add support LTC3882 and rework of the VID support
by ying.zhang22455＠nxp.com 08 Jan '18

08 Jan '18

From: Zhang Ying-22455 <ying.zhang22455(a)nxp.com> Add support new regular chip: LTC3882. The origianl VID code didn't properly read the FUSESR on all chips and set the voltages on all chips. It didn't properly support the voltage regulators in use by NXP and report voltage changes. Signed-off-by: Zhang Ying-22455 <ying.zhang22455(a)nxp.com> --- .../include/asm/arch-fsl-layerscape/immap_lsch3.h | 9 +- board/freescale/common/vid.c | 465 +++++++++++--------- board/freescale/common/vid.h | 19 + 3 files changed, 291 insertions(+), 202 deletions(-) diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h index 957e23b..0ee7a3f 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h @@ -201,10 +201,15 @@ struct ccsr_gur { u32 gpporcr3; u32 gpporcr4; u8 res_030[0x60-0x30]; -#define FSL_CHASSIS3_DCFG_FUSESR_VID_SHIFT 2 +#define FSL_CHASSIS3_DCFG_FUSESR_VID_SHIFT 25 #define FSL_CHASSIS3_DCFG_FUSESR_VID_MASK 0x1F -#define FSL_CHASSIS3_DCFG_FUSESR_ALTVID_SHIFT 7 +#define FSL_CHASSIS3_DCFG_FUSESR_ALTVID_SHIFT 20 #define FSL_CHASSIS3_DCFG_FUSESR_ALTVID_MASK 0x1F +#define FSL_CHASSIS3_DCFG_FUSESR_LOW_VID_SHIFT 2 +#define FSL_CHASSIS3_DCFG_FUSESR_LOW_VID_MASK 0x1F +#define FSL_CHASSIS3_DCFG_FUSESR_LOW_ALTVID_SHIFT 7 +#define FSL_CHASSIS3_DCFG_FUSESR_LOW_ALTVID_MASK 0x1F + u8 res_030[0x60-0x30]; u32 dcfg_fusesr; /* Fuse status register */ u8 res_064[0x70-0x64]; u32 devdisr; /* Device disable control 1 */ diff --git a/board/freescale/common/vid.c b/board/freescale/common/vid.c index d6d1bfc..1e2ddb0 100644 --- a/board/freescale/common/vid.c +++ b/board/freescale/common/vid.c @@ -11,6 +11,7 @@ #ifdef CONFIG_FSL_LSCH2 #include <asm/arch/immap_lsch2.h> #elif defined(CONFIG_FSL_LSCH3) +#include <asm/arch/soc.h> #include <asm/arch/immap_lsch3.h> #else #include <asm/immap_85xx.h> @@ -33,8 +34,42 @@ int __weak board_vdd_drop_compensation(void) return 0; } +#if defined(CONFIG_VOL_MONITOR_LTC3882) +/* Helper function to write a mV value as LTC L16 into the chip, + * returning a boolean for success */ +static int write_l16_mV_LTC3882(int i2caddress, int cmd, int mv) +{ + int wait, vdd_last, l16; + int ret; + u8 buf[2]; + + /* Scale mV to L16 */ + l16 = mv; + l16 <<= 12; + l16 /= 1000; + debug("VID: cmd 0x%02x voltage write 0x%04x\n", cmd, l16); + buf[0] = (l16 & 0xff); + buf[1] = (l16 >> 8); + + /* This code assumes that both channels run the very + * SAME voltage. This is likely true for LS2 style + * devices. For any other configuration, all hell will + * break loose! + */ + ret = i2c_write(i2caddress, LTC3882_PAGE, 1, + (void *)"\377", 1); + if (!ret) + ret = i2c_write(i2caddress, cmd, 1, + (void *)&buf[0], 2); + if (!ret) + ret = i2c_write(i2caddress, LTC3882_PAGE, 1, + (void *)"\0", 1); + return ret; +} +#endif + /* - * Get the i2c address configuration for the IR regulator chip + * Get the i2c address configuration for the regulator chip * * There are some variance in the RDB HW regarding the I2C address configuration * for the IR regulator chip, which is likely a problem of external resistor @@ -45,9 +80,13 @@ int __weak board_vdd_drop_compensation(void) * 0x08 (Verified on T1040RDB-PA,T4240RDB-PB,X-T4240RDB-16GPA) * 0x09 (Verified on T1040RDB-PA) * 0x38 (Verified on T2080QDS, T2081QDS, T4240RDB) + * + * For other types of regulator chips, we check the IDs before we + * return the address to avoid making damaging mistakes */ -static int find_ir_chip_on_i2c(void) +static int find_vid_chip_on_i2c(void) { +#if defined(CONFIG_VOL_MONITOR_IR36021_READ) || defined(CONFIG_VOL_MONITOR_IR36021_SET) int i2caddress; int ret; u8 byte; @@ -63,6 +102,23 @@ static int find_ir_chip_on_i2c(void) if ((ret >= 0) && (byte == IR36021_MFR_ID)) return i2caddress; } +#endif +#if defined(CONFIG_VOL_MONITOR_LTC3882) + int i2caddress = I2C_VOL_MONITOR_ADDR; + int ret; + u8 buf[8]; + + ret = i2c_read(i2caddress, + LTC3882_MFR_ID, 1, (void *)&buf[0], + 4); + if (!ret && memcmp(buf, "\3LTC", 4) == 0) { + ret = i2c_read(i2caddress, + LTC3882_MFR_MODEL, 1, (void *)&buf[0], + 8); + if (!ret && memcmp(buf, "\7LTC3882", 8) == 0) + return i2caddress; + } +#endif return -1; } @@ -83,10 +139,15 @@ static int find_ir_chip_on_i2c(void) #ifdef CONFIG_VOL_MONITOR_INA220 #define WAIT_FOR_ADC 532 /* wait for 532 microseconds for ADC */ #define ADC_MIN_ACCURACY 4 -#else +#endif +#ifdef CONFIG_VOL_MONITOR_IR36021_READ #define WAIT_FOR_ADC 138 /* wait for 138 microseconds for ADC */ #define ADC_MIN_ACCURACY 4 #endif +#ifdef CONFIG_VOL_MONITOR_LTC3882 +#define WAIT_FOR_ADC 0 +#define ADC_MIN_ACCURACY 4 +#endif #ifdef CONFIG_VOL_MONITOR_INA220 static int read_voltage_from_INA220(int i2caddress) @@ -98,7 +159,7 @@ static int read_voltage_from_INA220(int i2caddress) for (i = 0; i < NUM_READINGS; i++) { ret = i2c_read(I2C_VOL_MONITOR_ADDR, I2C_VOL_MONITOR_BUS_V_OFFSET, 1, - (void *)&buf, 2); + (void *)&buf[0], 2); if (ret) { printf("VID: failed to read core voltage\n"); return ret; @@ -141,23 +202,43 @@ static int read_voltage_from_IR(int i2caddress) printf("VID: Core voltage sensor error\n"); return -1; } - debug("VID: bus voltage reads 0x%02x\n", vol_mon); - /* Resolution is 1/128V. We scale up here to get 1/128mV - * and divide at the end - */ - voltage_read += vol_mon * 1000; + debug("VID: Core voltage reads 0x%02x\n", vol_mon); + voltage_read += vol_mon; udelay(WAIT_FOR_ADC); } /* Scale down to the real mV as IR resolution is 1/128V, rounding up */ + voltage_read *= 1000; voltage_read = DIV_ROUND_UP(voltage_read, 128); /* calculate the average */ voltage_read /= NUM_READINGS; - /* Compensate for a board specific voltage drop between regulator and - * SoC before converting into an IR VID value - */ - voltage_read -= board_vdd_drop_compensation(); + return voltage_read; +} +#endif + +/* read voltage from LTC3882 */ +#ifdef CONFIG_VOL_MONITOR_LTC3882 +static int read_voltage_from_LTC3882(int i2caddress) +{ + int ret, voltage_read = 0; + int vol_mon; + u8 buf[2]; + + ret = i2c_read(i2caddress, + LTC3882_READ_VOUT, 1, + (void *)&buf[0], 2); + if (ret) { + printf("VID: failed to read core voltage\n"); + return ret; + } + vol_mon = (buf[1] << 8) | buf[0]; + + /* Scale L16 to mV */ + debug("VID: Core voltage reads 0x%04x\n", vol_mon); + vol_mon *= 1000; + voltage_read = DIV_ROUND_UP(vol_mon, 4096); + debug("VID: Core voltage reads as %d mV\n", voltage_read); return voltage_read; } @@ -170,9 +251,19 @@ static int read_voltage(int i2caddress) voltage_read = read_voltage_from_INA220(i2caddress); #elif defined CONFIG_VOL_MONITOR_IR36021_READ voltage_read = read_voltage_from_IR(i2caddress); +#elif defined CONFIG_VOL_MONITOR_LTC3882 + voltage_read = read_voltage_from_LTC3882(i2caddress); #else - return -1; + voltage_read = -1; #endif + if (voltage_read >= 0) + { + /* Compensate for a board specific voltage drop between regulator and + * SoC before converting into an IR VID value + */ + voltage_read -= board_vdd_drop_compensation(); + } + return voltage_read; } @@ -198,6 +289,8 @@ static int wait_for_new_voltage(int vdd, int i2caddress) for (timeout = 0; abs(vdd - vdd_current) > (IR_VDD_STEP_UP + IR_VDD_STEP_DOWN) && timeout < MAX_LOOP_WAIT_NEW_VOL; timeout++) { + debug("VID: waiting for delta %d mV <-> %d mV to disappear\n", vdd, vdd_current); + udelay(1000); vdd_current = read_voltage(i2caddress); } if (timeout >= MAX_LOOP_WAIT_NEW_VOL) { @@ -216,18 +309,18 @@ static int wait_for_voltage_stable(int i2caddress) int timeout, vdd_current, vdd; vdd = read_voltage(i2caddress); - udelay(NUM_READINGS * WAIT_FOR_ADC); + udelay(1000); /* wait until voltage is stable */ vdd_current = read_voltage(i2caddress); /* The maximum timeout is - * MAX_LOOP_WAIT_VOL_STABLE * NUM_READINGS * WAIT_FOR_ADC + * MAX_LOOP_WAIT_VOL_STABLE * (1000µs + NUM_READINGS * WAIT_FOR_ADC) */ for (timeout = MAX_LOOP_WAIT_VOL_STABLE; abs(vdd - vdd_current) > ADC_MIN_ACCURACY && timeout > 0; timeout--) { vdd = vdd_current; - udelay(NUM_READINGS * WAIT_FOR_ADC); + udelay(1000); vdd_current = read_voltage(i2caddress); } if (timeout == 0) @@ -242,16 +335,27 @@ static int set_voltage_to_IR(int i2caddress, int vdd) int wait, vdd_last; int ret; u8 vid; + u8 buf; - /* Compensate for a board specific voltage drop between regulator and - * SoC before converting into an IR VID value - */ - vdd += board_vdd_drop_compensation(); -#ifdef CONFIG_FSL_LSCH2 - vid = DIV_ROUND_UP(vdd - 265, 5); -#else - vid = DIV_ROUND_UP(vdd - 245, 5); -#endif + /* check if IR chip works in Intel mode*/ + ret = i2c_read(i2caddress, + IR36021_INTEL_MODE_OOFSET, + 1, (void *)&buf, 1); + if (ret) { + printf("VID: failed to read IR chip mode.\n"); + return -1; + } + if ((buf & IR36021_MODE_MASK) != IR36021_INTEL_MODE) { + /* AMD SVI2 mode. */ + /* An increase by 5 in the VID value causes a decrease + * by 4/128V in the output rail, -6.25mV per step. + * The scale appears to be 0V based starting from 0xf8. + */ + vid = 248 - DIV_ROUND_UP(vdd * 4, 25); + } else { + /* Intel mode */ + vid = DIV_ROUND_UP(vdd - 245, 5); + } ret = i2c_write(i2caddress, IR36021_LOOP1_MANUAL_ID_OFFSET, 1, (void *)&vid, sizeof(vid)); @@ -262,7 +366,35 @@ static int set_voltage_to_IR(int i2caddress, int vdd) wait = wait_for_new_voltage(vdd, i2caddress); if (wait < 0) return -1; - debug("VID: Waited %d us\n", wait * NUM_READINGS * WAIT_FOR_ADC); + + debug("VID: Waited %d us\n", wait * (1000 + NUM_READINGS * WAIT_FOR_ADC)); + + vdd_last = wait_for_voltage_stable(i2caddress); + if (vdd_last < 0) + return -1; + debug("VID: Current voltage is %d mV\n", vdd_last); + return vdd_last; +} +#endif + +#ifdef CONFIG_VOL_MONITOR_LTC3882 +/* Set the voltage to the LTC3882 chip */ +static int set_voltage_to_LTC3882(int i2caddress, int vdd) +{ + int wait, vdd_last; + int ret; + + ret = write_l16_mV_LTC3882(i2caddress, + LTC3882_VOUT_COMMAND, + vdd); + if (ret) { + printf("VID: failed to write VID\n"); + return -1; + } + wait = wait_for_new_voltage(vdd, i2caddress); + if (wait < 0) + return -1; + debug("VID: Waited %d us\n", wait * (1000 + NUM_READINGS * WAIT_FOR_ADC)); vdd_last = wait_for_voltage_stable(i2caddress); if (vdd_last < 0) @@ -276,185 +408,110 @@ static int set_voltage(int i2caddress, int vdd) { int vdd_last = -1; + /* Compensate for a board specific voltage drop between regulator and + * SoC before converting into a VID value + */ + vdd += board_vdd_drop_compensation(); #ifdef CONFIG_VOL_MONITOR_IR36021_SET vdd_last = set_voltage_to_IR(i2caddress, vdd); +#elif defined(CONFIG_VOL_MONITOR_LTC3882) + vdd_last = set_voltage_to_LTC3882(i2caddress, vdd); #else #error Specific voltage monitor must be defined #endif return vdd_last; } -#ifdef CONFIG_FSL_LSCH3 -int adjust_vdd(ulong vdd_override) +#if defined(CONFIG_FSL_LSCH3) +static bool soc_has_lowbitsinfusesr(struct ccsr_gur *gur) { - int re_enable = disable_interrupts(); - struct ccsr_gur *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); - u32 fusesr; - u8 vid, buf; - int vdd_target, vdd_current, vdd_last; - int ret, i2caddress; - unsigned long vdd_string_override; - char *vdd_string; - static const uint16_t vdd[32] = { - 10500, - 0, /* reserved */ - 9750, - 0, /* reserved */ - 9500, - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 10000, /* 1.0000V */ - 0, /* reserved */ - 10250, - 0, /* reserved */ - 10500, - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - }; - struct vdd_drive { - u8 vid; - unsigned voltage; - }; - ret = i2c_multiplexer_select_vid_channel(I2C_MUX_CH_VOL_MONITOR); - if (ret) { - debug("VID: I2C failed to switch channel\n"); - ret = -1; - goto exit; - } - ret = find_ir_chip_on_i2c(); - if (ret < 0) { - printf("VID: Could not find voltage regulator on I2C.\n"); - ret = -1; - goto exit; - } else { - i2caddress = ret; - debug("VID: IR Chip found on I2C address 0x%02x\n", i2caddress); - } + u32 svr = in_le32(&gur->svr); - /* check IR chip work on Intel mode*/ - ret = i2c_read(i2caddress, - IR36021_INTEL_MODE_OOFSET, - 1, (void *)&buf, 1); - if (ret) { - printf("VID: failed to read IR chip mode.\n"); - ret = -1; - goto exit; - } - if ((buf & IR36021_MODE_MASK) != IR36021_INTEL_MODE) { - printf("VID: IR Chip is not used in Intel mode.\n"); - ret = -1; - goto exit; + /* LS2088A derivatives have different FUSESR */ + switch(SVR_SOC_VER(svr)) { + case SVR_LS2088A: + case SVR_LS2048A: + case SVR_LS2084A: + case SVR_LS2044A: + return true; } - /* get the voltage ID from fuse status register */ - fusesr = in_le32(&gur->dcfg_fusesr); - vid = (fusesr >> FSL_CHASSIS3_DCFG_FUSESR_ALTVID_SHIFT) & - FSL_CHASSIS3_DCFG_FUSESR_ALTVID_MASK; - if ((vid == 0) || (vid == FSL_CHASSIS3_DCFG_FUSESR_ALTVID_MASK)) { - vid = (fusesr >> FSL_CHASSIS3_DCFG_FUSESR_VID_SHIFT) & - FSL_CHASSIS3_DCFG_FUSESR_VID_MASK; - } - vdd_target = vdd[vid]; + return false; +} +#endif - /* check override variable for overriding VDD */ - vdd_string = env_get(CONFIG_VID_FLS_ENV); - if (vdd_override == 0 && vdd_string && - !strict_strtoul(vdd_string, 10, &vdd_string_override)) - vdd_override = vdd_string_override; +int vid_set_mv_limits(int absmax, + int marginhigh, int marginlow, + int ovfault, int ovwarn, + int uvwarn, int uvfault) +{ + int ret; + int i2caddress; - if (vdd_override >= VDD_MV_MIN && vdd_override <= VDD_MV_MAX) { - vdd_target = vdd_override * 10; /* convert to 1/10 mV */ - debug("VDD override is %lu\n", vdd_override); - } else if (vdd_override != 0) { - printf("Invalid value.\n"); + ret = i2c_multiplexer_select_vid_channel(I2C_MUX_CH_VOL_MONITOR); + if (ret) { + debug("VID: I2C failed to switch channel\n"); + return ret; } + i2caddress = find_vid_chip_on_i2c(); - /* divide and round up by 10 to get a value in mV */ - vdd_target = DIV_ROUND_UP(vdd_target, 10); - if (vdd_target == 0) { - debug("VID: VID not used\n"); - ret = 0; - goto exit; - } else if (vdd_target < VDD_MV_MIN || vdd_target > VDD_MV_MAX) { - /* Check vdd_target is in valid range */ - printf("VID: Target VID %d mV is not in range.\n", - vdd_target); +#if defined(CONFIG_VOL_MONITOR_LTC3882) + if (i2caddress >= 0) { + /* We need to program the voltage limits + * properly, or the chip may freak out on + * VID changes. + */ + ret = write_l16_mV_LTC3882(i2caddress, + LTC3882_VOUT_MAX, + absmax); + if (!ret) + ret = write_l16_mV_LTC3882(i2caddress, + LTC3882_VOUT_MARGIN_HIGH, + marginhigh); + if (!ret) + ret = write_l16_mV_LTC3882(i2caddress, + LTC3882_VOUT_MARGIN_LOW, + marginlow); + if (!ret) + ret = write_l16_mV_LTC3882(i2caddress, + LTC3882_VOUT_OV_FAULT_LIMIT, + ovfault); + if (!ret) + ret = write_l16_mV_LTC3882(i2caddress, + LTC3882_VOUT_OV_WARN_LIMIT, + ovwarn); + if (!ret) + ret = write_l16_mV_LTC3882(i2caddress, + LTC3882_VOUT_UV_WARN_LIMIT, + uvwarn); + if (!ret) + ret = write_l16_mV_LTC3882(i2caddress, + LTC3882_VOUT_UV_FAULT_LIMIT, + uvfault); + } else ret = -1; - goto exit; - } else { - debug("VID: vid = %d mV\n", vdd_target); - } - /* - * Read voltage monitor to check real voltage. - */ - vdd_last = read_voltage(i2caddress); - if (vdd_last < 0) { - printf("VID: Couldn't read sensor abort VID adjustment\n"); - ret = -1; - goto exit; - } - vdd_current = vdd_last; - debug("VID: Core voltage is currently at %d mV\n", vdd_last); - /* - * Adjust voltage to at or one step above target. - * As measurements are less precise than setting the values - * we may run through dummy steps that cancel each other - * when stepping up and then down. - */ - while (vdd_last > 0 && - vdd_last < vdd_target) { - vdd_current += IR_VDD_STEP_UP; - vdd_last = set_voltage(i2caddress, vdd_current); - } - while (vdd_last > 0 && - vdd_last > vdd_target + (IR_VDD_STEP_DOWN - 1)) { - vdd_current -= IR_VDD_STEP_DOWN; - vdd_last = set_voltage(i2caddress, vdd_current); - } +#endif + if (ret) + printf("VID: Setting voltage limits failed! VID regulation may not be stable!\n"); - if (vdd_last > 0) - printf("VID: Core voltage after adjustment is at %d mV\n", - vdd_last); - else - ret = -1; -exit: - if (re_enable) - enable_interrupts(); i2c_multiplexer_select_vid_channel(I2C_MUX_CH_DEFAULT); + return ret; } -#else /* !CONFIG_FSL_LSCH3 */ + int adjust_vdd(ulong vdd_override) { int re_enable = disable_interrupts(); -#if defined(CONFIG_FSL_LSCH2) +#if defined(CONFIG_FSL_LSCH2) || defined(CONFIG_FSL_LSCH3) struct ccsr_gur *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); #else ccsr_gur_t __iomem *gur = (void __iomem *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); #endif u32 fusesr; - u8 vid, buf; + u8 vid; int vdd_target, vdd_current, vdd_last; int ret, i2caddress; unsigned long vdd_string_override; @@ -498,33 +555,22 @@ int adjust_vdd(ulong vdd_override) ret = -1; goto exit; } - ret = find_ir_chip_on_i2c(); + ret = find_vid_chip_on_i2c(); if (ret < 0) { printf("VID: Could not find voltage regulator on I2C.\n"); ret = -1; goto exit; } else { i2caddress = ret; - debug("VID: IR Chip found on I2C address 0x%02x\n", i2caddress); - } - - /* check IR chip work on Intel mode*/ - ret = i2c_read(i2caddress, - IR36021_INTEL_MODE_OOFSET, - 1, (void *)&buf, 1); - if (ret) { - printf("VID: failed to read IR chip mode.\n"); - ret = -1; - goto exit; - } - if ((buf & IR36021_MODE_MASK) != IR36021_INTEL_MODE) { - printf("VID: IR Chip is not used in Intel mode.\n"); - ret = -1; - goto exit; + debug("VID: Voltage regulator found on I2C address 0x%02x\n", i2caddress); } /* get the voltage ID from fuse status register */ +#ifdef CONFIG_FSL_LSCH3 + fusesr = in_le32(&gur->dcfg_fusesr); +#else fusesr = in_be32(&gur->dcfg_fusesr); +#endif /* * VID is used according to the table below * --------------------------------------- @@ -549,6 +595,22 @@ int adjust_vdd(ulong vdd_override) vid = (fusesr >> FSL_CHASSIS2_DCFG_FUSESR_VID_SHIFT) & FSL_CHASSIS2_DCFG_FUSESR_VID_MASK; } +#elif defined(CONFIG_FSL_LSCH3) + if(soc_has_lowbitsinfusesr(gur)) { + vid = (fusesr >> FSL_CHASSIS3_DCFG_FUSESR_LOW_ALTVID_SHIFT) & + FSL_CHASSIS3_DCFG_FUSESR_LOW_ALTVID_MASK; + if ((vid == 0) || (vid == FSL_CHASSIS3_DCFG_FUSESR_LOW_ALTVID_MASK)) { + vid = (fusesr >> FSL_CHASSIS3_DCFG_FUSESR_LOW_VID_SHIFT) & + FSL_CHASSIS3_DCFG_FUSESR_LOW_VID_MASK; + } + } else { + vid = (fusesr >> FSL_CHASSIS3_DCFG_FUSESR_ALTVID_SHIFT) & + FSL_CHASSIS3_DCFG_FUSESR_ALTVID_MASK; + if ((vid == 0) || (vid == FSL_CHASSIS3_DCFG_FUSESR_ALTVID_MASK)) { + vid = (fusesr >> FSL_CHASSIS3_DCFG_FUSESR_VID_SHIFT) & + FSL_CHASSIS3_DCFG_FUSESR_VID_MASK; + } + } #else vid = (fusesr >> FSL_CORENET_DCFG_FUSESR_ALTVID_SHIFT) & FSL_CORENET_DCFG_FUSESR_ALTVID_MASK; @@ -568,7 +630,7 @@ int adjust_vdd(ulong vdd_override) vdd_target = vdd_override * 10; /* convert to 1/10 mV */ debug("VDD override is %lu\n", vdd_override); } else if (vdd_override != 0) { - printf("Invalid value.\n"); + printf("VID: Invalid override value %lu mV.\n", vdd_override); } if (vdd_target == 0) { debug("VID: VID not used\n"); @@ -577,7 +639,7 @@ int adjust_vdd(ulong vdd_override) } else { /* divide and round up by 10 to get a value in mV */ vdd_target = DIV_ROUND_UP(vdd_target, 10); - debug("VID: vid = %d mV\n", vdd_target); + printf("VID: SoC target voltage = %d mV\n", vdd_target); } /* @@ -598,19 +660,23 @@ int adjust_vdd(ulong vdd_override) * when stepping up and then down. */ while (vdd_last > 0 && - vdd_last < vdd_target) { + vdd_last < vdd_target && + vdd_current < vdd_target) { vdd_current += IR_VDD_STEP_UP; vdd_last = set_voltage(i2caddress, vdd_current); } while (vdd_last > 0 && - vdd_last > vdd_target + (IR_VDD_STEP_DOWN - 1)) { + vdd_last > vdd_target + (IR_VDD_STEP_DOWN - 1) && + vdd_current > vdd_target + (IR_VDD_STEP_DOWN - 1)) { vdd_current -= IR_VDD_STEP_DOWN; vdd_last = set_voltage(i2caddress, vdd_current); } - if (vdd_last > 0) + if (vdd_last > 0) { printf("VID: Core voltage after adjustment is at %d mV\n", vdd_last); + ret = 0; + } else ret = -1; exit: @@ -621,7 +687,6 @@ exit: return ret; } -#endif static int print_vdd(void) { @@ -629,16 +694,16 @@ static int print_vdd(void) ret = i2c_multiplexer_select_vid_channel(I2C_MUX_CH_VOL_MONITOR); if (ret) { - debug("VID : I2c failed to switch channel\n"); + debug("VID : I2C failed to switch channel\n"); return -1; } - ret = find_ir_chip_on_i2c(); + ret = find_vid_chip_on_i2c(); if (ret < 0) { printf("VID: Could not find voltage regulator on I2C.\n"); goto exit; } else { i2caddress = ret; - debug("VID: IR Chip found on I2C address 0x%02x\n", i2caddress); + debug("VID: Chip found on I2C address 0x%02x\n", i2caddress); } /* diff --git a/board/freescale/common/vid.h b/board/freescale/common/vid.h index 9182c20..ea2ea7a 100644 --- a/board/freescale/common/vid.h +++ b/board/freescale/common/vid.h @@ -16,9 +16,28 @@ #define IR36021_INTEL_MODE 0x00 #define IR36021_AMD_MODE 0x20 +/* Declarations for the LTC3882 */ +#define LTC3882_PAGE 0x00 +#define LTC3882_VOUT_COMMAND 0x21 +#define LTC3882_VOUT_MAX 0x24 +#define LTC3882_VOUT_MARGIN_HIGH 0x25 +#define LTC3882_VOUT_MARGIN_LOW 0x26 +#define LTC3882_VOUT_OV_FAULT_LIMIT 0x40 +#define LTC3882_VOUT_OV_WARN_LIMIT 0x42 +#define LTC3882_VOUT_UV_WARN_LIMIT 0x43 +#define LTC3882_VOUT_UV_FAULT_LIMIT 0x44 +#define LTC3882_READ_VOUT 0x8B +#define LTC3882_MFR_ID 0x99 +#define LTC3882_MFR_MODEL 0x9A + /* step the IR regulator in 5mV increments */ #define IR_VDD_STEP_DOWN 5 #define IR_VDD_STEP_UP 5 + +int vid_set_mv_limits(int absmax, + int marginhigh, int marginlow, + int ovfault, int ovwarn, + int uvwarn, int uvfault); int adjust_vdd(ulong vdd_override); #endif /* __VID_H_ */ -- 1.7.1

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[U-Boot] [PATCH v2 00/13] driver model bring-up of dwc3 usb peripheral
by Vignesh R 08 Jan '18

08 Jan '18

This patch series enables ti dwc3 usb peripherial driver to adopt driver model and DT. And also adds support for to USB device boot using RNDIS for AM437x. Tested on AM437x GP EVM in USB RNDIS boot mode. ROM downloads SPL, SPL loads U-Boot via usb ether and then U-Boot loads kernel image using the same interface. Based on previous work submitted by Mugunthan here: https://lists.denx.de/pipermail/u-boot/2016-March/250115.html Change log: * Reorder patches adding dwc3 driver model patches * Split patch 8 into 3 patches. * rebase to latest master and pick up Reviewed-bys Mugunthan V N (7): drivers: usb: dwc3: remove devm_zalloc from linux_compact drivers: usb: dwc3-omap: move usb_gadget_handle_interrupts from board files to drivers am437x: board: do not register usb devices when CONFIG_DM_USB is defined omap5/am57xx/dra7xx: board: do not register usb devices when CONFIG_DM_USB is defined drivers: usb: common: add support to get maximum speed from dt drivers: usb: dwc3: add ti dwc3 peripheral driver with driver model support drivers: usb: dwc3: add ti dwc3 misc driver for wrapper Vignesh R (6): usb: gadget: ether: Provide a way to read MAC address usb: gadget: ether: Populate DM_FLAG_PRE_RELOC flag usb: gadget: add DWC3 USB gadget support am43xx: Add USB device boot support configs: am43xx: Enable configs to support USB device boot ARM: am437x-gp-evm-u-boot.dtsi: Enable nodes for USB device boot arch/arm/dts/am437x-gp-evm-u-boot.dtsi | 20 +++ arch/arm/mach-omap2/boot-common.c | 3 +- board/ti/am43xx/board.c | 41 +++--- board/ti/am57xx/board.c | 13 +- board/ti/dra7xx/evm.c | 13 +- board/ti/omap5_uevm/evm.c | 13 +- configs/am43xx_evm_defconfig | 13 +- configs/am43xx_evm_usbhost_boot_defconfig | 1 + drivers/usb/common/common.c | 29 ++++ drivers/usb/dwc3/core.c | 64 ++++++++- drivers/usb/dwc3/core.h | 6 + drivers/usb/dwc3/dwc3-omap.c | 231 +++++++++++++++++++++++++++++- drivers/usb/dwc3/gadget.c | 2 +- drivers/usb/dwc3/linux-compat.h | 5 - drivers/usb/dwc3/ti_usb_phy.c | 1 + drivers/usb/gadget/ether.c | 8 +- drivers/usb/gadget/gadget_chips.h | 2 + include/configs/am43xx_evm.h | 27 ++-- include/linux/usb/otg.h | 9 ++ scripts/Makefile.spl | 1 + 20 files changed, 416 insertions(+), 86 deletions(-) -- 2.13.0

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[U-Boot] Making lack-of DM conversion noisy warning
by Tom Rini 08 Jan '18

08 Jan '18

Hey all, So, my calendar alarm went off today to remind me that we need to make the lack of DM conversion more noisy, in order to encourage the remaining conversions to happen. But, off the top of my head, I'm not quite sure of the best way to implement that, anyone have an idea? Thanks! -- Tom

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[U-Boot] Please pull u-boot-x86
by Bin Meng 08 Jan '18

08 Jan '18

Hi Tom, The following changes since commit ca833ca9579b29c5667ea2fa7a9d3f89f1599a94: Merge git://git.denx.de/u-boot-rockchip (2018-01-03 12:27:12 -0500) are available in the git repository at: git://git.denx.de/u-boot-x86.git for you to fetch changes up to 5d8c4ebd95e23a606a40a73920b8d7d096a91d37: x86: tangier: Add Bluetooth to ACPI table (2018-01-08 16:52:25 +0800) ---------------------------------------------------------------- Andy Shevchenko (2): x86: tangier: Use actual GPIO hardware numbers x86: tangier: Add Bluetooth to ACPI table Tom Rini (1): x86: Move commands from under arch/x86 to cmd/x86/ arch/x86/include/asm/arch-tangier/acpi/southcluster.asl | 61 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++----- arch/x86/lib/Makefile | 1 - arch/x86/lib/fsp/Makefile | 1 - cmd/Makefile | 2 ++ cmd/x86/Makefile | 6 ++++++ arch/x86/lib/fsp/cmd_fsp.c => cmd/x86/fsp.c | 0 arch/x86/lib/cmd_mtrr.c => cmd/x86/mtrr.c | 0 7 files changed, 64 insertions(+), 7 deletions(-) create mode 100644 cmd/x86/Makefile rename arch/x86/lib/fsp/cmd_fsp.c => cmd/x86/fsp.c (100%) rename arch/x86/lib/cmd_mtrr.c => cmd/x86/mtrr.c (100%) Regards, Bin

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[U-Boot] [PATCH v3] crypto/fsl: fix BLOB encapsulation and decapsulation
by Clemens Gruber 08 Jan '18

08 Jan '18

The blob_encap and blob_decap functions were not flushing the dcache before passing data to CAAM/DMA and not invalidating the dcache when getting data back. Therefore, blob encapsulation and decapsulation failed with errors like the following due to data cache incoherency: "40000006: DECO: desc idx 0: Invalid KEY command" To ensure coherency, we require the key_mod, src and dst buffers to be aligned to the cache line size and flush/invalidate the memory regions. The same requirements apply to the job descriptor. Tested on an i.MX6Q board. Signed-off-by: Clemens Gruber <clemens.gruber(a)pqgruber.com> --- Changes since v2: - Removed copying to aligned buffers and require addresses to be aligned - Added function comments and notes about the alignment requirements - Added parentheses around BLOB_SIZE macro parameter x - Adapted commit text Changes since v1: - Moved BLOB_SIZE define to be available for all platforms (Fabio) drivers/crypto/fsl/fsl_blob.c | 103 ++++++++++++++++++++++++++++++++++++------ include/fsl_sec.h | 4 +- 2 files changed, 91 insertions(+), 16 deletions(-) diff --git a/drivers/crypto/fsl/fsl_blob.c b/drivers/crypto/fsl/fsl_blob.c index 38c6f9486b..cb315dfd89 100644 --- a/drivers/crypto/fsl/fsl_blob.c +++ b/drivers/crypto/fsl/fsl_blob.c @@ -7,63 +7,138 @@ #include <common.h> #include <malloc.h> +#include <memalign.h> #include <fsl_sec.h> #include <linux/errno.h> #include "jobdesc.h" #include "desc.h" #include "jr.h" +/** + * blob_decap() - Decapsulate the data from a blob + * @key_mod: - Key modifier address + * @src: - Source address (blob) + * @dst: - Destination address (data) + * @len: - Size of decapsulated data + * + * Note: Start and end of the key_mod, src and dst buffers have to be aligned to + * the cache line size (ARCH_DMA_MINALIGN) for the CAAM operation to succeed. + * + * Returns zero on success, negative on error. + */ int blob_decap(u8 *key_mod, u8 *src, u8 *dst, u32 len) { - int ret, i = 0; + int ret, size, i = 0; u32 *desc; + if (!IS_ALIGNED((uintptr_t)key_mod, ARCH_DMA_MINALIGN) || + !IS_ALIGNED((uintptr_t)src, ARCH_DMA_MINALIGN) || + !IS_ALIGNED((uintptr_t)dst, ARCH_DMA_MINALIGN)) { + puts("Error: blob_decap: Address arguments are not aligned!\n"); + return -EINVAL; + } + printf("\nDecapsulating blob to get data\n"); - desc = malloc(sizeof(int) * MAX_CAAM_DESCSIZE); + desc = malloc_cache_aligned(sizeof(int) * MAX_CAAM_DESCSIZE); if (!desc) { debug("Not enough memory for descriptor allocation\n"); - return -1; + return -ENOMEM; } + size = ALIGN(16, ARCH_DMA_MINALIGN); + flush_dcache_range((unsigned long)key_mod, + (unsigned long)key_mod + size); + + size = ALIGN(BLOB_SIZE(len), ARCH_DMA_MINALIGN); + flush_dcache_range((unsigned long)src, + (unsigned long)src + size); + inline_cnstr_jobdesc_blob_decap(desc, key_mod, src, dst, len); debug("Descriptor dump:\n"); for (i = 0; i < 14; i++) debug("Word[%d]: %08x\n", i, *(desc + i)); + + size = ALIGN(sizeof(int) * MAX_CAAM_DESCSIZE, ARCH_DMA_MINALIGN); + flush_dcache_range((unsigned long)desc, + (unsigned long)desc + size); + ret = run_descriptor_jr(desc); - if (ret) - printf("Error in Decapsulation %d\n", ret); - else - printf("Decapsulation Success\n"); + if (ret) { + printf("Error in blob decapsulation: %d\n", ret); + } else { + size = ALIGN(len, ARCH_DMA_MINALIGN); + invalidate_dcache_range((unsigned long)dst, + (unsigned long)dst + size); + + puts("Blob decapsulation successful.\n"); + } free(desc); return ret; } +/** + * blob_encap() - Encapsulate the data as a blob + * @key_mod: - Key modifier address + * @src: - Source address (data) + * @dst: - Destination address (blob) + * @len: - Size of data to be encapsulated + * + * Note: Start and end of the key_mod, src and dst buffers have to be aligned to + * the cache line size (ARCH_DMA_MINALIGN) for the CAAM operation to succeed. + * + * Returns zero on success, negative on error. + */ int blob_encap(u8 *key_mod, u8 *src, u8 *dst, u32 len) { - int ret, i = 0; + int ret, size, i = 0; u32 *desc; + if (!IS_ALIGNED((uintptr_t)key_mod, ARCH_DMA_MINALIGN) || + !IS_ALIGNED((uintptr_t)src, ARCH_DMA_MINALIGN) || + !IS_ALIGNED((uintptr_t)dst, ARCH_DMA_MINALIGN)) { + puts("Error: blob_encap: Address arguments are not aligned!\n"); + return -EINVAL; + } + printf("\nEncapsulating data to form blob\n"); - desc = malloc(sizeof(int) * MAX_CAAM_DESCSIZE); + desc = malloc_cache_aligned(sizeof(int) * MAX_CAAM_DESCSIZE); if (!desc) { debug("Not enough memory for descriptor allocation\n"); - return -1; + return -ENOMEM; } + size = ALIGN(16, ARCH_DMA_MINALIGN); + flush_dcache_range((unsigned long)key_mod, + (unsigned long)key_mod + size); + + size = ALIGN(len, ARCH_DMA_MINALIGN); + flush_dcache_range((unsigned long)src, + (unsigned long)src + size); + inline_cnstr_jobdesc_blob_encap(desc, key_mod, src, dst, len); debug("Descriptor dump:\n"); for (i = 0; i < 14; i++) debug("Word[%d]: %08x\n", i, *(desc + i)); + + size = ALIGN(sizeof(int) * MAX_CAAM_DESCSIZE, ARCH_DMA_MINALIGN); + flush_dcache_range((unsigned long)desc, + (unsigned long)desc + size); + ret = run_descriptor_jr(desc); - if (ret) - printf("Error in Encapsulation %d\n", ret); - else - printf("Encapsulation Success\n"); + if (ret) { + printf("Error in blob encapsulation: %d\n", ret); + } else { + size = ALIGN(BLOB_SIZE(len), ARCH_DMA_MINALIGN); + invalidate_dcache_range((unsigned long)dst, + (unsigned long)dst + size); + + puts("Blob encapsulation successful.\n"); + } free(desc); return ret; diff --git a/include/fsl_sec.h b/include/fsl_sec.h index 61c671d6c7..a2f5f5a5f1 100644 --- a/include/fsl_sec.h +++ b/include/fsl_sec.h @@ -215,6 +215,8 @@ struct sg_entry { #define SG_ENTRY_OFFSET_SHIFT 0 }; +#define BLOB_SIZE(x) ((x) + 32 + 16) /* Blob buffer size */ + #if defined(CONFIG_MX6) || defined(CONFIG_MX7) /* Job Ring Base Address */ #define JR_BASE_ADDR(x) (CONFIG_SYS_FSL_SEC_ADDR + 0x1000 * (x + 1)) @@ -274,8 +276,6 @@ struct sg_entry { #define PERM 0x0000B008 /* Clear on release, lock SMAP * lock SMAG group 1 Blob */ -#define BLOB_SIZE(x) (x + 32 + 16) /* Blob buffer size */ - /* HAB WRAPPED KEY header */ #define WRP_HDR_SIZE 0x08 #define HDR_TAG 0x81 -- 2.15.1

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