January 2018 - U-Boot

[U-Boot] [PATCH 0/2] warp7: add UART6 support
by Ryan Harkin 22 Jan '18

22 Jan '18

This small series adds support for using the console on UART6 on the WaRP7 board. The board retains current functionality: UART6 is not used by default and needs it needs to be enabled in defconfig. [PATCH 1/2] serial: mxc: support DTE mode [PATCH 2/2] warp7: add support for console on UART6 and mikroBus board/warp7/Kconfig | 9 +++++++++ board/warp7/warp7.c | 6 ++++++ drivers/serial/Kconfig | 7 +++++++ drivers/serial/serial_mxc.c | 10 ++++++++-- include/configs/warp7.h | 8 +++++++- 5 files changed, 37 insertions(+), 3 deletions(-)

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[U-Boot] [PATCH] sunxi: Add support for the Beelink-x2 STB
by codekipper＠gmail.com 22 Jan '18

22 Jan '18

From: Marcus Cooper <codekipper(a)gmail.com> The Beelink X2 is an STB based on the Allwinner H3 SoC with a uSD slot, 2 USB ports( 1 * USB-2 Host, 1 USB OTG), a 10/100M ethernet port using the SoC's integrated PHY, Wifi via an sdio wifi chip, HDMI, a dual colour LED, an IR receiver and an optical S/PDIF connector. Signed-off-by: Marcus Cooper <codekipper(a)gmail.com> --- arch/arm/dts/Makefile | 1 + arch/arm/dts/sun8i-h3-beelink-x2.dts | 155 +++++++++++++++++++++++++++++++++++ board/sunxi/MAINTAINERS | 5 ++ configs/beelink_x2_defconfig | 18 ++++ 4 files changed, 179 insertions(+) create mode 100644 arch/arm/dts/sun8i-h3-beelink-x2.dts create mode 100644 configs/beelink_x2_defconfig diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 9540ba4313..f899cef7ac 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -335,6 +335,7 @@ dtb-$(CONFIG_MACH_SUN8I_A83T) += \ dtb-$(CONFIG_MACH_SUN8I_H3) += \ sun8i-h2-plus-orangepi-zero.dtb \ sun8i-h3-bananapi-m2-plus.dtb \ + sun8i-h3-beelink-x2.dtb \ sun8i-h3-libretech-all-h3-cc.dtb \ sun8i-h3-orangepi-2.dtb \ sun8i-h3-orangepi-lite.dtb \ diff --git a/arch/arm/dts/sun8i-h3-beelink-x2.dts b/arch/arm/dts/sun8i-h3-beelink-x2.dts new file mode 100644 index 0000000000..43f67eb8db --- /dev/null +++ b/arch/arm/dts/sun8i-h3-beelink-x2.dts @@ -0,0 +1,155 @@ +/* + * Copyright (C) 2017 Marcus Cooper <codekipper(a)gmail.com> + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include "sun8i-h3.dtsi" +#include "sunxi-common-regulators.dtsi" + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> + +/ { + model = "Beelink X2"; + compatible = "roofull,beelink-x2", "allwinner,sun8i-h3"; + + aliases { + serial0 = &uart0; + /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */ + ethernet1 = &sdiowifi; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + leds { + compatible = "gpio-leds"; + + blue { + label = "beelink-x2:blue:pwr"; + gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */ + default-state = "on"; + }; + + red { + label = "beelink-x2:red:standby"; + gpios = <&pio 0 15 GPIO_ACTIVE_HIGH>; /* PA15 */ + }; + }; + + wifi_pwrseq: wifi_pwrseq { + compatible = "mmc-pwrseq-simple"; + reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */ + }; +}; + +&ehci1 { + status = "okay"; +}; + +&emac { + phy = <&phy1>; + phy-mode = "mii"; + allwinner,use-internal-phy; + allwinner,leds-active-low; + status = "okay"; + phy1: ethernet-phy@1 { + reg = <1>; + }; +}; + +&ir { + pinctrl-names = "default"; + pinctrl-0 = <&ir_pins_a>; + status = "okay"; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; + vmmc-supply = <&reg_vcc3v3>; + bus-width = <4>; + cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */ + cd-inverted; + status = "okay"; +}; + +&mmc1 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc1_pins_a>; + vmmc-supply = <&reg_vcc3v3>; + bus-width = <4>; + non-removable; + status = "okay"; + + /* + * Explicitly define the sdio device, so that we can add an ethernet + * alias for it (which e.g. makes u-boot set a mac-address). + */ + sdiowifi: sdio_wifi@1 { + reg = <1>; + }; +}; + +&mmc2 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc2_8bit_pins>; + vmmc-supply = <&reg_vcc3v3>; + bus-width = <8>; + non-removable; + cap-mmc-hw-reset; + status = "okay"; +}; + +&ohci1 { + status = "okay"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins_a>; + status = "okay"; +}; + +&usbphy { + status = "okay"; +}; diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index 362edffc42..1ec7edef13 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -143,6 +143,11 @@ M: Jagan Teki <jagan(a)amarulasolutions.com> S: Maintained F: configs/bananapi_m64_defconfig +BEELINK X2 BOARD +M: Marcus Cooper <codekipper(a)gmail.com> +S: Maintained +F: configs/beelink_x2_defconfig + COLOMBUS BOARD M: Maxime Ripard <maxime.ripard(a)free-electrons.com> S: Maintained diff --git a/configs/beelink_x2_defconfig b/configs/beelink_x2_defconfig new file mode 100644 index 0000000000..0b9386609e --- /dev/null +++ b/configs/beelink_x2_defconfig @@ -0,0 +1,18 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_SPL_I2C_SUPPORT=y +CONFIG_MACH_SUN8I_H3=y +CONFIG_DRAM_CLK=624 +CONFIG_DRAM_ZQ=3881979 +CONFIG_DRAM_ODT_EN=y +CONFIG_MMC_SUNXI_SLOT_EXTRA=2 +CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-beelink-x2" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_CONSOLE_MUX=y +CONFIG_SPL=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_SUN8I_EMAC=y +CONFIG_SY8106A_POWER=y +CONFIG_USB_EHCI_HCD=y -- 2.16.0

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[U-Boot] [PATCH] sunxi: Fix display timing flags
by Giulio Benetti 22 Jan '18

22 Jan '18

flags member of struct timing was not initialized, this took to unpredictable behaviour of display flags, such DISPLAY_FLAGS_HSYNC_HIGH instead of _LOW etc. Init timing->flags = 0 Signed-off-by: Giulio Benetti <giulio.benetti(a)micronovasrl.com> --- drivers/video/sunxi/sunxi_display.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/video/sunxi/sunxi_display.c b/drivers/video/sunxi/sunxi_display.c index 0630289..f191ef1 100644 --- a/drivers/video/sunxi/sunxi_display.c +++ b/drivers/video/sunxi/sunxi_display.c @@ -625,6 +625,8 @@ static void sunxi_ctfb_mode_to_display_timing(const struct ctfb_res_modes *mode, timing->vback_porch.typ = mode->upper_margin; timing->vsync_len.typ = mode->vsync_len; + timing->flags = 0; + if (mode->sync & FB_SYNC_HOR_HIGH_ACT) timing->flags |= DISPLAY_FLAGS_HSYNC_HIGH; else -- 2.7.4

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[U-Boot] [PATCH v2] spi: kirkwood_spi: implement workaround for FE-9144572
by Chris Packham 22 Jan '18

22 Jan '18

Erratum NO. FE-9144572: The device SPI interface supports frequencies of up to 50 MHz. However, due to this erratum, when the device core clock is 250 MHz and the SPI interfaces is configured for 50MHz SPI clock and CPOL=CPHA=1 there might occur data corruption on reads from the SPI device. Implement the workaround by setting the TMISO_SAMPLE value to 0x2 in the timing1 register. Signed-off-by: Chris Packham <judge.packham(a)gmail.com> Reviewed-by: Stefan Roese <sr(a)denx.de> --- I've based this as much as I can on the equivalent implementation in the Linux kernel[1], but there are differences in the u-boot spi infrastructure that means I can't be as specific when qualifying whether the workaround is needed. [1] - https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/dri… Changes in v2: - collect reviewed-by from Stefan - remove mvebu_spi_type - describe errata above mvebu_spi_50mhz_ac_timing_erratum arch/arm/include/asm/arch-mvebu/spi.h | 6 ++++ drivers/spi/kirkwood_spi.c | 61 +++++++++++++++++++++++++++++++++-- 2 files changed, 64 insertions(+), 3 deletions(-) diff --git a/arch/arm/include/asm/arch-mvebu/spi.h b/arch/arm/include/asm/arch-mvebu/spi.h index 3545aed17347..1de510ea6da9 100644 --- a/arch/arm/include/asm/arch-mvebu/spi.h +++ b/arch/arm/include/asm/arch-mvebu/spi.h @@ -57,6 +57,12 @@ struct kwspi_registers { #define KWSPI_TXLSBF (1 << 13) #define KWSPI_RXLSBF (1 << 14) +/* Timing Parameters 1 Register */ +#define KW_SPI_TMISO_SAMPLE_OFFSET 6 +#define KW_SPI_TMISO_SAMPLE_MASK (0x3 << KW_SPI_TMISO_SAMPLE_OFFSET) +#define KW_SPI_TMISO_SAMPLE_1 (1 << KW_SPI_TMISO_SAMPLE_OFFSET) +#define KW_SPI_TMISO_SAMPLE_2 (2 << KW_SPI_TMISO_SAMPLE_OFFSET) + #define KWSPI_IRQUNMASK 1 /* unmask SPI interrupt */ #define KWSPI_IRQMASK 0 /* mask SPI interrupt */ #define KWSPI_SMEMRDIRQ 1 /* SerMem data xfer ready irq */ diff --git a/drivers/spi/kirkwood_spi.c b/drivers/spi/kirkwood_spi.c index 0c6bd295cde9..5b1ac0eed634 100644 --- a/drivers/spi/kirkwood_spi.c +++ b/drivers/spi/kirkwood_spi.c @@ -243,6 +243,10 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, /* Here now the DM part */ +struct mvebu_spi_dev { + bool is_errata_50mhz_ac; +}; + struct mvebu_spi_platdata { struct kwspi_registers *spireg; }; @@ -269,10 +273,38 @@ static int mvebu_spi_set_speed(struct udevice *bus, uint hz) return 0; } +/* + * FE-9144572: The device SPI interface supports frequencies of up to 50 MHz. + * However, due to this erratum, when the device core clock is 250 MHz and the + * SPI interfaces is configured for 50MHz SPI clock and CPOL=CPHA=1 there might + * occur data corruption on reads from the SPI device. + * + * Workaround: Set the TMISO_SAMPLE value to 0x2 in the SPI Timing Parameters 1 + * register + */ +static void mvebu_spi_50mhz_ac_timing_erratum(struct udevice *bus, uint mode) +{ + struct mvebu_spi_platdata *plat = dev_get_platdata(bus); + struct kwspi_registers *reg = plat->spireg; + u32 data = readl(&reg->timing1); + + data &= ~KW_SPI_TMISO_SAMPLE_MASK; + + if (CONFIG_SYS_TCLK == 250000000 && + mode & SPI_CPOL && + mode & SPI_CPHA) + data |= KW_SPI_TMISO_SAMPLE_2; + else + data |= KW_SPI_TMISO_SAMPLE_1; + + writel(data, &reg->timing1); +} + static int mvebu_spi_set_mode(struct udevice *bus, uint mode) { struct mvebu_spi_platdata *plat = dev_get_platdata(bus); struct kwspi_registers *reg = plat->spireg; + const struct mvebu_spi_dev *drvdata; u32 data = readl(&reg->cfg); data &= ~(KWSPI_CPHA | KWSPI_CPOL | KWSPI_RXLSBF | KWSPI_TXLSBF); @@ -286,6 +318,10 @@ static int mvebu_spi_set_mode(struct udevice *bus, uint mode) writel(data, &reg->cfg); + drvdata = (struct mvebu_spi_dev *)dev_get_driver_data(bus); + if (drvdata->is_errata_50mhz_ac) + mvebu_spi_50mhz_ac_timing_erratum(bus, mode); + return 0; } @@ -343,10 +379,29 @@ static const struct dm_spi_ops mvebu_spi_ops = { */ }; +static const struct mvebu_spi_dev armada_xp_spi_dev_data = { +}; + +static const struct mvebu_spi_dev armada_375_spi_dev_data = { +}; + +static const struct mvebu_spi_dev armada_380_spi_dev_data = { + .is_errata_50mhz_ac = true, +}; + static const struct udevice_id mvebu_spi_ids[] = { - { .compatible = "marvell,armada-375-spi" }, - { .compatible = "marvell,armada-380-spi" }, - { .compatible = "marvell,armada-xp-spi" }, + { + .compatible = "marvell,armada-375-spi", + .data = (ulong)&armada_375_spi_dev_data + }, + { + .compatible = "marvell,armada-380-spi", + .data = (ulong)&armada_380_spi_dev_data + }, + { + .compatible = "marvell,armada-xp-spi", + .data = (ulong)&armada_xp_spi_dev_data + }, { } }; -- 2.14.2

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[U-Boot] [PATCH v4 0/6] Support for the Turris Omnia router
by Marek Behún 22 Jan '18

22 Jan '18

This is the fourth version of patches for adding support for the Turris Omnia board, a router developed by the CZ.NIC. Modifications from last version: - Since the new driver model API does not expose the watchdog_reset function, only wdt_reset, the watchdog did not get restarted and the device rebooted every 2 minutes in U-Boot. These patches solve this problem. - The SPI flash could not be accessed. I did not notice this since during my testing I always uploaded the SPL image via serial line. This is now also solved. The first patch modifies Marvell's DDR3 training code to be more general, so that board topology map can force 2t timing. The second patch adds support for the hardware watchdog which can be found on Omnia. I have modified the driver to use the new driver model API. The third patch adds the device tree for Turris Omnia taken from Linux kernel and also armada-385-turris-omnia-u-boot.dtsi file with some additions for U-Boot. The fourth patch adds support for the I2C multiplexer found on Turris Omnia. The fifth patch adds support for the ATSHA204A CryptoAuthentication chip, on which the Turris Omnia stores serial number and device MAC address. The sixth patch adds the proper support for the board. I have modified config to use distro defaults as requested by Andreas Faerber and also removed unnecessary comments. Marek Behun

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[U-Boot] [RESEND PATCH v2 1/8] spi: Fix style violation and improve code
by Mario Six 22 Jan '18

22 Jan '18

This patch fixes a printf specifier style violation, reduces the scope of a variable, and turns a void pointer that is used with pointer arithmetic into a u8 pointer. Signed-off-by: Mario Six <mario.six(a)gdsys.cc> --- v1 -> v2: None --- drivers/spi/spi.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index 7d81fbd7f8..dea8dcda5b 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c @@ -12,7 +12,7 @@ int spi_set_wordlen(struct spi_slave *slave, unsigned int wordlen) { if (wordlen == 0 || wordlen > 32) { - printf("spi: invalid wordlen %d\n", wordlen); + printf("spi: invalid wordlen %u\n", wordlen); return -1; } @@ -24,11 +24,12 @@ int spi_set_wordlen(struct spi_slave *slave, unsigned int wordlen) void *spi_do_alloc_slave(int offset, int size, unsigned int bus, unsigned int cs) { - struct spi_slave *slave; - void *ptr; + u8 *ptr; ptr = malloc(size); if (ptr) { + struct spi_slave *slave; + memset(ptr, '\0', size); slave = (struct spi_slave *)(ptr + offset); slave->bus = bus; -- 2.11.0

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[U-Boot] [PATCH v2] mmc: fsl_esdhc: Fix i.MX53 eSDHCv3 clock
by Benoît Thébaudeau 22 Jan '18

22 Jan '18

Commit 4f425280fa71 ("mmc: fsl_esdhc: Allow all supported prescaler values") made it possible to set SYSCTL.SDCLKFS to 0 in SDR mode on i.MX, thus bypassing the SD clock frequency prescaler, in order to be able to get higher SD clock frequencies in some contexts. However, that commit missed the fact that this value is illegal on the eSDHCv3 instance of the i.MX53. This seems to be the only exception on i.MX, this value being legal even for the eSDHCv2 instances of the i.MX53. Fix this issue by changing the minimum prescaler value for the single instance of the i.MX53 eSDHCv3 controller. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev(a)gmail.com> Reviewed-by: Fabio Estevam <fabio.estevam(a)nxp.com> --- Changes for v2: - Surround == with parentheses for clarity (suggested by Stefano). --- drivers/mmc/fsl_esdhc.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index 499d622c6d..5b6042c22c 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -528,14 +528,19 @@ out: static void set_sysctl(struct fsl_esdhc_priv *priv, struct mmc *mmc, uint clock) { + struct fsl_esdhc *regs = priv->esdhc_regs; int div = 1; #ifdef ARCH_MXC +#ifdef CONFIG_MX53 + /* For i.MX53 eSDHCv3, SYSCTL.SDCLKFS may not be set to 0. */ + int pre_div = (regs == (struct fsl_esdhc *)MMC_SDHC3_BASE_ADDR) ? 2 : 1; +#else int pre_div = 1; +#endif #else int pre_div = 2; #endif int ddr_pre_div = mmc->ddr_mode ? 2 : 1; - struct fsl_esdhc *regs = priv->esdhc_regs; int sdhc_clk = priv->sdhc_clk; uint clk; -- 2.14.1

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[U-Boot] [PATCH] mmc: fix the wrong dislabing clock
by Jaehoon Chung 22 Jan '18

22 Jan '18

When power is off, clock is not disabling. Because it's passed to 1, mmc->clock should be set to f_min value. Some drivers can't initialize the eMMC/SD card with current status. This patch is to fix the disabling clock value to 0. Fixes: 2e7410d76ad1 ("mmc: disable the mmc clock during power off") Signed-off-by: Jaehoon Chung <jh80.chung(a)samsung.com> --- drivers/mmc/mmc.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index 53c819187e..311f51f237 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -1501,11 +1501,13 @@ static int mmc_set_ios(struct mmc *mmc) int mmc_set_clock(struct mmc *mmc, uint clock, bool disable) { - if (clock > mmc->cfg->f_max) - clock = mmc->cfg->f_max; + if (!disable && clock != 0) { + if (clock > mmc->cfg->f_max) + clock = mmc->cfg->f_max; - if (clock < mmc->cfg->f_min) - clock = mmc->cfg->f_min; + if (clock < mmc->cfg->f_min) + clock = mmc->cfg->f_min; + } mmc->clock = clock; mmc->clk_disable = disable; @@ -2449,7 +2451,7 @@ static int mmc_power_on(struct mmc *mmc) static int mmc_power_off(struct mmc *mmc) { - mmc_set_clock(mmc, 1, true); + mmc_set_clock(mmc, 0, true); #if CONFIG_IS_ENABLED(DM_MMC) && CONFIG_IS_ENABLED(DM_REGULATOR) if (mmc->vmmc_supply) { int ret = regulator_set_enable(mmc->vmmc_supply, false); -- 2.15.1

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[U-Boot] [PATCH 0/4] mips: bmips: add HSSPI support
by Álvaro Fernández Rojas 22 Jan '18

22 Jan '18

BCM63xx HSSPI controller has the same issue as BCM63xx SPI controller: it doesn't allow keeping CS active between transfers. However, this controller allows changing CS polarities, which is used in the linux upstream driver to manage CS as desired. Álvaro Fernández Rojas (4): dm: spi: add BCM63xx HSSPI driver mips: bmips: add bcm63xx-hsspi driver support for BCM6328 mips: bmips: add bcm63xx-hsspi driver support for BCM63268 mips: bmips: enable the SPI flash on the Comtrend AR-5387un arch/mips/dts/brcm,bcm63268.dtsi | 21 ++ arch/mips/dts/brcm,bcm6328.dtsi | 24 ++ arch/mips/dts/comtrend,ar-5387un.dts | 12 + configs/comtrend_ar5387un_ram_defconfig | 8 + drivers/spi/Kconfig | 8 + drivers/spi/Makefile | 1 + drivers/spi/bcm63xx_hsspi.c | 392 ++++++++++++++++++++++++++++++++ 7 files changed, 466 insertions(+) create mode 100644 drivers/spi/bcm63xx_hsspi.c -- 2.1.4

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[U-Boot] [PATCH 0/8] mmc: some fixes for core and add HS200 support for sdhci-cadence
by Masahiro Yamada 22 Jan '18

22 Jan '18

This series can be cleanly applied to u-boot-mmc/next. I really hope the HS200 support will be pulled in the next MW. Masahiro Yamada (8): dm: add dev_read_u32() mmc: do not overwrite cfg->f_max if "max-frequency" if missing mmc: let mmc_of_parse() fail for insane bus-width value mmc: sdhci: do not overwrite host_caps in sdhci_setup_cfg() mmc: sdhci-cadence: use bitfield access macros for cleanup mmc: sdhci-cadence: call mmc_of_parse() mmc: sdhci-cadence: add HS200 support mmc: sdhci: change data transfer failure into debug message drivers/core/read.c | 5 ++ drivers/mmc/mmc-uclass.c | 9 ++-- drivers/mmc/sdhci-cadence.c | 111 ++++++++++++++++++++++++++++++++++++-------- drivers/mmc/sdhci.c | 6 +-- include/dm/read.h | 16 +++++++ 5 files changed, 120 insertions(+), 27 deletions(-) -- 2.7.4

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