September 2017 - U-Boot

[U-Boot] [PATCH v5] cmd: usb: add blk, emulation devices to ignore list as needed
by Suneel Garapati 18 Oct '17

18 Oct '17

add blk child devices to ignore list while displaying usb tree graph, also preamble should not be set for blk child devices. add usb_emul to ignore list in usb_show_info. otherwise usb tree and info commands may cause crash treating blk as usb device. Signed-off-by: Suneel Garapati <suneelglinux(a)gmail.com> Reviewed-by: Bin Meng <bmeng.cn(a)gmail.com> Tested-by: Bin Meng <bmeng.cn(a)gmail.com> --- Changes v5: - add usb_emul to ignore list in usb_show_info - modify description Changes v4: - do not set preamble if child is block device for mass storage Changes v3: - remove 'check on parent uclass' in description Changes v2: - remove check on parent uclass Changes v1: - add separate check on blk uclass - modify description - add separate check on parent uclass as usb cmd/usb.c | 22 +++++++++++++++++++--- 1 file changed, 19 insertions(+), 3 deletions(-) diff --git a/cmd/usb.c b/cmd/usb.c index d95bcf5..907debe 100644 --- a/cmd/usb.c +++ b/cmd/usb.c @@ -349,6 +349,16 @@ static void usb_show_tree_graph(struct usb_device *dev, char *pre) printf(" %s", pre); #ifdef CONFIG_DM_USB has_child = device_has_active_children(dev->dev); + if (device_get_uclass_id(dev->dev) == UCLASS_MASS_STORAGE) { + struct udevice *child; + + for (device_find_first_child(dev->dev, &child); + child; + device_find_next_child(&child)) { + if (device_get_uclass_id(child) == UCLASS_BLK) + has_child = 0; + } + } #else /* check if the device has connected children */ int i; @@ -414,8 +424,12 @@ static void usb_show_tree_graph(struct usb_device *dev, char *pre) udev = dev_get_parent_priv(child); - /* Ignore emulators, we only want real devices */ - if (device_get_uclass_id(child) != UCLASS_USB_EMUL) { + /* + * Ignore emulators and block child devices, we only want + * real devices + */ + if ((device_get_uclass_id(child) != UCLASS_USB_EMUL) && + (device_get_uclass_id(child) != UCLASS_BLK)) { usb_show_tree_graph(udev, pre); pre[index] = 0; } @@ -605,7 +619,9 @@ static void usb_show_info(struct usb_device *udev) for (device_find_first_child(udev->dev, &child); child; device_find_next_child(&child)) { - if (device_active(child)) { + if (device_active(child) && + (device_get_uclass_id(child) != UCLASS_USB_EMUL) && + (device_get_uclass_id(child) != UCLASS_BLK)) { udev = dev_get_parent_priv(child); usb_show_info(udev); } -- 2.7.4

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[U-Boot] Fwd: u-boot.img size limit for spl fat load ?
by Ayoub Zaki 18 Oct '17

18 Oct '17

Hello Albert, First tank you so much for inversting your time for replying. I put some printf in the code and SPL is hanging in spl_load_image_fat function. I also enable the DEBUG messages here the complete log file : http://pastebin.com/raw.php?i=BwUJXDDb So I suspect that SPL is not allocating enough memory to load u-boot.img but I can't find where this size limit is set and where I can change it. Cheers, Ayoub > 2015-01-19 8:08 GMT+01:00 Albert ARIBAUD <albert.u.boot(a)aribaud.net>: > > > Hello Ayoub, > > > > On Fri, 16 Jan 2015 15:42:37 +0100, Ayoub Zaki > > <ayoub.zaki(a)googlemail.com> wrote: > > > Hello list, > > > > > > I'm using u-boot-2014.10 and trying to build it with LCD support for the > > > Beaglebone black to include a Boot logo image. > > > It seems that spl hangs while fat loading a 2.8MB sized u-boot.img ! > > > I reduced the the logo header file and rebuild u-boot, that worked for a > > > 1.6MB sized u-boot.img. > > > Is there any size limit for u-boot ? how to increase the memory allocated > > > by spl ? > > > > There should not be a size limit for SPL fat load. > > > > What may happen is that SPL code is overwritten before it exits, or > > U-Boot itself is corrupted after being loaded. > > > > I assume you've seen the SPL banner and not the U-Boot one; that alone > > does not tell us whether SPL or U-Boot did hang. Can you build U-boot > > with debug enabled? If this results in too big an SPL image, then try > > and at least enable debug for the image chainloading parts, so that you > > can see how far SPL code gets run. > > > > > Thanks you. > > > > No problem. > > > > Amicalement, > > -- > > Albert.

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[U-Boot] [PATCH 0/6] Add gmac support for rk3399-evb and rv1108-evb
by David Wu 17 Oct '17

17 Oct '17

This serie of patches integrates the setup mac clock is internal or external, as well as the way for setting rmii or rgmii interface. David Wu (6): rockchip: clk: Add mac clock set for rk3399 rockchip: dts: rk3399-evb: Change the tx/rx delay value for transmission quality rockchip: configs: Enable CONFIG_NET_RANDOM_ETHADDR for rk3288-evb net: gmac_rockchip: Define the gmac grf register struct at gmac_rockchip.c net: gmac_rockchip: Use the proerty of "clock_in_out" to set mac clock rockchip: gmac_rockchip: Add gmac support for rv1108 arch/arm/dts/rk3399-evb.dts | 4 +- configs/evb-rk3288_defconfig | 1 + drivers/clk/rockchip/clk_rk3399.c | 21 +++- drivers/net/gmac_rockchip.c | 234 ++++++++++++++++++++++++++++++++------ 4 files changed, 222 insertions(+), 38 deletions(-) -- 2.7.4

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[U-Boot] [PATCH 1/2] mtd: nand: do not check R/B# for CMD_READID in nand_command(_lp)
by Masahiro Yamada 15 Oct '17

15 Oct '17

Read ID (0x90) command does not toggle the R/B# pin. Without this patch, NAND_CMD_READID falls into the default: label, then R/B# is checked by chip->dev_ready(). [masahiro: import Linux commit 3158fa0e739615769cc047d2428f30f4c3b6640e] Signed-off-by: Masahiro Yamada <yamada.masahiro(a)socionext.com> Signed-off-by: Boris Brezillon <boris.brezillon(a)free-electrons.com> --- drivers/mtd/nand/nand_base.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index 3f1b3a7..776c20f 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c @@ -651,6 +651,7 @@ static void nand_command(struct mtd_info *mtd, unsigned int command, case NAND_CMD_ERASE2: case NAND_CMD_SEQIN: case NAND_CMD_STATUS: + case NAND_CMD_READID: return; case NAND_CMD_RESET: @@ -748,6 +749,7 @@ static void nand_command_lp(struct mtd_info *mtd, unsigned int command, case NAND_CMD_SEQIN: case NAND_CMD_RNDIN: case NAND_CMD_STATUS: + case NAND_CMD_READID: return; case NAND_CMD_RESET: -- 2.7.4

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[U-Boot] [PATCH] moveconfig: fix error message in do_autoconf()
by Chris Packham 15 Oct '17

15 Oct '17

Move the % arch outside the double quote so that the missing toolchain message is displayed correctly. Signed-off-by: Chris Packham <judge.packham(a)gmail.com> --- tools/moveconfig.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/moveconfig.py b/tools/moveconfig.py index 8a038501929c..45742dc2e6b9 100755 --- a/tools/moveconfig.py +++ b/tools/moveconfig.py @@ -1170,7 +1170,7 @@ class Slot: toolchain = self.toolchains.Select(arch) except ValueError: self.log += color_text(self.options.color, COLOR_YELLOW, - "Tool chain for '%s' is missing. Do nothing.\n % arch") + "Tool chain for '%s' is missing. Do nothing.\n" % arch) self.finish(False) return env = toolchain.MakeEnvironment(False) -- 2.14.1

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[U-Boot] [PATCH v3 0/7] Enable falcon boot for LS1043ARDB
by York Sun 13 Oct '17

13 Oct '17

This is the 3rd version to enable falcon boot for LS1043ARDB. With SPL FIT patches merged, enabling falcon boot for this board is straight forward after fixing some errors introduced by other commits. Falcon boot is not enabled by default due to a conflict with recent PPA image update, which takes over entire OCRAM after being loaded. With a compatible PPA image (older version or future update), falcon boot can be enabled as described in commit message. Secure boot is dropped in this set due to SPL image size issue. Recent changes made the SPL image bigger and the secure boot image doesn't fit any more. A follow-up patch set will enable secure boot if the image can be future trimmed to fit. Changes in v3: Create new function to fill gd->bd for spl. Use git commit description style when mentioning previous commit. Fix typo in subject and other cosmetic fix. Drop defconfig change Not to enable falcon boot by default due to a conflict with recent PPA Changes in v2: New patch to fix spl after rebasing to latest master. New patch to fix compiling error after rebasing to latest mater. New patch to fix gd->ram_size error after rebasing to latest mater. Drop checking secure boot in this patch after rebasing to latest mater. Recent change in SPL makes the image size bigger. Relace getenv_f() with env_get_f() after rebasing to latet master. York Sun (7): spl: fix assignment of board info to global data cmd: spl: fix compiling error when CONFIG_CMD_SPL_WRITE_SIZE not defined armv8: fsl-layerscape: Avoid running dram_init_banksize again armv8: ls1043ardb: Use static DDR setting for SPL boot armv8: layerscape: Enable falcon boot armv8: ls1043ardb: Enable spl_board_init() function armv8: ls1043ardb_sdcard: prepare falcon boot arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 18 ++- .../arm/cpu/armv8/fsl-layerscape/doc/README.falcon | 140 +++++++++++++++++++++ arch/arm/cpu/armv8/fsl-layerscape/spl.c | 30 +++++ arch/arm/include/asm/system.h | 4 +- arch/arm/lib/spl.c | 11 ++ board/freescale/ls1043ardb/ddr.c | 46 +++++++ board/freescale/ls1043ardb/ddr.h | 69 ++++++++++ cmd/spl.c | 2 + common/spl/spl.c | 10 +- configs/ls1043ardb_nand_SECURE_BOOT_defconfig | 1 + configs/ls1043ardb_nand_defconfig | 1 + configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig | 1 + configs/ls1043ardb_sdcard_defconfig | 2 + include/configs/ls1043a_common.h | 7 +- include/configs/ls1043ardb.h | 11 +- include/spl.h | 1 + 16 files changed, 344 insertions(+), 10 deletions(-) create mode 100644 arch/arm/cpu/armv8/fsl-layerscape/doc/README.falcon -- 2.7.4

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[U-Boot] [PATCH] ls1021aiot: Move CONFIG_CMD_BOOTZ to Kconfig
by Fabio Estevam 13 Oct '17

13 Oct '17

CONFIG_CMD_BOOTZ symbol does not work in board config file anymore, so fix this by moving it to Kconfig. Signed-off-by: Fabio Estevam <fabio.estevam(a)nxp.com> --- configs/ls1021aiot_qspi_defconfig | 1 + configs/ls1021aiot_sdcard_defconfig | 1 + include/configs/ls1021aiot.h | 1 - 3 files changed, 2 insertions(+), 1 deletion(-) diff --git a/configs/ls1021aiot_qspi_defconfig b/configs/ls1021aiot_qspi_defconfig index 04d3658..46aa7bf 100644 --- a/configs/ls1021aiot_qspi_defconfig +++ b/configs/ls1021aiot_qspi_defconfig @@ -3,6 +3,7 @@ CONFIG_TARGET_LS1021AIOT=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-iot-duart" CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT" CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPT=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y diff --git a/configs/ls1021aiot_sdcard_defconfig b/configs/ls1021aiot_sdcard_defconfig index 0b80146..84d6b99 100644 --- a/configs/ls1021aiot_sdcard_defconfig +++ b/configs/ls1021aiot_sdcard_defconfig @@ -3,6 +3,7 @@ CONFIG_TARGET_LS1021AIOT=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-iot-duart" CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT,SD_BOOT_QSPI" CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_CMD_BOOTZ=y CONFIG_SPL=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8 diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h index 3fe7b8f..906697f 100644 --- a/include/configs/ls1021aiot.h +++ b/include/configs/ls1021aiot.h @@ -280,7 +280,6 @@ #define CONFIG_OF_BOARD_SETUP #define CONFIG_OF_STDOUT_VIA_ALIAS -#define CONFIG_CMD_BOOTZ #define CONFIG_MISC_INIT_R -- 2.7.4

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[U-Boot] [PATCH] armv8: Apply workaround for USB erratum A-009007 to LS1088A
by Ran Wang 13 Oct '17

13 Oct '17

Rx Compliance tests may fail intermittently at high jitter frequencies using default register values. Program register USB_PHY_RX_OVRD_IN_HI in certain sequence to make the Rx compliance test pass. Signed-off-by: Ran Wang <ran.wang_1(a)nxp.com> --- arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 1 + arch/arm/cpu/armv8/fsl-layerscape/soc.c | 4 ++-- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index 3518d8601d..85b7c70937 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -72,6 +72,7 @@ config ARCH_LS1088A select SYS_FSL_ERRATUM_A010165 select SYS_FSL_ERRATUM_A008511 select SYS_FSL_ERRATUM_A008850 + select SYS_FSL_ERRATUM_A009007 select SYS_FSL_HAS_CCI400 select SYS_FSL_HAS_DDR4 select SYS_FSL_HAS_RGMII diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c index 6698c0467d..53620ebf19 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c @@ -127,7 +127,7 @@ static void erratum_a008997(void) out_be16((phy) + SCFG_USB_PHY_RX_OVRD_IN_HI, USB_PHY_RX_EQ_VAL_3); \ out_be16((phy) + SCFG_USB_PHY_RX_OVRD_IN_HI, USB_PHY_RX_EQ_VAL_4) -#elif defined(CONFIG_ARCH_LS2080A) +#elif defined(CONFIG_ARCH_LS2080A) || defined(CONFIG_ARCH_LS1088A) #define PROGRAM_USB_PHY_RX_OVRD_IN_HI(phy) \ out_le16((phy) + DCSR_USB_PHY_RX_OVRD_IN_HI, USB_PHY_RX_EQ_VAL_1); \ @@ -149,7 +149,7 @@ static void erratum_a009007(void) usb_phy = (void __iomem *)SCFG_USB_PHY3; PROGRAM_USB_PHY_RX_OVRD_IN_HI(usb_phy); -#elif defined(CONFIG_ARCH_LS2080A) +#elif defined(CONFIG_ARCH_LS2080A) || defined(CONFIG_ARCH_LS1088A) void __iomem *dcsr = (void __iomem *)DCSR_BASE; PROGRAM_USB_PHY_RX_OVRD_IN_HI(dcsr + DCSR_USB_PHY1); -- 2.14.1

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[U-Boot] [PATCH] armv8: ls1046aqds: Fix NAND offset for Fman ucode and env
by Gong Qianyu 13 Oct '17

13 Oct '17

Fix a bug of 'commit 8104deb2d6b7 ("armv8: layerscape: Adjust memory mapping for Flash/SD card on LS1046A")' as NAND block size is 256KB on LS1046AQDS. Signed-off-by: Gong Qianyu <Qianyu.Gong(a)nxp.com> --- include/configs/ls1046a_common.h | 2 +- include/configs/ls1046aqds.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index dfc8e9237d..6d501b9c54 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -183,7 +183,7 @@ #define CONFIG_ENV_SPI_MODE 0x03 #elif defined(CONFIG_NAND_BOOT) #define CONFIG_SYS_QE_FMAN_FW_IN_NAND -#define CONFIG_SYS_FMAN_FW_ADDR (72 * CONFIG_SYS_NAND_BLOCK_SIZE) +#define CONFIG_SYS_FMAN_FW_ADDR (36 * CONFIG_SYS_NAND_BLOCK_SIZE) #else #define CONFIG_SYS_QE_FMAN_FW_IN_NOR #define CONFIG_SYS_FMAN_FW_ADDR 0x60900000 diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h index 9231cca9e9..39bd1c38a8 100644 --- a/include/configs/ls1046aqds.h +++ b/include/configs/ls1046aqds.h @@ -435,7 +435,7 @@ unsigned long get_board_ddr_clk(void); #ifdef CONFIG_NAND_BOOT #define CONFIG_ENV_SIZE 0x2000 -#define CONFIG_ENV_OFFSET (24 * CONFIG_SYS_NAND_BLOCK_SIZE) +#define CONFIG_ENV_OFFSET (12 * CONFIG_SYS_NAND_BLOCK_SIZE) #elif defined(CONFIG_SD_BOOT) #define CONFIG_ENV_OFFSET (3 * 1024 * 1024) #define CONFIG_SYS_MMC_ENV_DEV 0 -- 2.14.1

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[U-Boot] [PATCH] dwc: ep0: Allocate and flush dwc->ep0_trb in a cache aligned manner
by Faiz Abbas 11 Oct '17

11 Oct '17

A flush of the cache is required before any DMA access can take place. The minimum size that can be flushed from the cache is one cache line size. Therefore, any buffer allocated for DMA should be in multiples of cache line size. Thus, allocate memory for ep0_trb in multiples of cache line size. Also, when local variable trb is assigned to dwc->ep0_trb[1] and used to flush cache, it leads to cache misaligned messages as only the base address dwc->ep0_trb is cache aligned. Therefore, flush cache using ep0_trb_addr which is always cache aligned. Signed-off-by: Faiz Abbas <faiz_abbas(a)ti.com> --- drivers/usb/dwc3/ep0.c | 7 ++++--- drivers/usb/dwc3/gadget.c | 3 ++- 2 files changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/usb/dwc3/ep0.c b/drivers/usb/dwc3/ep0.c index e61d980..f3a17a1 100644 --- a/drivers/usb/dwc3/ep0.c +++ b/drivers/usb/dwc3/ep0.c @@ -82,7 +82,7 @@ static int dwc3_ep0_start_trans(struct dwc3 *dwc, u8 epnum, dma_addr_t buf_dma, | DWC3_TRB_CTRL_LST); dwc3_flush_cache((uintptr_t)buf_dma, len); - dwc3_flush_cache((uintptr_t)trb, sizeof(*trb)); + dwc3_flush_cache((uintptr_t)dwc->ep0_trb_addr, sizeof(*trb) * 2); if (chain) return 0; @@ -790,7 +790,7 @@ static void dwc3_ep0_complete_data(struct dwc3 *dwc, if (!r) return; - dwc3_flush_cache((uintptr_t)trb, sizeof(*trb)); + dwc3_flush_cache((uintptr_t)dwc->ep0_trb_addr, sizeof(*trb) * 2); status = DWC3_TRB_SIZE_TRBSTS(trb->size); if (status == DWC3_TRBSTS_SETUP_PENDING) { @@ -821,7 +821,8 @@ static void dwc3_ep0_complete_data(struct dwc3 *dwc, ur->actual += transferred; trb++; - dwc3_flush_cache((uintptr_t)trb, sizeof(*trb)); + dwc3_flush_cache((uintptr_t)dwc->ep0_trb_addr, + sizeof(*trb) * 2); length = trb->size & DWC3_TRB_SIZE_MASK; ep0->free_slot = 0; diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c index e065c5a..895a5bc 100644 --- a/drivers/usb/dwc3/gadget.c +++ b/drivers/usb/dwc3/gadget.c @@ -2567,7 +2567,8 @@ int dwc3_gadget_init(struct dwc3 *dwc) goto err0; } - dwc->ep0_trb = dma_alloc_coherent(sizeof(*dwc->ep0_trb) * 2, + dwc->ep0_trb = dma_alloc_coherent(ROUND(sizeof(*dwc->ep0_trb) * 2, + CACHELINE_SIZE), (unsigned long *)&dwc->ep0_trb_addr); if (!dwc->ep0_trb) { dev_err(dwc->dev, "failed to allocate ep0 trb\n"); -- 2.7.4

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