August 2017 - U-Boot

[U-Boot] [PATCH v4] spi: fsl_qspi: Add controller busy check before new spi operation
by Suresh Gupta 25 Sep '17

25 Sep '17

It is recommended to check either controller is free to take new spi action. The IP_ACC and AHB_ACC bits indicates that the controller is busy in IP or AHB mode respectively. And the BUSY bit indicates that controller is currently busy handling a transaction to an external flash device Signed-off-by: Suresh Gupta <suresh.gupta(a)nxp.com> --- Change in v4: - change Timeout from 1000ms to 100ms Changes in v3: - replace printf to debug - return whatever return from wait_for_bit, before it was -EBUSY Changes in v2: - Add wait_for_bit instead of while - move the busy check code to fsl_qspi_claim_bus form qspi_xfer drivers/spi/fsl_qspi.c | 28 +++++++++++++++++++++++++++- drivers/spi/fsl_qspi.h | 4 ++++ 2 files changed, 31 insertions(+), 1 deletion(-) diff --git a/drivers/spi/fsl_qspi.c b/drivers/spi/fsl_qspi.c index 1dfa89a..8753ed9 100644 --- a/drivers/spi/fsl_qspi.c +++ b/drivers/spi/fsl_qspi.c @@ -14,6 +14,7 @@ #include <dm.h> #include <errno.h> #include <watchdog.h> +#include <wait_bit.h> #include "fsl_qspi.h" DECLARE_GLOBAL_DATA_PTR; @@ -991,7 +992,7 @@ static int fsl_qspi_probe(struct udevice *bus) struct fsl_qspi_platdata *plat = dev_get_platdata(bus); struct fsl_qspi_priv *priv = dev_get_priv(bus); struct dm_spi_bus *dm_spi_bus; - int i; + int i, ret; dm_spi_bus = bus->uclass_priv; @@ -1011,6 +1012,18 @@ static int fsl_qspi_probe(struct udevice *bus) priv->flash_num = plat->flash_num; priv->num_chipselect = plat->num_chipselect; + /* make sure controller is not busy anywhere */ + ret = wait_for_bit(__func__, &priv->regs->sr, + QSPI_SR_BUSY_MASK | + QSPI_SR_AHB_ACC_MASK | + QSPI_SR_IP_ACC_MASK, + false, 100, false); + + if (ret) { + debug("ERROR : The controller is busy\n"); + return ret; + } + mcr_val = qspi_read32(priv->flags, &priv->regs->mcr); qspi_write32(priv->flags, &priv->regs->mcr, QSPI_MCR_RESERVED_MASK | QSPI_MCR_MDIS_MASK | @@ -1156,10 +1169,23 @@ static int fsl_qspi_claim_bus(struct udevice *dev) struct fsl_qspi_priv *priv; struct udevice *bus; struct dm_spi_slave_platdata *slave_plat = dev_get_parent_platdata(dev); + int ret; bus = dev->parent; priv = dev_get_priv(bus); + /* make sure controller is not busy anywhere */ + ret = wait_for_bit(__func__, &priv->regs->sr, + QSPI_SR_BUSY_MASK | + QSPI_SR_AHB_ACC_MASK | + QSPI_SR_IP_ACC_MASK, + false, 100, false); + + if (ret) { + debug("ERROR : The controller is busy\n"); + return ret; + } + priv->cur_amba_base = priv->amba_base[slave_plat->cs]; qspi_module_disable(priv, 0); diff --git a/drivers/spi/fsl_qspi.h b/drivers/spi/fsl_qspi.h index 6cb3610..e468eb2 100644 --- a/drivers/spi/fsl_qspi.h +++ b/drivers/spi/fsl_qspi.h @@ -105,6 +105,10 @@ struct fsl_qspi_regs { #define QSPI_RBCT_RXBRD_SHIFT 8 #define QSPI_RBCT_RXBRD_USEIPS (1 << QSPI_RBCT_RXBRD_SHIFT) +#define QSPI_SR_AHB_ACC_SHIFT 2 +#define QSPI_SR_AHB_ACC_MASK (1 << QSPI_SR_AHB_ACC_SHIFT) +#define QSPI_SR_IP_ACC_SHIFT 1 +#define QSPI_SR_IP_ACC_MASK (1 << QSPI_SR_IP_ACC_SHIFT) #define QSPI_SR_BUSY_SHIFT 0 #define QSPI_SR_BUSY_MASK (1 << QSPI_SR_BUSY_SHIFT) -- 1.9.3

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[U-Boot] [PATCH 00/23] efi_loader implement missing functions
by Heinrich Schuchardt 25 Sep '17

25 Sep '17

This patch sequence contains all patches needed to load iPXE and use it for downloading and executing images via https or http or to mount iSCSI volumes. Network speed on an Odroid C2 reached 30 MB/s which should be enough for most use cases. I have tested the following iPXE commands successfully * dhcp * route * ntp * sanhook iSCSI-target * chain http-target * kernel http-target * boot (after calling kernel) * exit * reboot The only adjustment in iPXE was adding file src/config/local/nap.h with #undef NAP_EFIX86 #undef NAP_EFIARM #define NAP_NULL and src/config/local/myscript.ipxe with #!ipxe shell before building iPXE with make bin-arm64-efi/snp.efi EMBED=config/local/myscript.ipxe The next task will be to put iXPE binaries on a server and to create Travis CI test cases. Heinrich Schuchardt (23): efi_loader: allow return value in EFI_CALL efi_loader: notify when ExitBootServices is invoked efi_loader: support 16 protocols per efi_object efi_loader: rework efi_locate_handle efi_loader: rework efi_search_obj efi_loader: new function efi_search_protocol efi_loader: simplify efi_install_protocol_interface efi_loader: allow creating new handles efi_loader: simplify efi_uninstall_protocol_interface efi_loader: open_info in OpenProtocol efi_loader: open_info in CloseProtocol efi_loader: implement OpenProtocolInformation efi_loader: non-static efi_open_protocol, efi_close_protocol efi_loader: pass GUIDs as const efi_guid_t * efi_loader: implement ConnectController efi_loader: implement DisconnectController efi_loader: efi_net: hwaddr_size = 6 efi_net: return EFI_UNSUPPORTED where appropriate efi_loader: correct bits of receive_filters bit mask efi_loader: use events for efi_net_receive efi_loader: fix efi_net_get_status efi_loader: set parent handle in efi_load_image efi_loader: implement SetWatchdogTimer cmd/bootefi.c | 1 + include/efi_api.h | 83 +++-- include/efi_loader.h | 38 ++- lib/efi_loader/Makefile | 2 +- lib/efi_loader/efi_boottime.c | 729 ++++++++++++++++++++++++++++++++---------- lib/efi_loader/efi_net.c | 57 +++- lib/efi_loader/efi_watchdog.c | 58 ++++ 7 files changed, 763 insertions(+), 205 deletions(-) create mode 100644 lib/efi_loader/efi_watchdog.c -- 2.14.1

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[U-Boot] [PATCH] serial: serial_sh: take into account port->clk_mode for SH7785/7786
by Thomas Petazzoni 24 Sep '17

24 Sep '17

In the SH7785/SH7786 case, the SCSCR value is harcoded to be 0x3a, which means bits CKE1/CKE0 have the value 10b. This tells the SCIF that the "External clock/SCIF_SCK pin functions as clock input". However, this is not the case in all designs, and it's the purpose of the clk_mode = EXT_CLK to indicate such a setting. In order for the serial_sh driver to work on a SH7786 platform that does not use SCIF_SCK as a clock input, we have to adjust the SCSCR_INIT value, to have CKE1/CKE0 set to 00b. This is similar to what is done for other SH platforms. Signed-off-by: Thomas Petazzoni <thomas.petazzoni(a)free-electrons.com> --- drivers/serial/serial_sh.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/serial/serial_sh.h b/drivers/serial/serial_sh.h index 4d27122..d7bbd1a 100644 --- a/drivers/serial/serial_sh.h +++ b/drivers/serial/serial_sh.h @@ -184,7 +184,8 @@ struct uart_port { # define SCSPTR4 0xffee0024 /* 16 bit SCIF */ # define SCSPTR5 0xffef0024 /* 16 bit SCIF */ # define SCIF_ORER 0x0001 /* Overrun error bit */ -# define SCSCR_INIT(port) 0x3a /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ +# define SCSCR_INIT(port) (port->clk_mode == EXT_CLK ? 0x3a : 0x38) + /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ #elif defined(CONFIG_CPU_SH7201) || \ defined(CONFIG_CPU_SH7203) || \ defined(CONFIG_CPU_SH7206) || \ -- 2.9.4

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[U-Boot] [PATCH 1/2] arm: mvebu: fix boot from UART on ClearFog Base
by Baruch Siach 24 Sep '17

24 Sep '17

The ClearFog Base boot from UART when setting the DIP switches to 01001. Unfortunately, the SPL code sometimes fails to detect the UART boot method at run-time. Add an alternative SAR UART boot value to fix this. Signed-off-by: Baruch Siach <baruch(a)tkos.co.il> --- arch/arm/mach-mvebu/include/mach/soc.h | 1 + arch/arm/mach-mvebu/spl.c | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/arm/mach-mvebu/include/mach/soc.h b/arch/arm/mach-mvebu/include/mach/soc.h index 0900e4008c12..44bac63b4447 100644 --- a/arch/arm/mach-mvebu/include/mach/soc.h +++ b/arch/arm/mach-mvebu/include/mach/soc.h @@ -139,6 +139,7 @@ #define BOOT_DEV_SEL_MASK (0x3f << BOOT_DEV_SEL_OFFS) #define BOOT_FROM_UART 0x28 +#define BOOT_FROM_UART_ALT 0x3f #define BOOT_FROM_SPI 0x32 #define BOOT_FROM_MMC 0x30 #define BOOT_FROM_MMC_ALT 0x31 diff --git a/arch/arm/mach-mvebu/spl.c b/arch/arm/mach-mvebu/spl.c index 3cf02a54cea2..4b9c41360589 100644 --- a/arch/arm/mach-mvebu/spl.c +++ b/arch/arm/mach-mvebu/spl.c @@ -42,6 +42,7 @@ static u32 get_boot_device(void) return BOOT_DEVICE_MMC1; #endif case BOOT_FROM_UART: + case BOOT_FROM_UART_ALT: return BOOT_DEVICE_UART; case BOOT_FROM_SPI: default: -- 2.14.1

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[U-Boot] [PATCH] imx6: disable clock command and print_cpuinfo code in SPL
by Anatolij Gustschin 23 Sep '17

23 Sep '17

We do not use print_cpuinfo and clock command code in SPL, disable it when building SPL image. Signed-off-by: Anatolij Gustschin <agust(a)denx.de> --- arch/arm/mach-imx/cpu.c | 4 ++-- arch/arm/mach-imx/mx6/clock.c | 30 ++++++++++++++++-------------- 2 files changed, 18 insertions(+), 16 deletions(-) diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c index 1017eb8..18205dc 100644 --- a/arch/arm/mach-imx/cpu.c +++ b/arch/arm/mach-imx/cpu.c @@ -25,7 +25,7 @@ #include <fsl_esdhc.h> #endif -#if defined(CONFIG_DISPLAY_CPUINFO) +#if defined(CONFIG_DISPLAY_CPUINFO) && !defined(CONFIG_SPL_BUILD) static u32 reset_cause = -1; static char *get_reset_cause(void) @@ -132,7 +132,7 @@ unsigned imx_ddr_size(void) } #endif -#if defined(CONFIG_DISPLAY_CPUINFO) +#if defined(CONFIG_DISPLAY_CPUINFO) && !defined(CONFIG_SPL_BUILD) const char *get_imx_type(u32 imxtype) { diff --git a/arch/arm/mach-imx/mx6/clock.c b/arch/arm/mach-imx/mx6/clock.c index 0e019c4..71a9e6b 100644 --- a/arch/arm/mach-imx/mx6/clock.c +++ b/arch/arm/mach-imx/mx6/clock.c @@ -1220,6 +1220,20 @@ void enable_thermal_clk(void) enable_pll3(); } +#ifdef CONFIG_MTD_NOR_FLASH +void enable_eim_clk(unsigned char enable) +{ + u32 reg; + + reg = __raw_readl(&imx_ccm->CCGR6); + if (enable) + reg |= MXC_CCM_CCGR6_EMI_SLOW_MASK; + else + reg &= ~MXC_CCM_CCGR6_EMI_SLOW_MASK; + __raw_writel(reg, &imx_ccm->CCGR6); +} +#endif + unsigned int mxc_get_clock(enum mxc_clock clk) { switch (clk) { @@ -1262,6 +1276,7 @@ unsigned int mxc_get_clock(enum mxc_clock clk) return 0; } +#ifndef CONFIG_SPL_BUILD /* * Dump some core clockes. */ @@ -1463,20 +1478,6 @@ void select_ldb_di_clock_source(enum ldb_di_clock clk) } #endif -#ifdef CONFIG_MTD_NOR_FLASH -void enable_eim_clk(unsigned char enable) -{ - u32 reg; - - reg = __raw_readl(&imx_ccm->CCGR6); - if (enable) - reg |= MXC_CCM_CCGR6_EMI_SLOW_MASK; - else - reg &= ~MXC_CCM_CCGR6_EMI_SLOW_MASK; - __raw_writel(reg, &imx_ccm->CCGR6); -} -#endif - /***************************************************/ U_BOOT_CMD( @@ -1484,3 +1485,4 @@ U_BOOT_CMD( "display clocks", "" ); +#endif -- 2.7.4

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[U-Boot] [PATCH] board: ge: bx50v3: set eth0 MAC address
by Jose Alarcon 20 Sep '17

20 Sep '17

This patch modifies U-Boot to read the FEC MAC address from EEPROM and program it to the hardware -- replacing earlier functionality which attempted to set the MAC address from user-space. Tested on bx50v3. Verified that FEC MAC address is set correctly. Corrupted first MAC octet in EEPROM, and verified that the BCH error correction worked. Set EEPROM to all 0xFF, and verified that FEC MAC address was random (through two boots). Ian Ray (1): board: ge: bx50v3: set eth0 MAC address board/ge/bx50v3/Makefile | 2 +- board/ge/bx50v3/bx50v3.c | 109 +++++++++++++++++++++ board/ge/bx50v3/vpd_reader.c | 228 +++++++++++++++++++++++++++++++++++++++++++ board/ge/bx50v3/vpd_reader.h | 25 +++++ include/configs/ge_bx50v3.h | 15 +++ 5 files changed, 378 insertions(+), 1 deletion(-) create mode 100644 board/ge/bx50v3/vpd_reader.c create mode 100644 board/ge/bx50v3/vpd_reader.h -- 2.10.1

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[U-Boot] [PATCH] detect and setup solidrun hummingboard2
by Dennis Gilmore 20 Sep '17

20 Sep '17

The hummingboard2 is slightly different to the cubox i and to the hummingboard. The GPIO pin info to probe came from solidruns for of u-boot on github. https://github.com/SolidRun/u-boot-imx6/blob/imx6/board/solidrun/mx6_cubox-… I have tested on a hummingboard-edge witha imx6 solo and 512mb of ram. Signed-off-by: Dennis Gilmore <dgilmore(a)redhat.com> --- board/solidrun/mx6cuboxi/mx6cuboxi.c | 35 +++++++++++++++++++++++++++++++++-- include/configs/mx6cuboxi.h | 4 ++++ 2 files changed, 37 insertions(+), 2 deletions(-) diff --git a/board/solidrun/mx6cuboxi/mx6cuboxi.c b/board/solidrun/mx6cuboxi/mx6cuboxi.c index 7e59fb259e..32d1465d8b 100644 --- a/board/solidrun/mx6cuboxi/mx6cuboxi.c +++ b/board/solidrun/mx6cuboxi/mx6cuboxi.c @@ -349,6 +349,7 @@ static bool is_hummingboard(void) * Machine selection - * Machine val1, val2 * ------------------------- + * HB2 x x * HB rev 3.x x 0 * CBi 0 1 * HB 1 1 @@ -362,9 +363,37 @@ static bool is_hummingboard(void) return true; } +static bool is_hummingboard2(void) +{ + int val1; + + SETUP_IOMUX_PADS(hb_cbi_sense); + + gpio_direction_input(IMX_GPIO_NR(2, 8)); + + val1 = gpio_get_value(IMX_GPIO_NR(2, 8)); + + /* + * Machine selection - + * Machine val1 + * ------------------- + * HB2 0 + * HB rev 3.x x + * CBi x + * HB x + */ + + if (val1 == 0) + return true; + else + return false; +} + int checkboard(void) { - if (is_hummingboard()) + if (is_hummingboard2()) + puts("Board: MX6 Hummingboard2\n"); + else if (is_hummingboard()) puts("Board: MX6 Hummingboard\n"); else puts("Board: MX6 Cubox-i\n"); @@ -375,7 +404,9 @@ int checkboard(void) int board_late_init(void) { #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG - if (is_hummingboard()) + if (is_hummingboard2()) + env_set("board_name", "HUMMINGBOARD2"); + else if (is_hummingboard()) env_set("board_name", "HUMMINGBOARD"); else env_set("board_name", "CUBOXI"); diff --git a/include/configs/mx6cuboxi.h b/include/configs/mx6cuboxi.h index 5930f591cb..ce9b5469ee 100644 --- a/include/configs/mx6cuboxi.h +++ b/include/configs/mx6cuboxi.h @@ -108,6 +108,10 @@ "fi; " \ "fi\0" \ "findfdt="\ + "if test $board_name = HUMMINGBOARD2 && test $board_rev = MX6Q ; then " \ + "setenv fdtfile imx6q-hummingboard2.dtb; fi; " \ + "if test $board_name = HUMMINGBOARD2 && test $board_rev = MX6DL ; then " \ + "setenv fdtfile imx6dl-hummingboard2.dtb; fi; " \ "if test $board_name = HUMMINGBOARD && test $board_rev = MX6Q ; then " \ "setenv fdtfile imx6q-hummingboard.dtb; fi; " \ "if test $board_name = HUMMINGBOARD && test $board_rev = MX6DL ; then " \ -- 2.13.3

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[U-Boot] [PATCH] imx6: drop duplicated bss memset and board_init_r() call
by Anatolij Gustschin 20 Sep '17

20 Sep '17

bss section is cleared in crt0.S. board_init_r() is also entered from crt0 code. Signed-off-by: Anatolij Gustschin <agust(a)denx.de> Cc: Christian Gmeiner <christian.gmeiner(a)gmail.com> Cc: Nikita Kiryanov <nikita(a)compulab.co.il> Cc: Jagan Teki <jagan(a)amarulasolutions.com> Cc: Tim Harvey <tharvey(a)gateworks.com> Cc: Marek Vasut <marex(a)denx.de> Cc: Lukasz Majewski <lukma(a)denx.de> Cc: Fabio Estevam <fabio.estevam(a)nxp.com> --- board/bachmann/ot1200/ot1200_spl.c | 6 ------ board/compulab/cm_fx6/spl.c | 3 --- board/engicam/common/spl.c | 6 ------ board/gateworks/gw_ventana/gw_ventana_spl.c | 3 --- board/kosagi/novena/novena_spl.c | 6 ------ board/liebherr/mccmon6/spl.c | 6 ------ board/udoo/udoo_spl.c | 6 ------ board/wandboard/spl.c | 6 ------ 8 files changed, 42 deletions(-) diff --git a/board/bachmann/ot1200/ot1200_spl.c b/board/bachmann/ot1200/ot1200_spl.c index 9d28da4..f3dff95 100644 --- a/board/bachmann/ot1200/ot1200_spl.c +++ b/board/bachmann/ot1200/ot1200_spl.c @@ -151,10 +151,4 @@ void board_init_f(ulong dummy) /* configure MMDC for SDRAM width/size and per-model calibration */ ot1200_spl_dram_init(); - - /* Clear the BSS. */ - memset(__bss_start, 0, __bss_end - __bss_start); - - /* load/boot image from boot device */ - board_init_r(NULL, 0); } diff --git a/board/compulab/cm_fx6/spl.c b/board/compulab/cm_fx6/spl.c index bba977f..56aac60 100644 --- a/board/compulab/cm_fx6/spl.c +++ b/board/compulab/cm_fx6/spl.c @@ -336,9 +336,6 @@ void board_init_f(ulong dummy) puts("!!!ERROR!!! DRAM detection failed!!!\n"); hang(); } - - memset(__bss_start, 0, __bss_end - __bss_start); - board_init_r(NULL, 0); } void board_boot_order(u32 *spl_boot_list) diff --git a/board/engicam/common/spl.c b/board/engicam/common/spl.c index a8a7cf3..1f2826a 100644 --- a/board/engicam/common/spl.c +++ b/board/engicam/common/spl.c @@ -384,10 +384,4 @@ void board_init_f(ulong dummy) /* DDR initialization */ spl_dram_init(); - - /* Clear the BSS. */ - memset(__bss_start, 0, __bss_end - __bss_start); - - /* load/boot image from boot device */ - board_init_r(NULL, 0); } diff --git a/board/gateworks/gw_ventana/gw_ventana_spl.c b/board/gateworks/gw_ventana/gw_ventana_spl.c index 9524da7..e107f15 100644 --- a/board/gateworks/gw_ventana/gw_ventana_spl.c +++ b/board/gateworks/gw_ventana/gw_ventana_spl.c @@ -637,9 +637,6 @@ void board_init_f(ulong dummy) spl_dram_init(8 << ventana_info.sdram_width, 16 << ventana_info.sdram_size, board_model); - - /* Clear the BSS. */ - memset(__bss_start, 0, __bss_end - __bss_start); } void board_boot_order(u32 *spl_boot_list) diff --git a/board/kosagi/novena/novena_spl.c b/board/kosagi/novena/novena_spl.c index 3645b75..ffc99b8 100644 --- a/board/kosagi/novena/novena_spl.c +++ b/board/kosagi/novena/novena_spl.c @@ -607,10 +607,4 @@ void board_init_f(ulong dummy) udelay(100); mmdc_do_write_level_calibration(&novena_ddr_info); mmdc_do_dqs_calibration(&novena_ddr_info); - - /* Clear the BSS. */ - memset(__bss_start, 0, __bss_end - __bss_start); - - /* load/boot image from boot device */ - board_init_r(NULL, 0); } diff --git a/board/liebherr/mccmon6/spl.c b/board/liebherr/mccmon6/spl.c index 15844ef..56e7d3b 100644 --- a/board/liebherr/mccmon6/spl.c +++ b/board/liebherr/mccmon6/spl.c @@ -307,11 +307,5 @@ void board_init_f(ulong dummy) /* DDR initialization */ spl_dram_init(); - - /* Clear the BSS. */ - memset(__bss_start, 0, __bss_end - __bss_start); - - /* load/boot image from boot device */ - board_init_r(NULL, 0); } #endif diff --git a/board/udoo/udoo_spl.c b/board/udoo/udoo_spl.c index e83e7c3..34ef413 100644 --- a/board/udoo/udoo_spl.c +++ b/board/udoo/udoo_spl.c @@ -263,11 +263,5 @@ void board_init_f(ulong dummy) /* DDR initialization */ spl_dram_init(); - - /* Clear the BSS. */ - memset(__bss_start, 0, __bss_end - __bss_start); - - /* load/boot image from boot device */ - board_init_r(NULL, 0); } #endif diff --git a/board/wandboard/spl.c b/board/wandboard/spl.c index 47082a8..c3f5fff 100644 --- a/board/wandboard/spl.c +++ b/board/wandboard/spl.c @@ -311,11 +311,5 @@ void board_init_f(ulong dummy) /* DDR initialization */ spl_dram_init(); - - /* Clear the BSS. */ - memset(__bss_start, 0, __bss_end - __bss_start); - - /* load/boot image from boot device */ - board_init_r(NULL, 0); } #endif -- 2.7.4

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[U-Boot] [PATCH] pico-imx7d: Add "how to boot with NXP 4.1 Kernel"
by Vanessa Maegima 20 Sep '17

20 Sep '17

The NXP 4.1 kernel needs to boot with secure boot. Add information on how to enable secure boot mode. Signed-off-by: Vanessa Maegima <vanessa.maegima(a)nxp.com> --- board/technexion/pico-imx7d/README | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/board/technexion/pico-imx7d/README b/board/technexion/pico-imx7d/README index a2805ee..8af4eff 100644 --- a/board/technexion/pico-imx7d/README +++ b/board/technexion/pico-imx7d/README @@ -47,3 +47,20 @@ Remove power from the pico board. Put pico board into normal boot mode. Power up the board and the new updated U-Boot should boot from eMMC. + +Building U-Boot to boot with NXP 4.1 kernel: + +The NXP 4.1 kernel boots only in secure boot mode on mx7. + +Follow the next steps to enable secure boot: + +$ make mrproper +$ make pico-imx7d_defconfig +$ make menuconfig + -> ARM architecture + -> [*] Enable support for booting in non-secure mode + -> [*] Boot in secure mode by default + -> Exit +$ make + +Flash u-boot.imx using the imx_usb_loader tool. -- 2.7.4

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[U-Boot] [PATCH] imx: imx7d: remove CamelCase from ENET_xMHz macros
by Eric Nelson 20 Sep '17

20 Sep '17

Update these macros to use all upper-case to avoid checkpatch warnings: ENET_25MHz, ENET_50MHz, ENET_125MHz, Signed-off-by: Eric Nelson <eric(a)nelint.com> --- arch/arm/include/asm/arch-mx7/clock.h | 6 +++--- arch/arm/mach-imx/mx7/clock.c | 2 +- board/freescale/mx7dsabresd/mx7dsabresd.c | 2 +- board/technexion/pico-imx7d/pico-imx7d.c | 2 +- board/toradex/colibri_imx7/colibri_imx7.c | 2 +- 5 files changed, 7 insertions(+), 7 deletions(-) diff --git a/arch/arm/include/asm/arch-mx7/clock.h b/arch/arm/include/asm/arch-mx7/clock.h index 688d236..3b115ad 100644 --- a/arch/arm/include/asm/arch-mx7/clock.h +++ b/arch/arm/include/asm/arch-mx7/clock.h @@ -318,9 +318,9 @@ struct clk_root_map { }; enum enet_freq { - ENET_25MHz, - ENET_50MHz, - ENET_125MHz, + ENET_25MHZ, + ENET_50MHZ, + ENET_125MHZ, }; u32 get_root_clk(enum clk_root_index clock_id); diff --git a/arch/arm/mach-imx/mx7/clock.c b/arch/arm/mach-imx/mx7/clock.c index 2cfde46..423d697 100644 --- a/arch/arm/mach-imx/mx7/clock.c +++ b/arch/arm/mach-imx/mx7/clock.c @@ -970,7 +970,7 @@ int set_clk_enet(enum enet_freq type) enet1_ref = ENET1_REF_CLK_ROOT_FROM_PLL_ENET_MAIN_125M_CLK; enet2_ref = ENET2_REF_CLK_ROOT_FROM_PLL_ENET_MAIN_125M_CLK; break; - case ENET_50MHz: + case ENET_50MHZ: enet1_ref = ENET1_REF_CLK_ROOT_FROM_PLL_ENET_MAIN_50M_CLK; enet2_ref = ENET2_REF_CLK_ROOT_FROM_PLL_ENET_MAIN_50M_CLK; break; diff --git a/board/freescale/mx7dsabresd/mx7dsabresd.c b/board/freescale/mx7dsabresd/mx7dsabresd.c index a681ece..5819b18 100644 --- a/board/freescale/mx7dsabresd/mx7dsabresd.c +++ b/board/freescale/mx7dsabresd/mx7dsabresd.c @@ -260,7 +260,7 @@ static int setup_fec(void) (IOMUXC_GPR_GPR1_GPR_ENET1_TX_CLK_SEL_MASK | IOMUXC_GPR_GPR1_GPR_ENET1_CLK_DIR_MASK), 0); - return set_clk_enet(ENET_125MHz); + return set_clk_enet(ENET_125MHZ); } diff --git a/board/technexion/pico-imx7d/pico-imx7d.c b/board/technexion/pico-imx7d/pico-imx7d.c index b4c9be7..67bab51 100644 --- a/board/technexion/pico-imx7d/pico-imx7d.c +++ b/board/technexion/pico-imx7d/pico-imx7d.c @@ -182,7 +182,7 @@ static int setup_fec(void) (IOMUXC_GPR_GPR1_GPR_ENET1_TX_CLK_SEL_MASK | IOMUXC_GPR_GPR1_GPR_ENET1_CLK_DIR_MASK), 0); - return set_clk_enet(ENET_125MHz); + return set_clk_enet(ENET_125MHZ); } int board_phy_config(struct phy_device *phydev) diff --git a/board/toradex/colibri_imx7/colibri_imx7.c b/board/toradex/colibri_imx7/colibri_imx7.c index 5cb14b4..13b2b57 100644 --- a/board/toradex/colibri_imx7/colibri_imx7.c +++ b/board/toradex/colibri_imx7/colibri_imx7.c @@ -280,7 +280,7 @@ static int setup_fec(void) IOMUXC_GPR_GPR1_GPR_ENET1_TX_CLK_SEL_MASK); #endif - return set_clk_enet(ENET_50MHz); + return set_clk_enet(ENET_50MHZ); } int board_phy_config(struct phy_device *phydev) -- 2.7.4

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