August 2017 - U-Boot

[U-Boot] Fwd: u-boot.img size limit for spl fat load ?
by Ayoub Zaki 18 Oct '17

18 Oct '17

Hello Albert, First tank you so much for inversting your time for replying. I put some printf in the code and SPL is hanging in spl_load_image_fat function. I also enable the DEBUG messages here the complete log file : http://pastebin.com/raw.php?i=BwUJXDDb So I suspect that SPL is not allocating enough memory to load u-boot.img but I can't find where this size limit is set and where I can change it. Cheers, Ayoub > 2015-01-19 8:08 GMT+01:00 Albert ARIBAUD <albert.u.boot(a)aribaud.net>: > > > Hello Ayoub, > > > > On Fri, 16 Jan 2015 15:42:37 +0100, Ayoub Zaki > > <ayoub.zaki(a)googlemail.com> wrote: > > > Hello list, > > > > > > I'm using u-boot-2014.10 and trying to build it with LCD support for the > > > Beaglebone black to include a Boot logo image. > > > It seems that spl hangs while fat loading a 2.8MB sized u-boot.img ! > > > I reduced the the logo header file and rebuild u-boot, that worked for a > > > 1.6MB sized u-boot.img. > > > Is there any size limit for u-boot ? how to increase the memory allocated > > > by spl ? > > > > There should not be a size limit for SPL fat load. > > > > What may happen is that SPL code is overwritten before it exits, or > > U-Boot itself is corrupted after being loaded. > > > > I assume you've seen the SPL banner and not the U-Boot one; that alone > > does not tell us whether SPL or U-Boot did hang. Can you build U-boot > > with debug enabled? If this results in too big an SPL image, then try > > and at least enable debug for the image chainloading parts, so that you > > can see how far SPL code gets run. > > > > > Thanks you. > > > > No problem. > > > > Amicalement, > > -- > > Albert.

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[U-Boot] [PATCH] moveconfig: fix error message in do_autoconf()
by Chris Packham 15 Oct '17

15 Oct '17

Move the % arch outside the double quote so that the missing toolchain message is displayed correctly. Signed-off-by: Chris Packham <judge.packham(a)gmail.com> --- tools/moveconfig.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/moveconfig.py b/tools/moveconfig.py index 8a038501929c..45742dc2e6b9 100755 --- a/tools/moveconfig.py +++ b/tools/moveconfig.py @@ -1170,7 +1170,7 @@ class Slot: toolchain = self.toolchains.Select(arch) except ValueError: self.log += color_text(self.options.color, COLOR_YELLOW, - "Tool chain for '%s' is missing. Do nothing.\n % arch") + "Tool chain for '%s' is missing. Do nothing.\n" % arch) self.finish(False) return env = toolchain.MakeEnvironment(False) -- 2.14.1

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[U-Boot] ImportError: No module named _libfdt
by Jean-Marc Beaune 06 Oct '17

06 Oct '17

Hello, I am new to U-Boot and trying to compile source code in order to get U-Boot working on a BananaPi. I get the following error while compiling the latest version of master branch: ImportError: No module named _libfdt Has anyone an idea about why Python is not happy? Thank you, JM

3 2

[U-Boot] [PATCH] rockchip: Set up default PWM flags
by Simon Glass 06 Oct '17

06 Oct '17

At present if the PWM set_invert() method is not called then the flags are not set up and the driver does not work properly. Fix this by setting up the default flags when probing. Signed-off-by: Simon Glass <sjg(a)chromium.org> Fixes: 874ee59 (rockchip: pwm: implement pwm_set_invert()) --- drivers/pwm/rk_pwm.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pwm/rk_pwm.c b/drivers/pwm/rk_pwm.c index f3b2f7615d..5d78d4a67d 100644 --- a/drivers/pwm/rk_pwm.c +++ b/drivers/pwm/rk_pwm.c @@ -92,6 +92,7 @@ static int rk_pwm_probe(struct udevice *dev) return -EINVAL; } priv->freq = clk_get_rate(&clk); + priv->enable_conf = PWM_DUTY_POSTIVE | PWM_INACTIVE_POSTIVE; return 0; } -- 2.13.0.219.gdb65acc882-goog

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[U-Boot] [PATCH] drivers: pci: imx: add imx_pcie_remove function
by Tim Harvey 05 Oct '17

05 Oct '17

There is no dedicated reset signal wired up for the MX6QDL thus if the bootloader enables the link we need some special handling to get the core back into a state where it is safe to touch it for configuration. While there has been some special handling in the Linux kernel to do this, it was removed in 4.11 thus we need to do it properly in the bootloader and therefore without this if you enable PCI in the bootloader you will hang while booting the 4.11 kernel. This puts the PCIe controller back into a safe state for the kernel driver before launching the kernel. Signed-off-by: Tim Harvey <tharvey(a)gateworks.com> --- arch/arm/imx-common/cpu.c | 3 +++ drivers/pci/pcie_imx.c | 38 ++++++++++++++++++++++++++++++++++++++ include/pci.h | 4 ++++ 3 files changed, 45 insertions(+) diff --git a/arch/arm/imx-common/cpu.c b/arch/arm/imx-common/cpu.c index 40fe813..74bdd24 100644 --- a/arch/arm/imx-common/cpu.c +++ b/arch/arm/imx-common/cpu.c @@ -275,6 +275,9 @@ u32 get_ahb_clk(void) void arch_preboot_os(void) { +#if defined(CONFIG_PCIE_IMX) + imx_pcie_remove(); +#endif #if defined(CONFIG_CMD_SATA) sata_stop(); #if defined(CONFIG_MX6) diff --git a/drivers/pci/pcie_imx.c b/drivers/pci/pcie_imx.c index 732d59d..eab0a2b 100644 --- a/drivers/pci/pcie_imx.c +++ b/drivers/pci/pcie_imx.c @@ -42,6 +42,9 @@ /* PCIe Port Logic registers (memory-mapped) */ #define PL_OFFSET 0x700 +#define PCIE_PL_PFLR (PL_OFFSET + 0x08) +#define PCIE_PL_PFLR_LINK_STATE_MASK (0x3f << 16) +#define PCIE_PL_PFLR_FORCE_LINK (1 << 15) #define PCIE_PHY_DEBUG_R0 (PL_OFFSET + 0x28) #define PCIE_PHY_DEBUG_R1 (PL_OFFSET + 0x2c) #define PCIE_PHY_DEBUG_R1_LINK_UP (1 << 4) @@ -445,6 +448,36 @@ static int imx6_pcie_assert_core_reset(void) /* Power up PCIe PHY */ setbits_le32(&gpc_regs->cntr, PCIE_PHY_PUP_REQ); #else + /* + * If the bootloader already enabled the link we need some special + * handling to get the core back into a state where it is safe to + * touch it for configuration. As there is no dedicated reset signal + * wired up for MX6QDL, we need to manually force LTSSM into "detect" + * state before completely disabling LTSSM, which is a prerequisite + * for core configuration. + * + * If both LTSSM_ENABLE and REF_SSP_ENABLE are active we have a strong + * indication that the bootloader activated the link. + */ + if (is_mx6dq()) { + u32 val, gpr1, gpr12; + + gpr1 = readl(&iomuxc_regs->gpr[1]); + gpr12 = readl(&iomuxc_regs->gpr[12]); + if ((gpr1 & IOMUXC_GPR1_PCIE_REF_CLK_EN) && + (gpr12 & IOMUXC_GPR12_PCIE_CTL_2)) { + val = readl(MX6_DBI_ADDR + PCIE_PL_PFLR); + val &= ~PCIE_PL_PFLR_LINK_STATE_MASK; + val |= PCIE_PL_PFLR_FORCE_LINK; + + imx_pcie_fix_dabt_handler(true); + writel(val, MX6_DBI_ADDR + PCIE_PL_PFLR); + imx_pcie_fix_dabt_handler(false); + + gpr12 &= ~IOMUXC_GPR12_PCIE_CTL_2; + writel(val, &iomuxc_regs->gpr[12]); + } + } setbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_TEST_POWERDOWN); clrbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_REF_SSP_EN); #endif @@ -652,6 +685,11 @@ void imx_pcie_init(void) } } +void imx_pcie_remove(void) +{ + imx6_pcie_assert_core_reset(); +} + /* Probe function. */ void pci_init_board(void) { diff --git a/include/pci.h b/include/pci.h index d3c955e..c8ef997 100644 --- a/include/pci.h +++ b/include/pci.h @@ -754,6 +754,10 @@ int pci_last_busno(void); extern void pci_mpc85xx_init (struct pci_controller *hose); #endif +#ifdef CONFIG_PCIE_IMX +extern void imx_pcie_remove(void); +#endif + #if !defined(CONFIG_DM_PCI) || defined(CONFIG_DM_PCI_COMPAT) /** * pci_write_bar32() - Write the address of a BAR including control bits -- 2.7.4

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[U-Boot] [PATCH v3 1/2] armv8: fsl-lsch3: Add SD boot support for LS1088ARDB
by Ashish Kumar 04 Oct '17

04 Oct '17

Add SD boot support for LS1088ARDB Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha(a)nxp.com> Signed-off-by: Ashish Kumar <Ashish.Kumar(a)nxp.com> Signed-off-by: Raghav Dogra <raghav.dogra(a)nxp.com> --- v3: Depends upon http://patchwork.ozlabs.org/patch/794217/ Rebase to top commit "8b3cec7 mtdparts: Fix uninitialized scalar usage" Enable PPA New memory map arch/arm/Kconfig | 1 + board/freescale/ls1088a/MAINTAINERS | 1 + board/freescale/ls1088a/ddr.c | 4 ++++ configs/ls1088ardb_sdcard_qspi_defconfig | 33 ++++++++++++++++++++++++++++++ include/configs/ls1088a_common.h | 35 ++++++++++++++++++++++++++++++++ include/configs/ls1088ardb.h | 30 +++++++++++++++++++++++++-- 6 files changed, 102 insertions(+), 2 deletions(-) create mode 100644 configs/ls1088ardb_sdcard_qspi_defconfig diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 5cad0d3..6243710 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -926,6 +926,7 @@ config TARGET_LS1088ARDB select ARMV8_MULTIENTRY select ARCH_MISC_INIT select BOARD_LATE_INIT + select SUPPORT_SPL help Support for NXP LS1088ARDB platform. The LS1088A Reference design board (RDB) is a high-performance diff --git a/board/freescale/ls1088a/MAINTAINERS b/board/freescale/ls1088a/MAINTAINERS index e1e6d4b..68f23d6 100644 --- a/board/freescale/ls1088a/MAINTAINERS +++ b/board/freescale/ls1088a/MAINTAINERS @@ -5,6 +5,7 @@ S: Maintained F: board/freescale/ls1088a/ F: include/configs/ls1088ardb.h F: configs/ls1088ardb_qspi_defconfig +F: configs/ls1088ardb_sdcard_qspi_defconfig LS1088AQDS BOARD M: Prabhakar Kushwaha <prabhakar.kushwaha(a)nxp.com> diff --git a/board/freescale/ls1088a/ddr.c b/board/freescale/ls1088a/ddr.c index 0ecfd65..bbab3a8 100644 --- a/board/freescale/ls1088a/ddr.c +++ b/board/freescale/ls1088a/ddr.c @@ -96,7 +96,11 @@ int fsl_initdram(void) { puts("Initializing DDR....using SPD\n"); +#if defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD) + gd->ram_size = fsl_ddr_sdram_size(); +#else gd->ram_size = fsl_ddr_sdram(); +#endif return 0; } diff --git a/configs/ls1088ardb_sdcard_qspi_defconfig b/configs/ls1088ardb_sdcard_qspi_defconfig new file mode 100644 index 0000000..c226bc1 --- /dev/null +++ b/configs/ls1088ardb_sdcard_qspi_defconfig @@ -0,0 +1,33 @@ +CONFIG_ARM=y +CONFIG_TARGET_LS1088ARDB=y +# CONFIG_SYS_MALLOC_F is not set +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb" +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_OF_BOARD_SETUP=y +CONFIG_SYS_EXTRA_OPTIONS="SD_BOOT_QSPI" +CONFIG_SD_BOOT=y +CONFIG_SPL=y +CONFIG_HUSH_PARSER=y +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +CONFIG_CMD_I2C=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_DHCP=y +CONFIG_CMD_PING=y +CONFIG_OF_CONTROL=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_DM=y +CONFIG_SPI_FLASH=y +CONFIG_NETDEVICES=y +CONFIG_E1000=y +CONFIG_SYS_NS16550=y +CONFIG_FSL_DSPI=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0 +CONFIG_FSL_LS_PPA=y +CONFIG_SPL_BUILD=y +CONFIG_PARTITIONS=y +# CONFIG_DISPLAY_BOARDINFO is not set diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h index c78ba5d..b79db5a 100644 --- a/include/configs/ls1088a_common.h +++ b/include/configs/ls1088a_common.h @@ -20,18 +20,24 @@ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0) /* Link Definitions */ +#ifdef CONFIG_SPL +#define CONFIG_SYS_TEXT_BASE 0x80400000 +#else #ifdef CONFIG_QSPI_BOOT #define CONFIG_SYS_TEXT_BASE 0x20100000 #else #define CONFIG_SYS_TEXT_BASE 0x30100000 #endif +#endif #define CONFIG_SUPPORT_RAW_INITRD #define CONFIG_SKIP_LOWLEVEL_INIT +#if !defined(CONFIG_SD_BOOT) #define CONFIG_FSL_DDR_INTERACTIVE /* Interactive debugging */ +#endif #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL @@ -177,6 +183,11 @@ unsigned long long get_qixis_addr(void); " fsl_mc apply dpl 0x80200000 &&" \ " sf read $kernel_load $kernel_start" \ " $kernel_size && bootm $kernel_load" +#elif defined(CONFIG_SD_BOOT) +#define CONFIG_BOOTCOMMAND "mmcinfo;mmc read 0x80200000 0x6800 0x800;"\ + " fsl_mc apply dpl 0x80200000 &&" \ + " mmc read $kernel_load $kernel_start" \ + " $kernel_size && bootm $kernel_load" #else /* NOR BOOT*/ #define CONFIG_BOOTCOMMAND "fsl_mc apply dpl 0x580d00000 &&" \ " cp.b $kernel_start $kernel_load" \ @@ -196,6 +207,30 @@ unsigned long long get_qixis_addr(void); #define CONFIG_PANIC_HANG /* do not reset board on panic */ +#ifdef CONFIG_SPL +#define CONFIG_SPL_BSS_START_ADDR 0x80100000 +#define CONFIG_SPL_BSS_MAX_SIZE 0x00100000 +#define CONFIG_SPL_DRIVERS_MISC_SUPPORT +#define CONFIG_SPL_ENV_SUPPORT +#define CONFIG_SPL_FRAMEWORK +#define CONFIG_SPL_I2C_SUPPORT +#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds" +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_MAX_SIZE 0x16000 +#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_STACK (CONFIG_SYS_FSL_OCRAM_BASE + 0x9ff0) +#define CONFIG_SPL_TARGET "u-boot-with-spl.bin" +#define CONFIG_SPL_TEXT_BASE 0x1800a000 +#ifdef CONFIG_SD_BOOT +#define CONFIG_SPL_MMC_SUPPORT +#endif + +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00100000 +#define CONFIG_SYS_SPL_MALLOC_START 0x80200000 +#define CONFIG_SYS_MONITOR_LEN (512 * 1024) +#endif #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ #endif /* __LS1088_COMMON_H */ diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h index bab83b1..d0bdc10 100644 --- a/include/configs/ls1088ardb.h +++ b/include/configs/ls1088ardb.h @@ -16,6 +16,11 @@ #define CONFIG_ENV_SIZE 0x2000 /* 8KB */ #define CONFIG_ENV_OFFSET 0x300000 /* 3MB */ #define CONFIG_ENV_SECT_SIZE 0x40000 +#elif defined(CONFIG_SD_BOOT) +#define CONFIG_ENV_OFFSET (3 * 1024 * 1024) +#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_SYS_MMC_ENV_DEV 0 +#define CONFIG_ENV_SIZE 0x2000 #else #define CONFIG_ENV_IS_IN_FLASH #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x300000) @@ -23,7 +28,7 @@ #define CONFIG_ENV_SIZE 0x20000 #endif -#if defined(CONFIG_QSPI_BOOT) +#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) #define CONFIG_QIXIS_I2C_ACCESS #define SYS_NO_FLASH #undef CONFIG_CMD_IMLS @@ -236,7 +241,7 @@ #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 /* QSPI device */ -#if defined(CONFIG_QSPI_BOOT) +#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) #define CONFIG_FSL_QSPI #define CONFIG_SPI_FLASH_SPANSION #define FSL_QSPI_FLASH_SIZE (1 << 26) @@ -248,7 +253,11 @@ #define CONFIG_SYS_MEMTEST_START 0x80000000 #define CONFIG_SYS_MEMTEST_END 0x9fffffff +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE +#else #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE +#endif #define CONFIG_FSL_MEMAC @@ -270,6 +279,23 @@ "sf read 0x80100000 0xE00000 0x100000;" \ "fsl_mc start mc 0x80000000 0x80100000\0" \ "mcmemsize=0x70000000 \0" +#elif defined(CONFIG_SD_BOOT) +#undef CONFIG_EXTRA_ENV_SETTINGS +#define CONFIG_EXTRA_ENV_SETTINGS \ + "hwconfig=fsl_ddr:bank_intlv=auto\0" \ + "loadaddr=0x90100000\0" \ + "kernel_addr=0x800\0" \ + "ramdisk_addr=0x800000\0" \ + "ramdisk_size=0x2000000\0" \ + "fdt_high=0xa0000000\0" \ + "initrd_high=0xffffffffffffffff\0" \ + "kernel_start=0x8000\0" \ + "kernel_load=0xa0000000\0" \ + "kernel_size=0x14000\0" \ + "mcinitcmd=mmcinfo;mmc read 0x80000000 0x5000 0x800;" \ + "mmc read 0x80100000 0x7000 0x800;" \ + "fsl_mc start mc 0x80000000 0x80100000\0" \ + "mcmemsize=0x70000000 \0" #endif -- 2.7.4

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[U-Boot] [PATCH V2] imx: mx7: Add support for USB and normal boot modes
by Eric Nelson 02 Oct '17

02 Oct '17

This adds support for two additional boot modes on the i.MX7D SoC, which is most useful when doing U-Boot development on this chip. 1. "bmode usb" can be used to force the ROM boot loader's serial 2. "bmode normal" can be used to revert to the normal boot mode as specified by fuses and BOOT_MODE pins Signed-off-by: Eric Nelson <eric(a)nelint.com> --- V2 adds "normal" mode as suggested by Troy Kisky arch/arm/mach-imx/mx7/soc.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/mach-imx/mx7/soc.c b/arch/arm/mach-imx/mx7/soc.c index 87bf105..15be42a 100644 --- a/arch/arm/mach-imx/mx7/soc.c +++ b/arch/arm/mach-imx/mx7/soc.c @@ -372,6 +372,9 @@ void set_wdog_reset(struct wdog_regs *wdog) * to SBMR1, which will determine the boot device. */ const struct boot_mode soc_boot_modes[] = { + {"normal", MAKE_CFGVAL(0x00, 0x00, 0x00, 0x00)}, + {"usb", MAKE_CFGVAL(0x01, 0x00, 0x00, 0x00)}, + {"ecspi1:0", MAKE_CFGVAL(0x00, 0x60, 0x00, 0x00)}, {"ecspi1:1", MAKE_CFGVAL(0x40, 0x62, 0x00, 0x00)}, {"ecspi1:2", MAKE_CFGVAL(0x80, 0x64, 0x00, 0x00)}, -- 2.7.4

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[U-Boot] [PATCH V4 01/12] scripts: spl: fix typo
by Peng Fan 02 Oct '17

02 Oct '17

Typo fix: CONIFG->CONFIG Signed-off-by: Peng Fan <peng.fan(a)nxp.com> Cc: Tom Rini <trini(a)konsulko.com> --- V2: new V3: none V4: none scripts/Makefile.uncmd_spl | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/scripts/Makefile.uncmd_spl b/scripts/Makefile.uncmd_spl index 15d0836..b399411 100644 --- a/scripts/Makefile.uncmd_spl +++ b/scripts/Makefile.uncmd_spl @@ -9,7 +9,7 @@ ifdef CONFIG_SPL_BUILD ifndef CONFIG_SPL_DM CONFIG_DM_SERIAL= CONFIG_DM_GPIO= -CONIFG_DM_I2C= +CONFIG_DM_I2C= CONFIG_DM_SPI= CONFIG_DM_SPI_FLASH= endif -- 2.6.6

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[U-Boot] [RFC PATCH v1 0/2] edison: Enable ACPI
by Andy Shevchenko 02 Oct '17

02 Oct '17

This RFC series based on discussion [1] to show how we may unleash the powerfulness of ACPI on the board, which initially didn't support it, via U-Boot. The series is highly experimental, though I'm using it on daily basis since my main work on ACPI pin control glue layer. More information is available on [2]. Note, I dunno the split of DSL pieces is fully correct since we need to understand the difference between SoC, platform, and board terms. Even though some stuff here declared under 'tangier' folder it's related to Intel Merrifield platform (like Wi-Fi chip connected to SDIO port of Intel Tangier). Because of some restrictions of ACPI language / interpreter I may not split some of those parts. Thus, it needs to be revisited. P.S. It would be nice if someone who possess the board can check and test this independently. [1]: https://lists.denx.de/pipermail/u-boot/2017-August/303997.html [2]: https://edison.internet-share.com/wiki/ACPI Andy Shevchenko (2): x86: tangier: Enable ACPI support for Intel Tangier x86: edison: Bring ACPI minimal support to the board arch/x86/cpu/tangier/Makefile | 1 + arch/x86/cpu/tangier/acpi.c | 86 ++++++ .../include/asm/arch-tangier/acpi/global_nvs.asl | 16 ++ .../x86/include/asm/arch-tangier/acpi/platform.asl | 31 +++ .../include/asm/arch-tangier/acpi/southcluster.asl | 306 +++++++++++++++++++++ arch/x86/include/asm/arch-tangier/global_nvs.h | 22 ++ board/intel/edison/.gitignore | 3 + board/intel/edison/Kconfig | 6 + board/intel/edison/Makefile | 1 + board/intel/edison/dsdt.asl | 13 + include/configs/edison.h | 3 + 11 files changed, 488 insertions(+) create mode 100644 arch/x86/cpu/tangier/acpi.c create mode 100644 arch/x86/include/asm/arch-tangier/acpi/global_nvs.asl create mode 100644 arch/x86/include/asm/arch-tangier/acpi/platform.asl create mode 100644 arch/x86/include/asm/arch-tangier/acpi/southcluster.asl create mode 100644 arch/x86/include/asm/arch-tangier/global_nvs.h create mode 100644 board/intel/edison/.gitignore create mode 100644 board/intel/edison/dsdt.asl -- 2.14.1

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[U-Boot] [PATCH v2 1/4] rockchip: rk3229: move usb gadget into defconfig
by Kever Yang 29 Sep '17

29 Sep '17

Use the defconfig for all usb gadget and function related option instead of define then in header file. Signed-off-by: Kever Yang <kever.yang(a)rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich(a)theobroma-systems.com> --- Changes in v2: None configs/evb-rk3229_defconfig | 17 +++++++++++++++++ include/configs/evb_rk3229.h | 1 - include/configs/rk322x_common.h | 20 -------------------- 3 files changed, 17 insertions(+), 21 deletions(-) diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig index f4ad4c2..bf5baf5 100644 --- a/configs/evb-rk3229_defconfig +++ b/configs/evb-rk3229_defconfig @@ -14,9 +14,18 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x200 CONFIG_FASTBOOT=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_CMD_FASTBOOT=y +CONFIG_ANDROID_BOOT_IMAGE=y +CONFIG_FASTBOOT_BUF_ADDR=0x60800800 +CONFIG_FASTBOOT_BUF_SIZE=0x04000000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 # CONFIG_CMD_IMLS is not set CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TIME=y CONFIG_SPL_OF_CONTROL=y @@ -41,4 +50,12 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550=y CONFIG_SYSRESET=y +CONFIG_USB=y +CONFIG_USB_DWC2=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DWC2_OTG=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_G_DNL_MANUFACTURER="Rockchip" +CONFIG_G_DNL_VENDOR_NUM=0x2207 +CONFIG_G_DNL_PRODUCT_NUM=0x320a CONFIG_ERRNO_STR=y diff --git a/include/configs/evb_rk3229.h b/include/configs/evb_rk3229.h index 6e1fd1c..8906c8f 100644 --- a/include/configs/evb_rk3229.h +++ b/include/configs/evb_rk3229.h @@ -40,7 +40,6 @@ #define CONFIG_PREBOOT -#define CONFIG_ANDROID_BOOT_IMAGE #define CONFIG_SYS_BOOT_RAMDISK_HIGH #undef CONFIG_BOOTCOMMAND diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h index a145b74..7630bc5 100644 --- a/include/configs/rk322x_common.h +++ b/include/configs/rk322x_common.h @@ -40,28 +40,8 @@ #define SDRAM_MAX_SIZE 0x80000000 #ifndef CONFIG_SPL_BUILD -/* usb otg */ -#define CONFIG_USB_GADGET -#define CONFIG_USB_GADGET_DUALSPEED -#define CONFIG_USB_GADGET_DWC2_OTG -#define CONFIG_USB_GADGET_VBUS_DRAW 0 - -/* fastboot */ -#define CONFIG_CMD_FASTBOOT -#define CONFIG_USB_FUNCTION_FASTBOOT -#define CONFIG_FASTBOOT_FLASH -#define CONFIG_FASTBOOT_FLASH_MMC_DEV 0 -#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR -#define CONFIG_FASTBOOT_BUF_SIZE 0x08000000 - /* usb mass storage */ #define CONFIG_USB_FUNCTION_MASS_STORAGE -#define CONFIG_CMD_USB_MASS_STORAGE - -#define CONFIG_USB_GADGET_DOWNLOAD -#define CONFIG_G_DNL_MANUFACTURER "Rockchip" -#define CONFIG_G_DNL_VENDOR_NUM 0x2207 -#define CONFIG_G_DNL_PRODUCT_NUM 0x320a /* usb host */ #ifdef CONFIG_CMD_USB -- 1.9.1

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