August 2017 - U-Boot

[U-Boot] [PATCH] Makefile: honor PYTHON configuration properly
by Clément Bœsch 21 Aug '17

21 Aug '17

--- Makefile | 2 +- tools/Makefile | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/Makefile b/Makefile index 50a002e72f..1f70144e0a 100644 --- a/Makefile +++ b/Makefile @@ -1378,7 +1378,7 @@ $(timestamp_h): $(srctree)/Makefile FORCE $(call filechk,timestamp.h) checkbinman: tools - @if ! ( echo 'import libfdt' | ( PYTHONPATH=tools python )); then \ + @if ! ( echo 'import libfdt' | ( PYTHONPATH=tools $(PYTHON) )); then \ echo >&2; \ echo >&2 '*** binman needs the Python libfdt library.'; \ echo >&2 '*** Either install it on your system, or try:'; \ diff --git a/tools/Makefile b/tools/Makefile index 0743677dc8..1940cdad1f 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -138,7 +138,7 @@ tools/_libfdt.so: $(LIBFDT_SRCS) $(LIBFDT_SWIG) CPPFLAGS="$(_hostc_flags)" OBJDIR=tools \ SOURCES="$(LIBFDT_SRCS) tools/libfdt.i" \ SWIG_OPTS="-I$(srctree)/lib/libfdt -I$(srctree)/lib" \ - $(libfdt_tree)/pylibfdt/setup.py --quiet build_ext \ + $(PYTHON) $(libfdt_tree)/pylibfdt/setup.py build_ext \ --build-lib tools ifneq ($(CONFIG_MX23)$(CONFIG_MX28),) -- 2.14.1

3 6

[U-Boot] [PATCH 1/5] mmc: uniphier-sd: Factor out register IO
by Marek Vasut 20 Aug '17

20 Aug '17

This patch prepares the driver to support controller(s) with registers at locations shifted by constant. Pull out the readl()/writel() from the driver into separate functions, where the adjustment of the register offset can be easily contained. Signed-off-by: Marek Vasut <marek.vasut+renesas(a)gmail.com> Cc: Masahiro Yamada <yamada.masahiro(a)socionext.com> Cc: Jaehoon Chung <jh80.chung(a)samsung.com> --- drivers/mmc/uniphier-sd.c | 115 +++++++++++++++++++++++++--------------------- 1 file changed, 63 insertions(+), 52 deletions(-) diff --git a/drivers/mmc/uniphier-sd.c b/drivers/mmc/uniphier-sd.c index e272b14153..70090522bd 100644 --- a/drivers/mmc/uniphier-sd.c +++ b/drivers/mmc/uniphier-sd.c @@ -134,6 +134,17 @@ struct uniphier_sd_priv { #define UNIPHIER_SD_CAP_DIV1024 BIT(2) /* divisor 1024 is available */ }; +static u32 uniphier_sd_readl(struct uniphier_sd_priv *priv, const u32 reg) +{ + return readl(priv->regbase + reg); +} + +static void uniphier_sd_writel(struct uniphier_sd_priv *priv, + const u32 val, const u32 reg) +{ + writel(val, priv->regbase + reg); +} + static dma_addr_t __dma_map_single(void *ptr, size_t size, enum dma_data_direction dir) { @@ -157,7 +168,7 @@ static void __dma_unmap_single(dma_addr_t addr, size_t size, static int uniphier_sd_check_error(struct udevice *dev) { struct uniphier_sd_priv *priv = dev_get_priv(dev); - u32 info2 = readl(priv->regbase + UNIPHIER_SD_INFO2); + u32 info2 = uniphier_sd_readl(priv, UNIPHIER_SD_INFO2); if (info2 & UNIPHIER_SD_INFO2_ERR_RTO) { /* @@ -195,7 +206,7 @@ static int uniphier_sd_wait_for_irq(struct udevice *dev, unsigned int reg, long wait = 1000000; int ret; - while (!(readl(priv->regbase + reg) & flag)) { + while (!(uniphier_sd_readl(priv, reg) & flag)) { if (wait-- < 0) { dev_err(dev, "timeout\n"); return -ETIMEDOUT; @@ -227,14 +238,14 @@ static int uniphier_sd_pio_read_one_block(struct udevice *dev, u32 **pbuf, * Clear the status flag _before_ read the buffer out because * UNIPHIER_SD_INFO2_BRE is edge-triggered, not level-triggered. */ - writel(0, priv->regbase + UNIPHIER_SD_INFO2); + uniphier_sd_writel(priv, 0, UNIPHIER_SD_INFO2); if (likely(IS_ALIGNED((unsigned long)*pbuf, 4))) { for (i = 0; i < blocksize / 4; i++) - *(*pbuf)++ = readl(priv->regbase + UNIPHIER_SD_BUF); + *(*pbuf)++ = uniphier_sd_readl(priv, UNIPHIER_SD_BUF); } else { for (i = 0; i < blocksize / 4; i++) - put_unaligned(readl(priv->regbase + UNIPHIER_SD_BUF), + put_unaligned(uniphier_sd_readl(priv, UNIPHIER_SD_BUF), (*pbuf)++); } @@ -253,15 +264,15 @@ static int uniphier_sd_pio_write_one_block(struct udevice *dev, if (ret) return ret; - writel(0, priv->regbase + UNIPHIER_SD_INFO2); + uniphier_sd_writel(priv, 0, UNIPHIER_SD_INFO2); if (likely(IS_ALIGNED((unsigned long)*pbuf, 4))) { for (i = 0; i < blocksize / 4; i++) - writel(*(*pbuf)++, priv->regbase + UNIPHIER_SD_BUF); + uniphier_sd_writel(priv, *(*pbuf)++, UNIPHIER_SD_BUF); } else { for (i = 0; i < blocksize / 4; i++) - writel(get_unaligned((*pbuf)++), - priv->regbase + UNIPHIER_SD_BUF); + uniphier_sd_writel(priv, get_unaligned((*pbuf)++), + UNIPHIER_SD_BUF); } return 0; @@ -292,22 +303,22 @@ static void uniphier_sd_dma_start(struct uniphier_sd_priv *priv, { u32 tmp; - writel(0, priv->regbase + UNIPHIER_SD_DMA_INFO1); - writel(0, priv->regbase + UNIPHIER_SD_DMA_INFO2); + uniphier_sd_writel(priv, 0, UNIPHIER_SD_DMA_INFO1); + uniphier_sd_writel(priv, 0, UNIPHIER_SD_DMA_INFO2); /* enable DMA */ - tmp = readl(priv->regbase + UNIPHIER_SD_EXTMODE); + tmp = uniphier_sd_readl(priv, UNIPHIER_SD_EXTMODE); tmp |= UNIPHIER_SD_EXTMODE_DMA_EN; - writel(tmp, priv->regbase + UNIPHIER_SD_EXTMODE); + uniphier_sd_writel(priv, tmp, UNIPHIER_SD_EXTMODE); - writel(dma_addr & U32_MAX, priv->regbase + UNIPHIER_SD_DMA_ADDR_L); + uniphier_sd_writel(priv, dma_addr & U32_MAX, UNIPHIER_SD_DMA_ADDR_L); /* suppress the warning "right shift count >= width of type" */ dma_addr >>= min_t(int, 32, 8 * sizeof(dma_addr)); - writel(dma_addr & U32_MAX, priv->regbase + UNIPHIER_SD_DMA_ADDR_H); + uniphier_sd_writel(priv, dma_addr & U32_MAX, UNIPHIER_SD_DMA_ADDR_H); - writel(UNIPHIER_SD_DMA_CTL_START, priv->regbase + UNIPHIER_SD_DMA_CTL); + uniphier_sd_writel(priv, UNIPHIER_SD_DMA_CTL_START, UNIPHIER_SD_DMA_CTL); } static int uniphier_sd_dma_wait_for_irq(struct udevice *dev, u32 flag, @@ -316,7 +327,7 @@ static int uniphier_sd_dma_wait_for_irq(struct udevice *dev, u32 flag, struct uniphier_sd_priv *priv = dev_get_priv(dev); long wait = 1000000 + 10 * blocks; - while (!(readl(priv->regbase + UNIPHIER_SD_DMA_INFO1) & flag)) { + while (!(uniphier_sd_readl(priv, UNIPHIER_SD_DMA_INFO1) & flag)) { if (wait-- < 0) { dev_err(dev, "timeout during DMA\n"); return -ETIMEDOUT; @@ -325,7 +336,7 @@ static int uniphier_sd_dma_wait_for_irq(struct udevice *dev, u32 flag, udelay(10); } - if (readl(priv->regbase + UNIPHIER_SD_DMA_INFO2)) { + if (uniphier_sd_readl(priv, UNIPHIER_SD_DMA_INFO2)) { dev_err(dev, "error during DMA\n"); return -EIO; } @@ -343,7 +354,7 @@ static int uniphier_sd_dma_xfer(struct udevice *dev, struct mmc_data *data) u32 poll_flag, tmp; int ret; - tmp = readl(priv->regbase + UNIPHIER_SD_DMA_MODE); + tmp = uniphier_sd_readl(priv, UNIPHIER_SD_DMA_MODE); if (data->flags & MMC_DATA_READ) { buf = data->dest; @@ -357,7 +368,7 @@ static int uniphier_sd_dma_xfer(struct udevice *dev, struct mmc_data *data) tmp &= ~UNIPHIER_SD_DMA_MODE_DIR_RD; } - writel(tmp, priv->regbase + UNIPHIER_SD_DMA_MODE); + uniphier_sd_writel(priv, tmp, UNIPHIER_SD_DMA_MODE); dma_addr = __dma_map_single(buf, len, dir); @@ -396,27 +407,27 @@ static int uniphier_sd_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, int ret; u32 tmp; - if (readl(priv->regbase + UNIPHIER_SD_INFO2) & UNIPHIER_SD_INFO2_CBSY) { + if (uniphier_sd_readl(priv, UNIPHIER_SD_INFO2) & UNIPHIER_SD_INFO2_CBSY) { dev_err(dev, "command busy\n"); return -EBUSY; } /* clear all status flags */ - writel(0, priv->regbase + UNIPHIER_SD_INFO1); - writel(0, priv->regbase + UNIPHIER_SD_INFO2); + uniphier_sd_writel(priv, 0, UNIPHIER_SD_INFO1); + uniphier_sd_writel(priv, 0, UNIPHIER_SD_INFO2); /* disable DMA once */ - tmp = readl(priv->regbase + UNIPHIER_SD_EXTMODE); + tmp = uniphier_sd_readl(priv, UNIPHIER_SD_EXTMODE); tmp &= ~UNIPHIER_SD_EXTMODE_DMA_EN; - writel(tmp, priv->regbase + UNIPHIER_SD_EXTMODE); + uniphier_sd_writel(priv, tmp, UNIPHIER_SD_EXTMODE); - writel(cmd->cmdarg, priv->regbase + UNIPHIER_SD_ARG); + uniphier_sd_writel(priv, cmd->cmdarg, UNIPHIER_SD_ARG); tmp = cmd->cmdidx; if (data) { - writel(data->blocksize, priv->regbase + UNIPHIER_SD_SIZE); - writel(data->blocks, priv->regbase + UNIPHIER_SD_SECCNT); + uniphier_sd_writel(priv, data->blocksize, UNIPHIER_SD_SIZE); + uniphier_sd_writel(priv, data->blocks, UNIPHIER_SD_SECCNT); /* Do not send CMD12 automatically */ tmp |= UNIPHIER_SD_CMD_NOSTOP | UNIPHIER_SD_CMD_DATA; @@ -457,7 +468,7 @@ static int uniphier_sd_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, dev_dbg(dev, "sending CMD%d (SD_CMD=%08x, SD_ARG=%08x)\n", cmd->cmdidx, tmp, cmd->cmdarg); - writel(tmp, priv->regbase + UNIPHIER_SD_CMD); + uniphier_sd_writel(priv, tmp, UNIPHIER_SD_CMD); ret = uniphier_sd_wait_for_irq(dev, UNIPHIER_SD_INFO1, UNIPHIER_SD_INFO1_RSP); @@ -465,10 +476,10 @@ static int uniphier_sd_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, return ret; if (cmd->resp_type & MMC_RSP_136) { - u32 rsp_127_104 = readl(priv->regbase + UNIPHIER_SD_RSP76); - u32 rsp_103_72 = readl(priv->regbase + UNIPHIER_SD_RSP54); - u32 rsp_71_40 = readl(priv->regbase + UNIPHIER_SD_RSP32); - u32 rsp_39_8 = readl(priv->regbase + UNIPHIER_SD_RSP10); + u32 rsp_127_104 = uniphier_sd_readl(priv, UNIPHIER_SD_RSP76); + u32 rsp_103_72 = uniphier_sd_readl(priv, UNIPHIER_SD_RSP54); + u32 rsp_71_40 = uniphier_sd_readl(priv, UNIPHIER_SD_RSP32); + u32 rsp_39_8 = uniphier_sd_readl(priv, UNIPHIER_SD_RSP10); cmd->response[0] = ((rsp_127_104 & 0x00ffffff) << 8) | ((rsp_103_72 & 0xff000000) >> 24); @@ -479,7 +490,7 @@ static int uniphier_sd_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, cmd->response[3] = (rsp_39_8 & 0xffffff) << 8; } else { /* bit 39-8 */ - cmd->response[0] = readl(priv->regbase + UNIPHIER_SD_RSP10); + cmd->response[0] = uniphier_sd_readl(priv, UNIPHIER_SD_RSP10); } if (data) { @@ -518,10 +529,10 @@ static int uniphier_sd_set_bus_width(struct uniphier_sd_priv *priv, return -EINVAL; } - tmp = readl(priv->regbase + UNIPHIER_SD_OPTION); + tmp = uniphier_sd_readl(priv, UNIPHIER_SD_OPTION); tmp &= ~UNIPHIER_SD_OPTION_WIDTH_MASK; tmp |= val; - writel(tmp, priv->regbase + UNIPHIER_SD_OPTION); + uniphier_sd_writel(priv, tmp, UNIPHIER_SD_OPTION); return 0; } @@ -531,12 +542,12 @@ static void uniphier_sd_set_ddr_mode(struct uniphier_sd_priv *priv, { u32 tmp; - tmp = readl(priv->regbase + UNIPHIER_SD_IF_MODE); + tmp = uniphier_sd_readl(priv, UNIPHIER_SD_IF_MODE); if (mmc->ddr_mode) tmp |= UNIPHIER_SD_IF_MODE_DDR; else tmp &= ~UNIPHIER_SD_IF_MODE_DDR; - writel(tmp, priv->regbase + UNIPHIER_SD_IF_MODE); + uniphier_sd_writel(priv, tmp, UNIPHIER_SD_IF_MODE); } static void uniphier_sd_set_clk_rate(struct uniphier_sd_priv *priv, @@ -573,21 +584,21 @@ static void uniphier_sd_set_clk_rate(struct uniphier_sd_priv *priv, else val = UNIPHIER_SD_CLKCTL_DIV1024; - tmp = readl(priv->regbase + UNIPHIER_SD_CLKCTL); + tmp = uniphier_sd_readl(priv, UNIPHIER_SD_CLKCTL); if (tmp & UNIPHIER_SD_CLKCTL_SCLKEN && (tmp & UNIPHIER_SD_CLKCTL_DIV_MASK) == val) return; /* stop the clock before changing its rate to avoid a glitch signal */ tmp &= ~UNIPHIER_SD_CLKCTL_SCLKEN; - writel(tmp, priv->regbase + UNIPHIER_SD_CLKCTL); + uniphier_sd_writel(priv, tmp, UNIPHIER_SD_CLKCTL); tmp &= ~UNIPHIER_SD_CLKCTL_DIV_MASK; tmp |= val | UNIPHIER_SD_CLKCTL_OFFEN; - writel(tmp, priv->regbase + UNIPHIER_SD_CLKCTL); + uniphier_sd_writel(priv, tmp, UNIPHIER_SD_CLKCTL); tmp |= UNIPHIER_SD_CLKCTL_SCLKEN; - writel(tmp, priv->regbase + UNIPHIER_SD_CLKCTL); + uniphier_sd_writel(priv, tmp, UNIPHIER_SD_CLKCTL); udelay(1000); } @@ -617,7 +628,7 @@ static int uniphier_sd_get_cd(struct udevice *dev) if (priv->caps & UNIPHIER_SD_CAP_NONREMOVABLE) return 1; - return !!(readl(priv->regbase + UNIPHIER_SD_INFO1) & + return !!(uniphier_sd_readl(priv, UNIPHIER_SD_INFO1) & UNIPHIER_SD_INFO1_CD); } @@ -632,28 +643,28 @@ static void uniphier_sd_host_init(struct uniphier_sd_priv *priv) u32 tmp; /* soft reset of the host */ - tmp = readl(priv->regbase + UNIPHIER_SD_SOFT_RST); + tmp = uniphier_sd_readl(priv, UNIPHIER_SD_SOFT_RST); tmp &= ~UNIPHIER_SD_SOFT_RST_RSTX; - writel(tmp, priv->regbase + UNIPHIER_SD_SOFT_RST); + uniphier_sd_writel(priv, tmp, UNIPHIER_SD_SOFT_RST); tmp |= UNIPHIER_SD_SOFT_RST_RSTX; - writel(tmp, priv->regbase + UNIPHIER_SD_SOFT_RST); + uniphier_sd_writel(priv, tmp, UNIPHIER_SD_SOFT_RST); /* FIXME: implement eMMC hw_reset */ - writel(UNIPHIER_SD_STOP_SEC, priv->regbase + UNIPHIER_SD_STOP); + uniphier_sd_writel(priv, UNIPHIER_SD_STOP_SEC, UNIPHIER_SD_STOP); /* * Connected to 32bit AXI. * This register dropped backward compatibility at version 0x10. * Write an appropriate value depending on the IP version. */ - writel(priv->version >= 0x10 ? 0x00000101 : 0x00000000, - priv->regbase + UNIPHIER_SD_HOST_MODE); + uniphier_sd_writel(priv, priv->version >= 0x10 ? 0x00000101 : 0x00000000, + UNIPHIER_SD_HOST_MODE); if (priv->caps & UNIPHIER_SD_CAP_DMA_INTERNAL) { - tmp = readl(priv->regbase + UNIPHIER_SD_DMA_MODE); + tmp = uniphier_sd_readl(priv, UNIPHIER_SD_DMA_MODE); tmp |= UNIPHIER_SD_DMA_MODE_ADDR_INC; - writel(tmp, priv->regbase + UNIPHIER_SD_DMA_MODE); + uniphier_sd_writel(priv, tmp, UNIPHIER_SD_DMA_MODE); } } @@ -724,7 +735,7 @@ static int uniphier_sd_probe(struct udevice *dev) NULL)) priv->caps |= UNIPHIER_SD_CAP_NONREMOVABLE; - priv->version = readl(priv->regbase + UNIPHIER_SD_VERSION) & + priv->version = uniphier_sd_readl(priv, UNIPHIER_SD_VERSION) & UNIPHIER_SD_VERSION_IP; dev_dbg(dev, "version %x\n", priv->version); if (priv->version >= 0x10) { -- 2.11.0

3 17

[U-Boot] [PATCH 1/5] ARM: uniphier: remove sLD3 SoC support
by Masahiro Yamada 20 Aug '17

20 Aug '17

This SoC is too old. It is difficult to maintain any longer. Signed-off-by: Masahiro Yamada <yamada.masahiro(a)socionext.com> --- arch/arm/dts/Makefile | 2 - arch/arm/dts/uniphier-sld3-ref.dts | 100 ----- arch/arm/dts/uniphier-sld3.dtsi | 458 --------------------- arch/arm/mach-uniphier/Kconfig | 4 - arch/arm/mach-uniphier/arm32/cache-uniphier.c | 3 - arch/arm/mach-uniphier/arm32/debug_ll.S | 21 - arch/arm/mach-uniphier/arm32/lowlevel_init.S | 5 +- arch/arm/mach-uniphier/arm32/psci.c | 1 - arch/arm/mach-uniphier/bcu/Makefile | 1 - arch/arm/mach-uniphier/bcu/bcu-sld3.c | 39 -- arch/arm/mach-uniphier/board_init.c | 9 - arch/arm/mach-uniphier/boards.c | 22 - arch/arm/mach-uniphier/boot-device/Makefile | 1 - .../mach-uniphier/boot-device/boot-device-sld3.c | 84 ---- arch/arm/mach-uniphier/boot-device/boot-device.c | 9 - arch/arm/mach-uniphier/boot-device/boot-device.h | 2 - arch/arm/mach-uniphier/clk/Makefile | 14 +- .../clk/{clk-dram-sld3.c => clk-dram-ld4.c} | 2 +- .../clk/{clk-early-sld3.c => clk-early-ld4.c} | 2 +- arch/arm/mach-uniphier/clk/dpll-sld3.c | 13 - arch/arm/mach-uniphier/clk/pll-sld3.c | 14 - arch/arm/mach-uniphier/cpu-info.c | 4 - arch/arm/mach-uniphier/debug-uart/Makefile | 1 - .../arm/mach-uniphier/debug-uart/debug-uart-sld3.c | 31 -- arch/arm/mach-uniphier/debug-uart/debug-uart.c | 5 - arch/arm/mach-uniphier/debug-uart/debug-uart.h | 1 - arch/arm/mach-uniphier/dram/Makefile | 1 - arch/arm/mach-uniphier/dram/umc-sld3.c | 6 - arch/arm/mach-uniphier/dram_init.c | 9 - arch/arm/mach-uniphier/init.h | 10 +- arch/arm/mach-uniphier/memconf.c | 14 +- arch/arm/mach-uniphier/mmc-boot-mode.c | 2 +- arch/arm/mach-uniphier/sc-regs.h | 4 - arch/arm/mach-uniphier/soc-info.h | 1 - arch/arm/mach-uniphier/spl_board_init.c | 29 +- configs/uniphier_sld3_defconfig | 46 --- doc/README.uniphier | 1 - drivers/clk/uniphier/clk-uniphier-core.c | 4 - drivers/clk/uniphier/clk-uniphier-mio.c | 2 - drivers/pinctrl/uniphier/Kconfig | 6 - drivers/pinctrl/uniphier/Makefile | 1 - drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c | 129 ------ drivers/reset/reset-uniphier.c | 14 +- include/configs/uniphier.h | 8 +- 44 files changed, 30 insertions(+), 1105 deletions(-) delete mode 100644 arch/arm/dts/uniphier-sld3-ref.dts delete mode 100644 arch/arm/dts/uniphier-sld3.dtsi delete mode 100644 arch/arm/mach-uniphier/bcu/bcu-sld3.c delete mode 100644 arch/arm/mach-uniphier/boot-device/boot-device-sld3.c rename arch/arm/mach-uniphier/clk/{clk-dram-sld3.c => clk-dram-ld4.c} (93%) rename arch/arm/mach-uniphier/clk/{clk-early-sld3.c => clk-early-ld4.c} (93%) delete mode 100644 arch/arm/mach-uniphier/clk/dpll-sld3.c delete mode 100644 arch/arm/mach-uniphier/clk/pll-sld3.c delete mode 100644 arch/arm/mach-uniphier/debug-uart/debug-uart-sld3.c delete mode 100644 arch/arm/mach-uniphier/dram/umc-sld3.c delete mode 100644 configs/uniphier_sld3_defconfig delete mode 100644 drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index c2dc240edf68..8f6b186df828 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -118,8 +118,6 @@ dtb-$(CONFIG_ARCH_UNIPHIER_PXS2) += \ uniphier-pxs2-vodka.dtb dtb-$(CONFIG_ARCH_UNIPHIER_PXS3) += \ uniphier-pxs3-ref.dtb -dtb-$(CONFIG_ARCH_UNIPHIER_SLD3) += \ - uniphier-sld3-ref.dtb dtb-$(CONFIG_ARCH_UNIPHIER_SLD8) += \ uniphier-sld8-ref.dtb diff --git a/arch/arm/dts/uniphier-sld3-ref.dts b/arch/arm/dts/uniphier-sld3-ref.dts deleted file mode 100644 index baf706976aca..000000000000 --- a/arch/arm/dts/uniphier-sld3-ref.dts +++ /dev/null @@ -1,100 +0,0 @@ -/* - * Device Tree Source for UniPhier sLD3 Reference Board - * - * Copyright (C) 2015-2016 Socionext Inc. - * Author: Masahiro Yamada <yamada.masahiro(a)socionext.com> - * - * SPDX-License-Identifier: (GPL-2.0+ OR MIT) - */ - -/dts-v1/; -/include/ "uniphier-sld3.dtsi" -/include/ "uniphier-ref-daughter.dtsi" -/include/ "uniphier-support-card.dtsi" - -/ { - model = "UniPhier sLD3 Reference Board"; - compatible = "socionext,uniphier-sld3-ref", "socionext,uniphier-sld3"; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - aliases { - serial0 = &serial0; - serial1 = &serial1; - serial2 = &serial2; - i2c0 = &i2c0; - i2c1 = &i2c1; - i2c2 = &i2c2; - i2c3 = &i2c3; - i2c4 = &i2c4; - }; - - memory@8000000 { - device_type = "memory"; - reg = <0x80000000 0x20000000 - 0xc0000000 0x20000000>; - }; -}; - -&ethsc { - interrupts = <0 49 4>; -}; - -&serial0 { - status = "okay"; -}; - -&serial1 { - status = "okay"; -}; - -&serial2 { - status = "okay"; -}; - -&i2c0 { - status = "okay"; -}; - -&emmc { - status = "okay"; -}; - -&sd { - status = "okay"; -}; - -&usb0 { - status = "okay"; -}; - -&usb1 { - status = "okay"; -}; - -&usb2 { - status = "okay"; -}; - -&usb3 { - status = "okay"; -}; - -/* for U-Boot only */ -&serial0 { - u-boot,dm-pre-reloc; -}; - -&emmc { - u-boot,dm-pre-reloc; -}; - -&pinctrl_uart0 { - u-boot,dm-pre-reloc; -}; - -&pinctrl_emmc { - u-boot,dm-pre-reloc; -}; diff --git a/arch/arm/dts/uniphier-sld3.dtsi b/arch/arm/dts/uniphier-sld3.dtsi deleted file mode 100644 index 2bb2e029eeeb..000000000000 --- a/arch/arm/dts/uniphier-sld3.dtsi +++ /dev/null @@ -1,458 +0,0 @@ -/* - * Device Tree Source for UniPhier sLD3 SoC - * - * Copyright (C) 2015-2016 Socionext Inc. - * Author: Masahiro Yamada <yamada.masahiro(a)socionext.com> - * - * SPDX-License-Identifier: (GPL-2.0+ OR MIT) - */ - -/ { - compatible = "socionext,uniphier-sld3"; - #address-cells = <1>; - #size-cells = <1>; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a9"; - reg = <0>; - enable-method = "psci"; - next-level-cache = <&l2>; - }; - - cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a9"; - reg = <1>; - enable-method = "psci"; - next-level-cache = <&l2>; - }; - }; - - psci { - compatible = "arm,psci-0.2"; - method = "smc"; - }; - - clocks { - refclk: ref { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <24576000>; - }; - - arm_timer_clk: arm_timer_clk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <50000000>; - }; - }; - - soc { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - interrupt-parent = <&intc>; - u-boot,dm-pre-reloc; - - timer@20000200 { - compatible = "arm,cortex-a9-global-timer"; - reg = <0x20000200 0x20>; - interrupts = <1 11 0x304>; - clocks = <&arm_timer_clk>; - }; - - timer@20000600 { - compatible = "arm,cortex-a9-twd-timer"; - reg = <0x20000600 0x20>; - interrupts = <1 13 0x304>; - clocks = <&arm_timer_clk>; - }; - - intc: interrupt-controller@20001000 { - compatible = "arm,cortex-a9-gic"; - #interrupt-cells = <3>; - interrupt-controller; - reg = <0x20001000 0x1000>, - <0x20000100 0x100>; - }; - - l2: l2-cache@500c0000 { - compatible = "socionext,uniphier-system-cache"; - reg = <0x500c0000 0x2000>, <0x503c0100 0x4>, - <0x506c0000 0x400>; - interrupts = <0 174 4>, <0 175 4>; - cache-unified; - cache-size = <(512 * 1024)>; - cache-sets = <256>; - cache-line-size = <128>; - cache-level = <2>; - }; - - serial0: serial@54006800 { - compatible = "socionext,uniphier-uart"; - status = "disabled"; - reg = <0x54006800 0x40>; - interrupts = <0 33 4>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart0>; - clocks = <&sys_clk 0>; - clock-frequency = <36864000>; - }; - - serial1: serial@54006900 { - compatible = "socionext,uniphier-uart"; - status = "disabled"; - reg = <0x54006900 0x40>; - interrupts = <0 35 4>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart1>; - clocks = <&sys_clk 0>; - clock-frequency = <36864000>; - }; - - serial2: serial@54006a00 { - compatible = "socionext,uniphier-uart"; - status = "disabled"; - reg = <0x54006a00 0x40>; - interrupts = <0 37 4>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart2>; - clocks = <&sys_clk 0>; - clock-frequency = <36864000>; - }; - - port0x: gpio@55000008 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000008 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port1x: gpio@55000010 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000010 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port2x: gpio@55000018 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000018 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port3x: gpio@55000020 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000020 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port4: gpio@55000028 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000028 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port5x: gpio@55000030 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000030 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port6x: gpio@55000038 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000038 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port7x: gpio@55000040 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000040 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port8x: gpio@55000048 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000048 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port9x: gpio@55000050 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000050 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port10x: gpio@55000058 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000058 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port11x: gpio@55000060 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000060 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port12x: gpio@55000068 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000068 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port13x: gpio@55000070 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000070 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port14x: gpio@55000078 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000078 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port16x: gpio@55000088 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000088 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - i2c0: i2c@58400000 { - compatible = "socionext,uniphier-i2c"; - status = "disabled"; - reg = <0x58400000 0x40>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <0 41 1>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c0>; - clocks = <&sys_clk 1>; - clock-frequency = <100000>; - }; - - i2c1: i2c@58480000 { - compatible = "socionext,uniphier-i2c"; - status = "disabled"; - reg = <0x58480000 0x40>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <0 42 1>; - clocks = <&sys_clk 1>; - clock-frequency = <100000>; - }; - - i2c2: i2c@58500000 { - compatible = "socionext,uniphier-i2c"; - status = "disabled"; - reg = <0x58500000 0x40>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <0 43 1>; - clocks = <&sys_clk 1>; - clock-frequency = <100000>; - }; - - i2c3: i2c@58580000 { - compatible = "socionext,uniphier-i2c"; - status = "disabled"; - reg = <0x58580000 0x40>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <0 44 1>; - clocks = <&sys_clk 1>; - clock-frequency = <100000>; - }; - - /* chip-internal connection for DMD */ - i2c4: i2c@58600000 { - compatible = "socionext,uniphier-i2c"; - reg = <0x58600000 0x40>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <0 45 1>; - clocks = <&sys_clk 1>; - clock-frequency = <400000>; - }; - - system_bus: system-bus@58c00000 { - compatible = "socionext,uniphier-system-bus"; - status = "disabled"; - reg = <0x58c00000 0x400>; - #address-cells = <2>; - #size-cells = <1>; - }; - - smpctrl@59801000 { - compatible = "socionext,uniphier-smpctrl"; - reg = <0x59801000 0x400>; - }; - - mioctrl@59810000 { - compatible = "socionext,uniphier-sld3-mioctrl", - "simple-mfd", "syscon"; - reg = <0x59810000 0x800>; - u-boot,dm-pre-reloc; - - mio_clk: clock { - compatible = "socionext,uniphier-sld3-mio-clock"; - #clock-cells = <1>; - u-boot,dm-pre-reloc; - }; - - mio_rst: reset { - compatible = "socionext,uniphier-sld3-mio-reset"; - #reset-cells = <1>; - }; - }; - - emmc: sdhc@5a400000 { - compatible = "socionext,uniphier-sdhc"; - status = "disabled"; - reg = <0x5a400000 0x200>; - interrupts = <0 78 4>; - pinctrl-names = "default", "1.8v"; - pinctrl-0 = <&pinctrl_emmc>; - pinctrl-1 = <&pinctrl_emmc_1v8>; - clocks = <&mio_clk 1>; - reset-names = "host", "bridge"; - resets = <&mio_rst 1>, <&mio_rst 4>; - bus-width = <8>; - non-removable; - cap-mmc-highspeed; - cap-mmc-hw-reset; - }; - - sd: sdhc@5a500000 { - compatible = "socionext,uniphier-sdhc"; - status = "disabled"; - reg = <0x5a500000 0x200>; - interrupts = <0 76 4>; - pinctrl-names = "default", "1.8v"; - pinctrl-0 = <&pinctrl_sd>; - pinctrl-1 = <&pinctrl_sd_1v8>; - clocks = <&mio_clk 0>; - reset-names = "host", "bridge"; - resets = <&mio_rst 0>, <&mio_rst 3>; - bus-width = <4>; - cap-sd-highspeed; - sd-uhs-sdr12; - sd-uhs-sdr25; - sd-uhs-sdr50; - }; - - usb0: usb@5a800100 { - compatible = "socionext,uniphier-ehci", "generic-ehci"; - status = "disabled"; - reg = <0x5a800100 0x100>; - interrupts = <0 80 4>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usb0>; - clocks = <&mio_clk 7>, <&mio_clk 8>, <&mio_clk 12>; - resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 8>, - <&mio_rst 12>; - }; - - usb1: usb@5a810100 { - compatible = "socionext,uniphier-ehci", "generic-ehci"; - status = "disabled"; - reg = <0x5a810100 0x100>; - interrupts = <0 81 4>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usb1>; - clocks = <&mio_clk 7>, <&mio_clk 9>, <&mio_clk 13>; - resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 9>, - <&mio_rst 13>; - }; - - usb2: usb@5a820100 { - compatible = "socionext,uniphier-ehci", "generic-ehci"; - status = "disabled"; - reg = <0x5a820100 0x100>; - interrupts = <0 82 4>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usb2>; - clocks = <&mio_clk 7>, <&mio_clk 10>, <&mio_clk 14>; - resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 10>, - <&mio_rst 14>; - }; - - usb3: usb@5a830100 { - compatible = "socionext,uniphier-ehci", "generic-ehci"; - status = "disabled"; - reg = <0x5a830100 0x100>; - interrupts = <0 83 4>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usb3>; - clocks = <&mio_clk 7>, <&mio_clk 11>, <&mio_clk 15>; - resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 11>, - <&mio_rst 15>; - }; - - soc-glue@5f800000 { - compatible = "socionext,uniphier-sld3-soc-glue", - "simple-mfd", "syscon"; - reg = <0x5f800000 0x2000>; - u-boot,dm-pre-reloc; - - pinctrl: pinctrl { - compatible = "socionext,uniphier-sld3-pinctrl"; - u-boot,dm-pre-reloc; - }; - }; - - aidet@f1830000 { - compatible = "simple-mfd", "syscon"; - reg = <0xf1830000 0x200>; - }; - - sysctrl@f1840000 { - compatible = "socionext,uniphier-sld3-sysctrl", - "simple-mfd", "syscon"; - reg = <0xf1840000 0x10000>; - - sys_clk: clock { - compatible = "socionext,uniphier-sld3-clock"; - #clock-cells = <1>; - }; - - sys_rst: reset { - compatible = "socionext,uniphier-sld3-reset"; - #reset-cells = <1>; - }; - }; - - nand: nand@f8000000 { - compatible = "socionext,uniphier-denali-nand-v5a"; - status = "disabled"; - reg-names = "nand_data", "denali_reg"; - reg = <0xf8000000 0x20>, <0xf8100000 0x1000>; - interrupts = <0 65 4>; - clocks = <&sys_clk 2>; - nand-ecc-strength = <8>; - }; - }; -}; - -/include/ "uniphier-pinctrl.dtsi" diff --git a/arch/arm/mach-uniphier/Kconfig b/arch/arm/mach-uniphier/Kconfig index 3147db76cb68..6a7e239e0d28 100644 --- a/arch/arm/mach-uniphier/Kconfig +++ b/arch/arm/mach-uniphier/Kconfig @@ -15,10 +15,6 @@ choice prompt "UniPhier SoC select" default ARCH_UNIPHIER_PRO4 -config ARCH_UNIPHIER_SLD3 - bool "UniPhier sLD3 SoC" - select ARCH_UNIPHIER_32BIT - config ARCH_UNIPHIER_LD4_SLD8 bool "UniPhier LD4/sLD8 SoCs" select ARCH_UNIPHIER_32BIT diff --git a/arch/arm/mach-uniphier/arm32/cache-uniphier.c b/arch/arm/mach-uniphier/arm32/cache-uniphier.c index 658969b04911..3df82bfef008 100644 --- a/arch/arm/mach-uniphier/arm32/cache-uniphier.c +++ b/arch/arm/mach-uniphier/arm32/cache-uniphier.c @@ -197,9 +197,6 @@ void uniphier_cache_set_active_ways(int cpu, u32 active_ways) void __iomem *base = (void __iomem *)UNIPHIER_SSCC + 0xc00; switch (readl(UNIPHIER_SSCID)) { /* revision */ - case 0x11: /* sLD3 */ - base = (void __iomem *)UNIPHIER_SSCC + 0x870; - break; case 0x12: /* LD4 */ case 0x16: /* sld8 */ base = (void __iomem *)UNIPHIER_SSCC + 0x840; diff --git a/arch/arm/mach-uniphier/arm32/debug_ll.S b/arch/arm/mach-uniphier/arm32/debug_ll.S index 76631f2faa22..b39899e6231e 100644 --- a/arch/arm/mach-uniphier/arm32/debug_ll.S +++ b/arch/arm/mach-uniphier/arm32/debug_ll.S @@ -26,27 +26,6 @@ ENTRY(debug_ll_init) and r1, r1, #SG_REVISION_TYPE_MASK mov r1, r1, lsr #SG_REVISION_TYPE_SHIFT -#if defined(CONFIG_ARCH_UNIPHIER_SLD3) -#define UNIPHIER_SLD3_UART_CLK 36864000 - cmp r1, #0x25 - bne sld3_end - - sg_set_pinsel 64, 1, 4, 4, r0, r1 @ TXD0 -> TXD0 - - ldr r0, =BCSCR5 - ldr r1, =0x24440000 - str r1, [r0] - - ldr r0, =SC_CLKCTRL - ldr r1, [r0] - orr r1, r1, #SC_CLKCTRL_CEN_PERI - str r1, [r0] - - ldr r3, =DIV_ROUND(UNIPHIER_SLD3_UART_CLK, 16 * BAUDRATE) - - b init_uart -sld3_end: -#endif #if defined(CONFIG_ARCH_UNIPHIER_LD4) #define UNIPHIER_LD4_UART_CLK 36864000 cmp r1, #0x26 diff --git a/arch/arm/mach-uniphier/arm32/lowlevel_init.S b/arch/arm/mach-uniphier/arm32/lowlevel_init.S index af5ed1c050fe..89bb5a6355fd 100644 --- a/arch/arm/mach-uniphier/arm32/lowlevel_init.S +++ b/arch/arm/mach-uniphier/arm32/lowlevel_init.S @@ -29,9 +29,8 @@ ENTRY(lowlevel_init) /* * Now we are using the page table embedded in the Boot ROM. - * It is not handy since it is not a straight mapped table for sLD3. - * Also, the access to the external bus is prohibited. What we need - * to do next is to create a page table and switch over to it. + * What we need to do next is to create a page table and switch + * over to it. */ bl create_page_table bl __v7_flush_dcache_all diff --git a/arch/arm/mach-uniphier/arm32/psci.c b/arch/arm/mach-uniphier/arm32/psci.c index 65a468dec9f5..3ab101a9cfe8 100644 --- a/arch/arm/mach-uniphier/arm32/psci.c +++ b/arch/arm/mach-uniphier/arm32/psci.c @@ -29,7 +29,6 @@ u32 uniphier_smp_booted[CONFIG_ARMV7_PSCI_NR_CPUS]; static int uniphier_get_nr_cpus(void) { switch (uniphier_get_soc_id()) { - case UNIPHIER_SLD3_ID: case UNIPHIER_PRO4_ID: case UNIPHIER_PRO5_ID: return 2; diff --git a/arch/arm/mach-uniphier/bcu/Makefile b/arch/arm/mach-uniphier/bcu/Makefile index 02107b376ac8..5a9d8d72728b 100644 --- a/arch/arm/mach-uniphier/bcu/Makefile +++ b/arch/arm/mach-uniphier/bcu/Makefile @@ -2,6 +2,5 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-$(CONFIG_ARCH_UNIPHIER_SLD3) += bcu-sld3.o obj-$(CONFIG_ARCH_UNIPHIER_LD4) += bcu-ld4.o obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += bcu-ld4.o diff --git a/arch/arm/mach-uniphier/bcu/bcu-sld3.c b/arch/arm/mach-uniphier/bcu/bcu-sld3.c deleted file mode 100644 index 99b318fd8f74..000000000000 --- a/arch/arm/mach-uniphier/bcu/bcu-sld3.c +++ /dev/null @@ -1,39 +0,0 @@ -/* - * Copyright (C) 2011-2014 Panasonic Corporation - * Copyright (C) 2015-2016 Socionext Inc. - * Author: Masahiro Yamada <yamada.masahiro(a)socionext.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <linux/io.h> - -#include "../init.h" -#include "bcu-regs.h" - -#define ch(x) ((x) >= 32 ? 0 : (x) < 0 ? 0x11111111 : 0x11111111 << (x)) - -void uniphier_sld3_bcu_init(const struct uniphier_board_data *bd) -{ - int shift; - - writel(0x11111111, BCSCR2); /* 0x80000000-0x9fffffff: IPPC/IPPD-bus */ - writel(0x11111111, BCSCR3); /* 0xa0000000-0xbfffffff: IPPC/IPPD-bus */ - writel(0x11111111, BCSCR4); /* 0xc0000000-0xdfffffff: IPPC/IPPD-bus */ - /* - * 0xe0000000-0xefffffff: Ex-bus - * 0xf0000000-0xfbffffff: ASM bus - * 0xfc000000-0xffffffff: OCM bus - */ - writel(0x24440000, BCSCR5); - - /* Specify DDR channel */ - shift = bd->dram_ch[0].size / 0x04000000 * 4; - writel(ch(shift), BCIPPCCHR2); /* 0x80000000-0x9fffffff */ - - shift -= 32; - writel(ch(shift), BCIPPCCHR3); /* 0xa0000000-0xbfffffff */ - - shift -= 32; - writel(ch(shift), BCIPPCCHR4); /* 0xc0000000-0xdfffffff */ -} diff --git a/arch/arm/mach-uniphier/board_init.c b/arch/arm/mach-uniphier/board_init.c index 884bc67654d4..ed58d07f7e50 100644 --- a/arch/arm/mach-uniphier/board_init.c +++ b/arch/arm/mach-uniphier/board_init.c @@ -86,15 +86,6 @@ struct uniphier_initdata { }; static const struct uniphier_initdata uniphier_initdata[] = { -#if defined(CONFIG_ARCH_UNIPHIER_SLD3) - { - .soc_id = UNIPHIER_SLD3_ID, - .nand_2cs = true, - .sbc_init = uniphier_sbc_init_admulti, - .pll_init = uniphier_sld3_pll_init, - .clk_init = uniphier_ld4_clk_init, - }, -#endif #if defined(CONFIG_ARCH_UNIPHIER_LD4) { .soc_id = UNIPHIER_LD4_ID, diff --git a/arch/arm/mach-uniphier/boards.c b/arch/arm/mach-uniphier/boards.c index 78de256a01e5..9bfc4c254196 100644 --- a/arch/arm/mach-uniphier/boards.c +++ b/arch/arm/mach-uniphier/boards.c @@ -13,25 +13,6 @@ DECLARE_GLOBAL_DATA_PTR; -#if defined(CONFIG_ARCH_UNIPHIER_SLD3) -static const struct uniphier_board_data uniphier_sld3_data = { - .dram_freq = 1600, - .dram_ch[0] = { - .size = 0x20000000, - .width = 32, - }, - .dram_ch[1] = { - .size = 0x20000000, - .width = 16, - }, - .dram_ch[2] = { - .size = 0x10000000, - .width = 16, - }, - .flags = UNIPHIER_BD_DRAM_SPARSE, -}; -#endif - #if defined(CONFIG_ARCH_UNIPHIER_LD4) static const struct uniphier_board_data uniphier_ld4_data = { .dram_freq = 1600, @@ -146,9 +127,6 @@ struct uniphier_board_id { }; static const struct uniphier_board_id uniphier_boards[] = { -#if defined(CONFIG_ARCH_UNIPHIER_SLD3) - { "socionext,uniphier-sld3", &uniphier_sld3_data, }, -#endif #if defined(CONFIG_ARCH_UNIPHIER_LD4) { "socionext,uniphier-ld4", &uniphier_ld4_data, }, #endif diff --git a/arch/arm/mach-uniphier/boot-device/Makefile b/arch/arm/mach-uniphier/boot-device/Makefile index b35729213032..6c8580ce791e 100644 --- a/arch/arm/mach-uniphier/boot-device/Makefile +++ b/arch/arm/mach-uniphier/boot-device/Makefile @@ -4,7 +4,6 @@ obj-y += boot-device.o -obj-$(CONFIG_ARCH_UNIPHIER_SLD3) += boot-device-sld3.o obj-$(CONFIG_ARCH_UNIPHIER_LD4) += boot-device-ld4.o obj-$(CONFIG_ARCH_UNIPHIER_PRO4) += boot-device-ld4.o obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += boot-device-ld4.o diff --git a/arch/arm/mach-uniphier/boot-device/boot-device-sld3.c b/arch/arm/mach-uniphier/boot-device/boot-device-sld3.c deleted file mode 100644 index 2b36494f7343..000000000000 --- a/arch/arm/mach-uniphier/boot-device/boot-device-sld3.c +++ /dev/null @@ -1,84 +0,0 @@ -/* - * Copyright (C) 2014 Panasonic Corporation - * Copyright (C) 2015-2017 Socionext Inc. - * Author: Masahiro Yamada <yamada.masahiro(a)socionext.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <spl.h> -#include <linux/io.h> -#include <linux/kernel.h> - -#include "boot-device.h" - -const struct uniphier_boot_device uniphier_sld3_boot_device_table[] = { - {BOOT_DEVICE_NOR, "NOR (XECS0)"}, - {BOOT_DEVICE_NONE, "External Master"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_MMC1, "eMMC (3.3V, Boot Oparation)"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_MMC1, "eMMC (1.8V, Boot Oparation)"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_MMC1, "eMMC (3.3V, Normal)"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_MMC1, "eMMC (1.8V, Normal)"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 128KB, Addr 5)"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 256KB, Addr 5)"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 512KB, Addr 5)"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 128KB, Addr 5)"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 256KB, Addr 5)"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 512KB, Addr 5)"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 4, ECC 24, EraseSize 1MB, Addr 5)"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 5)"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 256KB, Addr 5)"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 512KB, Addr 5)"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 5)"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 256KB, Addr 5)"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 512KB, Addr 5)"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 24, EraseSize 1MB, Addr 5)"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, ONFI, Addr 5)"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI, Addr 5)"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 4, ECC 24, ONFI, Addr 5)"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 5)"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 5)"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 24, ONFI, Addr 5)"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NONE, "Reserved"}, -}; - -const unsigned uniphier_sld3_boot_device_count = - ARRAY_SIZE(uniphier_sld3_boot_device_table); diff --git a/arch/arm/mach-uniphier/boot-device/boot-device.c b/arch/arm/mach-uniphier/boot-device/boot-device.c index 094f77b4d10e..0f93926f28fa 100644 --- a/arch/arm/mach-uniphier/boot-device/boot-device.c +++ b/arch/arm/mach-uniphier/boot-device/boot-device.c @@ -26,15 +26,6 @@ struct uniphier_boot_device_info { }; static const struct uniphier_boot_device_info uniphier_boot_device_info[] = { -#if defined(CONFIG_ARCH_UNIPHIER_SLD3) - { - .soc_id = UNIPHIER_SLD3_ID, - .boot_device_sel_shift = 0, - .boot_device_table = uniphier_sld3_boot_device_table, - .boot_device_count = &uniphier_sld3_boot_device_count, - .have_internal_stm = 0, - }, -#endif #if defined(CONFIG_ARCH_UNIPHIER_LD4) { .soc_id = UNIPHIER_LD4_ID, diff --git a/arch/arm/mach-uniphier/boot-device/boot-device.h b/arch/arm/mach-uniphier/boot-device/boot-device.h index c4ce3e50a378..f9631d682089 100644 --- a/arch/arm/mach-uniphier/boot-device/boot-device.h +++ b/arch/arm/mach-uniphier/boot-device/boot-device.h @@ -13,14 +13,12 @@ struct uniphier_boot_device { const char *desc; }; -extern const struct uniphier_boot_device uniphier_sld3_boot_device_table[]; extern const struct uniphier_boot_device uniphier_ld4_boot_device_table[]; extern const struct uniphier_boot_device uniphier_pro5_boot_device_table[]; extern const struct uniphier_boot_device uniphier_pxs2_boot_device_table[]; extern const struct uniphier_boot_device uniphier_ld11_boot_device_table[]; extern const struct uniphier_boot_device uniphier_pxs3_boot_device_table[]; -extern const unsigned int uniphier_sld3_boot_device_count; extern const unsigned int uniphier_ld4_boot_device_count; extern const unsigned int uniphier_pro5_boot_device_count; extern const unsigned int uniphier_pxs2_boot_device_count; diff --git a/arch/arm/mach-uniphier/clk/Makefile b/arch/arm/mach-uniphier/clk/Makefile index 1680dddd6e68..76633bcd498a 100644 --- a/arch/arm/mach-uniphier/clk/Makefile +++ b/arch/arm/mach-uniphier/clk/Makefile @@ -4,17 +4,15 @@ ifdef CONFIG_SPL_BUILD -obj-$(CONFIG_ARCH_UNIPHIER_SLD3) += clk-early-sld3.o clk-dram-sld3.o dpll-sld3.o -obj-$(CONFIG_ARCH_UNIPHIER_LD4) += clk-early-sld3.o clk-dram-sld3.o dpll-ld4.o -obj-$(CONFIG_ARCH_UNIPHIER_PRO4) += clk-early-sld3.o clk-dram-sld3.o dpll-pro4.o -obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += clk-early-sld3.o clk-dram-sld3.o dpll-sld8.o -obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += clk-early-sld3.o clk-dram-pro5.o dpll-pro5.o -obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += clk-early-sld3.o clk-dram-pxs2.o dpll-pxs2.o -obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += clk-early-sld3.o clk-dram-pxs2.o dpll-pxs2.o +obj-$(CONFIG_ARCH_UNIPHIER_LD4) += clk-early-ld4.o clk-dram-ld4.o dpll-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_PRO4) += clk-early-ld4.o clk-dram-ld4.o dpll-pro4.o +obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += clk-early-ld4.o clk-dram-ld4.o dpll-sld8.o +obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += clk-early-ld4.o clk-dram-pro5.o dpll-pro5.o +obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += clk-early-ld4.o clk-dram-pxs2.o dpll-pxs2.o +obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += clk-early-ld4.o clk-dram-pxs2.o dpll-pxs2.o else -obj-$(CONFIG_ARCH_UNIPHIER_SLD3) += clk-ld4.o pll-sld3.o dpll-tail.o obj-$(CONFIG_ARCH_UNIPHIER_LD4) += clk-ld4.o pll-ld4.o dpll-tail.o obj-$(CONFIG_ARCH_UNIPHIER_PRO4) += clk-pro4.o pll-pro4.o dpll-tail.o obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += clk-ld4.o pll-ld4.o dpll-tail.o diff --git a/arch/arm/mach-uniphier/clk/clk-dram-sld3.c b/arch/arm/mach-uniphier/clk/clk-dram-ld4.c similarity index 93% rename from arch/arm/mach-uniphier/clk/clk-dram-sld3.c rename to arch/arm/mach-uniphier/clk/clk-dram-ld4.c index 3430303f875a..407daf066425 100644 --- a/arch/arm/mach-uniphier/clk/clk-dram-sld3.c +++ b/arch/arm/mach-uniphier/clk/clk-dram-ld4.c @@ -12,7 +12,7 @@ #include "../init.h" #include "../sc-regs.h" -void uniphier_sld3_dram_clk_init(void) +void uniphier_ld4_dram_clk_init(void) { u32 tmp; diff --git a/arch/arm/mach-uniphier/clk/clk-early-sld3.c b/arch/arm/mach-uniphier/clk/clk-early-ld4.c similarity index 93% rename from arch/arm/mach-uniphier/clk/clk-early-sld3.c rename to arch/arm/mach-uniphier/clk/clk-early-ld4.c index 3235da20bcb9..07b916dc9a9c 100644 --- a/arch/arm/mach-uniphier/clk/clk-early-sld3.c +++ b/arch/arm/mach-uniphier/clk/clk-early-ld4.c @@ -12,7 +12,7 @@ #include "../init.h" #include "../sc-regs.h" -void uniphier_sld3_early_clk_init(void) +void uniphier_ld4_early_clk_init(void) { u32 tmp; diff --git a/arch/arm/mach-uniphier/clk/dpll-sld3.c b/arch/arm/mach-uniphier/clk/dpll-sld3.c deleted file mode 100644 index 0eb310ceb8f3..000000000000 --- a/arch/arm/mach-uniphier/clk/dpll-sld3.c +++ /dev/null @@ -1,13 +0,0 @@ -/* - * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro(a)socionext.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include "../init.h" - -int uniphier_sld3_dpll_init(const struct uniphier_board_data *bd) -{ - /* add pll init code here */ - return 0; -} diff --git a/arch/arm/mach-uniphier/clk/pll-sld3.c b/arch/arm/mach-uniphier/clk/pll-sld3.c deleted file mode 100644 index 37a7c1278251..000000000000 --- a/arch/arm/mach-uniphier/clk/pll-sld3.c +++ /dev/null @@ -1,14 +0,0 @@ -/* - * Copyright (C) 2016 Socionext Inc. - * Author: Masahiro Yamada <yamada.masahiro(a)socionext.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include "../init.h" -#include "pll.h" - -void uniphier_sld3_pll_init(void) -{ - uniphier_ld4_dpll_ssc_en(); -} diff --git a/arch/arm/mach-uniphier/cpu-info.c b/arch/arm/mach-uniphier/cpu-info.c index 2ce73c5af888..90ef4110871f 100644 --- a/arch/arm/mach-uniphier/cpu-info.c +++ b/arch/arm/mach-uniphier/cpu-info.c @@ -23,10 +23,6 @@ int print_cpuinfo(void) puts("SoC: "); switch (id) { - case UNIPHIER_SLD3_ID: - puts("sLD3"); - required_model = 2; - break; case UNIPHIER_LD4_ID: puts("LD4"); required_rev = 2; diff --git a/arch/arm/mach-uniphier/debug-uart/Makefile b/arch/arm/mach-uniphier/debug-uart/Makefile index 0bad718de66b..3837ee7ec6db 100644 --- a/arch/arm/mach-uniphier/debug-uart/Makefile +++ b/arch/arm/mach-uniphier/debug-uart/Makefile @@ -3,7 +3,6 @@ # ifdef CONFIG_SPL_BUILD -obj-$(CONFIG_ARCH_UNIPHIER_SLD3) += debug-uart-sld3.o obj-$(CONFIG_ARCH_UNIPHIER_LD4) += debug-uart-ld4.o obj-$(CONFIG_ARCH_UNIPHIER_PRO4) += debug-uart-pro4.o obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += debug-uart-sld8.o diff --git a/arch/arm/mach-uniphier/debug-uart/debug-uart-sld3.c b/arch/arm/mach-uniphier/debug-uart/debug-uart-sld3.c deleted file mode 100644 index 508318a6820c..000000000000 --- a/arch/arm/mach-uniphier/debug-uart/debug-uart-sld3.c +++ /dev/null @@ -1,31 +0,0 @@ -/* - * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro(a)socionext.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <config.h> -#include <linux/kernel.h> -#include <linux/io.h> - -#include "../bcu/bcu-regs.h" -#include "../sc-regs.h" -#include "../sg-regs.h" -#include "debug-uart.h" - -#define UNIPHIER_SLD3_UART_CLK 36864000 - -unsigned int uniphier_sld3_debug_uart_init(void) -{ - u32 tmp; - - sg_set_pinsel(64, 1, 4, 4); /* TXD0 -> TXD0 */ - - writel(0x24440000, BCSCR5); - - tmp = readl(SC_CLKCTRL); - tmp |= SC_CLKCTRL_CEN_PERI; - writel(tmp, SC_CLKCTRL); - - return DIV_ROUND_CLOSEST(UNIPHIER_SLD3_UART_CLK, 16 * CONFIG_BAUDRATE); -} diff --git a/arch/arm/mach-uniphier/debug-uart/debug-uart.c b/arch/arm/mach-uniphier/debug-uart/debug-uart.c index 72a514dc0e81..94d05a8b9c01 100644 --- a/arch/arm/mach-uniphier/debug-uart/debug-uart.c +++ b/arch/arm/mach-uniphier/debug-uart/debug-uart.c @@ -33,11 +33,6 @@ void _debug_uart_init(void) unsigned int divisor; switch (uniphier_get_soc_id()) { -#if defined(CONFIG_ARCH_UNIPHIER_SLD3) - case UNIPHIER_SLD3_ID: - divisor = uniphier_sld3_debug_uart_init(); - break; -#endif #if defined(CONFIG_ARCH_UNIPHIER_LD4) case UNIPHIER_LD4_ID: divisor = uniphier_ld4_debug_uart_init(); diff --git a/arch/arm/mach-uniphier/debug-uart/debug-uart.h b/arch/arm/mach-uniphier/debug-uart/debug-uart.h index 8de9124b02df..d57e5df3db17 100644 --- a/arch/arm/mach-uniphier/debug-uart/debug-uart.h +++ b/arch/arm/mach-uniphier/debug-uart/debug-uart.h @@ -7,7 +7,6 @@ #ifndef _MACH_DEBUG_UART_H #define _MACH_DEBUG_UART_H -unsigned int uniphier_sld3_debug_uart_init(void); unsigned int uniphier_ld4_debug_uart_init(void); unsigned int uniphier_pro4_debug_uart_init(void); unsigned int uniphier_sld8_debug_uart_init(void); diff --git a/arch/arm/mach-uniphier/dram/Makefile b/arch/arm/mach-uniphier/dram/Makefile index 1da33f6d80a1..baf2a7b481bb 100644 --- a/arch/arm/mach-uniphier/dram/Makefile +++ b/arch/arm/mach-uniphier/dram/Makefile @@ -4,7 +4,6 @@ ifdef CONFIG_SPL_BUILD -obj-$(CONFIG_ARCH_UNIPHIER_SLD3) += umc-sld3.o obj-$(CONFIG_ARCH_UNIPHIER_LD4) += umc-ld4.o \ ddrphy-training.o ddrphy-ld4.o obj-$(CONFIG_ARCH_UNIPHIER_PRO4) += umc-pro4.o \ diff --git a/arch/arm/mach-uniphier/dram/umc-sld3.c b/arch/arm/mach-uniphier/dram/umc-sld3.c deleted file mode 100644 index 99249eb20168..000000000000 --- a/arch/arm/mach-uniphier/dram/umc-sld3.c +++ /dev/null @@ -1,6 +0,0 @@ -#include "../init.h" - -int uniphier_sld3_umc_init(const struct uniphier_board_data *bd) -{ - return 0; -} diff --git a/arch/arm/mach-uniphier/dram_init.c b/arch/arm/mach-uniphier/dram_init.c index 6eb8d2650424..32d359321ae2 100644 --- a/arch/arm/mach-uniphier/dram_init.c +++ b/arch/arm/mach-uniphier/dram_init.c @@ -28,15 +28,6 @@ struct uniphier_memif_data { static const struct uniphier_memif_data uniphier_memif_data[] = { { - .soc_id = UNIPHIER_SLD3_ID, - .sparse_ch1_base = 0xc0000000, - /* - * In fact, SLD3 has DRAM ch2, but the memory regions for ch1 - * and ch2 overlap, and host cannot get access to them at the - * same time. Hide the ch2 from U-Boot. - */ - }, - { .soc_id = UNIPHIER_LD4_ID, .sparse_ch1_base = 0xc0000000, }, diff --git a/arch/arm/mach-uniphier/init.h b/arch/arm/mach-uniphier/init.h index b322628eedfa..29f638d94703 100644 --- a/arch/arm/mach-uniphier/init.h +++ b/arch/arm/mach-uniphier/init.h @@ -28,7 +28,6 @@ struct uniphier_board_data { const struct uniphier_board_data *uniphier_get_board_param(void); -int uniphier_sld3_init(const struct uniphier_board_data *bd); int uniphier_ld4_init(const struct uniphier_board_data *bd); int uniphier_pro4_init(const struct uniphier_board_data *bd); int uniphier_sld8_init(const struct uniphier_board_data *bd); @@ -63,34 +62,29 @@ static inline void uniphier_ld11_sbc_init(void) } #endif -void uniphier_sld3_bcu_init(const struct uniphier_board_data *bd); void uniphier_ld4_bcu_init(const struct uniphier_board_data *bd); int uniphier_memconf_2ch_init(const struct uniphier_board_data *bd); -int uniphier_memconf_3ch_no_disbit_init(const struct uniphier_board_data *bd); int uniphier_memconf_3ch_init(const struct uniphier_board_data *bd); -int uniphier_sld3_dpll_init(const struct uniphier_board_data *bd); int uniphier_ld4_dpll_init(const struct uniphier_board_data *bd); int uniphier_pro4_dpll_init(const struct uniphier_board_data *bd); int uniphier_sld8_dpll_init(const struct uniphier_board_data *bd); int uniphier_pro5_dpll_init(const struct uniphier_board_data *bd); int uniphier_pxs2_dpll_init(const struct uniphier_board_data *bd); -void uniphier_sld3_early_clk_init(void); +void uniphier_ld4_early_clk_init(void); -void uniphier_sld3_dram_clk_init(void); +void uniphier_ld4_dram_clk_init(void); void uniphier_pro5_dram_clk_init(void); void uniphier_pxs2_dram_clk_init(void); -int uniphier_sld3_umc_init(const struct uniphier_board_data *bd); int uniphier_ld4_umc_init(const struct uniphier_board_data *bd); int uniphier_pro4_umc_init(const struct uniphier_board_data *bd); int uniphier_sld8_umc_init(const struct uniphier_board_data *bd); int uniphier_pro5_umc_init(const struct uniphier_board_data *bd); int uniphier_pxs2_umc_init(const struct uniphier_board_data *bd); -void uniphier_sld3_pll_init(void); void uniphier_ld4_pll_init(void); void uniphier_pro4_pll_init(void); void uniphier_ld11_pll_init(void); diff --git a/arch/arm/mach-uniphier/memconf.c b/arch/arm/mach-uniphier/memconf.c index 4ced2cbace03..3b34e4d37294 100644 --- a/arch/arm/mach-uniphier/memconf.c +++ b/arch/arm/mach-uniphier/memconf.c @@ -15,7 +15,7 @@ #include "init.h" static int __uniphier_memconf_init(const struct uniphier_board_data *bd, - int have_ch2, int have_ch2_disable_bit) + int have_ch2) { u32 val = 0; unsigned long size_per_word; @@ -100,8 +100,7 @@ static int __uniphier_memconf_init(const struct uniphier_board_data *bd, goto out; if (!bd->dram_ch[2].size) { - if (have_ch2_disable_bit) - val |= SG_MEMCONF_CH2_DISABLE; + val |= SG_MEMCONF_CH2_DISABLE; goto out; } @@ -149,15 +148,10 @@ out: int uniphier_memconf_2ch_init(const struct uniphier_board_data *bd) { - return __uniphier_memconf_init(bd, 0, 0); -} - -int uniphier_memconf_3ch_no_disbit_init(const struct uniphier_board_data *bd) -{ - return __uniphier_memconf_init(bd, 1, 0); + return __uniphier_memconf_init(bd, 0); } int uniphier_memconf_3ch_init(const struct uniphier_board_data *bd) { - return __uniphier_memconf_init(bd, 1, 1); + return __uniphier_memconf_init(bd, 1); } diff --git a/arch/arm/mach-uniphier/mmc-boot-mode.c b/arch/arm/mach-uniphier/mmc-boot-mode.c index d60c578ce7fe..f40534eebb9f 100644 --- a/arch/arm/mach-uniphier/mmc-boot-mode.c +++ b/arch/arm/mach-uniphier/mmc-boot-mode.c @@ -14,7 +14,7 @@ u32 spl_boot_mode(const u32 boot_device) struct mmc *mmc; /* - * work around a bug in the Boot ROM of PH1-sLD3, LD4, Pro4, and sLD8: + * work around a bug in the Boot ROM of LD4, Pro4, and sLD8: * * The boot ROM in these SoCs breaks the PARTITION_CONFIG [179] of * Extended CSD register; when switching to the Boot Partition 1, the diff --git a/arch/arm/mach-uniphier/sc-regs.h b/arch/arm/mach-uniphier/sc-regs.h index ad58e10e23d0..54bbe43ebbad 100644 --- a/arch/arm/mach-uniphier/sc-regs.h +++ b/arch/arm/mach-uniphier/sc-regs.h @@ -11,11 +11,7 @@ #ifndef ARCH_SC_REGS_H #define ARCH_SC_REGS_H -#if defined(CONFIG_ARCH_UNIPHIER_SLD3) -#define SC_BASE_ADDR 0xf1840000 -#else #define SC_BASE_ADDR 0x61840000 -#endif #define SC_DPLLOSCCTRL (SC_BASE_ADDR | 0x1110) #define SC_DPLLOSCCTRL_DPLLST (0x1 << 1) diff --git a/arch/arm/mach-uniphier/soc-info.h b/arch/arm/mach-uniphier/soc-info.h index 04732527a75e..9ba6a7ed6934 100644 --- a/arch/arm/mach-uniphier/soc-info.h +++ b/arch/arm/mach-uniphier/soc-info.h @@ -11,7 +11,6 @@ #include <linux/kernel.h> #include <linux/stddef.h> -#define UNIPHIER_SLD3_ID 0x25 #define UNIPHIER_LD4_ID 0x26 #define UNIPHIER_PRO4_ID 0x28 #define UNIPHIER_SLD8_ID 0x29 diff --git a/arch/arm/mach-uniphier/spl_board_init.c b/arch/arm/mach-uniphier/spl_board_init.c index 6da5631bcace..1272b4e25c08 100644 --- a/arch/arm/mach-uniphier/spl_board_init.c +++ b/arch/arm/mach-uniphier/spl_board_init.c @@ -24,35 +24,24 @@ struct uniphier_spl_initdata { }; static const struct uniphier_spl_initdata uniphier_spl_initdata[] = { -#if defined(CONFIG_ARCH_UNIPHIER_SLD3) - { - .soc_id = UNIPHIER_SLD3_ID, - .bcu_init = uniphier_sld3_bcu_init, - .early_clk_init = uniphier_sld3_early_clk_init, - .dpll_init = uniphier_sld3_dpll_init, - .memconf_init = uniphier_memconf_3ch_no_disbit_init, - .dram_clk_init = uniphier_sld3_dram_clk_init, - .umc_init = uniphier_sld3_umc_init, - }, -#endif #if defined(CONFIG_ARCH_UNIPHIER_LD4) { .soc_id = UNIPHIER_LD4_ID, .bcu_init = uniphier_ld4_bcu_init, - .early_clk_init = uniphier_sld3_early_clk_init, + .early_clk_init = uniphier_ld4_early_clk_init, .dpll_init = uniphier_ld4_dpll_init, .memconf_init = uniphier_memconf_2ch_init, - .dram_clk_init = uniphier_sld3_dram_clk_init, + .dram_clk_init = uniphier_ld4_dram_clk_init, .umc_init = uniphier_ld4_umc_init, }, #endif #if defined(CONFIG_ARCH_UNIPHIER_PRO4) { .soc_id = UNIPHIER_PRO4_ID, - .early_clk_init = uniphier_sld3_early_clk_init, + .early_clk_init = uniphier_ld4_early_clk_init, .dpll_init = uniphier_pro4_dpll_init, .memconf_init = uniphier_memconf_2ch_init, - .dram_clk_init = uniphier_sld3_dram_clk_init, + .dram_clk_init = uniphier_ld4_dram_clk_init, .umc_init = uniphier_pro4_umc_init, }, #endif @@ -60,17 +49,17 @@ static const struct uniphier_spl_initdata uniphier_spl_initdata[] = { { .soc_id = UNIPHIER_SLD8_ID, .bcu_init = uniphier_ld4_bcu_init, - .early_clk_init = uniphier_sld3_early_clk_init, + .early_clk_init = uniphier_ld4_early_clk_init, .dpll_init = uniphier_sld8_dpll_init, .memconf_init = uniphier_memconf_2ch_init, - .dram_clk_init = uniphier_sld3_dram_clk_init, + .dram_clk_init = uniphier_ld4_dram_clk_init, .umc_init = uniphier_sld8_umc_init, }, #endif #if defined(CONFIG_ARCH_UNIPHIER_PRO5) { .soc_id = UNIPHIER_PRO5_ID, - .early_clk_init = uniphier_sld3_early_clk_init, + .early_clk_init = uniphier_ld4_early_clk_init, .dpll_init = uniphier_pro5_dpll_init, .memconf_init = uniphier_memconf_2ch_init, .dram_clk_init = uniphier_pro5_dram_clk_init, @@ -80,7 +69,7 @@ static const struct uniphier_spl_initdata uniphier_spl_initdata[] = { #if defined(CONFIG_ARCH_UNIPHIER_PXS2) { .soc_id = UNIPHIER_PXS2_ID, - .early_clk_init = uniphier_sld3_early_clk_init, + .early_clk_init = uniphier_ld4_early_clk_init, .dpll_init = uniphier_pxs2_dpll_init, .memconf_init = uniphier_memconf_3ch_init, .dram_clk_init = uniphier_pxs2_dram_clk_init, @@ -90,7 +79,7 @@ static const struct uniphier_spl_initdata uniphier_spl_initdata[] = { #if defined(CONFIG_ARCH_UNIPHIER_LD6B) { .soc_id = UNIPHIER_LD6B_ID, - .early_clk_init = uniphier_sld3_early_clk_init, + .early_clk_init = uniphier_ld4_early_clk_init, .dpll_init = uniphier_pxs2_dpll_init, .memconf_init = uniphier_memconf_3ch_init, .dram_clk_init = uniphier_pxs2_dram_clk_init, diff --git a/configs/uniphier_sld3_defconfig b/configs/uniphier_sld3_defconfig deleted file mode 100644 index 6340b6a40dc2..000000000000 --- a/configs/uniphier_sld3_defconfig +++ /dev/null @@ -1,46 +0,0 @@ -CONFIG_ARM=y -CONFIG_ARCH_UNIPHIER=y -CONFIG_SYS_TEXT_BASE=0x84000000 -CONFIG_SYS_MALLOC_F_LEN=0x2000 -CONFIG_SPL_MMC_SUPPORT=y -CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y -CONFIG_ARCH_UNIPHIER_SLD3=y -CONFIG_MICRO_SUPPORT_CARD=y -CONFIG_DEFAULT_DEVICE_TREE="uniphier-sld3-ref" -# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set -CONFIG_SPL=y -CONFIG_SPL_NOR_SUPPORT=y -CONFIG_HUSH_PARSER=y -CONFIG_CMD_CONFIG=y -CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_XIMG is not set -# CONFIG_CMD_ENV_EXISTS is not set -CONFIG_CMD_GPT=y -CONFIG_CMD_MMC=y -CONFIG_CMD_I2C=y -CONFIG_CMD_USB=y -# CONFIG_CMD_FPGA is not set -CONFIG_CMD_GPIO=y -CONFIG_CMD_TFTPPUT=y -CONFIG_CMD_PING=y -CONFIG_CMD_CACHE=y -CONFIG_CMD_TIME=y -# CONFIG_CMD_MISC is not set -CONFIG_CMD_FAT=y -CONFIG_CMD_FS_GENERIC=y -# CONFIG_SPL_DOS_PARTITION is not set -# CONFIG_SPL_EFI_PARTITION is not set -CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_GPIO_UNIPHIER=y -CONFIG_MISC=y -CONFIG_I2C_EEPROM=y -CONFIG_MMC_UNIPHIER=y -CONFIG_NAND_DENALI=y -CONFIG_SYS_NAND_DENALI_64BIT=y -CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8 -CONFIG_SPL_NAND_DENALI=y -CONFIG_USB=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_EHCI_GENERIC=y -CONFIG_USB_STORAGE=y diff --git a/doc/README.uniphier b/doc/README.uniphier index f21c9d09ce3e..fa1f9bcc9667 100644 --- a/doc/README.uniphier +++ b/doc/README.uniphier @@ -29,7 +29,6 @@ The following tables show <defconfig> and <device-tree> for each board. Board | <defconfig> | <device-tree> ---------------|------------------------------|------------------------------ -sLD3 reference | uniphier_sld3_defconfig | uniphier-sld3-ref (default) LD4 reference | uniphier_ld4_sld8_defconfig | uniphier-ld4-ref (default) sld8 reference | uniphier_ld4_sld8_defconfig | uniphier-sld8-def Pro4 reference | uniphier_pro4_defconfig | uniphier-pro4-ref (default) diff --git a/drivers/clk/uniphier/clk-uniphier-core.c b/drivers/clk/uniphier/clk-uniphier-core.c index 0fb48541b9b7..eed21b9a6871 100644 --- a/drivers/clk/uniphier/clk-uniphier-core.c +++ b/drivers/clk/uniphier/clk-uniphier-core.c @@ -147,10 +147,6 @@ static int uniphier_clk_probe(struct udevice *dev) static const struct udevice_id uniphier_clk_match[] = { { - .compatible = "socionext,uniphier-sld3-mio-clock", - .data = (ulong)&uniphier_mio_clk_data, - }, - { .compatible = "socionext,uniphier-ld4-mio-clock", .data = (ulong)&uniphier_mio_clk_data, }, diff --git a/drivers/clk/uniphier/clk-uniphier-mio.c b/drivers/clk/uniphier/clk-uniphier-mio.c index 18e685670925..9c13dcd55518 100644 --- a/drivers/clk/uniphier/clk-uniphier-mio.c +++ b/drivers/clk/uniphier/clk-uniphier-mio.c @@ -64,11 +64,9 @@ static const struct uniphier_clk_gate_data uniphier_mio_clk_gate[] = { UNIPHIER_MIO_CLK_USB2(8, 0), UNIPHIER_MIO_CLK_USB2(9, 1), UNIPHIER_MIO_CLK_USB2(10, 2), - UNIPHIER_MIO_CLK_USB2(11, 3), /* for PH1-sLD3 only */ UNIPHIER_MIO_CLK_USB2_PHY(12, 0), UNIPHIER_MIO_CLK_USB2_PHY(13, 1), UNIPHIER_MIO_CLK_USB2_PHY(14, 2), - UNIPHIER_MIO_CLK_USB2_PHY(15, 3), /* for PH1-sLD3 only */ UNIPHIER_CLK_END }; diff --git a/drivers/pinctrl/uniphier/Kconfig b/drivers/pinctrl/uniphier/Kconfig index a6e51caba5f5..b6abcd12ff3d 100644 --- a/drivers/pinctrl/uniphier/Kconfig +++ b/drivers/pinctrl/uniphier/Kconfig @@ -3,12 +3,6 @@ if ARCH_UNIPHIER config PINCTRL_UNIPHIER bool -config PINCTRL_UNIPHIER_SLD3 - bool "UniPhier sLD3 SoC pinctrl driver" - depends on ARCH_UNIPHIER_SLD3 - default y - select PINCTRL_UNIPHIER - config PINCTRL_UNIPHIER_LD4 bool "UniPhier LD4 SoC pinctrl driver" depends on ARCH_UNIPHIER_LD4 diff --git a/drivers/pinctrl/uniphier/Makefile b/drivers/pinctrl/uniphier/Makefile index b805765ed1ce..215104b61b49 100644 --- a/drivers/pinctrl/uniphier/Makefile +++ b/drivers/pinctrl/uniphier/Makefile @@ -4,7 +4,6 @@ obj-y += pinctrl-uniphier-core.o -obj-$(CONFIG_PINCTRL_UNIPHIER_SLD3) += pinctrl-uniphier-sld3.o obj-$(CONFIG_PINCTRL_UNIPHIER_LD4) += pinctrl-uniphier-ld4.o obj-$(CONFIG_PINCTRL_UNIPHIER_PRO4) += pinctrl-uniphier-pro4.o obj-$(CONFIG_PINCTRL_UNIPHIER_SLD8) += pinctrl-uniphier-sld8.o diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c deleted file mode 100644 index e9cc9d205d83..000000000000 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c +++ /dev/null @@ -1,129 +0,0 @@ -/* - * Copyright (C) 2016 Socionext Inc. - * Author: Masahiro Yamada <yamada.masahiro(a)socionext.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <dm.h> -#include <dm/pinctrl.h> - -#include "pinctrl-uniphier.h" - -static const unsigned emmc_pins[] = {55, 56, 60}; -static const int emmc_muxvals[] = {1, 1, 1}; -static const unsigned emmc_dat8_pins[] = {57}; -static const int emmc_dat8_muxvals[] = {1}; -static const unsigned ether_mii_pins[] = {35, 107, 108, 109, 110, 111, 112, - 113}; -static const int ether_mii_muxvals[] = {1, 2, 2, 2, 2, 2, 2, 2}; -static const unsigned ether_rmii_pins[] = {35}; -static const int ether_rmii_muxvals[] = {1}; -static const unsigned i2c0_pins[] = {36}; -static const int i2c0_muxvals[] = {0}; -static const unsigned nand_pins[] = {38, 39, 40, 58, 59}; -static const int nand_muxvals[] = {1, 1, 1, 1, 1}; -static const unsigned nand_cs1_pins[] = {41}; -static const int nand_cs1_muxvals[] = {1}; -static const unsigned sd_pins[] = {42, 43, 44, 45}; -static const int sd_muxvals[] = {1, 1, 1, 1}; -static const unsigned system_bus_pins[] = {46, 50, 51, 53, 54, 73, 74, 75, 76, - 77, 78, 79, 80, 88, 89, 91, 92, 99}; -static const int system_bus_muxvals[] = {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1}; -static const unsigned system_bus_cs0_pins[] = {93}; -static const int system_bus_cs0_muxvals[] = {1}; -static const unsigned system_bus_cs1_pins[] = {94}; -static const int system_bus_cs1_muxvals[] = {1}; -static const unsigned system_bus_cs2_pins[] = {95}; -static const int system_bus_cs2_muxvals[] = {1}; -static const unsigned system_bus_cs3_pins[] = {96}; -static const int system_bus_cs3_muxvals[] = {1}; -static const unsigned system_bus_cs4_pins[] = {81}; -static const int system_bus_cs4_muxvals[] = {1}; -static const unsigned system_bus_cs5_pins[] = {82}; -static const int system_bus_cs5_muxvals[] = {1}; -static const unsigned uart0_pins[] = {63, 64}; -static const int uart0_muxvals[] = {0, 1}; -static const unsigned uart1_pins[] = {65, 66}; -static const int uart1_muxvals[] = {0, 1}; -static const unsigned uart2_pins[] = {96, 102}; -static const int uart2_muxvals[] = {2, 2}; -static const unsigned usb0_pins[] = {13, 14}; -static const int usb0_muxvals[] = {0, 1}; -static const unsigned usb1_pins[] = {15, 16}; -static const int usb1_muxvals[] = {0, 1}; -static const unsigned usb2_pins[] = {17, 18}; -static const int usb2_muxvals[] = {0, 1}; -static const unsigned usb3_pins[] = {19, 20}; -static const int usb3_muxvals[] = {0, 1}; - -static const struct uniphier_pinctrl_group uniphier_sld3_groups[] = { - UNIPHIER_PINCTRL_GROUP_SPL(emmc), - UNIPHIER_PINCTRL_GROUP_SPL(emmc_dat8), - UNIPHIER_PINCTRL_GROUP(ether_mii), - UNIPHIER_PINCTRL_GROUP(ether_rmii), - UNIPHIER_PINCTRL_GROUP(i2c0), - UNIPHIER_PINCTRL_GROUP(nand), - UNIPHIER_PINCTRL_GROUP(nand_cs1), - UNIPHIER_PINCTRL_GROUP(sd), - UNIPHIER_PINCTRL_GROUP(system_bus), - UNIPHIER_PINCTRL_GROUP(system_bus_cs0), - UNIPHIER_PINCTRL_GROUP(system_bus_cs1), - UNIPHIER_PINCTRL_GROUP(system_bus_cs2), - UNIPHIER_PINCTRL_GROUP(system_bus_cs3), - UNIPHIER_PINCTRL_GROUP(system_bus_cs4), - UNIPHIER_PINCTRL_GROUP(system_bus_cs5), - UNIPHIER_PINCTRL_GROUP_SPL(uart0), - UNIPHIER_PINCTRL_GROUP_SPL(uart1), - UNIPHIER_PINCTRL_GROUP_SPL(uart2), - UNIPHIER_PINCTRL_GROUP(usb0), - UNIPHIER_PINCTRL_GROUP(usb1), - UNIPHIER_PINCTRL_GROUP(usb2), - UNIPHIER_PINCTRL_GROUP(usb3) -}; - -static const char * const uniphier_sld3_functions[] = { - UNIPHIER_PINMUX_FUNCTION_SPL(emmc), - UNIPHIER_PINMUX_FUNCTION(ether_mii), - UNIPHIER_PINMUX_FUNCTION(ether_rmii), - UNIPHIER_PINMUX_FUNCTION(i2c0), - UNIPHIER_PINMUX_FUNCTION(nand), - UNIPHIER_PINMUX_FUNCTION(sd), - UNIPHIER_PINMUX_FUNCTION(system_bus), - UNIPHIER_PINMUX_FUNCTION_SPL(uart0), - UNIPHIER_PINMUX_FUNCTION_SPL(uart1), - UNIPHIER_PINMUX_FUNCTION_SPL(uart2), - UNIPHIER_PINMUX_FUNCTION(usb0), - UNIPHIER_PINMUX_FUNCTION(usb1), - UNIPHIER_PINMUX_FUNCTION(usb2), - UNIPHIER_PINMUX_FUNCTION(usb3), -}; - -static struct uniphier_pinctrl_socdata uniphier_sld3_pinctrl_socdata = { - .groups = uniphier_sld3_groups, - .groups_count = ARRAY_SIZE(uniphier_sld3_groups), - .functions = uniphier_sld3_functions, - .functions_count = ARRAY_SIZE(uniphier_sld3_functions), - .caps = UNIPHIER_PINCTRL_CAPS_MUX_4BIT, -}; - -static int uniphier_sld3_pinctrl_probe(struct udevice *dev) -{ - return uniphier_pinctrl_probe(dev, &uniphier_sld3_pinctrl_socdata); -} - -static const struct udevice_id uniphier_sld3_pinctrl_match[] = { - { .compatible = "socionext,uniphier-sld3-pinctrl" }, - { /* sentinel */ } -}; - -U_BOOT_DRIVER(uniphier_sld3_pinctrl) = { - .name = "uniphier-sld3-pinctrl", - .id = UCLASS_PINCTRL, - .of_match = of_match_ptr(uniphier_sld3_pinctrl_match), - .probe = uniphier_sld3_pinctrl_probe, - .priv_auto_alloc_size = sizeof(struct uniphier_pinctrl_priv), - .ops = &uniphier_pinctrl_ops, -}; diff --git a/drivers/reset/reset-uniphier.c b/drivers/reset/reset-uniphier.c index 17e971a427f9..df7fa267d13c 100644 --- a/drivers/reset/reset-uniphier.c +++ b/drivers/reset/reset-uniphier.c @@ -56,7 +56,7 @@ struct uniphier_reset_data { #define UNIPHIER_PRO4_SYS_RESET_USB3(id, ch) \ UNIPHIER_RESETX((id), 0x2000 + 0x4 * (ch), 17) -static const struct uniphier_reset_data uniphier_sld3_sys_reset_data[] = { +static const struct uniphier_reset_data uniphier_ld4_sys_reset_data[] = { UNIPHIER_SLD3_SYS_RESET_STDMAC(8), /* Ether, HSC, MIO */ UNIPHIER_RESET_END, }; @@ -270,12 +270,8 @@ static int uniphier_reset_probe(struct udevice *dev) static const struct udevice_id uniphier_reset_match[] = { /* System reset */ { - .compatible = "socionext,uniphier-sld3-reset", - .data = (ulong)uniphier_sld3_sys_reset_data, - }, - { .compatible = "socionext,uniphier-ld4-reset", - .data = (ulong)uniphier_sld3_sys_reset_data, + .data = (ulong)uniphier_ld4_sys_reset_data, }, { .compatible = "socionext,uniphier-pro4-reset", @@ -283,7 +279,7 @@ static const struct udevice_id uniphier_reset_match[] = { }, { .compatible = "socionext,uniphier-sld8-reset", - .data = (ulong)uniphier_sld3_sys_reset_data, + .data = (ulong)uniphier_ld4_sys_reset_data, }, { .compatible = "socionext,uniphier-pro5-reset", @@ -303,10 +299,6 @@ static const struct udevice_id uniphier_reset_match[] = { }, /* Media I/O reset */ { - .compatible = "socionext,uniphier-sld3-mio-clock", - .data = (ulong)uniphier_mio_reset_data, - }, - { .compatible = "socionext,uniphier-ld4-mio-reset", .data = (ulong)uniphier_mio_reset_data, }, diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index 6f5313931ab9..9a64063c3ee6 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -88,13 +88,8 @@ #define CONFIG_NAND_DENALI_ECC_SIZE 1024 -#ifdef CONFIG_ARCH_UNIPHIER_SLD3 -#define CONFIG_SYS_NAND_REGS_BASE 0xf8100000 -#define CONFIG_SYS_NAND_DATA_BASE 0xf8000000 -#else #define CONFIG_SYS_NAND_REGS_BASE 0x68100000 #define CONFIG_SYS_NAND_DATA_BASE 0x68000000 -#endif #define CONFIG_SYS_NAND_BASE (CONFIG_SYS_NAND_DATA_BASE + 0x10) @@ -249,8 +244,7 @@ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE) /* only for SPL */ -#if defined(CONFIG_ARCH_UNIPHIER_SLD3) || \ - defined(CONFIG_ARCH_UNIPHIER_LD4) || \ +#if defined(CONFIG_ARCH_UNIPHIER_LD4) || \ defined(CONFIG_ARCH_UNIPHIER_SLD8) #define CONFIG_SPL_TEXT_BASE 0x00040000 #else -- 2.7.4

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[U-Boot] [PATCH] sun7i: a20: Add Bananapi M1 Plus support
by Jagan Teki 20 Aug '17

20 Aug '17

From: Jagan Teki <jagan(a)amarulasolutions.com> Banana Pi M1 Plus is an open-source single-board computer that adds more connectivity to the classic board using Allwinner A20 SOC. Bananapi M1-Plus features: - A20 Dual-core 1.0GHz - 1 GB DDR3 SDRAM - MicroSD - 10/100/1000 Ethernet RJ45 - WiFi b/g/n - 5V DC Micro USB power-supply For dts file, Sync with Linux commit f92ca09("Merge branch 'akpm/master'"). Signed-off-by: Jagan Teki <jagan(a)amarulasolutions.com> --- arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts | 91 +++++++++++++++++++++-------- board/sunxi/MAINTAINERS | 5 ++ configs/bananapi_m1_plus_defconfig | 24 ++++++++ 3 files changed, 97 insertions(+), 23 deletions(-) create mode 100644 configs/bananapi_m1_plus_defconfig diff --git a/arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts b/arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts index ba5bca0..4c03cc3 100644 --- a/arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts +++ b/arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts @@ -105,6 +105,10 @@ status = "okay"; }; +&cpu0 { + cpu-supply = <&reg_dcdc2>; +}; + &ehci0 { status = "okay"; }; @@ -132,16 +136,14 @@ status = "okay"; axp209: pmic@34 { - compatible = "x-powers,axp209"; reg = <0x34>; interrupt-parent = <&nmi_intc>; interrupts = <0 IRQ_TYPE_LEVEL_LOW>; - - interrupt-controller; - #interrupt-cells = <1>; }; }; +#include "axp209.dtsi" + &ir0 { pinctrl-names = "default"; pinctrl-0 = <&ir0_rx_pins_a>; @@ -167,10 +169,10 @@ mmc-pwrseq = <&mmc3_pwrseq>; bus-width = <4>; non-removable; - enable-sdio-wakeup; + wakeup-source; status = "okay"; - brcmf: bcrmf@1 { + brcmf: wifi@1 { reg = <1>; compatible = "brcm,bcm4329-fmac"; interrupt-parent = <&pio>; @@ -181,7 +183,7 @@ &mmc3_pins_a { /* AP6210 requires pull-up */ - allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; + bias-pull-up; }; &ohci0 { @@ -192,38 +194,81 @@ status = "okay"; }; +&otg_sram { + status = "okay"; +}; + &pio { gmac_power_pin_bpi_m1p: gmac_power_pin@0 { - allwinner,pins = "PH23"; - allwinner,function = "gpio_out"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + pins = "PH23"; + function = "gpio_out"; }; led_pins_bpi_m1p: led_pins@0 { - allwinner,pins = "PH24", "PH25"; - allwinner,function = "gpio_out"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + pins = "PH24", "PH25"; + function = "gpio_out"; }; mmc0_cd_pin_bpi_m1p: mmc0_cd_pin@0 { - allwinner,pins = "PH10"; - allwinner,function = "gpio_in"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; + pins = "PH10"; + function = "gpio_in"; + bias-pull-up; }; mmc3_pwrseq_pin_bpi_m1p: mmc3_pwrseq_pin@0 { - allwinner,pins = "PH22"; - allwinner,function = "gpio_out"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + pins = "PH22"; + function = "gpio_out"; }; }; +&reg_dcdc2 { + regulator-always-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-cpu"; +}; + +&reg_dcdc3 { + regulator-always-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-int-dll"; +}; + +&reg_ldo1 { + regulator-name = "vdd-rtc"; +}; + +&reg_ldo2 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "avcc"; +}; + +&reg_usb0_vbus { + status = "okay"; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pins_a>; status = "okay"; }; + +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + +&usb_power_supply { + status = "okay"; +}; + +&usbphy { + usb0_id_det-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ + usb0_vbus_power-supply = <&usb_power_supply>; + usb0_vbus-supply = <&reg_usb0_vbus>; + /* VBUS on usb host ports are tied to DC5V and therefore always on */ + status = "okay"; +}; diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index ff6eea2..26c452e 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -118,6 +118,11 @@ M: Paul Kocialkowski <contact(a)paulk.fr> S: Maintained F: configs/Ampe_A76_defconfig +BANANAPI M1 PLUS +M: Jagan Teki <jagan(a)amarulasolutions.com> +S: Maintained +F: configs/bananapi_m1_plus_defconfig + BANANAPI M2 ULTRA BOARD M: Chen-Yu Tsai <wens(a)csie.org> S: Maintained diff --git a/configs/bananapi_m1_plus_defconfig b/configs/bananapi_m1_plus_defconfig new file mode 100644 index 0000000..dc4c82f --- /dev/null +++ b/configs/bananapi_m1_plus_defconfig @@ -0,0 +1,24 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_MACH_SUN7I=y +CONFIG_DRAM_CLK=432 +CONFIG_MACPWR="PH23" +CONFIG_VIDEO_COMPOSITE=y +CONFIG_GMAC_TX_DELAY=3 +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-bananapi-m1-plus" +CONFIG_AHCI=y +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL=y +CONFIG_SPL_I2C_SUPPORT=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_ISO_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_NETCONSOLE=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_RGMII=y +CONFIG_SUN7I_GMAC=y +CONFIG_SCSI=y +CONFIG_USB_EHCI_HCD=y -- 2.7.4

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[U-Boot] REGRESSION: After rc2 Edison is not capable to get environment
by Andy Shevchenko 20 Aug '17

20 Aug '17

Hi! Do not have time to find a culprit (pretty sure it's env patch series from Simon). v2017-09.rc2: --- 8< --- 8< --- Hit any key to stop autoboot: 0 => => printenv audio_codec_name=audio_codec="dummy" boot_edsboot=zboot 0x100000 0 0x3000000 0x1000000 boot_target_cmd=run do_flash_os;run do_probe_dfu;run do_compute_target;run mmc-bootargs;run load_kernel;zboot ${lo adaddr} ... (Many, many lines) --- 8< --- 8< --- Current master: --- 8< --- 8< --- => printenv baudrate=115200 bootcmd=run bootcmd bootdelay=2 fdtcontroladdr=3d4536d0 hardware_id=00 serial#=4ae71336e44bf9bf79d2752e234818a5 usb0addr=02:00:86:48:18:a5 Environment size: 170/65531 bytes --- 8< --- 8< --- -- With Best Regards, Andy Shevchenko

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[U-Boot] Please pull u-boot-video/master
by Anatolij Gustschin 20 Aug '17

20 Aug '17

Hi Tom, The following changes since commit 5619295995e3262bb5770e8b5e945ffdc5442145: Merge tag 'signed-efi-next' of git://github.com/agraf/u-boot (2017-08-18 18:24:58 -0400) are available in the git repository at: git://git.denx.de/u-boot-video.git master for you to fetch changes up to 021414a33248f9c1f6eb4a676f4a1fbcfa26f475: lcd: avoid possible NULL dereference (2017-08-19 20:42:20 +0200) ---------------------------------------------------------------- xypron.glpk(a)gmx.de (1): lcd: avoid possible NULL dereference common/lcd.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) Please pull. Thanks! Anatolij

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[U-Boot] [PATCH v2 0/7] spl: add xip booting support
by Vikas Manocha 19 Aug '17

19 Aug '17

This patchset adds support for XIP (execute in place) of U-Boot or kernel image and enables it for stm32f7. Changed in v2: - added patch to move v7m thumb mode just before next image boot - removed extra blank line. Vikas Manocha (7): spl: armv7m: to keep ARM v7M in thumb mode before booting next image stm32f7: remove duplicate configs stm32: stm32f7: add spl build support SPL: Add XIP booting support serial: stm32f7: disable overrun spl: stm32f7: add kernel boot support spl: stm32f7: configure for xip booting arch/arm/include/asm/spl.h | 1 + arch/arm/mach-stm32/Kconfig | 1 + arch/arm/mach-stm32/stm32f7/Kconfig | 24 ++++++++++++++++++++ board/st/stm32f746-disco/stm32f746-disco.c | 36 +++++++++++++++++++++++++++++- common/spl/Kconfig | 9 ++++++++ common/spl/Makefile | 1 + common/spl/spl.c | 6 ++--- common/spl/spl_xip.c | 28 +++++++++++++++++++++++ configs/stm32f746-disco_defconfig | 5 ----- drivers/serial/serial_stm32x7.c | 3 +++ drivers/serial/serial_stm32x7.h | 2 ++ include/configs/stm32f746-disco.h | 31 ++++++++++++++++++++++--- 12 files changed, 135 insertions(+), 12 deletions(-) create mode 100644 common/spl/spl_xip.c -- 1.9.1

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[U-Boot] [PULL 0/6] efi patch queue 2017-08-18
by Alexander Graf 19 Aug '17

19 Aug '17

Hi Tom, This is my current patch queue for efi. Please pull. Alex The following changes since commit b24065c4ef21687787a74eef22dfa9232096f965: Merge git://git.denx.de/u-boot-i2c (2017-08-10 07:22:59 -0400) are available in the git repository at: git://github.com/agraf/u-boot.git tags/signed-efi-next for you to fetch changes up to c81883dfce7360148c72922b93bfa16b399ee3ee: efi_loader: do not cast return value in EFI_EXIT (2017-08-18 10:53:23 +0200) ---------------------------------------------------------------- EFI Fixes for 2017.09: - Fix GOP w/o display - Fix LocateHandle - Fix exit return value truncation - Fix missing EFIAPI in efi_locate_handle (for x86) ---------------------------------------------------------------- Rob Clark (2): efi_loader: LocateHandle should return EFI_NOT_FOUND if none found efi_loader: GOP fix for no display xypron.glpk(a)gmx.de (4): efi_loader: attribute EFIAPI of efi_locate handle() efi_loader: use EFI_PAGE_MASK instead of EFI_PAGE_SIZE - 1 efi_loader: use EFI_PAGE_SIZE instead of 4096 efi_loader: do not cast return value in EFI_EXIT cmd/bootefi.c | 4 ++-- include/efi_loader.h | 4 ++-- lib/efi_loader/efi_boottime.c | 7 +++++-- lib/efi_loader/efi_gop.c | 2 +- lib/efi_loader/efi_runtime.c | 2 +- 5 files changed, 11 insertions(+), 8 deletions(-)

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[U-Boot] [GIT PULL V2] Please pull u-boot-mmc master
by Jaehoon Chung 19 Aug '17

19 Aug '17

Dear Tom, Could you pull these patches to u-boot/master? Sorry for late about reviewing patches. Because of my late reviewing, some guys can't keep going their progress. I had tested the buildman about all..As i see, there is no issue. If there is any issue, let me know, plz. Changelog on V2: Drop the Jean-Jacques's patch. The following changes since commit 2d3c4ae350fe8c196698681ab9410733bf9017e0: Prepare v2017.09-rc2 (2017-08-14 20:02:11 -0400) are available in the git repository at: git://git.denx.de/u-boot-mmc.git master for you to fetch changes up to a191ccaf12fb4fadedcd3c76df6327e2bb0f182b: mmc: Support generic PCI SD host controller (2017-08-18 15:37:38 +0900) ---------------------------------------------------------------- Angelo Dureghello (1): cmd: mmc: add mmc partconf read capability Bin Meng (1): mmc: Support generic PCI SD host controller Marek Vasut (4): mmc: uniphier-sd: Fix long response processing mmc: sh_sdhi: Add DM and DT probing support mmc: sh_sdhi: Fix the ACMD handling mmc: sd_sdhi: Enable clock using clock framework Simon Glass (40): dm: core: Avoid calling dm_scan_fdt_dev() with of-platdata dm: blk: Add a function to find an interface-type name dm: blk: Add a generic function for block device commands dm: sata: Adjust the 'sata' command to use blk_common_cmd() dm: scsi: Adjust the 'scsi' command to use blk_common_cmd() dm: ide: Adjust the 'ide' command to use blk_common_cmd() dm: usb: Adjust the 'usb' command to use blk_common_cmd() dm: blk: Update return value in blk_create_devicef() dm: core: Add a comment about the device_remove() flags dm: sata: dwc_ahsata: Make functions static dm: sata: dw_sata: Drop dwc_ahsata_rw_ncq_cmd() dm: sata: dw_sata: Move exported functions to the end dm: sata: dw_sata: Rename 'probe_ent' to uc_priv dm: sata: dw_sata: Drop unnecessary casts dm: sata: dw_sata: Pass uc_priv to internal functions dm: sata: dw_sata: Drop unnecessary brackets dm: sata: dw_sata: Sort #include directives dm: sata: dw_sata: Rename the dwc_ahsata private header dm: sata: dw_sata: Drop is_ready dm: sata: dw_sata: More ahci_init_one() futher down dm: sata: dw_sata: Set up common versions of operations dm: sata: Support driver model with the 'sata' command dm: sata: imx: Allow driver model to be used for sata dm: sata: Update the AHCI uclass to support operations dm: sata: dwc_ahsata: Add support for driver model dm: mmc: fsl_esdhc: Pass private data to internal functions dm: mmc: fsl_esdhc: Set up common versions of operations dm: mmc: fsl_esdhc: Detect reset failure dm: mmc: fsl_esdhc: Detect init failure dm: mmc: fsl_esdhc: Set up platform data dm: mmc: fsl_esdhc: Drop mmc_init() call from fsl_esdhc_init() dm: mmc: fsl_esdhc: Update to support livetree dm: mmc: fsl_esdhc: Update to support MMC operations dm: imx: cm_fx6: Support driver model for SATA dm: imx: cm_fx6: Add device tree for cm_fx6 dm: imx: cm_fx6: Add MMC support for CONFIG_BLK dm: imx: cm_fx6: Enable more driver model support dm: imx: Move i.MX devices to use CONFIG_DM_MMC_OPS dm: mmc: Correct Kconfig condition for SPL_DM_MMC_OPS dm: mmc: Drop CONFIG_DM_MMC_OPS Wenyou.Yang(a)microchip.com (1): mmc: gen_atmel_mci: Fix wrong arguments used of bind() arch/arm/Kconfig | 2 - arch/arm/dts/Makefile | 1 + arch/arm/dts/imx6q-cm-fx6.dts | 115 ++++ arch/arm/mach-imx/cpu.c | 2 +- arch/arm/mach-rmobile/include/mach/sh_sdhi.h | 5 - board/compulab/cm_fx6/cm_fx6.c | 80 +++ cmd/Makefile | 1 + cmd/blk_common.c | 104 ++++ cmd/ide.c | 107 +--- cmd/mmc.c | 38 +- cmd/sata.c | 178 +++--- cmd/scsi.c | 79 +-- cmd/usb.c | 111 +--- common/splash_source.c | 2 +- configs/cm_fx6_defconfig | 8 +- configs/imx6q_logic_defconfig | 1 - configs/imx6qdl_icore_mmc_defconfig | 1 - configs/imx6qdl_icore_rqs_defconfig | 1 - configs/imx6ul_geam_mmc_defconfig | 1 - configs/imx6ul_geam_nand_defconfig | 1 - configs/imx6ul_isiot_emmc_defconfig | 1 - configs/imx6ul_isiot_mmc_defconfig | 1 - configs/imx6ul_isiot_nand_defconfig | 1 - configs/ls1012aqds_qspi_defconfig | 1 - configs/ls1012ardb_qspi_defconfig | 1 - configs/mx6slevk_defconfig | 1 - configs/mx6slevk_spinor_defconfig | 1 - configs/mx6sllevk_defconfig | 1 - configs/mx6sllevk_plugin_defconfig | 1 - configs/mx6sxsabreauto_defconfig | 1 - configs/mx6ull_14x14_evk_defconfig | 1 - configs/mx6ull_14x14_evk_plugin_defconfig | 1 - configs/mx7dsabresd_defconfig | 1 - configs/mx7dsabresd_secure_defconfig | 1 - configs/mx7ulp_evk_defconfig | 1 - configs/mx7ulp_evk_plugin_defconfig | 1 - configs/opos6uldev_defconfig | 1 - drivers/ata/dwc_ahsata.c | 797 +++++++++++++----------- drivers/ata/{dwc_ahsata.h => dwc_ahsata_priv.h} | 6 +- drivers/ata/sata.c | 37 ++ drivers/block/blk-uclass.c | 7 +- drivers/block/blk_legacy.c | 7 + drivers/core/syscon-uclass.c | 3 + drivers/mmc/Kconfig | 40 +- drivers/mmc/dw_mmc.c | 8 +- drivers/mmc/fsl_esdhc.c | 261 +++++--- drivers/mmc/gen_atmel_mci.c | 64 +- drivers/mmc/mmc-uclass.c | 4 - drivers/mmc/mmc.c | 12 +- drivers/mmc/mmc_boot.c | 17 +- drivers/mmc/mmc_legacy.c | 2 +- drivers/mmc/pci_mmc.c | 7 +- drivers/mmc/sdhci.c | 8 +- drivers/mmc/sh_sdhi.c | 283 +++++++-- drivers/mmc/uniphier-sd.c | 14 +- include/ahci.h | 54 ++ include/blk.h | 20 + include/configs/am335x_evm.h | 1 - include/configs/am335x_shc.h | 1 - include/configs/chiliboard.h | 1 - include/configs/omap3_logic.h | 1 - include/dm/device-internal.h | 2 +- include/dwc_ahsata.h | 16 + include/dwmmc.h | 2 +- include/mmc.h | 10 +- include/sata.h | 5 +- include/sdhci.h | 2 +- 67 files changed, 1511 insertions(+), 1036 deletions(-) create mode 100644 arch/arm/dts/imx6q-cm-fx6.dts create mode 100644 cmd/blk_common.c rename drivers/ata/{dwc_ahsata.h => dwc_ahsata_priv.h} (99%) create mode 100644 include/dwc_ahsata.h

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[U-Boot] Pull request: u-boot-coldfire/master
by Angelo Dureghello 19 Aug '17

19 Aug '17

The following changes since commit 336aee50cf55d4d98ddf3a4412c18286e7f0a4c0: Merge git://git.denx.de/u-boot-tegra (2017-08-16 18:12:58 -0400) are available in the git repository at: git://git.denx.de/u-boot-coldfire.git master for you to fetch changes up to a373024e7f70a04b7fed1c11be1fcd50fc21aac2: m68k: add board stmark2, mcf5441x based (2017-08-18 01:26:52 +0200) ---------------------------------------------------------------- Angelo Dureghello (4): m68k: mcf5445x: move early ddr init as board-specific m68k: fix cache.c for Coldfire V4E m68k: mcf5445x: allow CS0 to be undefined m68k: add board stmark2, mcf5441x based arch/m68k/Kconfig | 5 +++ arch/m68k/cpu/mcf5445x/cpu_init.c | 2 + arch/m68k/cpu/mcf5445x/start.S | 184 ++++++------------------------------------------------------------------------ arch/m68k/lib/cache.c | 25 +++++------ board/freescale/m54418twr/Makefile | 2 + board/freescale/m54418twr/sbf_dram_init.S | 86 +++++++++++++++++++++++++++++++++++++ board/freescale/m54451evb/Makefile | 1 + board/freescale/m54451evb/sbf_dram_init.S | 97 +++++++++++++++++++++++++++++++++++++++++ board/freescale/m54455evb/Makefile | 1 + board/freescale/m54455evb/sbf_dram_init.S | 101 +++++++++++++++++++++++++++++++++++++++++++ board/sysam/stmark2/Kconfig | 15 +++++++ board/sysam/stmark2/MAINTAINERS | 6 +++ board/sysam/stmark2/Makefile | 8 ++++ board/sysam/stmark2/sbf_dram_init.S | 119 +++++++++++++++++++++++++++++++++++++++++++++++++++ board/sysam/stmark2/stmark2.c | 47 ++++++++++++++++++++ configs/stmark2_defconfig | 26 +++++++++++ include/configs/M54418TWR.h | 2 + include/configs/M54451EVB.h | 2 + include/configs/M54455EVB.h | 2 + include/configs/stmark2.h | 199 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ scripts/config_whitelist.txt | 1 + 21 files changed, 747 insertions(+), 184 deletions(-) create mode 100644 board/freescale/m54418twr/sbf_dram_init.S create mode 100644 board/freescale/m54451evb/sbf_dram_init.S create mode 100644 board/freescale/m54455evb/sbf_dram_init.S create mode 100644 board/sysam/stmark2/Kconfig create mode 100644 board/sysam/stmark2/MAINTAINERS create mode 100644 board/sysam/stmark2/Makefile create mode 100644 board/sysam/stmark2/sbf_dram_init.S create mode 100644 board/sysam/stmark2/stmark2.c create mode 100644 configs/stmark2_defconfig create mode 100644 include/configs/stmark2.h

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