April 2017 - U-Boot

[U-Boot] [PATCH] ARM: dts: uniphier: move aliases node up to make fdtgrep happy
by Masahiro Yamada 03 Apr '17

03 Apr '17

Currently, fdtgrep would not accept uniphier-ph1-ld20-ref.dtb and uniphier-ph1-ld11-ref.dtb unless the aliases node comes the first in the root node. $ make -s uniphier_pxs2_ld6b_defconfig $ make CROSS_COMPILE=arm-linux-gnueabi- DEVICE_TREE=uniphier-ph1-ld20-ref [snip] LDS spl/u-boot-spl.lds LD spl/u-boot-spl OBJCOPY spl/u-boot-spl-nodtb.bin FDTGREP spl/u-boot-spl.dtb Error at 'fdt_find_regions': FDT_ERR_BADLAYOUT /aliases node must come before all other nodes Error: FDT_ERR_BADMAGIC make[1]: *** [spl/u-boot-spl.dtb] Error 1 make: *** [spl/u-boot-spl] Error 2 This commit moves the aliases node as the error message from the fdtgrep tool suggests, although this requirement does not sound reasonable to me. Signed-off-by: Masahiro Yamada <yamada.masahiro(a)socionext.com> --- Simon, I'd like to avoid this patch if possible. Not figured out the root cause of the problem yet? arch/arm/dts/uniphier-ph1-ld11-ref.dts | 18 +++++++++--------- arch/arm/dts/uniphier-ph1-ld20-ref.dts | 18 +++++++++--------- 2 files changed, 18 insertions(+), 18 deletions(-) diff --git a/arch/arm/dts/uniphier-ph1-ld11-ref.dts b/arch/arm/dts/uniphier-ph1-ld11-ref.dts index a624a49..88e7f53 100644 --- a/arch/arm/dts/uniphier-ph1-ld11-ref.dts +++ b/arch/arm/dts/uniphier-ph1-ld11-ref.dts @@ -14,15 +14,6 @@ model = "UniPhier PH1-LD11 Reference Board"; compatible = "socionext,ph1-ld11-ref", "socionext,ph1-ld11"; - memory { - device_type = "memory"; - reg = <0 0x80000000 0 0x40000000>; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - aliases { serial0 = &serial0; serial1 = &serial1; @@ -35,6 +26,15 @@ i2c4 = &i2c4; i2c5 = &i2c5; }; + + memory { + device_type = "memory"; + reg = <0 0x80000000 0 0x40000000>; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; }; &ethsc { diff --git a/arch/arm/dts/uniphier-ph1-ld20-ref.dts b/arch/arm/dts/uniphier-ph1-ld20-ref.dts index 108adeb..a55d90c 100644 --- a/arch/arm/dts/uniphier-ph1-ld20-ref.dts +++ b/arch/arm/dts/uniphier-ph1-ld20-ref.dts @@ -14,15 +14,6 @@ model = "UniPhier PH1-LD20 Reference Board"; compatible = "socionext,ph1-ld20-ref", "socionext,ph1-ld20"; - memory { - device_type = "memory"; - reg = <0 0x80000000 0 0xc0000000>; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - aliases { serial0 = &serial0; serial1 = &serial1; @@ -35,6 +26,15 @@ i2c4 = &i2c4; i2c5 = &i2c5; }; + + memory { + device_type = "memory"; + reg = <0 0x80000000 0 0xc0000000>; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; }; &ethsc { -- 1.9.1

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[U-Boot] [PATCH v2 00/63] x86: Add initial support for 64-bit U-Boot
by Simon Glass 03 Apr '17

03 Apr '17

At present U-Boot runs entirely in 32-bit mode on x86, except for the initial switch from 16-bit mode. On 64-bit machines it is possible to run in 64-bit mode. This series starts the process of adding this support. The main benefit of 64-bit mode for a boot loader is direct access to all available memory. There are also more registers, but this makes very little difference. This feature is implemented by putting all of the 32-bit code in an SPL build. SPL then runs through all the init that has to be done in 32-bit mode, changes to 64-bit mode and then jumps to U-Boot proper. Typically the total code size increases slightly. For example, on link in 32-bit mode, U-Boot has around 480KB of code (admittedly with a large number of features enabled). In 64-bit mode, U-Boot falls to around 460KB, but SPL adds another 60KB, for a net increase of 40KB. Partly this is due to code duplication and partly it is due to the worse code density of 64-bit code on x86. Many major features are not implemented yet, for example: - SDRAM sizing - Booting linux - FSP support - EFI support - SCSI device init - Running video ROMs Still, this is a big step forward towards full 64-bit support. To enable it, select CONFIG_X86_RUN_64BIT. This series is available at u-boot-x86/64-working Changes in v2: - Show the error value in spl_spi_load_image() - Move table-related changes from a later patch - Rebase to mainline - Drop the write_smbios_table_wrapper() function - Drop change to gma.c - Output error code values in debug() statements - Fix cast in bd82x6x_video_probe() also - Fix cast in get_guid_hob_data() also - Move table-related changes to an earlier patch - Add the 'val' parameter to longjmp() - Drop patch 'video: Use ulong for video frame buffer address' - Add a new 64-bit link config instead of changing the existing one Simon Glass (63): console: Don't enable CONFIG-CONSOLE_MUX, etc. in SPL spl: spi: Add a debug message if loading fails spl: Makefile: Define SPL_ earlier spl: Allow CPU drivers to be used in SPL spl: Allow PCI drivers to be used in SPL spl: Allow RTC drivers to be used in SPL spl: Allow timer drivers to be used in SPL spl: Allow PCH drivers to be used in SPL spl: Don't create a BSS padding when it is separate x86: Use unsigned long for address in table generation WIP: x86: Update mpspec to build on 64-bit machines x86: Add basic support for U-Boot as a 64-bit EFI application x86: ivybridge: Declare global data where it is used x86: ivybridge: Add more debugging for failures x86: ivybridge: Fix types for 64-bit compilation x86: dts: Mark serial as needed before relocation x86: fsp: Fix cast for 64-bit compilation x86: lib: Fix types and casts for 64-bit compilation x86: Add Kconfig options to build 64-bit U-Boot x86: Kconfig: Add location options for 16/32-bit init x86: Use X86_16BIT_INIT instead of X86_RESET_VECTOR x86: Use X86_32BIT_INIT instead of X86_RESET_VECTOR x86: ivybridge: Allow 32-bit init to move to SPL x86: Add 64-bit start-up code x86: board_f: Update init sequence for 64-bit startup x86: board_r: Set the global data pointer after relocation x86: Do relocation before clearing BSS x86: Refactor relocation to prepare for 64-bit x86: Add support for 64-bit relocation x86: Tidy up use of size_t in relocation x86: Add an SPL implementation x86: Move the i386 code into its own directory x86: Add cpu code for x86_64 x86: Support global_data on x86_64 x86: Fix up CONFIG_X86_64 check x86: Add a link script for 64-bit x86 x86: Add a link script for SPL x86: Add SPL build rules for start-up code x86: Fix up byteorder.h for x86_64 x86: Drop flag_is_changable() on x86_64 x86: Fix up type sizes for 64-bit x86: Mention the MRC region in the README x86: ivybridge: Skipt SATA init in SPL x86: ivybridge: Provide a dummy SDRAM init for 64-bit x86: Don't try to run the VGA BIOS in 64-bit mode x86: Don't build call64 and setjmp on 64-bit x86: Don't build cpu files which are not supported on 64-bit x86: Don't build 32-bit efi files on x86_64 x86: Don't try to boot Linux from SPL x86: Drop interrupt support in 64-bit mode x86: Support jumping from SPL to U-Boot x86: Move pirq_routing_table to global_data x86: Move turbo_state to global_data x86: Change irq_already_routed to a local variable x86: Move call64 to the i386 directory x86: Move setjmp to the i386 directory x86: Add a dummy setjmp implementation for x86_64 x86: link: Add a text base for 64-bit U-Boot x86: link: Add SPL declarations to the binman image x86: link: Set up device tree for SPL x86: link: Add build options for SPL x86: Update compile/link flags to support 64-bit U-Boot x86: link: Add a config for 64-bit U-Boot Makefile | 7 +- arch/x86/Kconfig | 85 ++++ arch/x86/Makefile | 9 +- arch/x86/config.mk | 30 +- arch/x86/cpu/Makefile | 24 +- arch/x86/cpu/config.mk | 8 +- arch/x86/cpu/cpu.c | 504 -------------------- arch/x86/cpu/i386/Makefile | 9 + arch/x86/cpu/{ => i386}/call64.S | 3 + arch/x86/cpu/i386/cpu.c | 599 ++++++++++++++++++++++++ arch/x86/cpu/{interrupts.c => i386/interrupt.c} | 6 +- arch/x86/cpu/{ => i386}/setjmp.S | 0 arch/x86/cpu/intel_common/Makefile | 10 +- arch/x86/cpu/irq.c | 14 +- arch/x86/cpu/ivybridge/Makefile | 9 +- arch/x86/cpu/ivybridge/bd82x6x.c | 2 + arch/x86/cpu/ivybridge/cpu.c | 4 +- arch/x86/cpu/ivybridge/lpc.c | 2 + arch/x86/cpu/ivybridge/model_206ax.c | 2 + arch/x86/cpu/ivybridge/northbridge.c | 2 + arch/x86/cpu/ivybridge/sata.c | 4 +- arch/x86/cpu/ivybridge/sdram.c | 37 +- arch/x86/cpu/ivybridge/sdram_nop.c | 29 ++ arch/x86/cpu/start64.S | 39 ++ arch/x86/cpu/turbo.c | 8 +- arch/x86/cpu/u-boot-64.lds | 76 +++ arch/x86/cpu/u-boot-spl.lds | 74 +++ arch/x86/cpu/u-boot.lds | 2 +- arch/x86/cpu/x86_64/Makefile | 6 + arch/x86/cpu/x86_64/cpu.c | 48 ++ arch/x86/cpu/x86_64/interrupts.c | 30 ++ arch/x86/cpu/x86_64/setjmp.c | 20 + arch/x86/dts/chromebook_link.dts | 15 +- arch/x86/dts/serial.dtsi | 1 + arch/x86/dts/u-boot.dtsi | 19 + arch/x86/include/asm/acpi_table.h | 2 +- arch/x86/include/asm/byteorder.h | 17 +- arch/x86/include/asm/cpu.h | 12 + arch/x86/include/asm/fsp/fsp_hob.h | 4 +- arch/x86/include/asm/global_data.h | 8 +- arch/x86/include/asm/mp.h | 3 + arch/x86/include/asm/mpspec.h | 10 +- arch/x86/include/asm/posix_types.h | 5 + arch/x86/include/asm/sfi.h | 2 +- arch/x86/include/asm/spl.h | 8 + arch/x86/include/asm/tables.h | 2 +- arch/x86/include/asm/types.h | 5 + arch/x86/lib/Makefile | 11 + arch/x86/lib/acpi_table.c | 4 +- arch/x86/lib/bios.c | 4 +- arch/x86/lib/bootm.c | 2 + arch/x86/lib/elf_x86_64_efi.lds | 3 + arch/x86/lib/init_helpers.c | 2 +- arch/x86/lib/interrupts.c | 5 + arch/x86/lib/mpspec.c | 14 +- arch/x86/lib/pinctrl_ich6.c | 2 +- arch/x86/lib/pirq_routing.c | 14 +- arch/x86/lib/reloc_x86_64.c | 90 ++++ arch/x86/lib/relocate.c | 102 +++- arch/x86/lib/sfi.c | 6 +- arch/x86/lib/spl.c | 149 ++++++ arch/x86/lib/tables.c | 11 +- arch/x86/lib/zimage.c | 2 +- board/google/Kconfig | 7 + board/google/chromebook_link/Kconfig | 5 +- board/google/chromebook_link/MAINTAINERS | 7 + common/board_f.c | 14 +- common/board_r.c | 5 + common/console.c | 30 +- common/spl/Kconfig | 47 ++ common/spl/spl_spi.c | 5 +- configs/chromebook_link64_defconfig | 94 ++++ configs/chromebook_link_defconfig | 23 +- doc/README.x86 | 1 + drivers/Makefile | 5 + drivers/misc/qfw.c | 4 +- drivers/pci/pci_rom.c | 2 +- drivers/video/ivybridge_igd.c | 6 +- include/configs/chromebook_link.h | 9 + include/smbios.h | 4 +- lib/smbios.c | 22 +- scripts/Makefile.spl | 18 +- 82 files changed, 1871 insertions(+), 673 deletions(-) create mode 100644 arch/x86/cpu/i386/Makefile rename arch/x86/cpu/{ => i386}/call64.S (98%) create mode 100644 arch/x86/cpu/i386/cpu.c rename arch/x86/cpu/{interrupts.c => i386/interrupt.c} (99%) rename arch/x86/cpu/{ => i386}/setjmp.S (100%) create mode 100644 arch/x86/cpu/ivybridge/sdram_nop.c create mode 100644 arch/x86/cpu/start64.S create mode 100644 arch/x86/cpu/u-boot-64.lds create mode 100644 arch/x86/cpu/u-boot-spl.lds create mode 100644 arch/x86/cpu/x86_64/Makefile create mode 100644 arch/x86/cpu/x86_64/cpu.c create mode 100644 arch/x86/cpu/x86_64/interrupts.c create mode 100644 arch/x86/cpu/x86_64/setjmp.c create mode 100644 arch/x86/include/asm/spl.h create mode 100644 arch/x86/lib/reloc_x86_64.c create mode 100644 arch/x86/lib/spl.c create mode 100644 configs/chromebook_link64_defconfig -- 2.8.0.rc3.226.g39d4020

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[U-Boot] u-boot atags help
by Andy Ng 02 Apr '17

02 Apr '17

Hi, I am using u-boot 2016-07 for imx6. My linux kernel is 4.1.20. I am using a board from Freescale SabreSD with the big screen. The problem i noticed is that in the kernel /proc/cpuinfo the "Revision" and Serial " comes up with "0" The kernel gets those values from atags, but when FDT is used it seems that those atags dont get populated the image i produced for the SD card comes from official Freescale release. no changes. It seems to me that "Revision and Serial" are broken. If you run Imx6 latest u-boot/kernel code could you please check your /proc/cpuinfo please? Do you see "zeros" at Revision and Serial? Any advise will be very much appreciated. Thanks Andy

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Re: [U-Boot] [PATCH] rpi: Support both UART interfaces.
by Fabian Vogt 02 Apr '17

02 Apr '17

Hi, Am Sonntag, 2. April 2017, 09:20:06 CEST schrieb Alex Deymo: > The Raspberry Pi 3 has two UART interfaces that can be pinmuxed to the > header pins. The PL011 is by default muxed to the Bluetooth chip and > the mini-UART can be muxed to the pin headers passing "enabled_uart=1" > in the config.txt file. > > Passing "enable_uart=1" has other implications, since the baudrate of > the miniuart depends on the clock frequency of the main core, which > is normally dynamic unless enable_uart=1 is set. > If Bluetooth is not > used or not required, it is possible to set the PL011 UART to the > header pins passing either "dtoverlay=pi3-disable-bt" or > "dtoverlay=pi3-miniuart-bt" to disable Bluetooth or use it via the > miniuart respectively. > > This patch disables (for U-Boot) the UARTs modules not muxed to the > header pins so the serial port is used only if available in the > header pins, avoiding writing to the Bluetooth chip if needed. This > allows to enable the PL01X driver for the Raspberry Pi 3, previously > disabled for that board, which can be used for the U-Boot console if > properly configured in the device tree. > > Note that in order to get the PL01X driver in the Raspberry Pi 3 to > work with U-Boot the device tree must set "skip-init" in the uart0 > block, for example this device tree fragment would do it: > > fragment@0 { > target = <&uart0>; > __overlay__ { > skip-init; > }; > }; This is already done in arch/arm/dts/bcm283x-uboot.dtsi: &uart0 { skip-init; u-boot,dm-pre-reloc; }; &uart1 { skip-init; u-boot,dm-pre-reloc; }; > Test: Booted a rpi3 with either UART output. > Signed-off-by: Alex Deymo <deymo(a)google.com> Acked-by: Fabian Vogt <fvogt(a)suse.com> Cheers, Fabian > --- > board/raspberrypi/rpi/rpi.c | 78 +++++++++++++++++++++++---------- > drivers/serial/serial_pl01x.c | 3 ++ > include/configs/rpi.h | 8 +++- > include/dm/platform_data/serial_pl01x.h | 2 + > 4 files changed, 66 insertions(+), 25 deletions(-) > > diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c > index 2146534b36..58f07953f5 100644 > --- a/board/raspberrypi/rpi/rpi.c > +++ b/board/raspberrypi/rpi/rpi.c > @@ -18,6 +18,7 @@ > #include <asm/arch/mbox.h> > #include <asm/arch/sdhci.h> > #include <asm/global_data.h> > +#include <dm/platform_data/serial_pl01x.h> > #include <dm/platform_data/serial_bcm283x_mu.h> > #ifdef CONFIG_ARM64 > #include <asm/armv8/mmu.h> > @@ -442,8 +443,19 @@ static void get_board_rev(void) > printf("RPI %s (0x%x)\n", model->name, revision); > } > > -#ifndef CONFIG_PL01X_SERIAL > -static bool rpi_is_serial_active(void) > +/* An enum describing the pin muxing selection for the UART RX/TX pins. */ > +enum rpi_uart_mux { > + /* The pin is associated with the internal "miniuart" block. */ > + RPI_UART_BCM283X_MU, > + > + /* The pin is associated with the PL01X uart driver. */ > + RPI_UART_PL01X, > + > + /* The pin is associated with a different function. */ > + RPI_UART_OTHER, > +}; > + > +static enum rpi_uart_mux rpi_get_uart_mux_setting(void) > { > int serial_gpio = 15; > struct udevice *dev; > @@ -452,41 +464,61 @@ static bool rpi_is_serial_active(void) > * The RPi3 disables the mini uart by default. The easiest way to find > * out whether it is available is to check if the RX pin is muxed. > */ > - > if (uclass_first_device(UCLASS_GPIO, &dev) || !dev) > - return true; > - > - if (bcm2835_gpio_get_func_id(dev, serial_gpio) != BCM2835_GPIO_ALT5) > - return false; > + return RPI_UART_OTHER; > > - return true; > + switch (bcm2835_gpio_get_func_id(dev, serial_gpio)) { > + case BCM2835_GPIO_ALT5: > + return RPI_UART_BCM283X_MU; > + case BCM2835_GPIO_ALT0: > + return RPI_UART_PL01X; > + } > + return RPI_UART_OTHER; > } > > -/* Disable mini-UART I/O if it's not pinmuxed to our pins. > - * The firmware only enables it if explicitly done in config.txt: enable_uart=1 > +/* Disable UART I/O for the mini-UART and PL01X UART if they are not pinmuxed to > + * the Raspberry Pi header. The mini-UART is only enabled in the header if > + * explicitly done in config.txt: enable_uart=1, and the PL01X is only enabled > + * if not used for Bluetooth and explicitly exposed in config.txt as either > + * dtoverlay=pi3-disable-bt or dtoverlay=pi3-miniuart-bt. > */ > -static void rpi_disable_inactive_uart(void) > +static void rpi_disable_inactive_uarts(void) > { > struct udevice *dev; > - struct bcm283x_mu_serial_platdata *plat; > + enum rpi_uart_mux mux; > > - if (uclass_get_device_by_driver(UCLASS_SERIAL, > - DM_GET_DRIVER(serial_bcm283x_mu), > - &dev) || !dev) > - return; > + mux = rpi_get_uart_mux_setting(); > + > +#ifdef CONFIG_BCM283X_MU_SERIAL > + struct bcm283x_mu_serial_platdata *bcm283x_mu_plat; > > - if (!rpi_is_serial_active()) { > - plat = dev_get_platdata(dev); > - plat->disabled = true; > + if (mux != RPI_UART_BCM283X_MU && > + !uclass_get_device_by_driver(UCLASS_SERIAL, > + DM_GET_DRIVER(serial_bcm283x_mu), > + &dev) && > + dev) { > + bcm283x_mu_plat = dev_get_platdata(dev); > + bcm283x_mu_plat->disabled = true; > } > +#endif /* CONFIG_BCM283X_MU_SERIAL */ > + > +#ifdef CONFIG_PL01X_SERIAL > + struct pl01x_serial_platdata *pl01x_plat; > + > + if (mux != RPI_UART_PL01X && > + !uclass_get_device_by_driver(UCLASS_SERIAL, > + DM_GET_DRIVER(serial_pl01x), > + &dev) && > + dev) { > + pl01x_plat = dev_get_platdata(dev); > + pl01x_plat->disabled = true; > + } > +#endif /* CONFIG_PL01X_SERIAL */ > } > -#endif > > int board_init(void) > { > -#ifndef CONFIG_PL01X_SERIAL > - rpi_disable_inactive_uart(); > -#endif > + rpi_disable_inactive_uarts(); > > get_board_rev(); > > diff --git a/drivers/serial/serial_pl01x.c b/drivers/serial/serial_pl01x.c > index a49134a95a..7748e7632b 100644 > --- a/drivers/serial/serial_pl01x.c > +++ b/drivers/serial/serial_pl01x.c > @@ -297,6 +297,9 @@ static int pl01x_serial_probe(struct udevice *dev) > struct pl01x_serial_platdata *plat = dev_get_platdata(dev); > struct pl01x_priv *priv = dev_get_priv(dev); > > + if (plat->disabled) > + return -ENODEV; > + > priv->regs = (struct pl01x_regs *)plat->base; > priv->type = plat->type; > if (!plat->skip_init) > diff --git a/include/configs/rpi.h b/include/configs/rpi.h > index 92eb792989..767d5d8e0d 100644 > --- a/include/configs/rpi.h > +++ b/include/configs/rpi.h > @@ -94,10 +94,14 @@ > > /* Console UART */ > #ifdef CONFIG_BCM2837 > +/* > + * Raspberry Pi 3 uses the miniuart by default unless the device tree re-assigns > + * the PL01X from Bluetooth to the header pins. We enable support for both in > + * the Raspberry Pi 3 only and disable the unused one at runtime. > + */ > #define CONFIG_BCM283X_MU_SERIAL > -#else > -#define CONFIG_PL01X_SERIAL > #endif > +#define CONFIG_PL01X_SERIAL > #define CONFIG_CONS_INDEX 0 > > /* Console configuration */ > diff --git a/include/dm/platform_data/serial_pl01x.h b/include/dm/platform_data/serial_pl01x.h > index ccfa808e23..1396137d26 100644 > --- a/include/dm/platform_data/serial_pl01x.h > +++ b/include/dm/platform_data/serial_pl01x.h > @@ -19,12 +19,14 @@ enum pl01x_type { > * @clock: Input clock rate, used for calculating the baud rate divisor > * @skip_init: Don't attempt to change port configuration (also means @clock > * is ignored) > + * @disabled: Whether the driver should be disabled and not report any device. > */ > struct pl01x_serial_platdata { > unsigned long base; > enum pl01x_type type; > unsigned int clock; > bool skip_init; > + bool disabled; > }; > > #endif >

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[U-Boot] [PATCH 0/3] RFC: Patches to reduce TPL code size
by Simon Glass 02 Apr '17

02 Apr '17

With the rockchip 'rock' board some build and code size problems have come to light with TPL. This series provides a few ideas to improve things. Simon Glass (3): Makefile: Correct dependency race condition with TPL string: Provide a slimmed-down memset() Makefile: Provide an option to select SPL or TPL Makefile | 3 ++- lib/Kconfig | 9 +++++++++ lib/string.c | 6 ++++-- scripts/Kbuild.include | 6 ++++++ scripts/Makefile.spl | 6 ++++++ 5 files changed, 27 insertions(+), 3 deletions(-) -- 2.12.1.578.ge9c3154ca4-goog

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[U-Boot] rockchip: dts: firefly: add usb host power supply node
by Eddie Cai 02 Apr '17

02 Apr '17

firefly have a usb host. add dts node to provide power supply Signed-off-by: Eddie Cai <eddie.cai.linux(a)gmail.com> --- arch/arm/dts/rk3288-firefly.dts | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/dts/rk3288-firefly.dts b/arch/arm/dts/rk3288-firefly.dts index 97568a3..59ff8bc 100644 --- a/arch/arm/dts/rk3288-firefly.dts +++ b/arch/arm/dts/rk3288-firefly.dts @@ -50,6 +50,11 @@ rockchip,pins = <7 0 RK_FUNC_GPIO &pcfg_pull_up>; }; }; + usb_host { + host_vbus_drv: host-vbus-drv { + rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; }; &pwm1 { @@ -61,6 +66,11 @@ reg-shift = <2>; }; +&usb_host1 { + vbus-supply = <&vcc_host_5v>; + status = "okay"; +}; + &sdmmc { u-boot,dm-pre-reloc; }; -- 2.7.4

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[U-Boot] [PATCH 1/2] rockchip: rk3188: follow THUMB_BUILD Kconfig migration
by Heiko Stuebner 02 Apr '17

02 Apr '17

Commit 3a649407a49b ("arm: Migrate SYS_THUMB_BUILD to Kconfig, introduce SPL_SYS_THUMB_BUILD") moved the THUMB_BUILD symbols from the header to Kconfig symbols. With it still defined in the rk3188 header we end up with a duplicate symbol and compile errors, so fix that. Signed-off-by: Heiko Stuebner <heiko(a)sntech.de> --- include/configs/rk3188_common.h | 1 - 1 file changed, 1 deletion(-) diff --git a/include/configs/rk3188_common.h b/include/configs/rk3188_common.h index d7e96ec269..c5e508e4ab 100644 --- a/include/configs/rk3188_common.h +++ b/include/configs/rk3188_common.h @@ -18,7 +18,6 @@ #define CONFIG_SYS_MAXARGS 16 #define CONFIG_SYS_MALLOC_LEN (32 << 20) #define CONFIG_SYS_CBSIZE 1024 -#define CONFIG_SYS_THUMB_BUILD #define CONFIG_SYS_TIMER_RATE (24 * 1000 * 1000) #define CONFIG_SYS_TIMER_BASE 0x2000e000 /* TIMER3 */ -- 2.11.0

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[U-Boot] [PATCH] rockchip: clk: rk3399: 24MHz is not a power of 2
by Philipp Tomsich 02 Apr '17

02 Apr '17

The clock driver for the RK3399 mistakenly used (24 * 2^20) where it should have used (24 * 10^6) in a few calculations. This commits fixes this. Signed-off-by: Philipp Tomsich <philipp.tomsich(a)theobroma-systems.com> --- drivers/clk/rockchip/clk_rk3399.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c index 1ac4ff4..ff3cc37 100644 --- a/drivers/clk/rockchip/clk_rk3399.c +++ b/drivers/clk/rockchip/clk_rk3399.c @@ -667,7 +667,7 @@ static ulong rk3399_mmc_get_clk(struct rk3399_cru *cru, uint clk_id) if ((con & CLK_EMMC_PLL_MASK) >> CLK_EMMC_PLL_SHIFT == CLK_EMMC_PLL_SEL_24M) - return DIV_TO_RATE(24*1024*1024, div); + return DIV_TO_RATE(24*1000*1000, div); else return DIV_TO_RATE(GPLL_HZ, div); } @@ -685,7 +685,7 @@ static ulong rk3399_mmc_set_clk(struct rk3399_cru *cru, if (src_clk_div > 127) { /* use 24MHz source for 400KHz clock */ - src_clk_div = 24*1024*1024 / set_rate; + src_clk_div = 24*1000*1000 / set_rate; rk_clrsetreg(&cru->clksel_con[16], CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK, CLK_EMMC_PLL_SEL_24M << CLK_EMMC_PLL_SHIFT | -- 1.9.1

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[U-Boot] [PATCH 0/6] rockchip: rk3399: GMAC support for the RK3399 SoC
by Philipp Tomsich 02 Apr '17

02 Apr '17

The RK3399 includes the Designware Gigabit Ethernet controller IP and requires similar configuration as the RK3288. However, the configuration register offsets (within GRF) and bit offsets (within the registers) differ. This changeset refactors the gmac_rockchip.c driver to handle both RK3288 and RK3399 devices. It further adds the necessary pinctrl and clock support for GMAC capability on the RK3399. Tested with a RK3399-Q7 (on-module KSZ9031 PHY) at 100MBit and 1GBit. Philipp Tomsich (6): rockchip: pinctrl: rk3399: add GMAC (RGMII only) support rockchip: clk: rk3399: fix warnings for unused variables in SPL/non-SPL rockchip: clk: rk3399: add clocking support for Ethernet net: gmac_rockchip: Add support for the RK3399 GMAC dts: rk3399: add gmac for the rk3399 dts: rk3399-puma: add gmac for the RK3399-Q7 arch/arm/dts/rk3399-puma.dts | 30 +++++ arch/arm/dts/rk3399.dtsi | 55 ++++++++++ arch/arm/include/asm/arch-rockchip/grf_rk3288.h | 68 ++++++------ arch/arm/include/asm/arch-rockchip/grf_rk3399.h | 84 +++++++++++++- arch/arm/include/asm/arch-rockchip/periph.h | 1 + drivers/clk/rockchip/clk_rk3399.c | 9 ++ drivers/net/gmac_rockchip.c | 140 +++++++++++++++++++----- drivers/pinctrl/rockchip/pinctrl_rk3399.c | 42 +++++++ 8 files changed, 367 insertions(+), 62 deletions(-) -- 1.9.1

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[U-Boot] [PATCH] rockchip: arm64: rk3399: remove unconditional debug message
by Philipp Tomsich 02 Apr '17

02 Apr '17

An earlier upstream change contained an unconditional debug message which would show up as a message similar to the following in the U-Boot startup (after the ATF and before the U-Boot banner): time 159f019, 0 This commit removes this message (instead of making if conditional on being a debug-build), as it doesn't pertain to any initialisation done in this file. Signed-off-by: Philipp Tomsich <philipp.tomsich(a)theobroma-systems.com> --- arch/arm/mach-rockchip/rk3399/rk3399.c | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c index cbfd3fa..8bb950e 100644 --- a/arch/arm/mach-rockchip/rk3399/rk3399.c +++ b/arch/arm/mach-rockchip/rk3399/rk3399.c @@ -40,6 +40,5 @@ int arch_cpu_init(void) /* Emmc clock generator: disable the clock multipilier */ rk_clrreg(GRF_EMMCCORE_CON11, 0x0ff); - printf("time %x, %x\n", readl(0xff8680a8), readl(0xff8680ac)); return 0; } -- 1.9.1

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