April 2017 - U-Boot

[U-Boot] [PATCH] rockchip: rk3399: Add missing sentinel in syscon
by Eric Gao 14 Apr '17

14 Apr '17

when enable PMIC rk808,the system will halt at very early stage,log is shown as bellow. INFO: plat_rockchip_pmu_init(1211): pd status 3e INFO: BL31: Initializing runtime services INFO: BL31: Preparing for EL3 exit to normal world INFO: Entry point address = 0x200000 INFO: SPSR = 0x3c9 time 44561b, 0 (<<----Just stop here) It's caused by the absence of "{ }" in syscon_rk3399.c ,which will lead to memory overflow like below.According to Sysmap file ,we can find the function buck_get_value of rk808 is just follow the compatible struct,the pointer "of_match" point to "buck_get_value",but it is not a struct and don't have member of compatible, In this case, system crash. So,on the face, it looks like that rk808 is guilty.but he is really innocent. while (of_match->compatible) { <<---------- if (!strcmp(of_match->compatible, compat)) { *of_idp = of_match; return 0; } of_match++; } Signed-off-by: Eric Gao <eric.gao(a)rock-chips.com> --- arch/arm/mach-rockchip/rk3399/syscon_rk3399.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c b/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c index d32985b..74d4552 100644 --- a/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c +++ b/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c @@ -14,6 +14,7 @@ static const struct udevice_id rk3399_syscon_ids[] = { { .compatible = "rockchip,rk3399-pmugrf", .data = ROCKCHIP_SYSCON_PMUGRF }, { .compatible = "rockchip,rk3399-pmusgrf", .data = ROCKCHIP_SYSCON_PMUSGRF }, { .compatible = "rockchip,rk3399-cic", .data = ROCKCHIP_SYSCON_CIC }, + { } }; U_BOOT_DRIVER(syscon_rk3399) = { -- 1.9.1

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[U-Boot] [PATCH v2] ARM64: rockchip: split RK3399-Q7 board off the RK3399-EVB board
by Philipp Tomsich 14 Apr '17

14 Apr '17

From: Klaus Goger <klaus.goger(a)theobroma-systems.com> The RK3399-Q7 SoM is a Qseven-compatible (70mm x 70mm, MXM-230 connector) system-on-module from Theobroma Systems, featuring the Rockchip RK3399. It provides the following feature set: * up to 4GB DDR3 * on-module SPI-NOR flash * on-module eMMC (with 8-bit interace) * SD card (on a baseboad) via edge connector * Gigabit Ethernet w/ on-module Micrel KSZ9031 GbE PHY * HDMI/eDP/MIPI displays * 2x MIPI-CSI * USB - 1x USB 3.0 dual-role (direct connection) - 2x USB 3.0 host + 1x USB 2.0 (on-module USB 3.0 hub) * on-module STM32 Cortex-M0 companion controller, implementing: - low-power RTC functionality (ISL1208 emulation) - fan controller (AMC6821 emulation) - USB<->CAN bridge controller Note that we use a multi-payload FIT image for booting and have Cortex-M0 payload in a separate subimage: we thus rely on the FIT image loader to put it into the SRAM region that ATF expects it in. Signed-off-by: Klaus Goger <klaus.goger(a)theobroma-systems.com> Signed-off-by: Philipp Tomsich <philipp.tomsich(a)theobroma-systems.com> --- Changes in v2: - fixes dram_init_banksize() to have the correct return type and to return 0 (success) unconditionally arch/arm/mach-rockchip/rk3399/Kconfig | 19 ++++++ board/theobroma-systems/puma_rk3399/Kconfig | 15 +++++ board/theobroma-systems/puma_rk3399/MAINTAINERS | 10 +++ board/theobroma-systems/puma_rk3399/Makefile | 7 +++ board/theobroma-systems/puma_rk3399/README | 73 ++++++++++++++++++++++ .../theobroma-systems/puma_rk3399/fit_spl_atf.its | 57 +++++++++++++++++ board/theobroma-systems/puma_rk3399/puma-rk3399.c | 71 +++++++++++++++++++++ configs/puma-rk3399_defconfig | 3 +- include/configs/puma_rk3399.h | 26 ++++++++ 9 files changed, 280 insertions(+), 1 deletion(-) create mode 100644 board/theobroma-systems/puma_rk3399/Kconfig create mode 100644 board/theobroma-systems/puma_rk3399/MAINTAINERS create mode 100644 board/theobroma-systems/puma_rk3399/Makefile create mode 100644 board/theobroma-systems/puma_rk3399/README create mode 100644 board/theobroma-systems/puma_rk3399/fit_spl_atf.its create mode 100644 board/theobroma-systems/puma_rk3399/puma-rk3399.c create mode 100644 include/configs/puma_rk3399.h diff --git a/arch/arm/mach-rockchip/rk3399/Kconfig b/arch/arm/mach-rockchip/rk3399/Kconfig index 83bd04a..415466a 100644 --- a/arch/arm/mach-rockchip/rk3399/Kconfig +++ b/arch/arm/mach-rockchip/rk3399/Kconfig @@ -10,6 +10,24 @@ config TARGET_EVB_RK3399 with full function and phisical connectors support like type-C ports, usb2.0 host ports, LVDS, JTAG, MAC, SDcard, HDMI, USB-2-serial... +config TARGET_PUMA_RK3399 + bool "Theobroma Systems RK3399-Q7 (Puma)" + help + The RK3399-Q7 (Puma) is a system-on-module (designed and + marketed by Theobroma Systems) featuring the Rockchip RK3399 + in a Qseven-compatible form-factor (running of a single 5V + supply and exposing its external interfaces on a MXM-230 + connector). + + Key features of the RK3399-Q7 include: + * on-module USB 3.0 hub (2x USB 3.0 host + 1x USB 2.0 host) + * USB 3.0 dual-role + * on-module Micrel KSZ9031 GbE PHY + * on-module eMMC (up to 256GB configurations available) + * on-module DDR3 (1GB, 2GB and 4GB configurations available) + * HDMI, eDP, MIPI-DSI, MIPI-DSI/CSI and MIPI-CSI + * SPI, I2C, I2S, UART, GPIO, ... + endchoice config SYS_SOC @@ -19,5 +37,6 @@ config SYS_MALLOC_F_LEN default 0x0800 source "board/rockchip/evb_rk3399/Kconfig" +source "board/theobroma-systems/puma_rk3399/Kconfig" endif diff --git a/board/theobroma-systems/puma_rk3399/Kconfig b/board/theobroma-systems/puma_rk3399/Kconfig new file mode 100644 index 0000000..a645590 --- /dev/null +++ b/board/theobroma-systems/puma_rk3399/Kconfig @@ -0,0 +1,15 @@ +if TARGET_PUMA_RK3399 + +config SYS_BOARD + default "puma_rk3399" + +config SYS_VENDOR + default "theobroma-systems" + +config SYS_CONFIG_NAME + default "puma_rk3399" + +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y + +endif diff --git a/board/theobroma-systems/puma_rk3399/MAINTAINERS b/board/theobroma-systems/puma_rk3399/MAINTAINERS new file mode 100644 index 0000000..ccec09c --- /dev/null +++ b/board/theobroma-systems/puma_rk3399/MAINTAINERS @@ -0,0 +1,10 @@ +PUMA-RK3399 +M: Philipp Tomsich <philipp.tomsich(a)theobroma-systems.com> +M: Klaus Goger <klaus.goger(a)theobroma-systems.com> +S: Maintained +F: board/theobroma-systems/puma_rk3399 +F: include/configs/puma_rk3399.h +F: arch/arm/dts/rk3399-puma.dts +F: configs/puma-rk3399_defconfig +W: https://www.theobroma-systems.com/rk3399-q7/tech-specs +T: git git://git.theobroma-systems.com/puma-u-boot.git diff --git a/board/theobroma-systems/puma_rk3399/Makefile b/board/theobroma-systems/puma_rk3399/Makefile new file mode 100644 index 0000000..d962b56 --- /dev/null +++ b/board/theobroma-systems/puma_rk3399/Makefile @@ -0,0 +1,7 @@ +# +# (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += puma-rk3399.o diff --git a/board/theobroma-systems/puma_rk3399/README b/board/theobroma-systems/puma_rk3399/README new file mode 100644 index 0000000..1a8d02b --- /dev/null +++ b/board/theobroma-systems/puma_rk3399/README @@ -0,0 +1,73 @@ +Introduction +============ + +The RK3399-Q7 (Puma) is a system-on-module featuring the Rockchip +RK3399 in a Qseven-compatible form-factor. + +RK3399-Q7 features: + * CPU: ARMv8 64bit Big-Little architecture, + * Big: dual-core Cortex-A72 + * Little: quad-core Cortex-A53 + * IRAM: 200KB + * DRAM: 4GB-128MB dual-channel + * eMMC: onboard eMMC + * SD/MMC + * GbE (onboard Micrel KSZ9031) Gigabit ethernet PHY + * USB: + * USB3.0 dual role port + * 2x USB3.0 host, 1x USB2.0 host via onboard USB3.0 hub + * Display: HDMI/eDP/MIPI + * Camera: 2x CSI (one on the edge connector, one on the Q7 specified CSI ZIF) + * NOR Flash: onboard SPI NOR + * Companion Controller: onboard additional Cortex-M0 microcontroller + * RTC + * fan controller + * CAN + +Here is the step-by-step to boot to U-Boot on rk3399. + +Get the Source and build ATF/Cortex-M0 binaries +=============================================== + + > git clone git://git.theobroma-systems.com/arm-trusted-firmware.git + > git clone git://git.theobroma-systems.com/rk3399-cortex-m0.git + +Compile the ATF +=============== + + > cd arm-trusted-firmware + > make CROSS_COMPILE=aarch64-linux-gnu- PLAT=rk3399 bl31 + > cp build/rk3399/release/bl31.bin ../u-boot + +Compile the M0 firmware +======================= + + > cd ../rk3399-cortex-m0 + > make CROSS_COMPILE=arm-cortex_m0-eabi- + > cp rk3399m0.bin ../u-boot + +Compile the U-Boot +================== + + > cd ../u-boot + > make CROSS_COMPILE=aarch64-linux-gnu- puma-rk3399_defconfig all + +Package the image +================= + + > tools/mkimage -n rk3399 -T rksd -d spl/u-boot-spl.bin spl.img + > tools/mkimage -f board/theobroma/puma_rk3399/fit_spl_atf.its \ + -E rk3399_bl3x.itb + +Flash the image +=============== + +Copy the SPL to offset 32k and the FIT image containing the payloads +(U-Boot proper, ATF, M0 Firmware, devicetree) to offset 256k on a SD +card. + + > dd if=spl.img of=/dev/sdb seek=64 + > dd if=rk3399_bl3x.itb of=/dev/sdb seek=512 + +After powering up the board (with the inserted SD card), you should see +a U-Boot console on UART0 (115200n8). diff --git a/board/theobroma-systems/puma_rk3399/fit_spl_atf.its b/board/theobroma-systems/puma_rk3399/fit_spl_atf.its new file mode 100644 index 0000000..f93c251 --- /dev/null +++ b/board/theobroma-systems/puma_rk3399/fit_spl_atf.its @@ -0,0 +1,57 @@ +/* + * Copyright (C) 2017 Theobroma Systems Design und Consulting GmbH + * + * Minimal dts for a SPL FIT image payload. + * + * SPDX-License-Identifier: GPL-2.0+ X11 + */ + +/dts-v1/; + +/ { + description = "FIT image with U-Boot proper, ATF bl31, M0 Firmware, DTB"; + #address-cells = <1>; + + images { + uboot@1 { + description = "U-Boot (64-bit)"; + data = /incbin/("../../../u-boot-nodtb.bin"); + type = "standalone"; + arch = "arm64"; + compression = "none"; + load = <0x00200000>; + }; + atf@1 { + description = "ARM Trusted Firmware"; + data = /incbin/("../../../bl31.bin"); + type = "firmware"; + arch = "arm64"; + compression = "none"; + load = <0x00001000>; + entry = <0x00001000>; + }; + pmu@1 { + description = "Cortex-M0 firmware"; + data = /incbin/("../../../rk3399m0.bin"); + type = "pmu-firmware"; + compression = "none"; + load = <0xff8c0000>; + }; + fdt@1 { + description = "RK3399-Q7 (Puma) flat device-tree"; + data = /incbin/("../../../u-boot.dtb"); + type = "flat_dt"; + compression = "none"; + }; + }; + + configurations { + default = "conf@1"; + conf@1 { + description = "Theobroma Systems RK3399-Q7 (Puma) SoM"; + firmware = "uboot@1"; + loadables = "atf@1"; + fdt = "fdt@1"; + }; + }; +}; diff --git a/board/theobroma-systems/puma_rk3399/puma-rk3399.c b/board/theobroma-systems/puma_rk3399/puma-rk3399.c new file mode 100644 index 0000000..fb4d31e --- /dev/null +++ b/board/theobroma-systems/puma_rk3399/puma-rk3399.c @@ -0,0 +1,71 @@ +/* + * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#include <common.h> +#include <dm.h> +#include <dm/pinctrl.h> +#include <dm/uclass-internal.h> +#include <asm/arch/periph.h> +#include <power/regulator.h> + +DECLARE_GLOBAL_DATA_PTR; + +int board_init(void) +{ + struct udevice *pinctrl, *regulator; + int ret; + + /* + * The PWM does not have decicated interrupt number in dts and can + * not get periph_id by pinctrl framework, so let's init them here. + * The PWM2 and PWM3 are for pwm regulators. + */ + ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl); + if (ret) { + debug("%s: Cannot find pinctrl device\n", __func__); + goto out; + } + + ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_PWM2); + if (ret) { + debug("%s PWM2 pinctrl init fail!\n", __func__); + goto out; + } + + /* rk3399 need to init vdd_center to get the correct output voltage */ + ret = regulator_get_by_platname("vdd_center", &regulator); + if (ret) + debug("%s: Cannot get vdd_center regulator\n", __func__); + + ret = regulator_get_by_platname("vcc5v0_host", &regulator); + if (ret) { + debug("%s vcc5v0_host init fail! ret %d\n", __func__, ret); + goto out; + } + + ret = regulator_set_enable(regulator, true); + if (ret) { + debug("%s vcc5v0-host-en set fail!\n", __func__); + goto out; + } + +out: + return 0; +} + +int dram_init(void) +{ + gd->ram_size = 0x80000000; + return 0; +} + +int dram_init_banksize(void) +{ + /* Reserve 0x200000 for ATF bl31 */ + gd->bd->bi_dram[0].start = 0x200000; + gd->bd->bi_dram[0].size = 0x7e000000; + + return 0; +} diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig index d4e12d7..500f220 100644 --- a/configs/puma-rk3399_defconfig +++ b/configs/puma-rk3399_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_ROCKCHIP=y +CONFIG_TARGET_PUMA_RK3399=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x4000 @@ -11,7 +12,7 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3399-puma" CONFIG_FIT=y CONFIG_SPL_FIT=y CONFIG_SPL_LOAD_FIT=y -CONFIG_SPL_FIT_SOURCE="board/rockchip/evb_rk3399/fit_spl_atf.its" +CONFIG_SPL_FIT_SOURCE="board/theobroma-systems/puma_rk3399/fit_spl_atf.its" # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set diff --git a/include/configs/puma_rk3399.h b/include/configs/puma_rk3399.h new file mode 100644 index 0000000..6e9364b --- /dev/null +++ b/include/configs/puma_rk3399.h @@ -0,0 +1,26 @@ +/* + * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __PUMA_RK3399_H +#define __PUMA_RK3399_H + +/* + * SPL @ 32kB for ~130kB + * ENV @ 240KB for 8kB + * FIT payload (ATF, U-Boot, FDT) @ 256kB + */ +#define CONFIG_ENV_OFFSET (240 * 1024) + +#include <configs/rk3399_common.h> + +#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_SYS_MMC_ENV_DEV 1 + +#define SDRAM_BANK_SIZE (2UL << 30) + +#define CONFIG_SYS_WHITE_ON_BLACK + +#endif -- 1.9.1

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[U-Boot] [PATCH] dts: rk3399-puma: make the DTS dual-licensed
by Philipp Tomsich 14 Apr '17

14 Apr '17

The RK3399-Q7 (Puma) DTS should (of course) be dual-licensed. This updates the licensing info in the rk3399-puma.dts. Signed-off-by: Philipp Tomsich <philipp.tomsich(a)theobroma-systems.com> --- arch/arm/dts/rk3399-puma.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/dts/rk3399-puma.dts b/arch/arm/dts/rk3399-puma.dts index e7f1088..301cc16 100644 --- a/arch/arm/dts/rk3399-puma.dts +++ b/arch/arm/dts/rk3399-puma.dts @@ -1,7 +1,7 @@ /* * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH * - * SPDX-License-Identifier: GPL-2.0+ + * SPDX-License-Identifier: GPL-2.0+ X11 */ /dts-v1/; -- 1.9.1

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[U-Boot] [PATCH] rockchip: sysreset: rk3188: Make sure remap is off on warm-resets
by Heiko Stuebner 14 Apr '17

14 Apr '17

The warm-reset of rk3188 socs keeps the remap setting as it was, so if it was enabled, the cpu would start from address 0x0 of the sram instead of address 0x0 of the bootrom, thus making the reset hang. Therefore make sure the remap is disabled before attempting a warm reset. Cold reset is not affected by this at all. Signed-off-by: Heiko Stuebner <heiko(a)sntech.de> --- drivers/sysreset/sysreset_rk3188.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/drivers/sysreset/sysreset_rk3188.c b/drivers/sysreset/sysreset_rk3188.c index 36ae47600a..053a6344f5 100644 --- a/drivers/sysreset/sysreset_rk3188.c +++ b/drivers/sysreset/sysreset_rk3188.c @@ -7,21 +7,36 @@ #include <common.h> #include <dm.h> #include <errno.h> +#include <syscon.h> #include <sysreset.h> #include <asm/io.h> #include <asm/arch/clock.h> #include <asm/arch/cru_rk3188.h> +#include <asm/arch/grf_rk3188.h> #include <asm/arch/hardware.h> #include <linux/err.h> int rk3188_sysreset_request(struct udevice *dev, enum sysreset_t type) { struct rk3188_cru *cru = rockchip_get_cru(); + struct rk3188_grf *grf; if (IS_ERR(cru)) return PTR_ERR(cru); switch (type) { case SYSRESET_WARM: + grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); + if (IS_ERR(grf)) + return -EPROTONOSUPPORT; + + /* + * warm-reset keeps the remap value, + * so make sure it's disabled. + */ + rk_clrsetreg(&grf->soc_con0, + NOC_REMAP_MASK << NOC_REMAP_SHIFT, + 0 << NOC_REMAP_SHIFT); + rk_clrreg(&cru->cru_mode_con, 0xffff); writel(0xeca8, &cru->cru_glb_srst_snd_value); break; -- 2.11.0

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[U-Boot] [PATCH] rockchip: rk3399: do not use lower address
by Kever Yang 14 Apr '17

14 Apr '17

The lower address is reserved for ATF, do not use it. Signed-off-by: Kever Yang <kever.yang(a)rock-chips.com> --- include/configs/rk3399_common.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h index 8bd2737..32b94f6 100644 --- a/include/configs/rk3399_common.h +++ b/include/configs/rk3399_common.h @@ -59,8 +59,8 @@ #ifndef CONFIG_SPL_BUILD #define ENV_MEM_LAYOUT_SETTINGS \ - "scriptaddr=0x00000000\0" \ - "pxefile_addr_r=0x00100000\0" \ + "scriptaddr=0x00500000\0" \ + "pxefile_addr_r=0x00600000\0" \ "fdt_addr_r=0x01f00000\0" \ "kernel_addr_r=0x02000000\0" \ "ramdisk_addr_r=0x04000000\0" -- 1.9.1

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[U-Boot] [PATCH v2] rockchip: rk3188: enable remap function
by Heiko Stuebner 14 Apr '17

14 Apr '17

Most Rockchip socs have the ability to either map the bootrom or a sram area to the starting address of the cpu by flipping a bit in the GRF. Newer socs leave this untouched and mapped to the bootrom but the legacy loaders on rk3188 and before enabled the remap functionality and the current smp implementation in the Linux kernel also requires it to be enabled, to bring up secondary cpus. So to keep smp working in the kernel, mimic the behaviour of the legacy bootloaders and enable the remap functionality. Signed-off-by: Heiko Stuebner <heiko(a)sntech.de> --- changes in v2: - drop the rk_board_late_init weak function If boards need even more specialized init we can worry about that later. arch/arm/mach-rockchip/Kconfig | 1 + arch/arm/mach-rockchip/rk3188-board.c | 18 ++++++++++++++++++ 2 files changed, 19 insertions(+) diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index af0796d1d0..5b4caec953 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -18,6 +18,7 @@ config ROCKCHIP_RK3188 select SUPPORT_TPL select SPL select TPL + select BOARD_LATE_INIT select ROCKCHIP_BROM_HELPER help The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9 diff --git a/arch/arm/mach-rockchip/rk3188-board.c b/arch/arm/mach-rockchip/rk3188-board.c index c370156e4c..4be711e441 100644 --- a/arch/arm/mach-rockchip/rk3188-board.c +++ b/arch/arm/mach-rockchip/rk3188-board.c @@ -11,6 +11,7 @@ #include <syscon.h> #include <asm/io.h> #include <asm/arch/clock.h> +#include <asm/arch/grf_rk3188.h> #include <asm/arch/periph.h> #include <asm/arch/pmu_rk3288.h> #include <asm/arch/boot_mode.h> @@ -19,6 +20,23 @@ DECLARE_GLOBAL_DATA_PTR; +int board_late_init(void) +{ + struct rk3188_grf *grf; + + grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); + if (IS_ERR(grf)) { + error("grf syscon returned %ld\n", PTR_ERR(grf)); + } else { + /* enable noc remap to mimic legacy loaders */ + rk_clrsetreg(&grf->soc_con0, + NOC_REMAP_MASK << NOC_REMAP_SHIFT, + NOC_REMAP_MASK << NOC_REMAP_SHIFT); + } + + return 0; +} + int board_init(void) { #if defined(CONFIG_ROCKCHIP_SPL_BACK_TO_BROM) -- 2.11.0

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[U-Boot] [PATCH] rockchip: cosmetic: Move rock board to its correct position
by Heiko Stuebner 14 Apr '17

14 Apr '17

Somehow 43b5c78d8d91 ("rockchip: cosmetic: Sort RK3288 boards") moved the rock board in between some rk3288 board, probably as a result of rebasing. So move it back to its original position above all rk3288 boards. Fixes: 43b5c78d8d91 ("rockchip: cosmetic: Sort RK3288 boards") Signed-off-by: Heiko Stuebner <heiko(a)sntech.de> --- arch/arm/dts/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index bc4dc2ce79..da4c940f07 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -29,12 +29,12 @@ dtb-$(CONFIG_EXYNOS5) += exynos5250-arndale.dtb \ dtb-$(CONFIG_EXYNOS7420) += exynos7420-espresso7420.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += \ rk3036-sdk.dtb \ + rk3188-radxarock.dtb \ rk3288-evb.dtb \ rk3288-fennec.dtb \ rk3288-firefly.dtb \ rk3288-miqi.dtb \ rk3288-popmetal.dtb \ - rk3188-radxarock.dtb \ rk3288-rock2-square.dtb \ rk3288-tinker.dtb \ rk3288-veyron-jerry.dtb \ -- 2.11.0

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[U-Boot] rockchip: Add USB to the default boot targets
by Eddie Cai 14 Apr '17

14 Apr '17

Now that most rockchip SoC based board have usb host support, enable USB boot targets by default. Signed-off-by: Eddie Cai <eddie.cai.linux(a)gmail.com> --- include/configs/rockchip-common.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h index fd930c1..41967dd 100644 --- a/include/configs/rockchip-common.h +++ b/include/configs/rockchip-common.h @@ -15,6 +15,7 @@ #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) \ func(MMC, mmc, 1) \ + func(USB, usb, 0) \ func(PXE, pxe, na) \ func(DHCP, dchp, na) -- 2.10.2

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[U-Boot] rockchip: tinker: configs: Add USB, PXE, DHCP to the default boot targets
by Eddie Cai 14 Apr '17

14 Apr '17

tinker board support ethernet and usb host, so enable USB, PXE and DHCP support. Signed-off-by: Eddie Cai <eddie.cai.linux(a)gmail.com> --- include/configs/tinker_rk3288.h | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/include/configs/tinker_rk3288.h b/include/configs/tinker_rk3288.h index c398e07..db573ee 100644 --- a/include/configs/tinker_rk3288.h +++ b/include/configs/tinker_rk3288.h @@ -13,7 +13,10 @@ #undef BOOT_TARGET_DEVICES #define BOOT_TARGET_DEVICES(func) \ - func(MMC, mmc, 1) + func(MMC, mmc, 1) \ + func(USB, usb, 0) \ + func(PXE, pxe, na) \ + func(DHCP, dchp, na) #define CONFIG_ENV_IS_IN_MMC #define CONFIG_SYS_MMC_ENV_DEV 0 -- 2.10.2

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[U-Boot] [PATCH v3 1/2] spl: rk3399: disable DDR security regions for SPL (for DMA in dw_mmc)
by Philipp Tomsich 14 Apr '17

14 Apr '17

The RK3399 hangs during DMA of the Designware MMC controller, when performing DMA-based transactions in SPL due to the DDR security settings left behind by the BootROM (i.e. accesses to the first MB of DRAM are restricted... however, the DMA is likely to target this first MB, as it transfers from/to the stack). System security is not affected, as the final security configuration is performed by the ATF, which is executed after the SPL stage. With this fix in place, we can now drop 'fifo-mode' in the DTS for the RK3399-Q7 (Puma). Signed-off-by: Philipp Tomsich <philipp.tomsich(a)theobroma-systems.com> --- Changes in v3: - replaces the work-around (i.e. falling back to fifo-mode in SPL) with a permanent fix arch/arm/mach-rockchip/rk3399-board-spl.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm/mach-rockchip/rk3399-board-spl.c b/arch/arm/mach-rockchip/rk3399-board-spl.c index 3bfc2d9..c5e32c4 100644 --- a/arch/arm/mach-rockchip/rk3399-board-spl.c +++ b/arch/arm/mach-rockchip/rk3399-board-spl.c @@ -186,6 +186,7 @@ void board_debug_uart_init(void) } #define GRF_EMMCCORE_CON11 0xff77f02c +#define SGRF_DDR_RGN_CON16 0xff330040 void board_init_f(ulong dummy) { struct udevice *pinctrl; @@ -214,6 +215,17 @@ void board_init_f(ulong dummy) hang(); } + /* + * Disable DDR security regions. + * + * As we are entered from the BootROM, the region from + * 0x0 through 0xfffff (i.e. the first MB of memory) will + * be protected. This will cause issues with the DW_MMC + * driver, which tries to DMA from/to the stack (likely) + * located in this range. + */ + rk_clrsetreg(SGRF_DDR_RGN_CON16, 0x1FF, 0); + secure_timer_init(); ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl); @@ -251,6 +263,7 @@ void spl_board_init(void) #ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM back_to_bootrom(); #endif + return; err: printf("spl_board_init: Error %d\n", ret); -- 1.9.1

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