April 2017 - U-Boot

[U-Boot] Fwd: u-boot.img size limit for spl fat load ?
by Ayoub Zaki 18 Oct '17

18 Oct '17

Hello Albert, First tank you so much for inversting your time for replying. I put some printf in the code and SPL is hanging in spl_load_image_fat function. I also enable the DEBUG messages here the complete log file : http://pastebin.com/raw.php?i=BwUJXDDb So I suspect that SPL is not allocating enough memory to load u-boot.img but I can't find where this size limit is set and where I can change it. Cheers, Ayoub > 2015-01-19 8:08 GMT+01:00 Albert ARIBAUD <albert.u.boot(a)aribaud.net>: > > > Hello Ayoub, > > > > On Fri, 16 Jan 2015 15:42:37 +0100, Ayoub Zaki > > <ayoub.zaki(a)googlemail.com> wrote: > > > Hello list, > > > > > > I'm using u-boot-2014.10 and trying to build it with LCD support for the > > > Beaglebone black to include a Boot logo image. > > > It seems that spl hangs while fat loading a 2.8MB sized u-boot.img ! > > > I reduced the the logo header file and rebuild u-boot, that worked for a > > > 1.6MB sized u-boot.img. > > > Is there any size limit for u-boot ? how to increase the memory allocated > > > by spl ? > > > > There should not be a size limit for SPL fat load. > > > > What may happen is that SPL code is overwritten before it exits, or > > U-Boot itself is corrupted after being loaded. > > > > I assume you've seen the SPL banner and not the U-Boot one; that alone > > does not tell us whether SPL or U-Boot did hang. Can you build U-boot > > with debug enabled? If this results in too big an SPL image, then try > > and at least enable debug for the image chainloading parts, so that you > > can see how far SPL code gets run. > > > > > Thanks you. > > > > No problem. > > > > Amicalement, > > -- > > Albert.

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[U-Boot] [PATCH] config: remove CONFIG_SPI_FLASH_BAR from some platforms
by Suresh Gupta 13 Sep '17

13 Sep '17

ls1012ardb, ls1046ardb, ls2080ardb has S25FS512S flash which do not support Bank Address Register commands Signed-off-by: Suresh Gupta <suresh.gupta(a)nxp.com> --- include/configs/ls1012a_common.h | 1 - include/configs/ls1046ardb.h | 1 - include/configs/ls2080ardb.h | 1 - 3 files changed, 3 deletions(-) diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h index 09f890d..0db926f 100644 --- a/include/configs/ls1012a_common.h +++ b/include/configs/ls1012a_common.h @@ -55,7 +55,6 @@ #define CONFIG_FSL_QSPI #define QSPI0_AMBA_BASE 0x40000000 #define CONFIG_SPI_FLASH_SPANSION -#define CONFIG_SPI_FLASH_BAR #define FSL_QSPI_FLASH_SIZE (1 << 24) #define FSL_QSPI_FLASH_NUM 2 diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h index 67ee626..66af039 100644 --- a/include/configs/ls1046ardb.h +++ b/include/configs/ls1046ardb.h @@ -208,7 +208,6 @@ #define CONFIG_SPI_FLASH_SPANSION #define FSL_QSPI_FLASH_SIZE (1 << 26) #define FSL_QSPI_FLASH_NUM 2 -#define CONFIG_SPI_FLASH_BAR #endif #endif diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index 2155a89..79a3d94 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -265,7 +265,6 @@ unsigned long get_board_sys_clk(void); /* SPI */ #ifdef CONFIG_FSL_DSPI #define CONFIG_SPI_FLASH -#define CONFIG_SPI_FLASH_BAR #define CONFIG_SPI_FLASH_STMICRO #endif -- 1.9.3

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[U-Boot] [PATCH v4 0/4] rk3399: enable dwc3 gadget and fastboot
by Kever Yang 12 Sep '17

12 Sep '17

This patch set enable rk3399 dwc3 controller and gadget driver for fastboot. Changes in v4: - parse DT for quirk, base address and maximum speed - use 1 bit for usb2_phyif_utmi_width instead of 5bit Changes in v3: - remove utmi width DT parse from borad init - Parse the DT for utmi+ interface width in dwc3 driver - move the config into Kconfig file. Changes in v2: - parse dt for utmi width - use a variable to identify utmi+ bus width instead of CONFIG MACRO - remove config for USB2PHY UTMI BITS Kever Yang (4): rk3399: add a empty "sys_proto.h" header file board: evb-rk3399: add api to support dwc3 gadget usb: dwc3: add support for 16 bit UTMI+ interface config: rk3399: add support for dwc3 gadget arch/arm/include/asm/arch-rockchip/sys_proto.h | 10 +++++ board/rockchip/evb_rk3399/evb-rk3399.c | 51 ++++++++++++++++++++++++++ configs/evb-rk3399_defconfig | 17 +++++++++ drivers/usb/dwc3/core.c | 19 ++++++++++ drivers/usb/dwc3/core.h | 12 ++++++ 5 files changed, 109 insertions(+) create mode 100644 arch/arm/include/asm/arch-rockchip/sys_proto.h -- 1.9.1

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[U-Boot] [PATCH] video: ipu_common: fix build error
by Peng Fan 07 Sep '17

07 Sep '17

Some toolchains fail to build "clk->rate = (u64)(clk->parent->rate * 16) / div;" And the cast usage is wrong. Use the following code to fix the issue, " do_div(parent_rate, div); clk->rate = parent_rate; " Reported-by: Peter Robinson <pbrobinson(a)gmail.com> Signed-off-by: Peng Fan <van.freenix(a)gmail.com> Cc: Stefano Babic <sbabic(a)denx.de> Cc: Fabio Estevam <fabio.estevam(a)nxp.com> Cc: Tom Rini <trini(a)konsulko.com> Cc: Anatolij Gustschin <agust(a)denx.de> Cc: Peter Robinson <pbrobinson(a)gmail.com> --- Hi Peter, Please help test this patch to see whether this fix your issue or not. Thanks for pointing out this issue. Thanks, Peng. drivers/video/ipu_common.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/video/ipu_common.c b/drivers/video/ipu_common.c index 36d4b23..5676a0f 100644 --- a/drivers/video/ipu_common.c +++ b/drivers/video/ipu_common.c @@ -352,7 +352,9 @@ static int ipu_pixel_clk_set_rate(struct clk *clk, unsigned long rate) */ __raw_writel((div / 16) << 16, DI_BS_CLKGEN1(clk->id)); - clk->rate = (u64)(clk->parent->rate * 16) / div; + do_div(parent_rate, div); + + clk->rate = parent_rate; return 0; } -- 2.6.2

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[U-Boot] [PATCH 1/3] video: ipu: avoid overflow issue
by Peng Fan 06 Sep '17

06 Sep '17

Multiplication, as "clk->parent->rate * 16" may overflow. So use do_div to avoid such issue. Signed-off-by: Peng Fan <van.freenix(a)gmail.com> Signed-off-by: Sandor Yu <sandor.yu(a)nxp.com> Cc: Anatolij Gustschin <agust(a)denx.de> Cc: Stefano Babic <sbabic(a)denx.de> Cc: Fabio Estevam <fabio.estevam(a)nxp.com> --- drivers/video/ipu_common.c | 73 ++++++++++++++++++++++++++++++++++------------ 1 file changed, 54 insertions(+), 19 deletions(-) diff --git a/drivers/video/ipu_common.c b/drivers/video/ipu_common.c index 9f85102..36d4b23 100644 --- a/drivers/video/ipu_common.c +++ b/drivers/video/ipu_common.c @@ -19,6 +19,7 @@ #include <asm/errno.h> #include <asm/arch/imx-regs.h> #include <asm/arch/crm_regs.h> +#include <div64.h> #include "ipu.h" #include "ipu_regs.h" @@ -275,50 +276,84 @@ static inline void ipu_ch_param_set_buffer(uint32_t ch, int bufNum, static void ipu_pixel_clk_recalc(struct clk *clk) { - u32 div = __raw_readl(DI_BS_CLKGEN0(clk->id)); - if (div == 0) - clk->rate = 0; - else - clk->rate = (clk->parent->rate * 16) / div; + u32 div; + u64 final_rate = (unsigned long long)clk->parent->rate * 16; + + div = __raw_readl(DI_BS_CLKGEN0(clk->id)); + debug("read BS_CLKGEN0 div:%d, final_rate:%lld, prate:%ld\n", + div, final_rate, clk->parent->rate); + + clk->rate = 0; + if (div != 0) { + do_div(final_rate, div); + clk->rate = final_rate; + } } static unsigned long ipu_pixel_clk_round_rate(struct clk *clk, unsigned long rate) { - u32 div, div1; - u32 tmp; + u64 div, final_rate; + u32 remainder; + u64 parent_rate = (unsigned long long)clk->parent->rate * 16; + /* * Calculate divider * Fractional part is 4 bits, * so simply multiply by 2^4 to get fractional part. */ - tmp = (clk->parent->rate * 16); - div = tmp / rate; - + div = parent_rate; + remainder = do_div(div, rate); + /* Round the divider value */ + if (remainder > (rate / 2)) + div++; if (div < 0x10) /* Min DI disp clock divider is 1 */ div = 0x10; if (div & ~0xFEF) div &= 0xFF8; else { - div1 = div & 0xFE0; - if ((tmp/div1 - tmp/div) < rate / 4) - div = div1; - else - div &= 0xFF8; + /* Round up divider if it gets us closer to desired pix clk */ + if ((div & 0xC) == 0xC) { + div += 0x10; + div &= ~0xF; + } } - return (clk->parent->rate * 16) / div; + final_rate = parent_rate; + do_div(final_rate, div); + + return final_rate; } static int ipu_pixel_clk_set_rate(struct clk *clk, unsigned long rate) { - u32 div = (clk->parent->rate * 16) / rate; + u64 div, parent_rate; + u32 remainder; + + parent_rate = (unsigned long long)clk->parent->rate * 16; + div = parent_rate; + remainder = do_div(div, rate); + /* Round the divider value */ + if (remainder > (rate / 2)) + div++; + + /* Round up divider if it gets us closer to desired pix clk */ + if ((div & 0xC) == 0xC) { + div += 0x10; + div &= ~0xF; + } + if (div > 0x1000) + debug("Overflow, DI_BS_CLKGEN0 div:0x%x\n", (u32)div); __raw_writel(div, DI_BS_CLKGEN0(clk->id)); - /* Setup pixel clock timing */ + /* + * Setup pixel clock timing + * Down time is half of period + */ __raw_writel((div / 16) << 16, DI_BS_CLKGEN1(clk->id)); - clk->rate = (clk->parent->rate * 16) / div; + clk->rate = (u64)(clk->parent->rate * 16) / div; + return 0; } -- 2.6.2

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[U-Boot] [PATCH 0/5] QSPI: Falcon or single stage boot mode support
by Ravi Babu 29 Aug '17

29 Aug '17

This patch series fixes the Falcon or single stage boot mode for dra7xx platform. FDT fixup is added to update the memory DT node based DDR configuration for specific platform. Test verfied on dra7xx paltforms. Lokesh Vutla (2): spl: reorder the assignment of board info to global data arch: arm: omap: Declare size of ddr very early Ravi Babu (3): qspi: dra7xx: enable qspi-boot for dra7x paltform spl: fdt: support for fdt fixup for falcon boot boot: fdt: fixup the memory dt nodes falcon boot arch/arm/lib/Makefile | 1 + arch/arm/lib/bootm-fdt.c | 7 ++++++- arch/arm/mach-omap2/am33xx/board.c | 4 ++++ arch/arm/mach-omap2/hwinit-common.c | 1 + common/Makefile | 2 +- common/spl/spl.c | 42 ++++++++++++++++++++++++++++++++++++- configs/dra7xx_evm_defconfig | 6 ++++++ 7 files changed, 60 insertions(+), 3 deletions(-) -- 1.9.1

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[U-Boot] [PATCH v2] driver: net: ldpaa: Update priv->phydev after free()
by Ashish Kumar 14 Aug '17

14 Aug '17

From: Prabhakar Kushwaha <prabhakar.kushwaha(a)nxp.com> Even after memory free of phydev, priv is still pointing to the obsolete address. So update priv->phydev as NULL after memory free. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha(a)nxp.com> Signed-off-by: Ashish Kumar <Ashish.Kumar(a)nxp.com> --- v2: Add signoff drivers/net/ldpaa_eth/ldpaa_eth.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/net/ldpaa_eth/ldpaa_eth.c b/drivers/net/ldpaa_eth/ldpaa_eth.c index 4e61700..f235b62 100644 --- a/drivers/net/ldpaa_eth/ldpaa_eth.c +++ b/drivers/net/ldpaa_eth/ldpaa_eth.c @@ -587,8 +587,10 @@ static void ldpaa_eth_stop(struct eth_device *net_dev) #ifdef CONFIG_PHYLIB if (priv->phydev && bus != NULL) phy_shutdown(priv->phydev); - else + else { free(priv->phydev); + priv->phydev = NULL; + } #endif ldpaa_dpbp_free(); -- 1.9.1

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[U-Boot] [RFC 1/1] omap3: incorrect logical check in do_emif4_init
by Heinrich Schuchardt 14 Aug '17

14 Aug '17

((readl(&emif4_base->sdram_iodft_tlgc) & (1<<10)) == 0x01) is always false. This does not match the comment /*Wait till that bit clears*/ The problem was indicated by cppcheck. I do not have the hardware to test if the code change below leads to a correct system behavior. Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- arch/arm/mach-omap2/omap3/emif4.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-omap2/omap3/emif4.c b/arch/arm/mach-omap2/omap3/emif4.c index d540cf08d2..8197e7b032 100644 --- a/arch/arm/mach-omap2/omap3/emif4.c +++ b/arch/arm/mach-omap2/omap3/emif4.c @@ -76,7 +76,7 @@ static void do_emif4_init(void) regval |= (1<<10); writel(regval, &emif4_base->sdram_iodft_tlgc); /*Wait till that bit clears*/ - while ((readl(&emif4_base->sdram_iodft_tlgc) & (1<<10)) == 0x1); + while ((readl(&emif4_base->sdram_iodft_tlgc) & (1<<10)) != 0x0); /*Re-verify the DDR PHY status*/ while ((readl(&emif4_base->sdram_sts) & (1<<2)) == 0x0); -- 2.11.0

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[U-Boot] [PATCH] driver: net: ldpaa: Update priv->phydev after free()
by Ashish Kumar 11 Aug '17

11 Aug '17

From: Prabhakar Kushwaha <prabhakar.kushwaha(a)nxp.com> Even after memory free of phydev, priv is still pointing to the obsolete address. So update priv->phydev as NULL after memory free. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha(a)nxp.com> --- drivers/net/ldpaa_eth/ldpaa_eth.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/net/ldpaa_eth/ldpaa_eth.c b/drivers/net/ldpaa_eth/ldpaa_eth.c index 4e61700..f235b62 100644 --- a/drivers/net/ldpaa_eth/ldpaa_eth.c +++ b/drivers/net/ldpaa_eth/ldpaa_eth.c @@ -587,8 +587,10 @@ static void ldpaa_eth_stop(struct eth_device *net_dev) #ifdef CONFIG_PHYLIB if (priv->phydev && bus != NULL) phy_shutdown(priv->phydev); - else + else { free(priv->phydev); + priv->phydev = NULL; + } #endif ldpaa_dpbp_free(); -- 1.9.1

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[U-Boot] [PATCH v1 0/2] Add support for the A64-uQ7 modules
by Philipp Tomsich 11 Aug '17

11 Aug '17

This changeset adds support for the A64-uQ7 modules from Theobroma Systems, which is based on Allwinner's A64 (sun50iw1p1). It depends on the device-model support for the sunxi subarchitecture and the DM-based, dual-IO capable SPI driver which we submitted over the last couple of days. Given that these other patches are unmerged, this will (at this stage) mainly serve as a reference point to better point these other patchsets into perspective. Philipp Tomsich (2): dts: lynx: add sun50i-a64-lynx.dts for the A64-uQ7 lynx_defconfig: add defconfig for A64-uQ7 module arch/arm/dts/Makefile | 1 + arch/arm/dts/sun50i-a64-lynx.dts | 247 +++++++++++++++++++++++++++++++++++++++ configs/lynx_defconfig | 84 +++++++++++++ 3 files changed, 332 insertions(+) create mode 100644 arch/arm/dts/sun50i-a64-lynx.dts create mode 100644 configs/lynx_defconfig -- 1.9.1

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