December 2017 - U-Boot

[U-Boot] Parallel make issue with helloworld.efi
by Tuomas Tynkkynen 29 May '18

29 May '18

Hi, Every now and then I see parallel builds failing, e.g. with Linksprite_pcDuino3_Nano_defconfig: CC lib/efi_loader/efi_bootmgr.o CC lib/efi_loader/efi_disk.o CC lib/efi_loader/efi_net.o make[2]: *** No rule to make target 'lib/efi_loader/helloworld.efi', needed by '__build'. Stop. make[2]: *** Waiting for unfinished jobs.... CC lib/efi_loader/efi_smbios.o make[1]: *** [scripts/Makefile.build:425: lib/efi_loader] Error 2 make: *** [Makefile:1279: lib] Error 2 This has been going for a while now (since ~2017.03 or so). Anybody have ideas on how to express the dependency properly? Thanks! - Tuomas

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[U-Boot] [RFC PATCH 0/4] Allwinner H6 support for U-Boot
by Icenowy Zheng 08 May '18

08 May '18

Allwinner H6 is a new SoC, which have peripherals with highest speed among current Allwinner products (USB3.0 and PCI Express); it's memory map has also totally changed. This patchset try to add initial support for it. The first two patches are fixes for SPL-less build, as H6 has currently no SPL support. The third patch adds initial support for H6, and the fourth patch adds a defconfig for Pine H64 as an example. Icenowy Zheng (4): sunxi: hide DRAM parameter options when not building SPL sunxi: fix image size restriction when SPL is not built sunxi: add initial Allwinner H6 support sunxi: add support for Pine H64 board arch/arm/dts/Makefile | 2 + arch/arm/dts/sun50i-h6-pine-h64.dts | 64 ++++++ arch/arm/dts/sun50i-h6.dtsi | 140 ++++++++++++ arch/arm/dts/sunxi-u-boot.dtsi | 4 + arch/arm/include/asm/arch-sunxi/clock.h | 2 + arch/arm/include/asm/arch-sunxi/clock_sun50i_h6.h | 266 ++++++++++++++++++++++ arch/arm/include/asm/arch-sunxi/cpu.h | 2 + arch/arm/include/asm/arch-sunxi/cpu_sun50i_h6.h | 73 ++++++ arch/arm/include/asm/arch-sunxi/gpio.h | 1 + arch/arm/include/asm/arch-sunxi/mmc.h | 2 +- arch/arm/include/asm/arch-sunxi/timer.h | 2 +- arch/arm/mach-sunxi/Kconfig | 10 + arch/arm/mach-sunxi/Makefile | 3 +- arch/arm/mach-sunxi/board.c | 6 +- arch/arm/mach-sunxi/clock_sun50i_h6.c | 39 ++++ arch/arm/mach-sunxi/cpu_info.c | 2 + board/sunxi/MAINTAINERS | 5 + board/sunxi/board.c | 2 +- configs/pine_h64_defconfig | 9 + drivers/mmc/sunxi_mmc.c | 11 + env/Kconfig | 3 +- include/configs/sun50i.h | 5 + include/configs/sunxi-common.h | 5 +- 23 files changed, 651 insertions(+), 7 deletions(-) create mode 100644 arch/arm/dts/sun50i-h6-pine-h64.dts create mode 100644 arch/arm/dts/sun50i-h6.dtsi create mode 100644 arch/arm/include/asm/arch-sunxi/clock_sun50i_h6.h create mode 100644 arch/arm/include/asm/arch-sunxi/cpu_sun50i_h6.h create mode 100644 arch/arm/mach-sunxi/clock_sun50i_h6.c create mode 100644 configs/pine_h64_defconfig -- 2.14.2

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[U-Boot] [PATCH v3 0/2] sunxi: Fix boot of Cubietruk and al.
by Maxime Ripard 08 May '18

08 May '18

Hi Most featureful boards, such as the Cubietruck, have been broken since the release 2017.09 (the two variants of the Olinuxino-Lime2 and the cubietruck at least, possibly more since then). This is due to a size increase of the binary that will trip us across the size we've been using in our default configuration since forever, and widely distributed through the u-boot-sunxi-with-spl.bin file. We would have several ways to work around it. The first one would be to just increase the offset of the environment. However, since it would break all the environments of our users and possibly the custom partition scheme that they would have created, it doesn't really seem like a smart move. The second one would be to move the environment to a filesystem file, which would also break all the existing users. This can be envisionned as a long term fix though. Another one would be to start trimming down a bit our enabled options in order to reduce the size and to gain some extra space for users customisations. However, this will always result in pointless and endless discussions, so let's move away from that. The final one that has been implemented would be to just build U-Boot using thumb2 to push back the issue until hopefully I'm no longer maintainer or the switch to the env filesystem would have been done. I've also added a patch to make sure that the compilation breaks and that we can notice. Maxime Changes from v2: - Reorder the patches - Changed the wording of U-boot to U-Boot - Changed the hardcoded value for CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR Maxime Ripard (2): sunxi: Enable THUMB build for the U-Boot binary sunxi: binman: Add U-Boot binary size check arch/arm/Kconfig | 1 + arch/arm/dts/sunxi-u-boot.dtsi | 12 ++++++++++++ 2 files changed, 13 insertions(+) -- 2.14.2

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[U-Boot] [RFC PATCH] rockchip: asus c201 support
by Marty E. Plummer 02 May '18

02 May '18

From: "Marty E. Plummer" <hanetzer(a)protonmail.com> I realize this patch is not up to standards for the sake of mainlining right now, but I'm mostly interested in getting some feedback on how to make it work before getting into the nicities of mainline inclusion. As of right now the bulk of this is the rk3288-veyron-speedy.dts file, which I assume has a similar enough boot system to the jerry and minnie. If the resultant u-boot-spl.bin and u-boot-dtb.img are prepared according to the instructions in doc/README.rockchip and then flashed to the c201's spi memory I get very little in the way of result; the most I/O that to be seen is the board reacts to the power switch (led on, led off). I can not seem to get it to output the u-boot console to the built-in screen, and currently do not have a mini-hdmi cable to see if that is working or not (one is ordered, arrives thursday). Can't find a location to purchase a servo board for better debugging possibilities. I was hoping someone on this mailing list could assist me in getting this to work; once a working setup is figured I'll do proper patchset for mainline inclusion. Regards, Marty --- arch/arm/dts/Makefile | 1 + arch/arm/dts/rk3288-veyron-speedy.dts | 203 ++++++++++++++++++++++++++++++ arch/arm/mach-rockchip/rk3288-board-spl.c | 3 +- arch/arm/mach-rockchip/rk3288/Kconfig | 11 ++ board/google/veyron/Kconfig | 16 +++ configs/chromebook_speedy_defconfig | 92 ++++++++++++++ drivers/mtd/spi/spi_flash_ids.c | 1 + 7 files changed, 326 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/rk3288-veyron-speedy.dts create mode 100644 configs/chromebook_speedy_defconfig diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 7c062f0cad..c8630889dc 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -41,6 +41,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \ rk3288-veyron-jerry.dtb \ rk3288-veyron-mickey.dtb \ rk3288-veyron-minnie.dtb \ + rk3288-veyron-speedy.dtb \ rk3288-vyasa.dtb \ rk3328-evb.dtb \ rk3368-lion.dtb \ diff --git a/arch/arm/dts/rk3288-veyron-speedy.dts b/arch/arm/dts/rk3288-veyron-speedy.dts new file mode 100644 index 0000000000..51e155d141 --- /dev/null +++ b/arch/arm/dts/rk3288-veyron-speedy.dts @@ -0,0 +1,203 @@ +/* + * Google Veyron Speedy Rev 1+ board device tree source + * + * Copyright 2015 Google, Inc + * + * SPDX-License-Identifier: GPL-2.0 + */ + +/dts-v1/; +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/pinctrl/rockchip.h> +#include "rk3288-veyron-chromebook.dtsi" +#include "cros-ec-sbs.dtsi" + +/ { + model = "Google Jerry"; + compatible = "google,veyron-speedy-rev9", "google,veyron-speedy-rev8", + "google,veyron-speedy-rev7", "google,veyron-speedy-rev6", + "google,veyron-speedy-rev5", "google,veyron-speedy-rev4", + "google,veyron-speedy-rev3", "google,veyron-speedy-rev2", + "google,veyron-speedy", "google,veyron", "rockchip,rk3288"; + + /* chosen { */ + /* stdout-path = &uart1; */ + /* }; */ + + panel_regulator: panel-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio7 RK_PB6 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&lcd_enable_h>; + regulator-name = "panel_regulator"; + vin-supply = <&vcc33_sys>; + }; + + vcc18_lcd: vcc18-lcd { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio2 RK_PB5 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&avdd_1v8_disp_en>; + regulator-name = "vcc18_lcd"; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vcc18_wl>; + }; + + backlight_regulator: backlight-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&bl_pwr_en>; + regulator-name = "backlight_regulator"; + vin-supply = <&vcc33_sys>; + startup-delay-us = <15000>; + }; +}; + +&dmc { + rockchip,pctl-timing = <0x215 0xc8 0x0 0x35 0x26 0x2 0x70 0x2000d + 0x6 0x0 0x8 0x4 0x17 0x24 0xd 0x6 + 0x4 0x8 0x4 0x76 0x4 0x0 0x30 0x0 + 0x1 0x2 0x2 0x4 0x0 0x0 0xc0 0x4 + 0x8 0x1f4>; + rockchip,phy-timing = <0x48d7dd93 0x187008d8 0x121076 + 0x0 0xc3 0x6 0x1>; + rockchip,sdram-params = <0x20D266A4 0x5B6 6 533000000 6 13 0>; +}; + +&gpio_keys { + power { + gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; + }; +}; + +&backlight { + power-supply = <&backlight_regulator>; +}; + +&cpu_alert0 { + temperature = <65000>; +}; + +&cpu_alert1 { + temperature = <70000>; +}; + +&panel { + power-supply = <&panel_regulator>; +}; + +&rk808 { + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int_l>; +}; + +&sdmmc { + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_gpio + &sdmmc_bus4>; + disable-wp; +}; + +&vcc_5v { + enable-active-high; + /* gpio = <&gpio7 21 GPIO_ACTIVE_HIGH>; */ + pinctrl-names = "default"; + pinctrl-0 = <&drv_5v>; +}; + +&vcc50_hdmi { + enable-active-high; + gpio = <&gpio5 19 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc50_hdmi_en>; +}; + +&edp { + /* pinctrl-names = "default"; */ + /* pinctrl-0 = <&edp_hpd>; */ + /delete-property/pinctrl-names; + /delete-property/pinctrl-0; + + force-hpd; +}; + +&pinctrl { + backlight { + bl_pwr_en: bl_pwr_en { + rockchip,pins = <2 12 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + buck-5v { + drv_5v: drv-5v { + rockchip,pins = <7 21 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + edp { + edp_hpd: edp_hpd { + rockchip,pins = <7 11 RK_FUNC_2 &pcfg_pull_down>; + }; + }; + + emmc { + /* Make sure eMMC is not in reset */ + emmc_deassert_reset: emmc-deassert-reset { + rockchip,pins = <2 9 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + hdmi { + vcc50_hdmi_en: vcc50-hdmi-en { + rockchip,pins = <5 19 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + lcd { + lcd_enable_h: lcd-en { + rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + avdd_1v8_disp_en: avdd-1v8-disp-en { + rockchip,pins = <2 13 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pmic { + dvs_1: dvs-1 { + rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_down>; + }; + + dvs_2: dvs-2 { + rockchip,pins = <7 15 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; +}; + +/* &i2c4 { */ +/* status = "okay"; */ + +/* pinctrl-names = "default"; */ +/* pinctrl-0 = <&i2c4_xfer>; */ + +/* trackpad@15 { */ +/* compatible = "elan,i2c_touchpad"; */ +/* interrupt-parent = <&gpio7>; */ +/* interrupts = <3 IRQ_TYPE_EDGE_FALLING>; */ +/* /* */ +/* * Remove the inherited pinctrl settings to avoid clashing */ +/* * with bus-wide ones. */ +/* *1/ */ +/* /delete-property/pinctrl-names; */ +/* /delete-property/pinctrl-0; */ +/* reg = <0x15>; */ +/* vcc-supply = <&vcc33_io>; */ +/* wakeup-source; */ +/* }; */ +/* }; */ diff --git a/arch/arm/mach-rockchip/rk3288-board-spl.c b/arch/arm/mach-rockchip/rk3288-board-spl.c index 6b7bf85d8d..5b76114d9b 100644 --- a/arch/arm/mach-rockchip/rk3288-board-spl.c +++ b/arch/arm/mach-rockchip/rk3288-board-spl.c @@ -69,7 +69,8 @@ u32 spl_boot_device(void) fallback: #elif defined(CONFIG_TARGET_CHROMEBOOK_JERRY) || \ defined(CONFIG_TARGET_CHROMEBIT_MICKEY) || \ - defined(CONFIG_TARGET_CHROMEBOOK_MINNIE) + defined(CONFIG_TARGET_CHROMEBOOK_MINNIE) || \ + defined(CONFIG_TARGET_CHROMEBOOK_SPEEDY) return BOOT_DEVICE_SPI; #endif return BOOT_DEVICE_MMC1; diff --git a/arch/arm/mach-rockchip/rk3288/Kconfig b/arch/arm/mach-rockchip/rk3288/Kconfig index 4ad2940069..04377f9ea8 100644 --- a/arch/arm/mach-rockchip/rk3288/Kconfig +++ b/arch/arm/mach-rockchip/rk3288/Kconfig @@ -30,6 +30,17 @@ config TARGET_CHROMEBOOK_MINNIE functions. It includes 2 or 4GB of SDRAM and 16 or 32GB of internal MMC. The product name is ASUS Chromebook Flip. +config TARGET_CHROMEBOOK_SPEEDY + bool "Google/Rockchip Veyron-Speedy Chromebook" + select BOARD_LATE_INIT + help + Speedy is a RK3288-based clamshell device with 2 USB 2.0 ports, + micro HDMI, an 11.6 inch display, micro-SD card, + HD camera, touchpad, wifi and Bluetooth. It includes a Chrome OS + EC (Cortex-M3) to provide access to the keyboard and battery + functions. It includes 2 or 4GB of SDRAM and 16GB of internal MMC. + The product name is Asus Chromebook C201PA. + config TARGET_EVB_RK3288 bool "Evb-RK3288" select BOARD_LATE_INIT diff --git a/board/google/veyron/Kconfig b/board/google/veyron/Kconfig index 770e9aad28..7f55d78dac 100644 --- a/board/google/veyron/Kconfig +++ b/board/google/veyron/Kconfig @@ -45,3 +45,19 @@ config BOARD_SPECIFIC_OPTIONS # dummy def_bool y endif + +if TARGET_CHROMEBOOK_SPEEDY + +config SYS_BOARD + default "veyron" + +config SYS_VENDOR + default "google" + +config SYS_CONFIG_NAME + default "veyron" + +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y + +endif diff --git a/configs/chromebook_speedy_defconfig b/configs/chromebook_speedy_defconfig new file mode 100644 index 0000000000..9626be9743 --- /dev/null +++ b/configs/chromebook_speedy_defconfig @@ -0,0 +1,92 @@ +CONFIG_ARM=y +CONFIG_ARCH_ROCKCHIP=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_ROCKCHIP_RK3288=y +# CONFIG_SPL_MMC_SUPPORT is not set +CONFIG_TARGET_CHROMEBOOK_SPEEDY=y +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI_SUPPORT=y +CONFIG_SPL_STACK_R_ADDR=0x80000 +CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-speedy" +CONFIG_DEBUG_UART=y +# CONFIG_ANDROID_BOOT_IMAGE is not set +CONFIG_SILENT_CONSOLE=y +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +# CONFIG_CMD_IMLS is not set +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +CONFIG_CMD_SF_TEST=y +CONFIG_CMD_SPI=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_CACHE=y +CONFIG_CMD_TIME=y +CONFIG_CMD_PMIC=y +CONFIG_CMD_REGULATOR=y +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_ISO_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_SPL_PARTITION_UUIDS=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_SPL_OF_PLATDATA=y +CONFIG_REGMAP=y +CONFIG_SPL_REGMAP=y +CONFIG_SYSCON=y +CONFIG_SPL_SYSCON=y +# CONFIG_SPL_SIMPLE_BUS is not set +CONFIG_CLK=y +CONFIG_SPL_CLK=y +CONFIG_ROCKCHIP_GPIO=y +CONFIG_I2C_CROS_EC_TUNNEL=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_I2C_MUX=y +CONFIG_DM_KEYBOARD=y +CONFIG_CROS_EC_KEYB=y +CONFIG_CROS_EC=y +CONFIG_CROS_EC_SPI=y +CONFIG_PWRSEQ=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_PINCTRL=y +CONFIG_SPL_PINCTRL=y +# CONFIG_SPL_PINCTRL_FULL is not set +CONFIG_PINCTRL_ROCKCHIP_RK3288=y +CONFIG_DM_PMIC=y +# CONFIG_SPL_PMIC_CHILDREN is not set +CONFIG_PMIC_RK8XX=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_REGULATOR_RK8XX=y +CONFIG_PWM_ROCKCHIP=y +CONFIG_RAM=y +CONFIG_SPL_RAM=y +CONFIG_DEBUG_UART_BASE=0xff690000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYS_NS16550=y +CONFIG_ROCKCHIP_SERIAL=y +CONFIG_ROCKCHIP_SPI=y +CONFIG_SYSRESET=y +CONFIG_USB=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DWC2_OTG=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_G_DNL_MANUFACTURER="Rockchip" +CONFIG_G_DNL_VENDOR_NUM=0x2207 +CONFIG_G_DNL_PRODUCT_NUM=0x320a +CONFIG_DM_VIDEO=y +CONFIG_DISPLAY=y +CONFIG_VIDEO_ROCKCHIP=y +CONFIG_DISPLAY_ROCKCHIP_EDP=y +CONFIG_DISPLAY_ROCKCHIP_HDMI=y +CONFIG_USE_TINY_PRINTF=y +CONFIG_CMD_DHRYSTONE=y +CONFIG_ERRNO_STR=y +# CONFIG_SPL_OF_LIBFDT is not set diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c index 13f64e773f..cbfd8b7636 100644 --- a/drivers/mtd/spi/spi_flash_ids.c +++ b/drivers/mtd/spi/spi_flash_ids.c @@ -63,6 +63,7 @@ const struct spi_flash_info spi_flash_ids[] = { {"en25s64", INFO(0x1c3817, 0x0, 64 * 1024, 128, 0) }, #endif #ifdef CONFIG_SPI_FLASH_GIGADEVICE /* GIGADEVICE */ + {"gd25q32b", INFO(0xc84016, 0x0, 64 * 1024, 64, SECT_4K) }, {"gd25q64b", INFO(0xc84017, 0x0, 64 * 1024, 128, SECT_4K) }, {"gd25lq32", INFO(0xc86016, 0x0, 64 * 1024, 64, SECT_4K) }, #endif -- 2.14.2

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[U-Boot] [RFC PATCH 00/13] Nexell S5P6818 SoC support
by Andre Przywara 12 Apr '18

12 Apr '18

Hi, this is a first draft of the things Amit and I have been working on in the last months. It introduces support for an SoC called "Nexell S5P6818". This is an Octa-core ARMv8 SoC with Cortex-A53 cores, which apparently is closely related to (older) Samsung SoCs. Many peripherals are compatible to Samsung IP (UART, MMC, Ethernet, timers, ...), but some core peripherals like the clocks and the pin controller seem to be completely different. We used the NanoPi M3 board [1] for testing, which uses this SoC along with the usual suspects of on-board components and connectors. This port is done completely from scratch, by just looking at the manual. This allows a much cleaner and modern U-Boot support than the BSP code. The ARM Generic Timer (aka. arch timer) does not seem to work on this SoC. Ideally there would be some (hidden?) register enabling the right clock source, though we haven't found one (yet). But as also other code for this SoC out there on the net does not seem to be able to use the arch timer, I am not too hopeful here. While this does not impose a real problem to U-Boot (patch 3/13 takes care of that), it is a showstopper for mainline arm64 Linux, which heavily relies on the arch timer (since it's a mandatory part of the ARMv8 architecture). There is only a very small chance that the arch timer ever becomes optional in the mainline arm64 kernel. However our arm(32) kernel ports works quite nicely so far, also a (hacked) arm64 kernel boots to the prompt. We will submit Linux patches at a later time. We would be grateful to get some comments on the patches. The first five patches adapt existing code to simplify support for this SoC. The following six patches then successively enable and add SoC support, culmulating in the addition of a nanopi_m3_defconfig file in patch 11/13. The SoC support code is actually architecture agnostic, though up until the last patch it generates an AArch64 binary. To overcome the problems with the arch timer mentioned above, the final patch switches the port over to AArch32, which can more naturally launch arm kernels. This code so far does not include an SPL, instead it relies on some vendor provided code to initialise the DRAM and load U-Boot proper. The original BSP code provided a binary blob for that (called "secondboot"), although there is some GPLed version of that available on github([2]). We can load a 32-bit U-Boot with both the vendor blob and Rafaello's GPL version, the 64-bit version is only usable with the GPL code. Instruction on how to create a bootable SD card are contained in the arch/arm/mach-nexell/README file. We would be very grateful to get some first feedback on those patches and the approach in general taken here. Cheers, Andre. [1] http://nanopi.io/nanopi-m3.html [2] https://github.com/rafaello7/bl1-nanopi-m3 Amit Singh Tomar (4): reset: add driver for generic reset controllers mmc: add MMC (glue) driver for Nexell SoCs arm: nexell: add ARM64 MMU regions arm: nexell: add timer support Andre Przywara (9): serial: s5p: rework Samsung UART driver to get rid of uart.h serial: S5P/Samsung: refactor and Kconfig-ize UART selection arm: move SYS_ARCH_TIMER to KConfig arm: add basic framework for Nexell S5P6818 support arm: nexell: embed NSIH header arm: nexell: add UART support arm: nexell: add preliminary S5P6818 SoC device tree arm: add NanoPi M3 board support arm: nexell: switch to 32-bit arch/arm/Kconfig | 29 +++++ arch/arm/Makefile | 1 + arch/arm/cpu/armv8/Makefile | 2 +- arch/arm/dts/s5p6818-nanopi-m3.dts | 30 +++++ arch/arm/dts/s5p6818.dtsi | 196 ++++++++++++++++++++++++++++++ arch/arm/dts/s5pc1xx-goni.dts | 2 +- arch/arm/dts/s5pc1xx-smdkc100.dts | 2 +- arch/arm/include/asm/arch-nexell/boot0.h | 35 ++++++ arch/arm/include/asm/arch-nexell/clk.h | 15 +++ arch/arm/include/asm/arch-nexell/pwm.h | 62 ++++++++++ arch/arm/mach-exynos/include/mach/uart.h | 44 ------- arch/arm/mach-imx/mx7ulp/Kconfig | 1 + arch/arm/mach-nexell/Kconfig | 9 ++ arch/arm/mach-nexell/Makefile | 10 ++ arch/arm/mach-nexell/README | 49 ++++++++ arch/arm/mach-nexell/board.c | 128 +++++++++++++++++++ arch/arm/mach-nexell/mmu-arm64.c | 39 ++++++ arch/arm/mach-s5pc1xx/Kconfig | 2 + arch/arm/mach-s5pc1xx/include/mach/uart.h | 44 ------- configs/nanopi_m3_defconfig | 12 ++ drivers/mmc/Kconfig | 8 ++ drivers/mmc/Makefile | 1 + drivers/mmc/nexell_dw_mmc.c | 159 ++++++++++++++++++++++++ drivers/reset/Kconfig | 6 + drivers/reset/Makefile | 1 + drivers/reset/reset-generic.c | 111 +++++++++++++++++ drivers/serial/Kconfig | 6 + drivers/serial/Makefile | 2 +- drivers/serial/serial_s5p.c | 45 ++++++- include/configs/mx7ulp_evk.h | 1 - include/configs/s5p6818.h | 35 ++++++ include/configs/ti_armv7_keystone2.h | 1 - scripts/config_whitelist.txt | 1 - 33 files changed, 989 insertions(+), 100 deletions(-) create mode 100644 arch/arm/dts/s5p6818-nanopi-m3.dts create mode 100644 arch/arm/dts/s5p6818.dtsi create mode 100644 arch/arm/include/asm/arch-nexell/boot0.h create mode 100644 arch/arm/include/asm/arch-nexell/clk.h create mode 100644 arch/arm/include/asm/arch-nexell/pwm.h delete mode 100644 arch/arm/mach-exynos/include/mach/uart.h create mode 100644 arch/arm/mach-nexell/Kconfig create mode 100644 arch/arm/mach-nexell/Makefile create mode 100644 arch/arm/mach-nexell/README create mode 100644 arch/arm/mach-nexell/board.c create mode 100644 arch/arm/mach-nexell/mmu-arm64.c delete mode 100644 arch/arm/mach-s5pc1xx/include/mach/uart.h create mode 100644 configs/nanopi_m3_defconfig create mode 100644 drivers/mmc/nexell_dw_mmc.c create mode 100644 drivers/reset/reset-generic.c create mode 100644 include/configs/s5p6818.h -- 2.14.1

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[U-Boot] [PATCH 1/3] dm: Add migration plan for CONFIG_BLK
by Simon Glass 03 Apr '18

03 Apr '18

The CONFIG_BLK conversion involves quite invasive changes in the U-Boot code, with #ifdefs and different code paths. We should try to move over to this soon so we can drop the old code. Set a deadline of 9 months for this work, rounded up to the next release. Signed-off-by: Simon Glass <sjg(a)chromium.org> --- doc/driver-model/MIGRATION.txt | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) create mode 100644 doc/driver-model/MIGRATION.txt diff --git a/doc/driver-model/MIGRATION.txt b/doc/driver-model/MIGRATION.txt new file mode 100644 index 0000000000..d2fe027249 --- /dev/null +++ b/doc/driver-model/MIGRATION.txt @@ -0,0 +1,20 @@ +Migration Schedule +==================== + +U-Boot has been migrating to a new driver model since its introduction in +2014. This file describes the schedule for deprecation of pre-driver-model +features. + + +CONFIG_BLK +---------- + +Status: In progress +Deadline: 2018.05 + +Maintainers should submit patches for enabling CONFIG_BLK on all boards in +time for inclusion in the 2018.05 release. Boards not converted by this +time may be removed in a subsequent release. + +Note that this implies use of driver model for all block devices (e.g. +MMC, USB, SCSI, SATA). -- 2.14.0.rc1.383.gd1ce394fe2-goog

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[U-Boot] [PATCH] tools: buildman: prevent trying to use the working directory as build dorectory
by Lothar Waßmann 02 Apr '18

02 Apr '18

When the U-Boot base directory happens to have the same name as the branch that buildman is directed to use via the '-b' option and no output directory is specified with '-o', buildman happily starts removing the whole U-Boot sources eventually only stopped with the error message: OSError: [Errno 20] Not a directory: '../<branch-name>/boards.cfg Add a check to the builderthread.Mkdir function to verify that the path it tries to create does not match the current working directory. Signed-off-by: Lothar Waßmann <LW(a)KARO-electronics.de> --- tools/buildman/builderthread.py | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/tools/buildman/builderthread.py b/tools/buildman/builderthread.py index acaf500..3549029 100644 --- a/tools/buildman/builderthread.py +++ b/tools/buildman/builderthread.py @@ -7,6 +7,7 @@ import errno import glob import os import shutil +import sys import threading import command @@ -27,6 +28,9 @@ def Mkdir(dirname, parents = False): os.mkdir(dirname) except OSError as err: if err.errno == errno.EEXIST: + if os.path.realpath('.') == os.path.realpath(dirname): + print "Cannot create the current working directory '%s'!" % dirname + sys.exit(1) pass else: raise -- 2.1.4

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[U-Boot] [PATCH v3 00/14] log: Add a new logging feature
by Simon Glass 02 Apr '18

02 Apr '18

U-Boot currently has fairly rudimentary logging features. A basic printf() provides console output and debug() provides debug output which is activated if DEBUG is defined in the file containing the debug() statements. It would be useful to have a few more features: - control of debug output at runtime, so problems can potentially be debugged without recompiling U-Boot - control of which subsystems output debug information, so that (for example) it is possible to enable debugging for MMC or SATA at runtime - indication of severity with each message, so that the user can control whether just errors are displayed, warnings, or all debug messages - sending logging information to different destinations, such as console, memory, linux, etc, At present U-Boot has a logbuffer feature which records output in a memory buffer for later display or storage. This is useful but is not at present enabled for any board. This series introduced a new logging system which supports: - various log levels from panic to debug - log categories including all uclasses and a few others - log drivers to which all log records can be sent - log filters which control which log records make it to which drivers Enabling logging with the default options does not add much to code size. By default the maximum recorded log level is LOGL_INFO, meaning that debug messages (and above) are discarded a build-time. Increasing this level provides more run-time flexibility to enable/disable logging at the cost of increased code size. This feature is by no means finished. The README provides a long list of features and clean-ups that could be done. But hopefully this is a starting point for improving this important area in U-Boot. The series is available at u-boot-dm/log-working Changes in v3: - Rebase to master Changes in v2: - Add a comment as to why CONFIG_LOG_MAX_LEVEL is not defined - Change log levels to match new header - Change sandbox log level to 6 - Drop MAINTAINERS entries for files not added by this patch - Drop the special log() functions from the README - Drop the use of 'continue' in the macro - Fix LOG_SPL_MAX_LEVEL typo (should be SPL_LOG_MAX_LEVEL) - Fix function called when test command is selected - Fix help output for 'log test' - Fix up bad use of #if CONFIG_VAL() - use #ifdef instead - Line up log levels with Linux - Only execute log tests if CONFIG_LOG is enabled - Rename LOGL_WARN to LOGL_WARNING - Split pre-console address change into a separate patch - Update commit message to explain that this is not just for serial output Simon Glass (14): Revert "sandbox: remove os_putc() and os_puts()" sandbox: Adjust pre-console address to avoid conflict Revert "sandbox: Drop special case console code for sandbox" Move debug and logging support to a separate header mtdparts: Correct use of debug() Drop the log buffer log: Add an implemention of logging log: Add a console driver log: Add a 'log level' command log: Add a test command log: Plumb logging into the init sequence log: sandbox: Enable logging log: test: Add a pytest for logging log: Add documentation MAINTAINERS | 9 ++ arch/sandbox/cpu/os.c | 11 ++ cmd/Kconfig | 8 + cmd/Makefile | 2 +- cmd/log.c | 326 +++++--------------------------------- cmd/mtdparts.c | 3 - common/Kconfig | 86 ++++++++++ common/Makefile | 2 + common/board_f.c | 23 +-- common/board_r.c | 27 +--- common/console.c | 7 + common/image.c | 9 -- common/log.c | 245 ++++++++++++++++++++++++++++ common/log_console.c | 23 +++ common/stdio.c | 6 - configs/sandbox_defconfig | 5 +- doc/README.log | 214 +++++++++++++++++++++++++ include/asm-generic/global_data.h | 8 +- include/common.h | 46 +----- include/log.h | 297 ++++++++++++++++++++++++++++++++++ include/logbuff.h | 49 ------ include/os.h | 20 +++ include/post.h | 4 +- post/post.c | 9 -- post/tests.c | 4 - scripts/config_whitelist.txt | 1 - test/Makefile | 1 + test/log/Makefile | 7 + test/log/log_test.c | 203 ++++++++++++++++++++++++ test/py/tests/test_log.py | 101 ++++++++++++ 30 files changed, 1294 insertions(+), 462 deletions(-) create mode 100644 common/log.c create mode 100644 common/log_console.c create mode 100644 doc/README.log create mode 100644 include/log.h delete mode 100644 include/logbuff.h create mode 100644 test/log/Makefile create mode 100644 test/log/log_test.c create mode 100644 test/py/tests/test_log.py -- 2.15.0.448.gf294e3d99a-goog

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[U-Boot] [PATCH 0/4] Meson clock driver
by Beniamino Galvani 31 Mar '18

31 Mar '18

Hi, this is a basic clock driver for u-boot that supports enabling/disabling clock gates and getting their frequency. With this, some hardcoded initializations can be removed from the board code, and drivers can use the information from device tree to initialize clocks. Beniamino Galvani (4): ARM: dts: update gxbb-clkc.h from Linux 4.14 ARM: meson: add clock measurement function clk: add Amlogic meson clock driver meson: use the clock driver arch/arm/include/asm/arch-meson/clock.h | 34 ++++++ arch/arm/include/asm/arch-meson/gxbb.h | 10 -- arch/arm/include/asm/arch-meson/i2c.h | 11 -- arch/arm/mach-meson/Kconfig | 2 + arch/arm/mach-meson/Makefile | 2 +- arch/arm/mach-meson/clock.c | 45 ++++++++ board/amlogic/odroid-c2/odroid-c2.c | 4 +- board/amlogic/p212/p212.c | 3 +- drivers/clk/Makefile | 1 + drivers/clk/clk_meson.c | 196 ++++++++++++++++++++++++++++++++ drivers/i2c/meson_i2c.c | 20 +++- include/dt-bindings/clock/gxbb-clkc.h | 75 ++++++++++++ 12 files changed, 373 insertions(+), 30 deletions(-) create mode 100644 arch/arm/include/asm/arch-meson/clock.h delete mode 100644 arch/arm/include/asm/arch-meson/i2c.h create mode 100644 arch/arm/mach-meson/clock.c create mode 100644 drivers/clk/clk_meson.c -- 2.14.3

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[U-Boot] [PATCH] efi_stub: Fix GDT_NOTSYS check
by Alexander Graf 30 Mar '18

30 Mar '18

The get_codeseg32() wants to know if a passed in descriptor has flag GDT_NOTSYS set (desc & GDT_NOTSYS), not whether desc and GDT_NOTSYS are not != 0 (desk && GDT_NOTSYS). This is an obvious typo. Fix it up. Signed-off-by: Alexander Graf <agraf(a)suse.de> --- lib/efi/efi_stub.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/efi/efi_stub.c b/lib/efi/efi_stub.c index 1814960572..9788dedba7 100644 --- a/lib/efi/efi_stub.c +++ b/lib/efi/efi_stub.c @@ -182,7 +182,7 @@ static int get_codeseg32(void) << 16; base <<= 12; /* 4KB granularity */ limit <<= 12; - if ((desc & GDT_PRESENT) && (desc && GDT_NOTSYS) && + if ((desc & GDT_PRESENT) && (desc & GDT_NOTSYS) && !(desc & GDT_LONG) && (desc & GDT_4KB) && (desc & GDT_32BIT) && (desc & GDT_CODE) && CONFIG_SYS_TEXT_BASE > base && -- 2.12.3

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