December 2017 - U-Boot

[U-Boot] [PATCH] armv8: ls1046aqds: Adjust IFC timing for NOR flash
by York Sun 19 Dec '17

19 Dec '17

Increase setup, assertion and hold time related to chip-select signal. Additional delay is needed for the signal to propogate through FPGA. This adjustment slightly increase the read and write cycle but has no impact on burst read or write. Signed-off-by: York Sun <york.sun(a)nxp.com> --- This patch supersedes http://patchwork.ozlabs.org/patch/842859/ include/configs/ls1046aqds.h | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h index 1713e2c..29dc6d9 100644 --- a/include/configs/ls1046aqds.h +++ b/include/configs/ls1046aqds.h @@ -178,12 +178,13 @@ unsigned long get_board_ddr_clk(void); CSOR_NOR_TRHZ_80) #define CONFIG_SYS_NOR_FTIM0 (FTIM0_NOR_TACSE(0x4) | \ FTIM0_NOR_TEADC(0x5) | \ + FTIM0_NOR_TAVDS(0x6) | \ FTIM0_NOR_TEAHC(0x5)) #define CONFIG_SYS_NOR_FTIM1 (FTIM1_NOR_TACO(0x35) | \ FTIM1_NOR_TRAD_NOR(0x1a) | \ FTIM1_NOR_TSEQRAD_NOR(0x13)) -#define CONFIG_SYS_NOR_FTIM2 (FTIM2_NOR_TCS(0x4) | \ - FTIM2_NOR_TCH(0x4) | \ +#define CONFIG_SYS_NOR_FTIM2 (FTIM2_NOR_TCS(0x8) | \ + FTIM2_NOR_TCH(0x8) | \ FTIM2_NOR_TWPH(0xe) | \ FTIM2_NOR_TWP(0x1c)) #define CONFIG_SYS_NOR_FTIM3 0 -- 2.7.4

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[U-Boot] [PATCH 1/2] armv8: ls2080a: Increase load image len for NAND boot
by York Sun 19 Dec '17

19 Dec '17

From: Yuan Yao <yao.yuan(a)nxp.com> Again the image size increases and the length needs to be adjusted. Signed-off-by: York Sun <york.sun(a)nxp.com> --- include/configs/ls2080a_common.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index f897869..576785e 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -237,7 +237,7 @@ unsigned long long get_qixis_addr(void); #endif #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00100000 #define CONFIG_SYS_SPL_MALLOC_START 0x80200000 -#define CONFIG_SYS_MONITOR_LEN (640 * 1024) +#define CONFIG_SYS_MONITOR_LEN (1024 * 1024) #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ -- 2.7.4

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[U-Boot] [v4 1/3] armv8: ls1012ardb: clean up definitions for I2C IO expanders
by Yangbo Lu 19 Dec '17

19 Dec '17

This patch is to clean up definitions for I2C IO expanders. The value 0x10 of __SW_BOOT_EMU is wrong. It should be 0x2. Fixed it in this patch. Signed-off-by: Yangbo Lu <yangbo.lu(a)nxp.com> --- Changes for v4: - Added this patch. --- board/freescale/ls1012ardb/ls1012ardb.c | 14 +++++++------- include/configs/ls1012ardb.h | 18 ++++++++++-------- 2 files changed, 17 insertions(+), 15 deletions(-) diff --git a/board/freescale/ls1012ardb/ls1012ardb.c b/board/freescale/ls1012ardb/ls1012ardb.c index c6c1c71202..2f1d63742a 100644 --- a/board/freescale/ls1012ardb/ls1012ardb.c +++ b/board/freescale/ls1012ardb/ls1012ardb.c @@ -35,25 +35,25 @@ int checkboard(void) /* Initialize i2c early for Serial flash bank information */ i2c_set_bus_num(0); - if (i2c_read(I2C_MUX_IO1_ADDR, 1, 1, &in1, 1) < 0) { + if (i2c_read(I2C_MUX_IO_ADDR, I2C_MUX_IO_1, 1, &in1, 1) < 0) { printf("Error reading i2c boot information!\n"); return 0; /* Don't want to hang() on this error */ } puts("Version"); - if ((in1 & (~__SW_REV_MASK)) == __SW_REV_A) + if ((in1 & SW_REV_MASK) == SW_REV_A) puts(": RevA"); - else if ((in1 & (~__SW_REV_MASK)) == __SW_REV_B) + else if ((in1 & SW_REV_MASK) == SW_REV_B) puts(": RevB"); else puts(": unknown"); printf(", boot from QSPI"); - if ((in1 & (~__SW_BOOT_MASK)) == __SW_BOOT_EMU) + if ((in1 & SW_BOOT_MASK) == SW_BOOT_EMU) puts(": emu\n"); - else if ((in1 & (~__SW_BOOT_MASK)) == __SW_BOOT_BANK1) + else if ((in1 & SW_BOOT_MASK) == SW_BOOT_BANK1) puts(": bank1\n"); - else if ((in1 & (~__SW_BOOT_MASK)) == __SW_BOOT_BANK2) + else if ((in1 & SW_BOOT_MASK) == SW_BOOT_BANK2) puts(": bank2\n"); else puts("unknown\n"); @@ -152,7 +152,7 @@ int esdhc_status_fixup(void *blob, const char *compat) * 10 - eMMC Memory * 11 - SPI */ - if (i2c_read(I2C_MUX_IO1_ADDR, 0, 1, &io, 1) < 0) { + if (i2c_read(I2C_MUX_IO_ADDR, I2C_MUX_IO_0, 1, &io, 1) < 0) { printf("Error reading i2c boot information!\n"); return 0; /* Don't want to hang() on this error */ } diff --git a/include/configs/ls1012ardb.h b/include/configs/ls1012ardb.h index 794117062f..a1a563cb59 100644 --- a/include/configs/ls1012ardb.h +++ b/include/configs/ls1012ardb.h @@ -24,14 +24,16 @@ * I2C IO expander */ -#define I2C_MUX_IO1_ADDR 0x24 -#define __SW_BOOT_MASK 0xFC -#define __SW_BOOT_EMU 0x10 -#define __SW_BOOT_BANK1 0x00 -#define __SW_BOOT_BANK2 0x01 -#define __SW_REV_MASK 0x07 -#define __SW_REV_A 0xF8 -#define __SW_REV_B 0xF0 +#define I2C_MUX_IO_ADDR 0x24 +#define I2C_MUX_IO_0 0 +#define I2C_MUX_IO_1 1 +#define SW_BOOT_MASK 0x03 +#define SW_BOOT_EMU 0x02 +#define SW_BOOT_BANK1 0x00 +#define SW_BOOT_BANK2 0x01 +#define SW_REV_MASK 0xF8 +#define SW_REV_A 0xF8 +#define SW_REV_B 0xF0 /* MMC */ #ifdef CONFIG_MMC -- 2.14.1

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[U-Boot] [PATCH] board/ls2080a, ls1088a: Add check for mc-dpl applied in fdt
by Yogesh Gaur 19 Dec '17

19 Dec '17

In fdt_fixup_board_enet() perform fdt fixup, fdt_status_okay, only when both MC is applied and DPL is deployed. Else returns failure, fdt_status_fail(). This patch add this check for - LS2080A/LS2088A boards: in dir ls2080a, ls2080ardb and ls2080aqds - LS1088A board: in dir ls1088a Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur(a)nxp.com> --- board/freescale/ls1088a/ls1088a.c | 2 +- board/freescale/ls2080a/ls2080a.c | 2 +- board/freescale/ls2080aqds/ls2080aqds.c | 2 +- board/freescale/ls2080ardb/ls2080ardb.c | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/board/freescale/ls1088a/ls1088a.c b/board/freescale/ls1088a/ls1088a.c index 96d9ae7..2ce3fe6 100644 --- a/board/freescale/ls1088a/ls1088a.c +++ b/board/freescale/ls1088a/ls1088a.c @@ -360,7 +360,7 @@ void fdt_fixup_board_enet(void *fdt) return; } - if (get_mc_boot_status() == 0) + if ((get_mc_boot_status() == 0) && (get_dpl_apply_status() == 0)) fdt_status_okay(fdt, offset); else fdt_status_fail(fdt, offset); diff --git a/board/freescale/ls2080a/ls2080a.c b/board/freescale/ls2080a/ls2080a.c index 41417e9..c60a090 100644 --- a/board/freescale/ls2080a/ls2080a.c +++ b/board/freescale/ls2080a/ls2080a.c @@ -90,7 +90,7 @@ void fdt_fixup_board_enet(void *fdt) return; } - if (get_mc_boot_status() == 0) + if ((get_mc_boot_status() == 0) && (get_dpl_apply_status() == 0)) fdt_status_okay(fdt, offset); else fdt_status_fail(fdt, offset); diff --git a/board/freescale/ls2080aqds/ls2080aqds.c b/board/freescale/ls2080aqds/ls2080aqds.c index 1842d14..28c9538 100644 --- a/board/freescale/ls2080aqds/ls2080aqds.c +++ b/board/freescale/ls2080aqds/ls2080aqds.c @@ -295,7 +295,7 @@ void fdt_fixup_board_enet(void *fdt) return; } - if (get_mc_boot_status() == 0) + if ((get_mc_boot_status() == 0) && (get_dpl_apply_status() == 0)) fdt_status_okay(fdt, offset); else fdt_status_fail(fdt, offset); diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c index 827bfad..ee0f3a2 100644 --- a/board/freescale/ls2080ardb/ls2080ardb.c +++ b/board/freescale/ls2080ardb/ls2080ardb.c @@ -331,7 +331,7 @@ void fdt_fixup_board_enet(void *fdt) return; } - if (get_mc_boot_status() == 0) + if ((get_mc_boot_status() == 0) && (get_dpl_apply_status() == 0)) fdt_status_okay(fdt, offset); else fdt_status_fail(fdt, offset); -- 1.9.1

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[U-Boot] [v4 1/2] armv8: ls1043a/ls2080a: check SoC by device ID
by Wenbin song 19 Dec '17

19 Dec '17

Check LS1043A/LS2080a by device ID without using personality ID to determine revision number. This check applies to all various personalities of the same SoC family. Signed-off-by: Wenbin Song <wenbin.song(a)nxp.com> --- Changes for V1: None. Changes for v2: Modify the commit message and subject. Add SVR_DEV and IS_SVR_DEV mocros. Changes for V3: None. --- arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 8 ++++---- arch/arm/cpu/armv8/fsl-layerscape/fdt.c | 4 ++-- arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S | 9 ++++----- arch/arm/include/asm/arch-fsl-layerscape/soc.h | 4 ++-- drivers/net/fsl-mc/dpio/qbman_private.h | 4 ++-- drivers/usb/common/fsl-errata.c | 7 +++++-- 6 files changed, 19 insertions(+), 17 deletions(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c index ab5d76ea3b..021eb377a2 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c @@ -502,8 +502,8 @@ int arch_early_init_r(void) * erratum A009635 is valid only for LS2080A SoC and * its personalitiesi */ - svr_dev_id = get_svr() >> 16; - if (svr_dev_id == SVR_DEV_LS2080A) + svr_dev_id = get_svr(); + if (IS_SVR_DEV(svr_dev_id, SVR_DEV(SVR_LS2080A))) erratum_a009635(); #endif #if defined(CONFIG_SYS_FSL_ERRATUM_A009942) && defined(CONFIG_SYS_FSL_DDR) @@ -566,8 +566,8 @@ int timer_init(void) * For LS2080A SoC and its personalities, timer controller * offset is different */ - svr_dev_id = get_svr() >> 16; - if (svr_dev_id == SVR_DEV_LS2080A) + svr_dev_id = get_svr(); + if (IS_SVR_DEV(svr_dev_id, SVR_DEV(SVR_LS2080A))) cntcr = (u32 *)SYS_FSL_LS2080A_LS2085A_TIMER_ADDR; #endif diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c index cae59da803..d1a7d0de9c 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c @@ -145,7 +145,7 @@ static void fdt_fixup_gic(void *blob) val = gur_in32(&gur->svr); - if (SVR_SOC_VER(val) != SVR_LS1043A) { + if (!IS_SVR_DEV(val, SVR_DEV(SVR_LS1043A))) { align_64k = 1; } else if (SVR_REV(val) != REV1_0) { val = scfg_in32(&scfg->gic_align) & (0x01 << GIC_ADDR_BIT); @@ -327,7 +327,7 @@ static void fdt_fixup_msi(void *blob) rev = gur_in32(&gur->svr); - if (SVR_SOC_VER(rev) != SVR_LS1043A) + if (!IS_SVR_DEV(rev, SVR_DEV(SVR_LS1043A))) return; rev = SVR_REV(rev); diff --git a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S index fa93096c68..c089ceef32 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S +++ b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S @@ -37,9 +37,8 @@ ENTRY(get_gic_offset) ldr x2, =DCFG_CCSR_SVR ldr w2, [x2] rev w2, w2 - mov w3, w2 - ands w3, w3, #SVR_WO_E << 8 - mov w4, #SVR_LS1043A << 8 + lsr w3, w2, #16 + ldr w4, =SVR_DEV(SVR_LS1043A) cmp w3, w4 b.ne 1f ands w2, w2, #0xff @@ -92,7 +91,7 @@ ENTRY(lowlevel_init) */ bl get_svr lsr w0, w0, #16 - ldr w1, =SVR_DEV_LS2080A + ldr w1, =SVR_DEV(SVR_LS2080A) cmp w0, w1 b.eq 1f @@ -224,7 +223,7 @@ ENTRY(lowlevel_init) */ bl get_svr lsr w0, w0, #16 - ldr w1, =SVR_DEV_LS2080A + ldr w1, =SVR_DEV(SVR_LS2080A) cmp w0, w1 b.eq 1f diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h b/arch/arm/include/asm/arch-fsl-layerscape/soc.h index 247f09e0f5..09f64e7bd7 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h @@ -76,8 +76,6 @@ struct cpu_type { #define SVR_LS2081A 0x870918 #define SVR_LS2041A 0x870914 -#define SVR_DEV_LS2080A 0x8701 - #define SVR_MAJ(svr) (((svr) >> 4) & 0xf) #define SVR_MIN(svr) (((svr) >> 0) & 0xf) #define SVR_REV(svr) (((svr) >> 0) & 0xff) @@ -85,6 +83,8 @@ struct cpu_type { #define IS_E_PROCESSOR(svr) (!((svr >> 8) & 0x1)) #define IS_SVR_REV(svr, maj, min) \ ((SVR_MAJ(svr) == (maj)) && (SVR_MIN(svr) == (min))) +#define SVR_DEV(svr) ((svr) >> 8) +#define IS_SVR_DEV(svr, dev) (((svr) >> 16) == (dev)) /* ahci port register default value */ #define AHCI_PORT_PHY_1_CFG 0xa003fffe diff --git a/drivers/net/fsl-mc/dpio/qbman_private.h b/drivers/net/fsl-mc/dpio/qbman_private.h index 73bbae373e..873323be0f 100644 --- a/drivers/net/fsl-mc/dpio/qbman_private.h +++ b/drivers/net/fsl-mc/dpio/qbman_private.h @@ -175,8 +175,8 @@ void qbman_version(u32 *major, u32 *minor) * LS2080A SoC and its personalities has qbman cotroller version 4.0 * New SoCs like LS2088A, LS1088A has qbman conroller version 4.1 */ - svr_dev_id = get_svr() >> 16; - if (svr_dev_id == SVR_DEV_LS2080A) { + svr_dev_id = get_svr(); + if (IS_SVR_DEV(svr_dev_id, SVR_DEV(SVR_LS2080A))) { *major = 4; *minor = 0; } else { diff --git a/drivers/usb/common/fsl-errata.c b/drivers/usb/common/fsl-errata.c index 823beb32f6..6e2a464e0a 100644 --- a/drivers/usb/common/fsl-errata.c +++ b/drivers/usb/common/fsl-errata.c @@ -198,6 +198,11 @@ bool has_erratum_a010151(void) u32 svr = get_svr(); u32 soc = SVR_SOC_VER(svr); +#ifdef CONFIG_ARM64 + if (IS_SVR_DEV(svr, SVR_DEV(SVR_LS1043A))) + return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 1, 1); +#endif + switch (soc) { #ifdef CONFIG_ARM64 case SVR_LS2080A: @@ -209,8 +214,6 @@ bool has_erratum_a010151(void) case SVR_LS1046A: case SVR_LS1012A: return IS_SVR_REV(svr, 1, 0); - case SVR_LS1043A: - return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 1, 1); #endif #ifdef CONFIG_ARCH_LS1021A case SOC_VER_LS1020: -- 2.14.1

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[U-Boot] [PATCH v3] arm64: ls1012afrdm: Add distro boot support
by Rajesh Bhagat 19 Dec '17

19 Dec '17

Include common config_distro_defaults.h and config_distro_bootcmd.h for u-boot enviroments to support automatical distro boot which scan boot.scr from external storage devices(e.g. SD and USB) and execute autoboot script. Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya(a)nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat(a)nxp.com> --- Depends on: https://patchwork.ozlabs.org/patch/837811/ Changes in v3: - Rebased to dependency patch Changes in v2: - Removed the extra "\" character from macro definition - Dropped the #if for CONFIG_BOOTCOMMAND configs/ls1012afrdm_qspi_defconfig | 1 + include/configs/ls1012afrdm.h | 57 ++++++++++++++++++++++++++++++++------ 2 files changed, 49 insertions(+), 9 deletions(-) diff --git a/configs/ls1012afrdm_qspi_defconfig b/configs/ls1012afrdm_qspi_defconfig index fe95f04..42acff0 100644 --- a/configs/ls1012afrdm_qspi_defconfig +++ b/configs/ls1012afrdm_qspi_defconfig @@ -46,3 +46,4 @@ CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_USB_STORAGE=y +CONFIG_DISTRO_DEFAULTS=y diff --git a/include/configs/ls1012afrdm.h b/include/configs/ls1012afrdm.h index 5b4bf28..297c057 100644 --- a/include/configs/ls1012afrdm.h +++ b/include/configs/ls1012afrdm.h @@ -20,16 +20,55 @@ #define CONFIG_SYS_MEMTEST_START 0x80000000 #define CONFIG_SYS_MEMTEST_END 0x9fffffff +#ifndef CONFIG_SPL_BUILD +#undef BOOT_TARGET_DEVICES +#define BOOT_TARGET_DEVICES(func) \ + func(USB, usb, 0) +#endif + #undef CONFIG_EXTRA_ENV_SETTINGS -#define CONFIG_EXTRA_ENV_SETTINGS \ - "verify=no\0" \ - "loadaddr=0x80100000\0" \ - "kernel_addr=0x100000\0" \ - "fdt_high=0xffffffffffffffff\0" \ - "initrd_high=0xffffffffffffffff\0" \ - "kernel_start=0x1000000\0" \ - "kernel_load=0x96000000\0" \ - "kernel_size=0x2800000\0" +#define CONFIG_EXTRA_ENV_SETTINGS \ + "verify=no\0" \ + "fdt_high=0xffffffffffffffff\0" \ + "initrd_high=0xffffffffffffffff\0" \ + "fdt_addr=0x00f00000\0" \ + "kernel_addr=0x01000000\0" \ + "scriptaddr=0x80000000\0" \ + "fdtheader_addr_r=0x80100000\0" \ + "kernelheader_addr_r=0x80200000\0" \ + "kernel_addr_r=0x96000000\0" \ + "fdt_addr_r=0x90000000\0" \ + "load_addr=0x96000000\0" \ + "kernel_size=0x2800000\0" \ + "console=ttyS0,115200\0" \ + BOOTENV \ + "boot_scripts=ls1012afrdm_boot.scr\0" \ + "scan_dev_for_boot_part=" \ + "part list ${devtype} ${devnum} devplist; " \ + "env exists devplist || setenv devplist 1; " \ + "for distro_bootpart in ${devplist}; do " \ + "if fstype ${devtype} " \ + "${devnum}:${distro_bootpart} " \ + "bootfstype; then " \ + "run scan_dev_for_boot; " \ + "fi; " \ + "done\0" \ + "scan_dev_for_boot=" \ + "echo Scanning ${devtype} " \ + "${devnum}:${distro_bootpart}...; " \ + "for prefix in ${boot_prefixes}; do " \ + "run scan_dev_for_scripts; " \ + "done;" \ + "\0" \ + "installer=load usb 0:2 $load_addr " \ + "/flex_installer_arm64.itb; " \ + "bootm $load_addr#$board\0" \ + "qspi_bootcmd=echo Trying load from qspi..;" \ + "sf probe && sf read $load_addr " \ + "$kernel_addr $kernel_size && bootm $load_addr#$board\0" + +#undef CONFIG_BOOTCOMMAND +#define CONFIG_BOOTCOMMAND "run distro_bootcmd;run qspi_bootcmd" #define CONFIG_CMD_MEMINFO #define CONFIG_CMD_MEMTEST -- 2.7.4

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[U-Boot] [PATCH v5] arm64: ls1012ardb: Add distro boot support
by Rajesh Bhagat 19 Dec '17

19 Dec '17

Include common config_distro_defaults.h and config_distro_bootcmd.h for u-boot enviroments to support automatical distro boot which scan boot.scr from external storage devices(e.g. SD and USB) and execute autoboot script. Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya(a)nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat(a)nxp.com> --- Depends on: https://patchwork.ozlabs.org/patch/837811/ Changes in v5: - Rebased to dependency patch Changes in v4: - Removed the extra "\" character from macro definition - Dropped the #if for CONFIG_BOOTCOMMAND Changes in v3: Removed pfe stop command from BOOTCMD Changes in v2: Rebased to latest u-boot configs/ls1012ardb_qspi_defconfig | 1 + include/configs/ls1012a_common.h | 10 ++++++++- include/configs/ls1012ardb.h | 43 +++++++++++++++++++++++++++++++++++++++ 3 files changed, 53 insertions(+), 1 deletion(-) diff --git a/configs/ls1012ardb_qspi_defconfig b/configs/ls1012ardb_qspi_defconfig index 81702e3..39d7a54 100644 --- a/configs/ls1012ardb_qspi_defconfig +++ b/configs/ls1012ardb_qspi_defconfig @@ -50,3 +50,4 @@ CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_USB_STORAGE=y +CONFIG_DISTRO_DEFAULTS=y diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h index 57cae94..db920bc 100644 --- a/include/configs/ls1012a_common.h +++ b/include/configs/ls1012a_common.h @@ -87,6 +87,14 @@ #define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 128 +#include <config_distro_defaults.h> +#ifndef CONFIG_SPL_BUILD +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 0) \ + func(USB, usb, 0) +#include <config_distro_bootcmd.h> +#endif + /* Initial environment variables */ #define CONFIG_EXTRA_ENV_SETTINGS \ "verify=no\0" \ @@ -98,6 +106,7 @@ "kernel_load=0xa0000000\0" \ "kernel_size=0x2800000\0" \ +#undef CONFIG_BOOTCOMMAND #define CONFIG_BOOTCOMMAND "sf probe 0:0; sf read $kernel_load "\ "$kernel_start $kernel_size && "\ "bootm $kernel_load" @@ -105,7 +114,6 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ #define CONFIG_SYS_LONGHELP -#define CONFIG_CMDLINE_EDITING 1 #define CONFIG_AUTO_COMPLETE #define CONFIG_SYS_MAXARGS 64 /* max command args */ diff --git a/include/configs/ls1012ardb.h b/include/configs/ls1012ardb.h index 7941170..fc98ddc 100644 --- a/include/configs/ls1012ardb.h +++ b/include/configs/ls1012ardb.h @@ -60,6 +60,49 @@ #define CONFIG_SYS_MEMTEST_START 0x80000000 #define CONFIG_SYS_MEMTEST_END 0x9fffffff +#undef CONFIG_EXTRA_ENV_SETTINGS +#define CONFIG_EXTRA_ENV_SETTINGS \ + "verify=no\0" \ + "fdt_high=0xffffffffffffffff\0" \ + "initrd_high=0xffffffffffffffff\0" \ + "fdt_addr=0x00f00000\0" \ + "kernel_addr=0x01000000\0" \ + "scriptaddr=0x80000000\0" \ + "fdtheader_addr_r=0x80100000\0" \ + "kernelheader_addr_r=0x80200000\0" \ + "kernel_addr_r=0x81000000\0" \ + "fdt_addr_r=0x90000000\0" \ + "load_addr=0xa0000000\0" \ + "kernel_size=0x2800000\0" \ + "console=ttyS0,115200\0" \ + BOOTENV \ + "boot_scripts=ls1012ardb_boot.scr\0" \ + "scan_dev_for_boot_part=" \ + "part list ${devtype} ${devnum} devplist; " \ + "env exists devplist || setenv devplist 1; " \ + "for distro_bootpart in ${devplist}; do " \ + "if fstype ${devtype} " \ + "${devnum}:${distro_bootpart} " \ + "bootfstype; then " \ + "run scan_dev_for_boot; " \ + "fi; " \ + "done\0" \ + "scan_dev_for_boot=" \ + "echo Scanning ${devtype} " \ + "${devnum}:${distro_bootpart}...; " \ + "for prefix in ${boot_prefixes}; do " \ + "run scan_dev_for_scripts; " \ + "done;" \ + "\0" \ + "installer=load mmc 0:2 $load_addr " \ + "/flex_installer_arm64.itb; " \ + "bootm $load_addr#$board\0" \ + "qspi_bootcmd=echo Trying load from qspi..;" \ + "sf probe && sf read $load_addr " \ + "$kernel_addr $kernel_size && bootm $load_addr#$board\0" + +#undef CONFIG_BOOTCOMMAND +#define CONFIG_BOOTCOMMAND "run distro_bootcmd;run qspi_bootcmd" #include <asm/fsl_secure_boot.h> -- 2.7.4

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[U-Boot] [PATCH] armv8: ls1088ardb: support force SDHC mode by hwconfig
by Yangbo Lu 19 Dec '17

19 Dec '17

The BRDCFG5[SPISDHC] register field of Qixis device is used to control SPI and SDHC signal routing. 10 = Force SDHC Mode - SPI_CS[0] is routed to CPLD for SDHC_VS use. - SPI_CS[1] is unused. - SPI_CS[2:3] are routed to the TDMRiser slot. 11 = Force eMMC Mode - SPI_CS[0:3] are routed to the eMMC card. 0X = Auto Mode - If SDHC_CS_B=0 (SDHC card installed): Use SDHC mode described above. - Else SDHC_CS_B=1 (no SDHC card installed): Use eMMC mode described above. In default the hardware uses auto mode, but sometimes we need to use force SDHC mode to support SD card hotplug, or SD sleep waking up in kernel. This patch is to support force SDHC mode by hwconfig. Signed-off-by: Yangbo Lu <yangbo.lu(a)nxp.com> --- board/freescale/ls1088a/ls1088a.c | 18 ++++++++++++++++++ board/freescale/ls1088a/ls1088a_qixis.h | 6 ++++++ include/configs/ls1088ardb.h | 2 ++ 3 files changed, 26 insertions(+) diff --git a/board/freescale/ls1088a/ls1088a.c b/board/freescale/ls1088a/ls1088a.c index 96d9ae7f1d..60f40edb5a 100644 --- a/board/freescale/ls1088a/ls1088a.c +++ b/board/freescale/ls1088a/ls1088a.c @@ -18,6 +18,7 @@ #include <environment.h> #include <asm/arch-fsl-layerscape/soc.h> #include <asm/arch/ppa.h> +#include <hwconfig.h> #include "../common/qixis.h" #include "ls1088a_qixis.h" @@ -296,6 +297,23 @@ void board_retimer_init(void) select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT); } +#ifdef CONFIG_MISC_INIT_R +int misc_init_r(void) +{ +#ifdef CONFIG_TARGET_LS1088ARDB + u8 brdcfg5; + + if (hwconfig("esdhc-force-sd")) { + brdcfg5 = QIXIS_READ(brdcfg[5]); + brdcfg5 &= ~BRDCFG5_SPISDHC_MASK; + brdcfg5 |= BRDCFG5_FORCE_SD; + QIXIS_WRITE(brdcfg[5], brdcfg5); + } +#endif + return 0; +} +#endif + int board_init(void) { init_final_memctl_regs(); diff --git a/board/freescale/ls1088a/ls1088a_qixis.h b/board/freescale/ls1088a/ls1088a_qixis.h index 4790461b47..6cad396cff 100644 --- a/board/freescale/ls1088a/ls1088a_qixis.h +++ b/board/freescale/ls1088a/ls1088a_qixis.h @@ -36,4 +36,10 @@ #define BRDCFG9_SFPTX_MASK 0x10 #define BRDCFG9_SFPTX_SHIFT 4 +/* Definitions of QIXIS Registers for LS1088ARDB */ + +/* BRDCFG5 */ +#define BRDCFG5_SPISDHC_MASK 0x0C +#define BRDCFG5_FORCE_SD 0x08 + #endif diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h index e6bf2b8d87..f7b502d1b0 100644 --- a/include/configs/ls1088ardb.h +++ b/include/configs/ls1088ardb.h @@ -11,6 +11,8 @@ #define CONFIG_DISPLAY_BOARDINFO_LATE +#define CONFIG_MISC_INIT_R + #if defined(CONFIG_QSPI_BOOT) #define CONFIG_ENV_SIZE 0x2000 /* 8KB */ #define CONFIG_ENV_OFFSET 0x300000 /* 3MB */ -- 2.14.1

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[U-Boot] How to re-use the driver data for pre-reloc in post-reloc driver
by Kever Yang 19 Dec '17

19 Dec '17

Hi Simon, This is not the topic about disable the relocate feature in U-Boot proper. My target is re-use kernel dtb in U-Boot and U-Boot can work properly even if some of dts node in kernel is broken. - U-Boot mark a set of driver as u-boot,dm-pre-reloc, suppose to able to get into U-Boot shell with them. dram, syscon, serial, clock, pinctrl, emmc, and etc. In this case we can always make U-Boot works and get into shell. - When relocate, I would like to read dtb from kernel and use it for U-Boot driver. In this case, we can get periph driver setting for different board from kernel dtb, what we need most are: power/pmic, display, charger, input key and etc. The problem is, the dm architecture now always init all the driver from dtb after relocate, If anything missin in kernel dtb, the U-Boot hang there. What I met now in rockchip kernel(same in different SoCs) is: - no stdout in chosen, we use cmdline instead; - debug uart node not enabled; we may use ttyFIQ driver instead of uart driver for it. - no alias for emmc/sd, which is much in U-Boot; - compaptible for syscon may different, kernel may use "syscon", "simple-mfd" only, but U-Boot need "rockchip,rk3228-grf" for GRF and "rockchip,rk3228-PMU" for PMU and etc. Of cause I can update kernel source, but as you can see we are not able to cover all the case because kernel may have different use with U-Boot. If we do not need to re-init all the driver after relocate, or re-use the driver data, then we can have a *robust U-Boot only depends on U-Boot dtb with dm-pre-reloc*, and we can have a *good compatibility U-Boot with kernel dtb support* for different board/periph. Then U-Boot focus on SoC support, kernel focus on all kinds of board/periph support, U-Boot need to sync periph driver from kernel, so that if kernel works then U-Boot also works, developers do not need to develop one for kernel and one for U-Boot. Could you help to make a demo patch about how to re-use the driver-data of pre-reloc to post-reloc? Thanks, - Kever

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[U-Boot] [RFC] Design of UEFI drivers
by Heinrich Schuchardt 19 Dec '17

19 Dec '17

2a92080d8c4 [PATCH] efi_loader: add file/filesys support implemented the EFI_SIMPLE_FILE_SYSTEM_PROTOCOL. Unfortunately it assumes that the available media are constant. iPXE offers the possibility to attach iSCSI targets. On the handle for the attached target the EFI_BLOCK_IO_PROTOCOL and the EFI_DEVICE_PATH_PROTOCOL are installed. Afterwards the ConnectController boot service is called to connect drivers to the iSCSI target. This relates to the following statement in the UEFI spec: The firmware automatically creates handles for any block device that supports the following file system formats: - FAT12 - FAT16 - FAT32 iPXE expects that the driver for the EFI_SIMPLE_FILE_SYSTEM_PROTOCOL gets installed to a child handle representing the partitions of the attached iSCSI target. So I think we have to rewrite the EFI_SIMPLE_FILE_SYSTEM_PROTOCOL implementation as an UEFI driver. The driver handle shall implement the EFI_DRIVER_BINDING_PROTOCOL. For each attached disk we shall call the ConnectController boot service. It will call the supported() service for the driver binding protocol and in case of success the start() service. The driver will in turn install the EFI_SIMPLE_FILE_SYSTEM_PROTOCOL on the block io device. The same pattern could be applied to the simple EFI_SIMPLE_NETWORK_PROTOCOL and the EFI_GRAPHICS_OUTPUT_PROTOCOL. I now wonder what would be the best design. Should we have a uclass comprising all UEFI drivers? This would allow generating the UEFI driver handles by iterating the members of the uclass. Looking forward to your ideas. Best regards Heinrich

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