January 2017 - U-Boot

[U-Boot] [PATCH 0/3] armv8: fsl-layerscape: Update vid support
by Priyanka Jain 09 Mar '17

09 Mar '17

Priyanka Jain (3): armv8: fsl-layerscape: Updates DCFG register map. armv8: fsl-lsch3: Update VID support armv8: fsl-layerscape: Add vid support for LS2080AQDS. .../include/asm/arch-fsl-layerscape/immap_lsch3.h | 69 ++++++--- board/freescale/common/vid.c | 174 ++++++++++++++++++-- board/freescale/ls2080aqds/ls2080aqds.c | 9 + 3 files changed, 219 insertions(+), 33 deletions(-) -- 1.7.4.1

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[U-Boot] [PATCH][RFT] sunxi: power: axp809.c: Fix aldo1-2 being disabled for mvolt != 0
by Rask Ingemann Lambertsen 09 Mar '17

09 Mar '17

The execution flow is currently like this for aldo_num == 1 or 2: int axp_set_aldo(int aldo_num, unsigned int mvolt) { ... if (mvolt == 0) return pmic_bus_clrbits(AXP809_OUTPUT_CTRL1, AXP809_OUTPUT_CTRL1_ALDO1_EN << (aldo_num - 1)); ... return pmic_bus_clrbits(AXP809_OUTPUT_CTRL1, AXP809_OUTPUT_CTRL1_ALDO1_EN << (aldo_num - 1)); } I.e. aldo1 and aldo2 will always be disabled. This patch fixes it by setting (rather than clearing) the enable bit when mvolt != 0. Signed-off-by: Rask Ingemann Lambertsen <rask(a)formelder.dk> Fixes: 795857df413a ("sunxi: power: add AXP809 support") --- This patch needs someone to test it. I can't do so myself because I don't have any hardware with an AXP809 PMIC. I just happened to spot the bug when looking at the code. drivers/power/axp809.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/power/axp809.c b/drivers/power/axp809.c index c5b608d..5b5cb36 100644 --- a/drivers/power/axp809.c +++ b/drivers/power/axp809.c @@ -143,7 +143,7 @@ int axp_set_aldo(int aldo_num, unsigned int mvolt) if (aldo_num == 3) return pmic_bus_setbits(AXP809_OUTPUT_CTRL2, AXP809_OUTPUT_CTRL2_ALDO3_EN); - return pmic_bus_clrbits(AXP809_OUTPUT_CTRL1, + return pmic_bus_setbits(AXP809_OUTPUT_CTRL1, AXP809_OUTPUT_CTRL1_ALDO1_EN << (aldo_num - 1)); } -- 2.10.2 -- Rask Ingemann Lambertsen

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[U-Boot] [PATCH v3] usb: dwc2: add support for external vbus supply
by Simon Glass 07 Mar '17

07 Mar '17

From: Kever Yang <kever.yang(a)rock-chips.com> Some board do not use the dwc2 internal VBUS_DRV signal, but use a gpio pin to enable the 5.0V VBUS power, add interface to enable the power in dwc2 driver. Signed-off-by: Kever Yang <kever.yang(a)rock-chips.com> Signed-off-by: Simon Glass <sjg(a)chromium.org> --- Changes in v3: - Drop use of static variable drivers/usb/host/dwc2.c | 39 ++++++++++++++++++++++++++++++++++----- 1 file changed, 34 insertions(+), 5 deletions(-) diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c index d08879d..fa11364 100644 --- a/drivers/usb/host/dwc2.c +++ b/drivers/usb/host/dwc2.c @@ -15,6 +15,7 @@ #include <usbroothubdes.h> #include <wait_bit.h> #include <asm/io.h> +#include <power/regulator.h> #include "dwc2.h" @@ -159,6 +160,28 @@ static void dwc_otg_core_reset(struct dwc2_core_regs *regs) mdelay(100); } +static int dwc_vbus_supply_init(struct udevice *dev) +{ +#if defined(CONFIG_DM_USB) && defined(CONFIG_DM_REGULATOR) && \ + !defined(CONFIG_SPL_BUILD) + struct udevice *vbus_supply; + int ret; + + ret = device_get_supply_regulator(dev, "vbus-supply", &vbus_supply); + if (ret) { + debug("%s: No vbus supply\n", dev->name); + return 0; + } + + ret = regulator_set_enable(vbus_supply, true); + if (ret) { + error("Error enabling vbus supply\n"); + return ret; + } +#endif + return 0; +} + /* * This function initializes the DWC_otg controller registers for * host mode. @@ -167,10 +190,12 @@ static void dwc_otg_core_reset(struct dwc2_core_regs *regs) * request queues. Host channels are reset to ensure that they are ready for * performing transfers. * + * @param dev USB Device (NULL if driver model is not being used) * @param regs Programming view of DWC_otg controller * */ -static void dwc_otg_core_host_init(struct dwc2_core_regs *regs) +static void dwc_otg_core_host_init(struct udevice *dev, + struct dwc2_core_regs *regs) { uint32_t nptxfifosize = 0; uint32_t ptxfifosize = 0; @@ -248,6 +273,9 @@ static void dwc_otg_core_host_init(struct dwc2_core_regs *regs) writel(hprt0, &regs->hprt0); } } + + if (dev) + dwc_vbus_supply_init(dev); } /* @@ -1048,7 +1076,7 @@ int _submit_int_msg(struct dwc2_priv *priv, struct usb_device *dev, } } -static int dwc2_init_common(struct dwc2_priv *priv) +static int dwc2_init_common(struct udevice *dev, struct dwc2_priv *priv) { struct dwc2_core_regs *regs = priv->regs; uint32_t snpsid; @@ -1070,7 +1098,7 @@ static int dwc2_init_common(struct dwc2_priv *priv) #endif dwc_otg_core_init(priv); - dwc_otg_core_host_init(regs); + dwc_otg_core_host_init(dev, regs); clrsetbits_le32(&regs->hprt0, DWC2_HPRT0_PRTENA | DWC2_HPRT0_PRTCONNDET | DWC2_HPRT0_PRTENCHNG | @@ -1143,7 +1171,7 @@ int usb_lowlevel_init(int index, enum usb_init_type init, void **controller) if (board_usb_init(index, USB_INIT_HOST)) return -1; - return dwc2_init_common(priv); + return dwc2_init_common(NULL, priv); } int usb_lowlevel_stop(int index) @@ -1194,6 +1222,7 @@ static int dwc2_usb_ofdata_to_platdata(struct udevice *dev) const void *prop; fdt_addr_t addr; + g_dwc2_udev = dev; addr = dev_get_addr(dev); if (addr == FDT_ADDR_T_NONE) return -EINVAL; @@ -1214,7 +1243,7 @@ static int dwc2_usb_probe(struct udevice *dev) bus_priv->desc_before_addr = true; - return dwc2_init_common(priv); + return dwc2_init_common(dev, priv); } static int dwc2_usb_remove(struct udevice *dev) -- 2.8.0.rc3.226.g39d4020

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[U-Boot] [RFC] odroid: Add support for the ODROID-X board variant
by Siarhei Siamashka 07 Mar '17

07 Mar '17

ODROID-X uses a slightly older revision of the same base board as the ODROID-X2. But the CPU module in ODROID-X uses an older 1.4GHz revision of Exynos4412 SoC and less RAM (1GiB instead of 2GiB). The current U-Boot code deadlocks on ODROID-X when probing the RAM size via get_ram_size() function. Reducing CONFIG_NR_DRAM_BANKS from 8 to 4 can fix this problem. But this constant is used in a lot of places in U-Boot, while SDRAM_BANK_SIZE can be easily replaced with the code which relies on runtime detection of the board type. So we change 4 or 8 banks of 256MiB with just one fake bank of 2GiB or 1GiB. The runtime detection check tries to read the PRO_ID register in the hope that it might be different between Exynos4412 and Exynos4412 Prime and enough to detect the difference between X and X2 board variants. Signed-off-by: Siarhei Siamashka <siarhei.siamashka(a)gmail.com> --- I'm assuming that the X and X2 hardware is nearly identical and can be supported with a common code in U-Boot, based on the changelog of PCB revisions: http://com.odroid.com/sigong/blog/blog_list.php?bid=132 This is an RFC patch because I don't have an X2 board and can't test if checking the PRO_ID register is good enough. If it does not work, then maybe some other method could be tried (probe the DRAM controller registers?). Also does the number of DRAM banks have any special meaning on this platform in U-Boot and Linux (after the proprietary blob has already initialized the DRAM controller)? If this approach is wrong, then what would be the best way to add support for the ODROID-X board? Thanks. board/samsung/common/board.c | 21 +++++++++++++++++---- board/samsung/odroid/odroid.c | 14 ++++++++++---- include/configs/odroid.h | 10 ++++++---- 3 files changed, 33 insertions(+), 12 deletions(-) diff --git a/board/samsung/common/board.c b/board/samsung/common/board.c index d32c75d..ac3ed4c 100644 --- a/board/samsung/common/board.c +++ b/board/samsung/common/board.c @@ -94,14 +94,26 @@ int board_init(void) return exynos_init(); } +static u32 get_sdram_bank_size(void) +{ + u32 sdram_bank_size = SDRAM_BANK_SIZE; +#ifdef CONFIG_BOARD_TYPES + if (strcmp(CONFIG_SYS_BOARD, "odroid") == 0 && + strcmp(get_board_type(), "x") == 0) + sdram_bank_size = SDRAM_BANK_SIZE_ODROIDX; +#endif + return sdram_bank_size; +} + int dram_init(void) { unsigned int i; u32 addr; + u32 sdram_bank_size = get_sdram_bank_size(); for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { - addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE); - gd->ram_size += get_ram_size((long *)addr, SDRAM_BANK_SIZE); + addr = CONFIG_SYS_SDRAM_BASE + (i * sdram_bank_size); + gd->ram_size += get_ram_size((long *)addr, sdram_bank_size); } return 0; } @@ -110,10 +122,11 @@ void dram_init_banksize(void) { unsigned int i; u32 addr, size; + u32 sdram_bank_size = get_sdram_bank_size(); for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { - addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE); - size = get_ram_size((long *)addr, SDRAM_BANK_SIZE); + addr = CONFIG_SYS_SDRAM_BASE + (i * sdram_bank_size); + size = get_ram_size((long *)addr, sdram_bank_size); gd->bd->bi_dram[i].start = addr; gd->bd->bi_dram[i].size = size; diff --git a/board/samsung/odroid/odroid.c b/board/samsung/odroid/odroid.c index 32155f1..e98e3be 100644 --- a/board/samsung/odroid/odroid.c +++ b/board/samsung/odroid/odroid.c @@ -30,6 +30,7 @@ DECLARE_GLOBAL_DATA_PTR; enum { ODROID_TYPE_U3, ODROID_TYPE_X2, + ODROID_TYPE_X, ODROID_TYPES, }; @@ -56,15 +57,20 @@ void set_board_type(void) sdelay(200000); /* Check GPC1 pin2 - LED supplied by XCL205 - X2 only */ - if (readl(XCL205_STATE_GPIO_DAT) & (1 << XCL205_STATE_GPIO_PIN)) - gd->board_type = ODROID_TYPE_X2; - else + if (readl(XCL205_STATE_GPIO_DAT) & (1 << XCL205_STATE_GPIO_PIN)) { + /* Check the SoC product information ID */ + if (readl(EXYNOS4_PRO_ID) == 0xE4412211) + gd->board_type = ODROID_TYPE_X; + else + gd->board_type = ODROID_TYPE_X2; + } else { gd->board_type = ODROID_TYPE_U3; + } } const char *get_board_type(void) { - const char *board_type[] = {"u3", "x2"}; + const char *board_type[] = {"u3", "x2", "x"}; return board_type[gd->board_type]; } diff --git a/include/configs/odroid.h b/include/configs/odroid.h index 4c85e85..ae1b2b4 100644 --- a/include/configs/odroid.h +++ b/include/configs/odroid.h @@ -22,9 +22,10 @@ #define CONFIG_MACH_TYPE 4289 -#define CONFIG_NR_DRAM_BANKS 8 +#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE 0x40000000 -#define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */ +#define SDRAM_BANK_SIZE ((8 * 256) << 20) /* 8 * 256 MB */ +#define SDRAM_BANK_SIZE_ODROIDX ((4 * 256) << 20) /* 4 * 256 MB */ #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* Reserve the last 1 MiB for the secure firmware */ #define CONFIG_SYS_MEM_TOP_HIDE (1UL << 20UL) @@ -75,6 +76,7 @@ "uInitrd fat 0 1;" \ "exynos4412-odroidu3.dtb fat 0 1;" \ "exynos4412-odroidx2.dtb fat 0 1;" \ + "exynos4412-odroidx.dtb fat 0 1;" \ ""PARTS_BOOT" part 0 1;" \ ""PARTS_ROOT" part 0 2\0" \ @@ -209,8 +211,8 @@ #define CONFIG_USB_ETHER_SMSC95XX /* - * Supported Odroid boards: X3, U3 - * TODO: Add Odroid X support + * Supported Odroid boards: X, X2, U3 + * TODO: Add Odroid U2 support */ #define CONFIG_MISC_COMMON #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG -- 2.4.9

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[U-Boot] [PATCH] fastboot: avoid printing invalid data
by John Keeping 05 Mar '17

05 Mar '17

There is no guarantee that commands are null-terminated in the USB request buffer, so limit the length of data that is printed. Signed-off-by: John Keeping <john(a)metanate.com> --- drivers/usb/gadget/f_fastboot.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c index 2160b1c..a020b7d 100644 --- a/drivers/usb/gadget/f_fastboot.c +++ b/drivers/usb/gadget/f_fastboot.c @@ -710,7 +710,7 @@ static void rx_handler_command(struct usb_ep *ep, struct usb_request *req) } if (!func_cb) { - error("unknown command: %s", cmdbuf); + error("unknown command: %.*s", req->actual, cmdbuf); fastboot_tx_write_str("FAILunknown command"); } else { if (req->actual < req->length) { -- 2.9.3.728.g30b24b4.dirty

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[U-Boot] [PATCH] rockchip: video: fix mpixelclock in rockchip HDMI
by Nickey Yang 27 Feb '17

27 Feb '17

Correct mpixelclock errors in rockchip_phy_config[] and rockchip_mpll_cfg[]. Signed-off-by: Nickey Yang <nickey.yang(a)rock-chips.com> --- drivers/video/rockchip/rk_hdmi.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/video/rockchip/rk_hdmi.c b/drivers/video/rockchip/rk_hdmi.c index 7976c5e..1f55ef6 100644 --- a/drivers/video/rockchip/rk_hdmi.c +++ b/drivers/video/rockchip/rk_hdmi.c @@ -85,13 +85,13 @@ struct hdmi_phy_config { static const struct hdmi_phy_config rockchip_phy_config[] = { { - .mpixelclock = 74250, + .mpixelclock = 74250000, .sym_ctr = 0x8009, .term = 0x0004, .vlev_ctr = 0x0272, }, { - .mpixelclock = 148500, + .mpixelclock = 148500000, .sym_ctr = 0x802b, .term = 0x0004, .vlev_ctr = 0x028d, }, { - .mpixelclock = 297000, + .mpixelclock = 297000000, .sym_ctr = 0x8039, .term = 0x0005, .vlev_ctr = 0x028d, }, { .mpixelclock = ~0ul, @@ -101,22 +101,22 @@ static const struct hdmi_phy_config rockchip_phy_config[] = { static const struct hdmi_mpll_config rockchip_mpll_cfg[] = { { - .mpixelclock = 40000, + .mpixelclock = 40000000, .cpce = 0x00b3, .gmp = 0x0000, .curr = 0x0018, }, { - .mpixelclock = 65000, + .mpixelclock = 65000000, .cpce = 0x0072, .gmp = 0x0001, .curr = 0x0028, }, { - .mpixelclock = 66000, + .mpixelclock = 66000000, .cpce = 0x013e, .gmp = 0x0003, .curr = 0x0038, }, { - .mpixelclock = 83500, + .mpixelclock = 835000000, .cpce = 0x0072, .gmp = 0x0001, .curr = 0x0028, }, { - .mpixelclock = 146250, + .mpixelclock = 146250000, .cpce = 0x0051, .gmp = 0x0002, .curr = 0x0038, }, { - .mpixelclock = 148500, + .mpixelclock = 148500000, .cpce = 0x0051, .gmp = 0x0003, .curr = 0x0000, }, { .mpixelclock = ~0ul, @@ -870,7 +870,7 @@ static int rk_hdmi_probe(struct udevice *dev) clk_free(&clk); } if (ret) { - debug("%s: Failed to set EDP clock: ret=%d\n", __func__, ret); + debug("%s: Failed to set hdmi clock: ret=%d\n", __func__, ret); return ret; } -- 1.9.1

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[U-Boot] [PATCH v4 0/16] sunxi: Add support for the CHIP Pro
by Maxime Ripard 25 Feb '17

25 Feb '17

The CHIP Pro is a SoM made by NextThing Co, and that embeds a GR8 SIP, an AXP209 PMIC, a WiFi BT chip and a 512MB SLC NAND. Since the first Allwinner device coming whit an SLC NAND that doesn't have the shortcomings (and breakages) the MLC NAND has, we can finally enable the NAND support on a board by default. This is the occasion to introduce a bunch of additions needed imo to be able to come up with a sane NAND support for our users. The biggest pain point is that the BROM uses a different ECC and randomizer configuration than for the rest of the NAND. In order to lessen the number of bitflips, you also need to pad with random data the SPL image. Since it's quite tedious to do right (and most users won't be able to figure it out) and since if it is not done right, it will eventually turn into an unusable system (which is bad UX), we think that the best solution is to generate an SPL image that already embeds all this. We'll possible have to do the same thing for the U-Boot image (at least for the random padding) on MLC NANDs. The only drawback from that is that you need to flash it raw, instead of using the usual nand write, but it's just a different command, nothing major anyway. In order to flash it, from a device switched in FEL, on your host: sunxi-fel spl spl/sunxi-spl.bin sunxi-fel write 0x4a000000 u-boot-dtb.bin sunxi-fel write 0x43000000 spl/sunxi-spl-with-ecc.bin sunxi-fel exe 0x4a000000 And on the board, once u-boot is running (assuming the NAND is already erased): nand write.raw.noverify 0x43000000 0 40 nand write.raw.noverify 0x43000000 0x400000 40 nand write 0x4a000000 0x800000 0xc0000 I also encountered some weird bug in the private libgcc that prevents U-Boot from loading. Disabling CONFIG_USE_PRIVATE_LIBGCC fixes that. Let me know what you think, Maxime Changes from v3: - Bring new Kconfig patches from Boris - Do not define Kconfig defaults in our board Kconfig but directly in the option declaration - Sync the DT with the kernel - Fixed build breakages Changes from v2: - Move CMD_NAND and CMD_UBI default to cmd/Kconfig - Define the env Kconfig options only for ARCH_SUNXI to avoid build breakages - Define CMD_MTDPARTS only for ARCH_SUNXI Changes from v1: - Allowed to build lib/bch.c for the host, and used that in the image builder - Fixed a bug in the NAND driver - Wrote a documentation on how to flash a NAND image on an Allwinner board - Fixed a few compilation breakages and issues - Moved U-boot offset out of the config header and into Kconfig - Moved the environment into UBI - Moved the environment selection to Kconfig - Moved the CMD_MTDPARTS options to Kconfig - Provide MTDIDS_DEFAULT and MTDPARTS_DEFAULT options through Kconfig - Added the tags from everyone Boris Brezillon (3): mtd: ubi: Select RBTREE option from MTD_UBI Kconfig entry cmd: Expose a Kconfig option to enable UBIFS commands cmd: nand: Expose optional suboptions in Kconfig Hans de Goede (1): sunxi: Enable UBI and NAND support Maxime Ripard (12): nand: sunxi: Fix modulo by zero error bch: Allow to build for the host tools: sunxi: Add spl image builder common: Move environment choice to Kconfig cmd: Add Kconfig option for CMD_MTDPARTS and related options mtd: sunxi: Select the U-Boot location config option mtd: sunxi: Change U-Boot offset sunxi: Add the default mtdids and mtdparts to our env nand: sunxi: Add options for the SPL NAND configuration scripts: sunxi: Build an raw SPL image sunxi: Sync GR8 DTS and AXP209 with the kernel sunxi: Add support for the CHIP Pro Makefile | 3 +- arch/arm/dts/Makefile | 1 +- arch/arm/dts/axp209.dtsi | 6 +- arch/arm/dts/sun5i-gr8-chip-pro.dts | 266 +++++++- arch/arm/dts/sun5i-gr8.dtsi | 1132 ++++++++++++++++++++++++++++- board/sunxi/README.nand | 54 +- cmd/Kconfig | 52 +- cmd/mtdparts.c | 8 +- common/Kconfig | 69 ++- configs/CHIP_pro_defconfig | 32 +- drivers/mtd/nand/Kconfig | 19 +- drivers/mtd/nand/sunxi_nand_spl.c | 7 +- drivers/mtd/ubi/Kconfig | 1 +- include/configs/sunxi-common.h | 33 +- include/environment.h | 2 +- lib/Kconfig | 5 +- lib/bch.c | 48 +- scripts/Makefile.spl | 15 +- tools/.gitignore | 1 +- tools/Makefile | 2 +- tools/sunxi-spl-image-builder.c | 484 ++++++++++++- 21 files changed, 2224 insertions(+), 16 deletions(-) create mode 100644 arch/arm/dts/sun5i-gr8-chip-pro.dts create mode 100644 arch/arm/dts/sun5i-gr8.dtsi create mode 100644 board/sunxi/README.nand create mode 100644 configs/CHIP_pro_defconfig create mode 100644 tools/sunxi-spl-image-builder.c base-commit: 7490130c9f8a4e17e858a38c767ad9ed64bd777b -- git-series 0.8.11

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[U-Boot] [PATCH 00/29] blackfin: Add driver-model and device tree suport
by Simon Glass 23 Feb '17

23 Feb '17

At present the only serial driver that is not converted to driver mode is blackfin. As I recently obtained a suitable board from a kind donor I have decided to convert the driver over, as the unpalatable alternative would be to remove blackfin support from U-Boot. Blackfin's init sequence is someone non-standard. This series adjusts this to fit more with how things are now done, adds device-tree support, a serial driver and enables driver model on bf537-stamp. A few CONFIG options are dropped in this series also, as these were noticed along the way. Future work could enhance the serial driver to support v4 hardware and convert all boards to driver model. Simon Glass (29): blackfin: Drop CONFIG_SYS_MEMTEST_START/END fdt: Allow the device tree to be set up by board init code blackfin: Add a few useful linker symbols blackfin: Drop the extra blank line in the link script blackfin: Use compiler-generated symbols for BSS blackfin: Clear the BSS in C code blackfin: Add a memory region for pre-relocation data blackfin: Use generic board to set the stack address blackfin: Avoid using bd_info in print_cpuinfo() blackfin: Avoiding using P3 in early init blackfin: Allow cpu_init_f() to return blackfin: Drop CONFIG_STACKBASE tegra: Drop CONFIG_STACKBASE in favour of TEGRA_STACKBASE sparc: Drop CONFIG_SYS_MALLOC_BASE blackfin: Drop CONFIG_SYS_MALLOC_BASE Drop CONFIG_SYS_MALLOC_END blackfin: Call C code to relocate blackfin: Don't set global_data again blackfin: Set the RAM size separately from bd_info blackfin: Set up bd_info later blackfin: Copy the device tree out of BSS blackfin: Allow use of CONFIG_OF_CONTROL blackfin: bf537-stamp: Enable CONFIG_OF_CONTROL dm: serial: Reset the watchdog when outputting characters dm: serial: pxa: Drop pxa from the serial README dm: serial: Update the serial README dm: blackfin: Add a driver-model serial driver blackfin: Set up the debug UART if enabled blackfin: Enable driver-model on bf537-stamp arch/Kconfig | 1 + arch/blackfin/Kconfig | 9 ++ arch/blackfin/cpu/cpu.c | 69 +++++++------ arch/blackfin/cpu/start.S | 35 +++---- arch/blackfin/cpu/u-boot.lds | 24 ++++- arch/blackfin/dts/Makefile | 18 ++++ arch/blackfin/dts/bf537-stamp.dts | 11 +++ arch/blackfin/include/asm/config.h | 12 --- arch/blackfin/include/asm/serial1.h | 2 + arch/blackfin/include/asm/u-boot.h | 5 + arch/blackfin/lib/sections.c | 2 +- cmd/bdinfo.c | 2 - configs/bf537-stamp_defconfig | 8 ++ doc/driver-model/serial-howto.txt | 11 +-- drivers/serial/Kconfig | 8 ++ drivers/serial/serial-uclass.c | 2 + drivers/serial/serial_bfin.c | 192 ++++++++++++++++++++++++++++++++++++ include/configs/bf537-stamp.h | 1 + include/configs/bf609-ezkit.h | 1 - include/configs/gr_cpci_ax2000.h | 5 +- include/configs/gr_ep2s60.h | 5 +- include/configs/gr_xc3s_1500.h | 5 +- include/configs/grsim.h | 5 +- include/configs/grsim_leon2.h | 5 +- include/configs/openrisc-generic.h | 3 - include/configs/s32v234evb.h | 4 - include/configs/tegra-common.h | 2 +- include/configs/tegra114-common.h | 2 +- include/configs/tegra124-common.h | 2 +- include/configs/tegra186-common.h | 2 +- include/configs/tegra20-common.h | 2 +- include/configs/tegra210-common.h | 2 +- include/configs/tegra30-common.h | 2 +- lib/fdtdec.c | 31 +++--- scripts/config_whitelist.txt | 3 - 35 files changed, 360 insertions(+), 133 deletions(-) create mode 100644 arch/blackfin/dts/Makefile create mode 100644 arch/blackfin/dts/bf537-stamp.dts -- 2.8.0.rc3.226.g39d4020

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[U-Boot] [PATCH V2 00/20] imx: add i.MX7ULP support
by Peng Fan 22 Feb '17

22 Feb '17

This patchset is to add i.MX7 ULP support default enabling OF_CONTROL. Also there are some new IPs, such lpi2c/lpuart/rapid gpio2p and etc. V2: Restructure the lpuart driver and add i.MX7ULP support. Reuse code in imx-common Add HAB support Add plugin support Add wdog file license Add maintainer file Addressed some issues in board code. Peng Fan (17): imx: mx7ulp: Add mx7ulp to Kconfig imx: mx7ulp: add registers header file imx: mx7ulp: add iomux driver to support IOMUXC0 and IOMUXC1 imx: mx7ulp: Add clock framework and functions imx: mx7ulp: Add soc level initialization codes and functions imx: mx7ulp: handle all the lpuarts in get_lpuart_clk gpio: Add Rapid GPIO2P driver for i.MX7ULP mxc_ocotp: Update driver to support OCOTP controller on i.MX7ULP pinctrl: Add i.MX7ULP pinctrl driver i2c: lpi2c: add lpi2c driver for i.MX7ULP serial: lpuart: restructure lpuart driver serial: lpuart: add i.MX7ULP support mx7ulp: Add HAB boot support arm: dts: add i.MX7ULP dtsi file mmc: fsl_esdhc: support i.MX7ULP imx: imx7ulp: add EVK board support imx: mx7ulp_evk: enable mmc/regulator support Ye Li (3): imx: mx7ulp: Implement the clock functions for i2c driver mx7ulp: Add iomux pins header file wdog: Add the watchdog driver for MX7ULP. arch/arm/Kconfig | 7 + arch/arm/Makefile | 2 +- arch/arm/cpu/armv7/Makefile | 3 +- arch/arm/cpu/armv7/mx7ulp/Kconfig | 17 + arch/arm/cpu/armv7/mx7ulp/Makefile | 8 + arch/arm/cpu/armv7/mx7ulp/clock.c | 364 +++++++ arch/arm/cpu/armv7/mx7ulp/iomux.c | 70 ++ arch/arm/cpu/armv7/mx7ulp/pcc.c | 286 +++++ arch/arm/cpu/armv7/mx7ulp/scg.c | 1086 +++++++++++++++++++ arch/arm/cpu/armv7/mx7ulp/soc.c | 282 +++++ arch/arm/cpu/armv7/vf610/generic.c | 5 + arch/arm/dts/Makefile | 2 + arch/arm/dts/imx7ulp-evk.dts | 426 ++++++++ arch/arm/dts/imx7ulp-pinfunc.h | 882 +++++++++++++++ arch/arm/dts/imx7ulp-uboot.dtsi | 43 + arch/arm/dts/imx7ulp.dtsi | 598 +++++++++++ arch/arm/imx-common/Makefile | 4 + arch/arm/imx-common/hab.c | 3 +- .../arm/include/asm/arch-fsl-layerscape/imx-regs.h | 42 - arch/arm/include/asm/arch-imx/cpu.h | 2 + arch/arm/include/asm/arch-ls102xa/imx-regs.h | 40 - arch/arm/include/asm/arch-mx7ulp/clock.h | 43 + arch/arm/include/asm/arch-mx7ulp/gpio.h | 22 + arch/arm/include/asm/arch-mx7ulp/imx-regs.h | 1130 ++++++++++++++++++++ arch/arm/include/asm/arch-mx7ulp/imx_lpi2c.h | 520 +++++++++ arch/arm/include/asm/arch-mx7ulp/iomux.h | 95 ++ arch/arm/include/asm/arch-mx7ulp/mx7ulp-pins.h | 910 ++++++++++++++++ arch/arm/include/asm/arch-mx7ulp/pcc.h | 377 +++++++ arch/arm/include/asm/arch-mx7ulp/scg.h | 342 ++++++ arch/arm/include/asm/arch-mx7ulp/sys_proto.h | 21 + arch/arm/include/asm/arch-vf610/clock.h | 1 + arch/arm/include/asm/arch-vf610/imx-regs.h | 28 - arch/arm/include/asm/imx-common/sys_proto.h | 2 + board/freescale/mx7ulp_evk/Kconfig | 12 + board/freescale/mx7ulp_evk/MAINTAINERS | 7 + board/freescale/mx7ulp_evk/Makefile | 10 + board/freescale/mx7ulp_evk/imximage.cfg | 137 +++ board/freescale/mx7ulp_evk/mx7ulp_evk.c | 48 + board/freescale/mx7ulp_evk/plugin.S | 224 ++++ configs/mx7ulp_evk_defconfig | 25 + configs/mx7ulp_evk_plugin_defconfig | 26 + drivers/gpio/Kconfig | 7 + drivers/gpio/Makefile | 1 + drivers/gpio/imx_rgpio2p.c | 224 ++++ drivers/i2c/Kconfig | 6 + drivers/i2c/Makefile | 1 + drivers/i2c/imx_lpi2c.c | 462 ++++++++ drivers/misc/mxc_ocotp.c | 52 +- drivers/mmc/fsl_esdhc.c | 8 + drivers/pinctrl/nxp/Kconfig | 14 + drivers/pinctrl/nxp/Makefile | 1 + drivers/pinctrl/nxp/pinctrl-imx.c | 10 +- drivers/pinctrl/nxp/pinctrl-imx.h | 3 + drivers/pinctrl/nxp/pinctrl-imx7ulp.c | 41 + drivers/serial/serial_lpuart.c | 336 ++++-- drivers/watchdog/Kconfig | 8 + drivers/watchdog/Makefile | 1 + drivers/watchdog/ulp_wdog.c | 98 ++ include/configs/mx7ulp_evk.h | 203 ++++ include/dt-bindings/clock/imx7ulp-clock.h | 161 +++ include/fsl_lpuart.h | 72 ++ 61 files changed, 9631 insertions(+), 230 deletions(-) create mode 100644 arch/arm/cpu/armv7/mx7ulp/Kconfig create mode 100644 arch/arm/cpu/armv7/mx7ulp/Makefile create mode 100644 arch/arm/cpu/armv7/mx7ulp/clock.c create mode 100644 arch/arm/cpu/armv7/mx7ulp/iomux.c create mode 100644 arch/arm/cpu/armv7/mx7ulp/pcc.c create mode 100644 arch/arm/cpu/armv7/mx7ulp/scg.c create mode 100644 arch/arm/cpu/armv7/mx7ulp/soc.c create mode 100644 arch/arm/dts/imx7ulp-evk.dts create mode 100644 arch/arm/dts/imx7ulp-pinfunc.h create mode 100644 arch/arm/dts/imx7ulp-uboot.dtsi create mode 100644 arch/arm/dts/imx7ulp.dtsi create mode 100644 arch/arm/include/asm/arch-mx7ulp/clock.h create mode 100644 arch/arm/include/asm/arch-mx7ulp/gpio.h create mode 100644 arch/arm/include/asm/arch-mx7ulp/imx-regs.h create mode 100644 arch/arm/include/asm/arch-mx7ulp/imx_lpi2c.h create mode 100644 arch/arm/include/asm/arch-mx7ulp/iomux.h create mode 100644 arch/arm/include/asm/arch-mx7ulp/mx7ulp-pins.h create mode 100644 arch/arm/include/asm/arch-mx7ulp/pcc.h create mode 100644 arch/arm/include/asm/arch-mx7ulp/scg.h create mode 100644 arch/arm/include/asm/arch-mx7ulp/sys_proto.h create mode 100644 board/freescale/mx7ulp_evk/Kconfig create mode 100644 board/freescale/mx7ulp_evk/MAINTAINERS create mode 100644 board/freescale/mx7ulp_evk/Makefile create mode 100644 board/freescale/mx7ulp_evk/imximage.cfg create mode 100644 board/freescale/mx7ulp_evk/mx7ulp_evk.c create mode 100644 board/freescale/mx7ulp_evk/plugin.S create mode 100644 configs/mx7ulp_evk_defconfig create mode 100644 configs/mx7ulp_evk_plugin_defconfig create mode 100644 drivers/gpio/imx_rgpio2p.c create mode 100644 drivers/i2c/imx_lpi2c.c create mode 100644 drivers/pinctrl/nxp/pinctrl-imx7ulp.c create mode 100644 drivers/watchdog/ulp_wdog.c create mode 100644 include/configs/mx7ulp_evk.h create mode 100644 include/dt-bindings/clock/imx7ulp-clock.h create mode 100644 include/fsl_lpuart.h -- 2.6.2

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[U-Boot] of-platdata address map decode for 64-bits
by Kever Yang 22 Feb '17

22 Feb '17

Hi Simon, For my rk3399(64bit) dts, the address is described as below: #address-cells = <2>; reg = <0x0 0xfe320000 0x0 0x4000>; not like 32-bit soc which reg address describe like: reg = <0xfe320000 0x4000>; There should have some update for this dts decode, right? like: map_sysmem() regmap_init_mem_platdata() Do you have a idea to update all these kind of function call? It will be very great if you can send a patch for it. Thanks, - Kever

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