January 2017 - U-Boot

[U-Boot] [RFC Patch V2] drivers: mmc: omap_hsmmc: Fix IO Buffer on OMAP36XX
by Adam Ford 19 Jan '17

19 Jan '17

On the OMAP36xx (and 37xx) the CONTROL_WKUP_CTRL register has a field (bit 6) named GPIO_IO_PWRDNZ. If 0, the IO buffers which are related to the MMC are disabled. After the PBIAS is configured, this bit should be set high to enable the MMC port. V2: Make this feature a config option and add it to the MMC section of the Kconfig. This allows the precompiler to only include it in a small handfull of OMAP36XX and 37XX boards using MMC1. V1: Original submission Signed-off-by: Adam Ford <aford173(a)gmail.com> diff --git a/configs/omap3_logic_defconfig b/configs/omap3_logic_defconfig index ac1a6a3..bd5f1a8 100644 --- a/configs/omap3_logic_defconfig +++ b/configs/omap3_logic_defconfig @@ -15,6 +15,7 @@ CONFIG_CMD_BOOTZ=y CONFIG_CMD_ASKENV=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_MMC=y +CONFIG_MMC_OMAP36XX_PINS=y CONFIG_CMD_SPI=y CONFIG_CMD_I2C=y # CONFIG_CMD_FPGA is not set diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index c3462ab..d6fcf7f 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -204,6 +204,17 @@ config MMC_SDHCI_SPEAR If unsure, say N. +config MMC_OMAP36XX_PINS + bool "Enable MMC1 on OMAP36XX/37XX" + depends on OMAP34XX + help + This enables extended-drain in the MMC/SD/SDIO1I/O and + GPIO-associated I/O cells (gpio_126, gpio_127, and gpio_129) + specific to the OMAP36XX/37XX using MMC1 + + If you have a controller with this interface, say Y here. + + If unsure, say N. endif endmenu diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c index 0a1ee40..a4720e1 100644 --- a/drivers/mmc/omap_hsmmc.c +++ b/drivers/mmc/omap_hsmmc.c @@ -38,6 +38,7 @@ #include <asm/arch/sys_proto.h> #endif #include <dm.h> +#include <asm/arch-omap3/mux.h> DECLARE_GLOBAL_DATA_PTR; @@ -115,6 +116,13 @@ static unsigned char mmc_board_init(struct mmc *mmc) PBIASSPEEDCTRL0 | PBIASLITEPWRDNZ0, &t2_base->pbias_lite); +#ifdef CONFIG_MMC_OMAP36XX_PINS + if (get_cpu_family() == CPU_OMAP36XX) + writel(readl(OMAP34XX_CTRL_WKUP_CTRL) | + OMAP34XX_CTRL_WKUP_CTRL_GPIO_IO_PWRDNZ, + OMAP34XX_CTRL_WKUP_CTRL); +#endif + writel(readl(&t2_base->devconf0) | MMCSDIO1ADPCLKISEL, &t2_base->devconf0); -- 2.7.4

2 1

[U-Boot] [PATCH v4 0/1] mmc: sdhci: Add support for frequency constrained peripheral interfaces
by stefan.herbrechtsmeier＠weidmueller.com 19 Jan '17

19 Jan '17

From: Stefan Herbrechtsmeier <stefan.herbrechtsmeier(a)weidmueller.com> The sdhci controller assumes that the base clock frequency is fully supported by the peripheral and doesn't support hardware limitations. Distinguish between base clock of the host controller and maximal supported peripheral clock frequency of the peripheral interface. This is needed for the zynq platform to support two sdhci ports with different IO routings. Changes in v4: - Remove zynq specific patches - Rebase onto latest master Changes in v3: - Rename arguments of sdhci_setup_cfg function from max_clk/min_clk to f_max/f_min Changes in v2: - None Stefan Herbrechtsmeier (1): mmc: sdhci: Distinguish between base clock and maximum peripheral frequency drivers/mmc/atmel_sdhci.c | 7 +++++-- drivers/mmc/bcm2835_sdhci.c | 3 ++- drivers/mmc/ftsdc021_sdhci.c | 3 ++- drivers/mmc/kona_sdhci.c | 3 ++- drivers/mmc/msm_sdhci.c | 2 ++ drivers/mmc/mv_sdhci.c | 3 ++- drivers/mmc/pci_mmc.c | 1 + drivers/mmc/pic32_sdhci.c | 4 +++- drivers/mmc/rockchip_sdhci.c | 4 ++-- drivers/mmc/s5p_sdhci.c | 5 +++-- drivers/mmc/sdhci.c | 34 ++++++++++++++++++---------------- drivers/mmc/zynq_sdhci.c | 4 +++- include/sdhci.h | 13 +++++++------ 13 files changed, 52 insertions(+), 34 deletions(-) -- 2.7.4 Kommanditgesellschaft - Sitz: Detmold - Amtsgericht Lemgo HRA 2790 - Komplementärin: Weidmüller Interface Führungsgesellschaft mbH - Sitz: Detmold - Amtsgericht Lemgo HRB 3924; Geschäftsführer: José Carlos Álvarez Tobar, Elke Eckstein, Dr. Peter Köhler, Jörg Timmermann; USt-ID-Nr. DE124599660

2 2

[U-Boot] [PATCH] cmd: ubi: allow '-' to specify maximum volume size
by Ladislav Michl 19 Jan '17

19 Jan '17

Currently maximum volume size can be specified only if no other arguments are used. Use '-' placeholder as volume size to allow maximum volume size to be specified together with volume id and type. Signed-off-by: Ladislav Michl <ladis(a)linux-mips.org> --- cmd/ubi.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/cmd/ubi.c b/cmd/ubi.c index 7d0d7e7a80..efc43ffde9 100644 --- a/cmd/ubi.c +++ b/cmd/ubi.c @@ -600,7 +600,8 @@ static int do_ubi(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) } /* E.g., create volume size */ if (argc == 4) { - size = simple_strtoull(argv[3], NULL, 16); + if (argv[3][0] != '-') + size = simple_strtoull(argv[3], NULL, 16); argc--; } /* Use maximum available size */ @@ -691,8 +692,9 @@ U_BOOT_CMD( " - Display volume and ubi layout information\n" "ubi check volumename" " - check if volumename exists\n" - "ubi create[vol] volume [size] [type] [id]" - " - create volume name with size\n" + "ubi create[vol] volume [size] [type] [id]\n" + " - create volume name with size ('-' for maximum" + " available size)\n" "ubi write[vol] address volume size" " - Write volume from address with size\n" "ubi write.part address volume size [fullsize]\n" -- 2.11.0

1 0

[U-Boot] [PATCH 00/12] Add support for SD3.0 and eMMC HS200
by Siva Durga Prasad Paladugu 19 Jan '17

19 Jan '17

This patch series adds support SD3.0 and eMMC HS200 modes for ZynqMP. This series also contains changes in mmc and sdhci framework to support SD3.0 and HS200. Siva Durga Prasad Paladugu (12): mmc: sdhci: Update host capabilities about host controller mmc: sdhci: Add support for SD3.0 mmc: sdhci: Add support for platform/board specific tuning mmc: sdhci: Add support for platform specific delay mmc: sdhci: Make sdhci_ops of host as modifiable zynqmp: Define routines for mmio write and read mmc: sdhci: zynq: Define private structure arasan_sdhci_priv mmc: sdhci: zynqmp: Add support of SD3.0 mmc: sdhci: Add quirk for 1.8v switching not supported mmc: zynq_sdhci: Update quirk if 1.8v switching not supported mmc: sdhci: Add support for eMMC HS200 mode mmc: sdhci: zynqmp: Set tapdelays for eMMC HS200 mode arch/arm/cpu/armv8/zynqmp/cpu.c | 51 ++++++ arch/arm/include/asm/arch-zynqmp/sys_proto.h | 3 + board/xilinx/zynqmp/Makefile | 1 + board/xilinx/zynqmp/tap_delays.c | 250 +++++++++++++++++++++++++++ drivers/mmc/mmc-uclass.c | 52 ++++++ drivers/mmc/mmc.c | 160 +++++++++++++++-- drivers/mmc/sdhci.c | 205 +++++++++++++++++++++- drivers/mmc/zynq_sdhci.c | 169 +++++++++++++++++- include/mmc.h | 72 +++++++- include/sdhci.h | 18 +- include/zynqmp_tap_delay.h | 20 +++ 11 files changed, 979 insertions(+), 22 deletions(-) create mode 100644 board/xilinx/zynqmp/tap_delays.c create mode 100644 include/zynqmp_tap_delay.h -- 2.7.4

3 16

[U-Boot] [PATCH] armv8: ls1046aqds: added usb feature support
by yuantian.tang＠nxp.com 19 Jan '17

19 Jan '17

From: Tang Yuantian <Yuantian.Tang(a)nxp.com> The LS1046AQDS processor has three integrated USB 3.0 controllers (USB1, USB2, and USB3) that allow direct connection to the USB ports with appropriate protection circuitry and power supplies. USB1 and USB2 ports are powered by a NX5P2190UK device, which supplies 5v power at up to 1.2 A. The power enable and power-fault-detect pins are connected to the LS1046A processor via CPLD for individual port management. Signed-off-by: Tang Yuantian <yuantian.tang(a)nxp.com> --- include/configs/ls1046aqds.h | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h index 29e0aa5..53a1ffb 100644 --- a/include/configs/ls1046aqds.h +++ b/include/configs/ls1046aqds.h @@ -135,6 +135,14 @@ unsigned long get_board_ddr_clk(void); #define CFG_LPUART_EN 0x2 #endif +/* USB */ +#define CONFIG_HAS_FSL_XHCI_USB +#ifdef CONFIG_HAS_FSL_XHCI_USB +#define CONFIG_USB_XHCI_FSL +#define CONFIG_USB_MAX_CONTROLLER_COUNT 3 +#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 +#endif + /* SATA */ #define CONFIG_LIBATA #define CONFIG_SCSI_AHCI -- 2.1.0.27.g96db324

3 2

[U-Boot] [GIT PULL] Xilinx changes
by Michal Simek 19 Jan '17

19 Jan '17

Hi Tom, here are changes I have collected. Travis is not reporting any issue. I have also started to use signed tags to be clear what to take. Thanks, Michal The following changes since commit a705ebc81b7f91bbd0ef7c634284208342901149: Prepare v2017.01 (2017-01-09 11:57:05 -0500) are available in the git repository at: git://www.denx.de/git/u-boot-microblaze.git tags/xilinx-for-v2017.03 for you to fetch changes up to 7364dfe7bfca8632bfe02de5c333a64472812ebe: ARM64: zynqmp: Move CONFIG_AHCI from board file (2017-01-11 07:00:38 +0100) ---------------------------------------------------------------- Xilinx changes for v2017.03 - ATF handoff - DT syncups - gem: Use wait_for_bit(), add simple clk support - Simple clk driver for ZynqMP - Other small changes ---------------------------------------------------------------- Kamensky Ivan (1): xilinx_phy: Pass correct pointer to fdtdec_get_int() Michal Simek (14): lib: Add WATCHDOG_RESET to wait_bit.h net: gem: Use wait_for_bit() instead of private mdio_wait() microblaze: Remove hardcoded IP address from config microblaze: Enable option to overwrite default variables fpga: zynqmp: Remove empty functions ARM: zynq: Move CONFIG_SYS_TEXT_BASE to Kconfig ARM: zynq: Remove CONFIG_BOOTP_SERVERIP ARM: zynq: Remove spi-max-frequency ARM: zynq: Setup modeboot variable based on boot mode ARM64: zynqmp: Add missing earlycon for ep108 ARM64: zynqmp: Fix usb nodes for dc1 and dc2 fpga: Use enum for bitstream command types ARM64: zynqmp: Generate handoff structure for ATF ARM64: zynqmp: Move CONFIG_AHCI from board file Mike Looijmans (1): ARM: zynqmp: Make SYS_VENDOR configurable Moritz Fischer (2): i2c: cdns: Add additional compatible string for r1p14 of the IP. ARM64: zynqmp: Fix i2c node's compatible string Sai Pavan Boddu (1): microblaze: Make the board configuration name user definable Shubhrajyoti Datta (1): ARM64: zynqmp: clk: Add the clock for watchdog Siva Durga Prasad Paladugu (5): ARM64: zynqmp: Increase environment size to 32K ARM64: zynqmp: Add support to save env to FAT ARM64: zynqmp: Enable fastboot for first SD/MMC/EMMC device clk: zynqmp: Add clock driver support for zynqmp net: zynq_gem: Use clock driver for ZynqMP Stefan Krsmanovic (1): ARM64: zynqmp: Add idle state for ZynqMP Sudeep Holla (1): ARM: dts: zynq: replace gpio-key,wakeup with wakeup-source property Kconfig | 3 +- arch/arm/cpu/armv8/zynqmp/Kconfig | 1 + arch/arm/cpu/armv8/zynqmp/Makefile | 2 +- arch/arm/cpu/armv8/zynqmp/handoff.c | 87 ++++++++++++++++ arch/arm/cpu/armv8/zynqmp/spl.c | 2 + arch/arm/dts/zynq-7000.dtsi | 2 - arch/arm/dts/zynq-zc702.dts | 4 +- arch/arm/dts/zynqmp-clk.dtsi | 4 + arch/arm/dts/zynqmp-ep108.dts | 1 + arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts | 4 + arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts | 4 + arch/arm/dts/zynqmp.dtsi | 21 +++- arch/arm/include/asm/arch-zynqmp/hardware.h | 9 ++ arch/arm/include/asm/arch-zynqmp/sys_proto.h | 4 + board/xilinx/microblaze-generic/Kconfig | 5 + board/xilinx/zynq/board.c | 6 ++ cmd/fpga.c | 20 ++-- configs/topic_miami_defconfig | 1 + configs/topic_miamiplus_defconfig | 1 + configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig | 1 + configs/zynq_microzed_defconfig | 1 + configs/zynq_picozed_defconfig | 1 + configs/zynq_zc702_defconfig | 1 + configs/zynq_zc706_defconfig | 1 + configs/zynq_zc770_xm010_defconfig | 1 + configs/zynq_zc770_xm011_defconfig | 1 + configs/zynq_zc770_xm012_defconfig | 1 + configs/zynq_zc770_xm013_defconfig | 1 + configs/zynq_zed_defconfig | 1 + configs/zynq_zybo_defconfig | 1 + drivers/clk/Kconfig | 7 ++ drivers/clk/Makefile | 1 + drivers/clk/clk_zynqmp.c | 241 +++++++++++++++++++++++++++++++++++++++++++++ drivers/fpga/zynqpl.c | 12 --- drivers/i2c/i2c-cdns.c | 1 + drivers/net/phy/xilinx_phy.c | 4 +- drivers/net/zynq_gem.c | 50 +++++----- include/configs/microblaze-generic.h | 5 +- include/configs/xilinx_zynqmp.h | 32 +++++- include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h | 1 - include/configs/zynq-common.h | 4 - include/wait_bit.h | 2 + 42 files changed, 489 insertions(+), 63 deletions(-) create mode 100644 arch/arm/cpu/armv8/zynqmp/handoff.c create mode 100644 drivers/clk/clk_zynqmp.c

3 5

[U-Boot] [PATCH] spl: don't use %.*s with CONFIG_USE_TINY_PRINTF
by Oded Gabbay 19 Jan '17

19 Jan '17

In the tiny-printf implementation, there is no support for %.*s. This patch checks if CONFIG_USE_TINY_PRINTF is defined and if so, prints a different debug statement which doesn't use %.*s Signed-off-by: Oded Gabbay <oded.gabbay(a)gmail.com> Cc: Simon Glass <sjg(a)chromium.org> --- common/spl/spl.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/common/spl/spl.c b/common/spl/spl.c index f7df834..7c4744d 100644 --- a/common/spl/spl.c +++ b/common/spl/spl.c @@ -115,9 +115,14 @@ int spl_parse_image_header(struct spl_image_info *spl_image, } spl_image->os = image_get_os(header); spl_image->name = image_get_name(header); +#ifdef CONFIG_USE_TINY_PRINTF + debug("spl: payload image: %s load addr: 0x%x size: %d\n", + spl_image->name, spl_image->load_addr, spl_image->size); +#else debug("spl: payload image: %.*s load addr: 0x%x size: %d\n", (int)sizeof(spl_image->name), spl_image->name, spl_image->load_addr, spl_image->size); +#endif } else { #ifdef CONFIG_SPL_PANIC_ON_RAW_IMAGE /* -- 2.7.4

4 6

[U-Boot] [PATCH] spl: don't use %#l with CONFIG_USE_TINY_PRINTF
by Oded Gabbay 19 Jan '17

19 Jan '17

In the tiny-printf implementation, there is no support for %# and/or %l. This patch checks if CONFIG_USE_TINY_PRINTF is defined and if so, prints a different debug statement which doesn't use %#l Signed-off-by: Oded Gabbay <oded.gabbay(a)gmail.com> Cc: Simon Glass <sjg(a)chromium.org> --- common/spl/spl.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/common/spl/spl.c b/common/spl/spl.c index f7df834..23dfa2d 100644 --- a/common/spl/spl.c +++ b/common/spl/spl.c @@ -385,9 +385,14 @@ void board_init_r(gd_t *dummy1, ulong dummy2) debug("Unsupported OS image.. Jumping nevertheless..\n"); } #if defined(CONFIG_SYS_MALLOC_F_LEN) && !defined(CONFIG_SYS_SPL_MALLOC_SIZE) +#ifdef CONFIG_USE_TINY_PRINTF + debug("SPL malloc() used 0x%x bytes (%d KB)\n", + (uint) gd->malloc_ptr, (uint) gd->malloc_ptr / 1024); +#else debug("SPL malloc() used %#lx bytes (%ld KB)\n", gd->malloc_ptr, gd->malloc_ptr / 1024); #endif +#endif debug("loaded - jumping to U-Boot..."); spl_board_prepare_for_boot(); -- 2.7.4

4 3

[U-Boot] How to test watchdog timer values and ensuring it is working as intended
by brendan 19 Jan '17

19 Jan '17

Hello, I am using an Freescale/nxp mx6solo and I want to test that the watchdog timer is working as intended. I have enabled it on my board and have confirmed it during boot > U-Boot SPL 2015.04-g0f11429-dirty (Jan 18 2017 - 05:42:24) > > Part number: VSM-SOLO-102 > Assembly: AS151004858 > Date of production: 2016 Feb 08 > NAND : 512 MiB > > > U-Boot 2015.04-g0f11429-dirty (Jan 18 2017 - 05:42:24) > > CPU: Freescale i.MX6SOLO rev1.2 at 792 MHz > CPU: Temperature 53 C > Reset cause: POR > Board: Variscite VAR-SOM-MX6 SOM-Solo 792 MHz > * > Watchdog enabled * > I2C: ready > DRAM: 1 GiB > NAND: 512 MiB > MMC: FSL_SDHC: 0, FSL_SDHC: 1 > auto-detected panel VAR-WVGA MX6CB-R > Display: VAR-WVGA MX6CB-R (800x480) > UBI init error 22 > Error: no valid bmp image at 18100000 > In: serial > Out: serial > Err: serial > eMMC: 3.5 GiB > Net: using phy at 7 > FEC [PRIME] > Normal Boot > Hit any key to stop autoboot: 0 I have just initialised the watchdog and using the provided timeout values in /drivers/watchdog/imx_watchdog.c which are > void hw_watchdog_init(void) > { > struct watchdog_regs *wdog = (struct watchdog_regs > *)WDOG1_BASE_ADDR; > u16 timeout; > > /* > * The timer watchdog can be set between > * 0.5 and 128 Seconds. If not defined > * in configuration file, sets 128 Seconds > */ > #ifndef CONFIG_WATCHDOG_TIMEOUT_MSECS > #define CONFIG_WATCHDOG_TIMEOUT_MSECS 128000 > #endif > timeout = (CONFIG_WATCHDOG_TIMEOUT_MSECS / 500) - 1; > writew(WCR_WDZST | WCR_WDBG | WCR_WDE | WCR_WDT | WCR_SRS | > SET_WCR_WT(timeout), &wdog->wcr); > hw_watchdog_reset(); > } > #endif I want to confirm that this is working so I was wondering how I am able to test that the system is not kicking the watchdog. Thanks -- View this message in context: http://u-boot.10912.n7.nabble.com/How-to-test-watchdog-timer-values-and-ens… Sent from the U-Boot mailing list archive at Nabble.com.

1 0

[U-Boot] Please pull from u-boot-i2c
by Heiko Schocher 19 Jan '17

19 Jan '17

Hello Tom, please pull from u-boot-i2c.git master checked this branch on travis, no new errors found. I got one error for pxa: "The command "git clone --depth=1 git://github.com/swarren/uboot-test-hooks.git /tmp/uboot-test-hooks" failed and exited with 128 during ." but this has nothing to do with the patches in my branch The following changes since commit bfd07670a48d9fbf22646c93e07dcd8cbc8d0864: Merge branch 'master' of git://git.denx.de/u-boot-uniphier (2017-01-17 11:39:43 -0500) are available in the git repository at: git://git.denx.de/u-boot-i2c.git master for you to fetch changes up to 19cdd5c5be2f13b85e771fa55870cb2ffb251501: i2c: i2c-cdns: No need for dedicated probe function (2017-01-18 06:39:01 +0100) ---------------------------------------------------------------- Moritz Fischer (5): i2c: mux: Allow muxes to work as children of i2c bus without i2c-parent i2c: i2c-cdns: Detect unsupported sequences for rev 1.0 i2c: i2c-cdns: Reorder timeout loop for interrupt waiting i2c: i2c-cdns: Implement workaround for hold quirk of the rev 1.0 i2c: i2c-cdns: No need for dedicated probe function drivers/i2c/i2c-cdns.c | 202 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++------------------------------------------------ drivers/i2c/muxes/i2c-mux-uclass.c | 10 ++++++++ 2 files changed, 149 insertions(+), 63 deletions(-) bye, Heiko -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany

2 1