August 2016 - U-Boot

[U-Boot] disabling mmc in spl when booting using bootrom
by Sandy Patterson 23 Sep '16

23 Sep '16

Simon, I am trying to format a patch to disable MMC in the SPL if booting main u-boot using BOOTROM, therefore the SPL MMC isn't needed. Is the best solution to wrap every header file (rock2.h firefly-rk3288.h, etc) with ifdefs on the BACK_TO_BROM define? Or would it be better to move the SPL MMC define into rk3288-common.h and just have chromebook_jerry undef it like it does the SPL GPIO code. With that change, enabling BOOT_TO_BROM shrinks the spl from 32K to 23K. Sandy

3 7

[U-Boot] [PATCH] pwm: add MACRO to limit some code which only for rk3288
by Kever Yang 22 Sep '16

22 Sep '16

The grf setting for rkpwm is only need in rk3288, other SoCs like RK3399 which also use rkpwm do not need set the grf, let's add a MACRO to make the code only for RK3288. Change-Id: I167a4e8cf925e840d4bbbcfb1437aaed52b81477 Signed-off-by: Kever Yang <kever.yang(a)rock-chips.com> --- drivers/pwm/rk_pwm.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/pwm/rk_pwm.c b/drivers/pwm/rk_pwm.c index 2d289a4..e34adf0 100644 --- a/drivers/pwm/rk_pwm.c +++ b/drivers/pwm/rk_pwm.c @@ -13,8 +13,10 @@ #include <syscon.h> #include <asm/io.h> #include <asm/arch/clock.h> +#ifdef CONFIG_ROCKCHIP_RK3288 #include <asm/arch/cru_rk3288.h> #include <asm/arch/grf_rk3288.h> +#endif #include <asm/arch/pwm.h> #include <power/regulator.h> @@ -22,7 +24,9 @@ DECLARE_GLOBAL_DATA_PTR; struct rk_pwm_priv { struct rk3288_pwm *regs; +#ifdef CONFIG_ROCKCHIP_RK3288 struct rk3288_grf *grf; +#endif }; static int rk_pwm_set_config(struct udevice *dev, uint channel, uint period_ns, @@ -65,19 +69,23 @@ static int rk_pwm_ofdata_to_platdata(struct udevice *dev) struct regmap *map; priv->regs = (struct rk3288_pwm *)dev_get_addr(dev); +#ifdef CONFIG_ROCKCHIP_RK3288 map = syscon_get_regmap_by_driver_data(ROCKCHIP_SYSCON_GRF); if (IS_ERR(map)) return PTR_ERR(map); priv->grf = regmap_get_range(map, 0); +#endif return 0; } static int rk_pwm_probe(struct udevice *dev) { +#ifdef CONFIG_ROCKCHIP_RK3288 struct rk_pwm_priv *priv = dev_get_priv(dev); rk_setreg(&priv->grf->soc_con2, 1 << 0); +#endif return 0; } -- 1.9.1

5 9

[U-Boot] [PATCH 1/3] Kconfig: zynqmp: Move config IDENT_STRING to Kconfig
by Siva Durga Prasad Paladugu 21 Sep '16

21 Sep '16

Move the config IDENT_STRING to Kconfig for ZynqMP. Signed-off-by: Siva Durga Prasad Paladugu <sivadur(a)xilinx.com> --- common/Kconfig | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/common/Kconfig b/common/Kconfig index 46e7173..011f9b3 100644 --- a/common/Kconfig +++ b/common/Kconfig @@ -198,6 +198,11 @@ config CONSOLE_RECORD_IN_SIZE The buffer is allocated immediately after the malloc() region is ready. +config IDENT_STRING + string "Board specific string to be added to uboot version string" + help + This options adds the board specific name to u-boot version. + config SYS_NO_FLASH bool "Disable support for parallel NOR flash" default n -- 2.7.4

4 10

[U-Boot] [PATCH v2 0/6] mmc: sdhci: some fixes for CONFIG_BLK migration and macro renaming
by Masahiro Yamada 21 Sep '16

21 Sep '16

Changes in v2: - Adjust comment block Masahiro Yamada (6): mmc: sdhci: move sdhci_reset() call to sdhci_init() mmc: sdhci: move error message to more relevant place mmc: sdhci: move broken voltage quirk handling to sdhci_setup_cfg() mmc: sdhci: move SDMA capability check to sdhci_setup_cfg() mmc: sdhci: drop CONFIG_ from CONFIG_SDHCI_CMD_DEFAULT_TIME mmc: sdhci: drop CONFIG_ from CONFIG_SDHCI_CMD_MAX_TIMEOUT drivers/mmc/sdhci.c | 55 +++++++++++++++++++++++++---------------------------- 1 file changed, 26 insertions(+), 29 deletions(-) -- 1.9.1

2 9

[U-Boot] [UBOOT PATCH 0/4] Add LS1 PSCI system suspend
by macro.wave.z＠gmail.com 20 Sep '16

20 Sep '16

From: Hongbo Zhang <hongbo.zhang(a)nxp.com> This patch set is based against latest community uboot tree in which my PSCIv1.0 support was merged. Currently doesn't apply our internal SDK uboot, when these get merged in community we can pull them back into SDK. We need community kernel to test this PSCI system suspend too, our internal SDK kernel is too old for PSCI. And more codes are needed to be added into kernel to do this test, such as a Flex timer as wake up device, and one peice of code to write IPPDEXPCR registers before SMC call. All patches have been tested on both LA1021ATWR and LS1021AQDS. Hongbo Zhang (4): armv7: psci: make v7_flush_dcache_all public for all psci code nxp: ls102xa: add registers definition for system sleep nxp: ls102xa: add EPU Finite State Machine nxp: ls102xa: add LS1 PSCI system suspend arch/arm/cpu/armv7/ls102xa/Makefile | 2 +- arch/arm/cpu/armv7/ls102xa/fsl_epu.c | 157 ++++++++++++++ arch/arm/cpu/armv7/ls102xa/fsl_epu.h | 8 + arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c | 236 ++++++++++++++++++++++ arch/arm/cpu/armv7/ls102xa/psci.S | 11 + arch/arm/cpu/armv7/psci.S | 6 +- arch/arm/include/asm/arch-ls102xa/config.h | 2 + arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 52 ++++- arch/arm/include/asm/psci.h | 2 + board/freescale/common/arm_sleep.c | 35 +++- include/configs/ls1021aqds.h | 8 + include/configs/ls1021atwr.h | 1 + 12 files changed, 514 insertions(+), 6 deletions(-) create mode 100644 arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c -- 2.1.4

3 6

[U-Boot] [PATCH] armv8: ls2080a: Remove debug server support
by York Sun 20 Sep '16

20 Sep '16

Debug server feature has been dropped from roadmap. Signed-off-by: York Sun <york.sun(a)nxp.com> --- README | 6 - arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 5 - .../include/asm/arch-fsl-layerscape/immap_lsch3.h | 9 - board/freescale/ls2080a/ls2080a.c | 5 - board/freescale/ls2080aqds/ls2080aqds.c | 4 - board/freescale/ls2080ardb/ls2080ardb.c | 4 - drivers/misc/Makefile | 1 - drivers/misc/fsl_debug_server.c | 250 --------------------- include/configs/ls2080a_common.h | 8 +- include/fsl_debug_server.h | 32 --- 10 files changed, 1 insertion(+), 323 deletions(-) delete mode 100644 drivers/misc/fsl_debug_server.c delete mode 100644 include/fsl_debug_server.h diff --git a/README b/README index cadb571..37c19c6 100644 --- a/README +++ b/README @@ -4946,12 +4946,6 @@ The Freescale Layerscape Debug Server Support supports the loading of "Debug Server firmware" and triggering SP boot-rom. This firmware often needs to be loaded during U-Boot booting. -- CONFIG_FSL_DEBUG_SERVER - Enable the Debug Server for Layerscape SoCs. - -- CONFIG_SYS_DEBUG_SERVER_DRAM_BLOCK_MIN_SIZE - Define minimum DDR size required for debug server image - - CONFIG_SYS_MC_RSV_MEM_ALIGN Define alignment of reserved memory MC requires diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c index e12b773..5fbd848 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c @@ -18,7 +18,6 @@ #include <asm/arch/mp.h> #endif #include <fm_eth.h> -#include <fsl_debug_server.h> #include <fsl-mc/fsl_mc.h> #ifdef CONFIG_FSL_ESDHC #include <fsl_esdhc.h> @@ -457,10 +456,6 @@ phys_size_t board_reserve_ram_top(phys_size_t ram_size) #ifdef CONFIG_SYS_MEM_TOP_HIDE #error CONFIG_SYS_MEM_TOP_HIDE not to be used together with this function #endif -/* Carve the Debug Server private DRAM block from the end of DRAM */ -#ifdef CONFIG_FSL_DEBUG_SERVER - ram_top -= debug_server_get_dram_block_size(); -#endif /* Carve the MC private DRAM block from the end of DRAM */ #ifdef CONFIG_FSL_MC_ENET diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h index 93e26c1..7acba27 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h @@ -33,15 +33,6 @@ #define CONFIG_SYS_FSL_WRIOP1_MDIO2 (CONFIG_SYS_FSL_WRIOP1_ADDR + 0x17000) #define CONFIG_SYS_FSL_LSCH3_SERDES_ADDR (CONFIG_SYS_IMMR + 0xEA0000) -/* SP (Cortex-A5) related */ -#define CONFIG_SYS_FSL_SP_ADDR (CONFIG_SYS_IMMR + 0x00F00000) -#define CONFIG_SYS_FSL_SP_VSG_GIC_ADDR (CONFIG_SYS_FSL_SP_ADDR) -#define CONFIG_SYS_FSL_SP_VSG_GIC_VIGR1 (CONFIG_SYS_FSL_SP_ADDR) -#define CONFIG_SYS_FSL_SP_VSG_GIC_VIGR2 \ - (CONFIG_SYS_FSL_SP_ADDR + 0x0008) -#define CONFIG_SYS_FSL_SP_LOOPBACK_DUART \ - (CONFIG_SYS_FSL_SP_ADDR + 0x1000) - #define CONFIG_SYS_FSL_DCSR_DDR_ADDR 0x70012c000ULL #define CONFIG_SYS_FSL_DCSR_DDR2_ADDR 0x70012d000ULL #define CONFIG_SYS_FSL_DCSR_DDR3_ADDR 0x700132000ULL diff --git a/board/freescale/ls2080a/ls2080a.c b/board/freescale/ls2080a/ls2080a.c index 00337d7..d0a88d4 100644 --- a/board/freescale/ls2080a/ls2080a.c +++ b/board/freescale/ls2080a/ls2080a.c @@ -12,7 +12,6 @@ #include <asm/io.h> #include <fdt_support.h> #include <libfdt.h> -#include <fsl_debug_server.h> #include <fsl-mc/fsl_mc.h> #include <environment.h> #include <asm/arch/soc.h> @@ -60,10 +59,6 @@ int dram_init(void) #if defined(CONFIG_ARCH_MISC_INIT) int arch_misc_init(void) { -#ifdef CONFIG_FSL_DEBUG_SERVER - debug_server_init(); -#endif - return 0; } #endif diff --git a/board/freescale/ls2080aqds/ls2080aqds.c b/board/freescale/ls2080aqds/ls2080aqds.c index 7d95deb..ca4a2e5 100644 --- a/board/freescale/ls2080aqds/ls2080aqds.c +++ b/board/freescale/ls2080aqds/ls2080aqds.c @@ -12,7 +12,6 @@ #include <asm/io.h> #include <fdt_support.h> #include <libfdt.h> -#include <fsl_debug_server.h> #include <fsl-mc/fsl_mc.h> #include <environment.h> #include <i2c.h> @@ -265,9 +264,6 @@ int dram_init(void) #if defined(CONFIG_ARCH_MISC_INIT) int arch_misc_init(void) { -#ifdef CONFIG_FSL_DEBUG_SERVER - debug_server_init(); -#endif #ifdef CONFIG_FSL_CAAM sec_init(); #endif diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c index a65cd4a..7d8a711 100644 --- a/board/freescale/ls2080ardb/ls2080ardb.c +++ b/board/freescale/ls2080ardb/ls2080ardb.c @@ -13,7 +13,6 @@ #include <hwconfig.h> #include <fdt_support.h> #include <libfdt.h> -#include <fsl_debug_server.h> #include <fsl-mc/fsl_mc.h> #include <environment.h> #include <i2c.h> @@ -229,9 +228,6 @@ int dram_init(void) #if defined(CONFIG_ARCH_MISC_INIT) int arch_misc_init(void) { -#ifdef CONFIG_FSL_DEBUG_SERVER - debug_server_init(); -#endif #ifdef CONFIG_FSL_CAAM sec_init(); #endif diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index fff6f0c..4ddbdb3 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -16,7 +16,6 @@ obj-$(CONFIG_CROS_EC_LPC) += cros_ec_lpc.o obj-$(CONFIG_CROS_EC_I2C) += cros_ec_i2c.o obj-$(CONFIG_CROS_EC_SANDBOX) += cros_ec_sandbox.o obj-$(CONFIG_CROS_EC_SPI) += cros_ec_spi.o -obj-$(CONFIG_FSL_DEBUG_SERVER) += fsl_debug_server.o endif obj-$(CONFIG_FSL_IIM) += fsl_iim.o obj-$(CONFIG_GPIO_LED) += gpio_led.o diff --git a/drivers/misc/fsl_debug_server.c b/drivers/misc/fsl_debug_server.c deleted file mode 100644 index 98d9fbe..0000000 --- a/drivers/misc/fsl_debug_server.c +++ /dev/null @@ -1,250 +0,0 @@ -/* - * Copyright (C) 2014 Freescale Semiconductor - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <errno.h> -#include <asm/io.h> -#include <asm/system.h> - -#include <fsl-mc/fsl_mc.h> -#include <fsl_debug_server.h> - -DECLARE_GLOBAL_DATA_PTR; -static int debug_server_ver_info_maj, debug_server_ver_info_min; - -/** - * Copying Debug Server firmware to DDR - */ -static int debug_server_copy_image(const char *title, u64 image_addr, - u32 image_size, u64 debug_server_ram_addr) -{ - debug("%s copied to address %p\n", title, - (void *)debug_server_ram_addr); - memcpy((void *)debug_server_ram_addr, (void *)image_addr, image_size); - - return 0; -} - -/** - * Debug Server FIT image parser checks if the image is in FIT - * format, verifies integrity of the image and calculates - * raw image address and size values. - * - * Returns 0 if success and -1 if any of the above mentioned - * task fail. - **/ -int debug_server_parse_firmware_fit_image(const void **raw_image_addr, - size_t *raw_image_size) -{ - int format; - void *fit_hdr; - int node_offset; - const void *data; - size_t size; - const char *uname = "firmware"; - char *desc; - char *debug_server_ver_info; - char *debug_server_ver_info_major, *debug_server_ver_info_minor; - - /* Check if the image is in NOR flash */ -#ifdef CONFIG_SYS_DEBUG_SERVER_FW_IN_NOR - fit_hdr = (void *)CONFIG_SYS_DEBUG_SERVER_FW_ADDR; -#else -#error "CONFIG_SYS_DEBUG_SERVER_FW_IN_NOR not defined" -#endif - - /* Check if Image is in FIT format */ - format = genimg_get_format(fit_hdr); - if (format != IMAGE_FORMAT_FIT) { - printf("Debug Server FW: Not a FIT image\n"); - goto out_error; - } - - if (!fit_check_format(fit_hdr)) { - printf("Debug Server FW: Bad FIT image format\n"); - goto out_error; - } - - node_offset = fit_image_get_node(fit_hdr, uname); - if (node_offset < 0) { - printf("Debug Server FW:Can not find %s subimage\n", uname); - goto out_error; - } - - /* Verify Debug Server firmware image */ - if (!fit_image_verify(fit_hdr, node_offset)) { - printf("Debug Server FW: Bad Debug Server firmware hash"); - goto out_error; - } - - if (fit_get_desc(fit_hdr, node_offset, &desc) < 0) { - printf("Debug Server FW: Failed to get FW description"); - goto out_error; - } - - debug_server_ver_info = strstr(desc, "Version"); - debug_server_ver_info_major = strtok(debug_server_ver_info, "."); - debug_server_ver_info_minor = strtok(NULL, "."); - - debug_server_ver_info_maj = - simple_strtoul(debug_server_ver_info_major, NULL, 10); - debug_server_ver_info_min = - simple_strtoul(debug_server_ver_info_minor, NULL, 10); - - /* Debug server version checking */ - if ((debug_server_ver_info_maj < DEBUG_SERVER_VER_MAJOR) || - (debug_server_ver_info_min < DEBUG_SERVER_VER_MINOR)) { - printf("Debug server FW mismatches the min version required\n"); - printf("Expected:%d.%d, Got %d.%d\n", - DEBUG_SERVER_VER_MAJOR, DEBUG_SERVER_VER_MINOR, - debug_server_ver_info_maj, - debug_server_ver_info_min); - goto out_error; - } - - /* Get address and size of raw image */ - fit_image_get_data(fit_hdr, node_offset, &data, &size); - - *raw_image_addr = data; - *raw_image_size = size; - - return 0; - -out_error: - return -1; -} - -/** - * Return the actual size of the Debug Server private DRAM block. - * - * NOTE: For now this function always returns the minimum required size, - * However, in the future, the actual size may be obtained from an environment - * variable. - */ -unsigned long debug_server_get_dram_block_size(void) -{ - return CONFIG_SYS_DEBUG_SERVER_DRAM_BLOCK_MIN_SIZE; -} - -int debug_server_init(void) -{ - struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); - int error, timeout = CONFIG_SYS_DEBUG_SERVER_TIMEOUT; - int debug_server_boot_status; - u64 debug_server_ram_addr, debug_server_ram_size; - const void *raw_image_addr; - size_t raw_image_size = 0; - - debug("debug_server_init called\n"); - /* - * The Debug Server private DRAM block was already carved at the end of - * DRAM by board_init_f() using CONFIG_SYS_MEM_TOP_HIDE: - */ - debug_server_ram_size = debug_server_get_dram_block_size(); - if (gd->bd->bi_dram[1].start) - debug_server_ram_addr = - gd->bd->bi_dram[1].start + gd->bd->bi_dram[1].size; - else - debug_server_ram_addr = - gd->bd->bi_dram[0].start + gd->bd->bi_dram[0].size; - -#ifdef CONFIG_FSL_MC_ENET - debug_server_ram_addr += mc_get_dram_block_size(); -#endif - - error = debug_server_parse_firmware_fit_image(&raw_image_addr, - &raw_image_size); - if (error != 0) - goto out; - - debug("debug server (ram addr = 0x%llx, ram size = 0x%llx)\n", - debug_server_ram_addr, debug_server_ram_size); - /* - * Load the Debug Server FW at the beginning of the Debug Server - * private DRAM block: - */ - debug_server_copy_image("Debug Server Firmware", - (u64)raw_image_addr, raw_image_size, - debug_server_ram_addr); - - /* flush dcache */ - flush_dcache_range((unsigned long)debug_server_ram_addr, - (unsigned long)debug_server_ram_addr + - (unsigned long)debug_server_ram_size); - - /* - * Tell SP that the Debug Server FW is about to be launched. Before that - * populate the following: - * 1. Write the size allocated to SP Memory region into Bits {31:16} of - * SCRATCHRW5. - * 2. Write the start address of the SP memory regions into - * SCRATCHRW5 (Bits {15:0}, contain most significant bits, Bits - * {47:32} of the SP Memory Region physical start address - * (SoC address)) and SCRATCHRW6 (Bits {31:0}). - * 3. To know the Debug Server FW boot status, set bit 0 of SCRATCHRW11 - * to 1. The Debug Server sets this to 0 to indicate a - * successul boot. - * 4. Wakeup SP by writing 0x1F to VSG GIC reg VIGR2. - */ - - /* 512 MB */ - out_le32(&gur->scratchrw[5 - 1], - (u32)((u64)debug_server_ram_addr >> 32) | (0x000D << 16)); - out_le32(&gur->scratchrw[6 - 1], - ((u32)debug_server_ram_addr) & 0xFFFFFFFF); - - out_le32(&gur->scratchrw[11 - 1], DEBUG_SERVER_INIT_STATUS); - /* Allow the changes to reflect in GUR block */ - mb(); - - /* - * Program VGIC to raise an interrupt to SP - */ - out_le32(CONFIG_SYS_FSL_SP_VSG_GIC_VIGR2, 0x1F); - /* Allow the changes to reflect in VIGR2 */ - mb(); - - dmb(); - debug("Polling for Debug server to launch ...\n"); - - while (1) { - debug_server_boot_status = in_le32(&gur->scratchrw[11 - 1]); - if (!(debug_server_boot_status & DEBUG_SERVER_INIT_STATUS_MASK)) - break; - - udelay(1); /* throttle polling */ - if (timeout-- <= 0) - break; - } - - if (timeout <= 0) { - printf("Debug Server FW timed out (boot status: 0x%x)\n", - debug_server_boot_status); - error = -ETIMEDOUT; - goto out; - } - - if (debug_server_boot_status & DEBUG_SERVER_INIT_STATUS_MASK) { - printf("Debug server FW error'ed out (boot status: 0x%x)\n", - debug_server_boot_status); - error = -ENODEV; - goto out; - } - - printf("Debug server booted\n"); - printf("Detected firmware %d.%d, (boot status: 0x0%x)\n", - debug_server_ver_info_maj, debug_server_ver_info_min, - debug_server_boot_status); - -out: - if (error != 0) - debug_server_boot_status = -error; - else - debug_server_boot_status = 0; - - return debug_server_boot_status; -} - diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index ebe1415..903f6dd 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -153,11 +153,6 @@ unsigned long long get_qixis_addr(void); #define CONFIG_SYS_NAND_BASE 0x530000000ULL #define CONFIG_SYS_NAND_BASE_PHYS 0x30000000 -/* Debug Server firmware */ -#define CONFIG_FSL_DEBUG_SERVER -/* 2 sec timeout */ -#define CONFIG_SYS_DEBUG_SERVER_TIMEOUT (2 * 1000 * 1000) - /* MC firmware */ #define CONFIG_FSL_MC_ENET /* TODO Actual DPL max length needs to be confirmed with the MC FW team */ @@ -175,8 +170,7 @@ unsigned long long get_qixis_addr(void); * It will be used by MC and Debug Server. The MC region must be * 512MB aligned, so the min size to hide is 512MB. */ -#if defined(CONFIG_FSL_MC_ENET) || defined(CONFIG_FSL_DEBUG_SERVER) -#define CONFIG_SYS_DEBUG_SERVER_DRAM_BLOCK_MIN_SIZE (254UL * 1024 * 1024) +#ifdef CONFIG_FSL_MC_ENET #define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE (512UL * 1024 * 1024) #define CONFIG_SYS_MC_RSV_MEM_ALIGN (512UL * 1024 * 1024) #endif diff --git a/include/fsl_debug_server.h b/include/fsl_debug_server.h deleted file mode 100644 index 28d8adb..0000000 --- a/include/fsl_debug_server.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * Copyright (C) 2014 Freescale Semiconductor - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __FSL_DBG_SERVER_H__ -#define __FSL_DBG_SERVER_H__ - -#include <asm/io.h> -#include <common.h> - -/* - * Define Debug Server firmware version information - */ - -/* Major version number: incremented on API compatibility changes */ -#define DEBUG_SERVER_VER_MAJOR 0 - -/* Minor version number: incremented on API additions (backward - * compatible); reset when major version is incremented. - */ -#define DEBUG_SERVER_VER_MINOR 1 - -#define DEBUG_SERVER_INIT_STATUS (1 << 0) -#define DEBUG_SERVER_INIT_STATUS_MASK (0x00000001) - -int debug_server_init(void); -unsigned long debug_server_get_dram_block_size(void); - -#endif /* __FSL_DBG_SERVER_H__ */ - -- 2.7.4

2 1

[U-Boot] [PATCH 1/2] driver/ddr/fsl: Add more debug registers
by Shengzhou Liu 20 Sep '16

20 Sep '16

From: York Sun <york.sun(a)nxp.com> 32 more debug registers are added for newer DDR controllers. Signed-off-by: York Sun <york.sun(a)nxp.com> Signed-off-by: Shengzhou Liu <Shengzhou.Liu(a)nxp.com> --- drivers/ddr/fsl/fsl_ddr_gen4.c | 2 +- drivers/ddr/fsl/interactive.c | 4 ++-- include/fsl_ddr_sdram.h | 2 +- include/fsl_immap.h | 3 +-- 4 files changed, 5 insertions(+), 6 deletions(-) diff --git a/drivers/ddr/fsl/fsl_ddr_gen4.c b/drivers/ddr/fsl/fsl_ddr_gen4.c index d37e247..c2f8a8b 100644 --- a/drivers/ddr/fsl/fsl_ddr_gen4.c +++ b/drivers/ddr/fsl/fsl_ddr_gen4.c @@ -218,7 +218,7 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs, ddr_out32(&ddr->err_disable, regs->err_disable); #endif ddr_out32(&ddr->err_int_en, regs->err_int_en); - for (i = 0; i < 32; i++) { + for (i = 0; i < 64; i++) { if (regs->debug[i]) { debug("Write to debug_%d as %08x\n", i+1, regs->debug[i]); diff --git a/drivers/ddr/fsl/interactive.c b/drivers/ddr/fsl/interactive.c index d23e6e5..49352b3 100644 --- a/drivers/ddr/fsl/interactive.c +++ b/drivers/ddr/fsl/interactive.c @@ -670,7 +670,7 @@ static void print_fsl_memctl_config_regs(const fsl_ddr_cfg_regs_t *ddr) print_option_table(options, n_opts, ddr); - for (i = 0; i < 32; i++) + for (i = 0; i < 64; i++) printf("debug_%02d = 0x%08X\n", i+1, ddr->debug[i]); } @@ -771,7 +771,7 @@ static void fsl_ddr_regs_edit(fsl_ddr_info_t *pinfo, if (handle_option_table(options, n_opts, ddr, regname, value_str)) return; - for (i = 0; i < 32; i++) { + for (i = 0; i < 64; i++) { unsigned int value = simple_strtoul(value_str, NULL, 0); sprintf(buf, "debug_%u", i + 1); if (strcmp(buf, regname) == 0) { diff --git a/include/fsl_ddr_sdram.h b/include/fsl_ddr_sdram.h index 486e47e..36bd9d7 100644 --- a/include/fsl_ddr_sdram.h +++ b/include/fsl_ddr_sdram.h @@ -299,7 +299,7 @@ typedef struct fsl_ddr_cfg_regs_s { unsigned int ddr_cdr2; unsigned int err_disable; unsigned int err_int_en; - unsigned int debug[32]; + unsigned int debug[64]; } fsl_ddr_cfg_regs_t; typedef struct memctl_options_partial_s { diff --git a/include/fsl_immap.h b/include/fsl_immap.h index e4addad..b1c4fe7 100644 --- a/include/fsl_immap.h +++ b/include/fsl_immap.h @@ -131,7 +131,6 @@ struct ccsr_ddr { u32 capture_ext_address; /* Error Extended Addr Capture */ u32 err_sbe; /* Single-Bit ECC Error Management */ u8 res_e5c[164]; - u32 debug[32]; /* debug_1 to debug_32 */ - u8 res_f80[128]; + u32 debug[64]; /* debug_1 to debug_64 */ }; #endif /* __FSL_IMMAP_H */ -- 2.1.0.27.g96db324

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[U-Boot] [PATCH] armv8: fsl-layerscape: Update ddr erratum a008336
by Shengzhou Liu 20 Sep '16

20 Sep '16

DDR erratum A008336 only applies to DDR controller v5.2.0. DDR controller v5.2.1 already has default 0x43b30002 in EDDRTQCR1 register for optimal performance. Signed-off-by: Shengzhou Liu <Shengzhou.Liu(a)nxp.com> --- arch/arm/cpu/armv8/fsl-layerscape/soc.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c index f62b78d..28928b3 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c @@ -58,11 +58,13 @@ static void erratum_a008336(void) #ifdef CONFIG_SYS_FSL_ERRATUM_A008336 #ifdef CONFIG_SYS_FSL_DCSR_DDR_ADDR eddrtqcr1 = (void *)CONFIG_SYS_FSL_DCSR_DDR_ADDR + 0x800; - out_le32(eddrtqcr1, 0x63b30002); + if (fsl_ddr_get_version(0) == 0x50200) + out_le32(eddrtqcr1, 0x63b30002); #endif #ifdef CONFIG_SYS_FSL_DCSR_DDR2_ADDR eddrtqcr1 = (void *)CONFIG_SYS_FSL_DCSR_DDR2_ADDR + 0x800; - out_le32(eddrtqcr1, 0x63b30002); + if (fsl_ddr_get_version(0) == 0x50200) + out_le32(eddrtqcr1, 0x63b30002); #endif #endif } -- 2.1.0.27.g96db324

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[U-Boot] [PATCH] common/xyzModem.c: Fix delay timeout calculation
by Andrew F. Davis 20 Sep '16

20 Sep '16

When waiting for input in CYGACC_COMM_IF_GETC_TIMEOUT we delay 2 seconds by incrementing and checking a counter variable every 20 uSeconds. The overhead in the loop calling tstc() millions of times causes the timeout to be closer to 20 seconds. Delay longer per iteration to reduce overhead and bring the timeout back closer to the correct time. Signed-off-by: Andrew F. Davis <afd(a)ti.com> --- common/xyzModem.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/common/xyzModem.c b/common/xyzModem.c index 5656aac..c3f2afc 100644 --- a/common/xyzModem.c +++ b/common/xyzModem.c @@ -71,11 +71,10 @@ typedef int cyg_int32; static int CYGACC_COMM_IF_GETC_TIMEOUT (char chan, char *c) { -#define DELAY 20 unsigned long counter = 0; - while (!tstc () && (counter < xyzModem_CHAR_TIMEOUT * 1000 / DELAY)) + while (!tstc () && (counter < xyzModem_CHAR_TIMEOUT)) { - udelay (DELAY); + mdelay (1); counter++; } if (tstc ()) -- 2.9.3

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[U-Boot] [PATCH] WIP: usb: xhci-pci: Add DM support
by Stefan Roese 20 Sep '16

20 Sep '16

This patch adds DM support to the xHCI PCI driver. Enabling its use e.g. in x86 platforms. Status: On the congatec BayTrail SoM, xHCI still does not work correctly with this patch. Some internal timeouts lead to resets (BUG). Additional work is needed here. I'm posting this version as WIP so that other developers interested in this support might use it as a start. I might get back to it in a few weeks as well. Signed-off-by: Stefan Roese <sr(a)denx.de> Cc: George McCollister <george.mccollister(a)gmail.com> Cc: Simon Glass <sjg(a)chromium.org> Cc: Bin Meng <bmeng.cn(a)gmail.com> Cc: Marek Vasut <marex(a)denx.de> --- drivers/usb/host/xhci-pci.c | 81 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 81 insertions(+) diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c index 361fcce..63daaa6 100644 --- a/drivers/usb/host/xhci-pci.c +++ b/drivers/usb/host/xhci-pci.c @@ -7,12 +7,15 @@ */ #include <common.h> +#include <dm.h> #include <errno.h> #include <pci.h> #include <usb.h> #include "xhci.h" +#ifndef CONFIG_DM_USB + /* * Create the appropriate control structures to manage a new XHCI host * controller. @@ -58,3 +61,81 @@ int xhci_hcd_init(int index, struct xhci_hccr **ret_hccr, void xhci_hcd_stop(int index) { } + +#else + +struct xhci_pci_priv { + struct xhci_ctrl ctrl; /* Needs to come first in this struct! */ +}; + +static void xhci_pci_init(struct udevice *dev, struct xhci_hccr **ret_hccr, + struct xhci_hcor **ret_hcor) +{ + struct xhci_hccr *hccr; + struct xhci_hcor *hcor; + u32 cmd; + + hccr = (struct xhci_hccr *)dm_pci_map_bar(dev, + PCI_BASE_ADDRESS_0, PCI_REGION_MEM); + hcor = (struct xhci_hcor *)((uintptr_t) hccr + + HC_LENGTH(xhci_readl(&hccr->cr_capbase))); + + debug("XHCI-PCI init hccr 0x%x and hcor 0x%x hc_length %d\n", + (u32)hccr, (u32)hcor, + (u32)HC_LENGTH(xhci_readl(&hccr->cr_capbase))); + + *ret_hccr = hccr; + *ret_hcor = hcor; + + /* enable busmaster */ + dm_pci_read_config32(dev, PCI_COMMAND, &cmd); + cmd |= PCI_COMMAND_MASTER; + dm_pci_write_config32(dev, PCI_COMMAND, cmd); +} + +static int xhci_pci_probe(struct udevice *dev) +{ + struct xhci_hccr *hccr; + struct xhci_hcor *hcor; + + xhci_pci_init(dev, &hccr, &hcor); + + return xhci_register(dev, hccr, hcor); +} + +static int xhci_pci_remove(struct udevice *dev) +{ + int ret; + + ret = xhci_deregister(dev); + if (ret) + return ret; + + return 0; +} + +static const struct udevice_id xhci_pci_ids[] = { + { .compatible = "xhci-pci" }, + { } +}; + +U_BOOT_DRIVER(xhci_pci) = { + .name = "xhci_pci", + .id = UCLASS_USB, + .probe = xhci_pci_probe, + .remove = xhci_pci_remove, + .of_match = xhci_pci_ids, + .ops = &xhci_usb_ops, + .platdata_auto_alloc_size = sizeof(struct usb_platdata), + .priv_auto_alloc_size = sizeof(struct xhci_pci_priv), + .flags = DM_FLAG_ALLOC_PRIV_DMA, +}; + +static struct pci_device_id xhci_pci_supported[] = { + { PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_XHCI, ~0) }, + {}, +}; + +U_BOOT_PCI_DEVICE(xhci_pci, xhci_pci_supported); + +#endif /* CONFIG_DM_USB */ -- 2.9.2

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