August 2016 - U-Boot

[U-Boot] [PATCH] move: rockchip: move clock drivers into a subdirectory
by Heiko Stuebner 04 Aug '16

04 Aug '16

With the number of Rockchip clock drivers increasing, don't clutter up the core drivers/clk directory with them and instead move them out of the way into a separate subdirectory. Suggested-by: Simon Glass <sjg(a)chromium.org> Signed-off-by: Heiko Stuebner <heiko(a)sntech.de> --- drivers/clk/Makefile | 3 +-- drivers/clk/rockchip/Makefile | 8 ++++++++ drivers/clk/{ => rockchip}/clk_rk3036.c | 0 drivers/clk/{ => rockchip}/clk_rk3288.c | 0 4 files changed, 9 insertions(+), 2 deletions(-) create mode 100644 drivers/clk/rockchip/Makefile rename drivers/clk/{ => rockchip}/clk_rk3036.c (100%) rename drivers/clk/{ => rockchip}/clk_rk3288.c (100%) diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index f7a8891..3cbdd54 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -6,8 +6,7 @@ # obj-$(CONFIG_CLK) += clk-uclass.o clk_fixed_rate.o -obj-$(CONFIG_ROCKCHIP_RK3036) += clk_rk3036.o -obj-$(CONFIG_ROCKCHIP_RK3288) += clk_rk3288.o +obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/ obj-$(CONFIG_SANDBOX) += clk_sandbox.o obj-$(CONFIG_SANDBOX) += clk_sandbox_test.o obj-$(CONFIG_MACH_PIC32) += clk_pic32.o diff --git a/drivers/clk/rockchip/Makefile b/drivers/clk/rockchip/Makefile new file mode 100644 index 0000000..acfd858 --- /dev/null +++ b/drivers/clk/rockchip/Makefile @@ -0,0 +1,8 @@ +# +# Copyright (c) 2016 Google, Inc +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-$(CONFIG_ROCKCHIP_RK3036) += clk_rk3036.o +obj-$(CONFIG_ROCKCHIP_RK3288) += clk_rk3288.o diff --git a/drivers/clk/clk_rk3036.c b/drivers/clk/rockchip/clk_rk3036.c similarity index 100% rename from drivers/clk/clk_rk3036.c rename to drivers/clk/rockchip/clk_rk3036.c diff --git a/drivers/clk/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c similarity index 100% rename from drivers/clk/clk_rk3288.c rename to drivers/clk/rockchip/clk_rk3288.c -- 2.6.4

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[U-Boot] [PATCH v3 0/2] rk3399: add soc basic driver support
by Kever Yang 04 Aug '16

04 Aug '16

This patchset add basic driver like clock, grf, sysreset for rk3399, and enable clock init in emmc driver. This patchset has tested on rk3399 evb. Changes in v3: - use EINVAL instead of -1 for return value. - update commit message Changes in v2: - include '_SHIFT_' in '_MASK' MACRO - fix comment style - use DIV_ROUND_UP instead of div_round_up - use uclass_get_device_by_driver in rockchip_get_cru - implement ofdata_to_platdata for priv->cru init - update base on comments from Jaehoon Chung Kever Yang (2): rk3399: add basic soc driver mmc: rockchip_sdhci: add clock init arch/arm/include/asm/arch-rockchip/cru_rk3399.h | 93 +++ arch/arm/mach-rockchip/rk3399/Makefile | 2 + arch/arm/mach-rockchip/rk3399/reset_rk3399.c | 45 ++ arch/arm/mach-rockchip/rk3399/syscon_rk3399.c | 20 + drivers/clk/Makefile | 1 + drivers/clk/clk_rk3399.c | 817 ++++++++++++++++++++++++ drivers/mmc/rockchip_sdhci.c | 11 +- 7 files changed, 988 insertions(+), 1 deletion(-) create mode 100644 arch/arm/include/asm/arch-rockchip/cru_rk3399.h create mode 100644 arch/arm/mach-rockchip/rk3399/reset_rk3399.c create mode 100644 arch/arm/mach-rockchip/rk3399/syscon_rk3399.c create mode 100644 drivers/clk/clk_rk3399.c -- 1.9.1

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[U-Boot] [PATCH] rockchip: rockchip, sdram-channel 0xff fix remaining dts
by Sandy Patterson 04 Aug '16

04 Aug '16

Add an extra byte so that this data is not byteswapped. Signed-off-by: Sandy Patterson <apatterson(a)sightlogix.com> --- arch/arm/dts/rk3288-rock2-square.dts | 2 +- arch/arm/dts/rk3288-veyron.dtsi | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/dts/rk3288-rock2-square.dts b/arch/arm/dts/rk3288-rock2-square.dts index 34073c9..2c30355 100644 --- a/arch/arm/dts/rk3288-rock2-square.dts +++ b/arch/arm/dts/rk3288-rock2-square.dts @@ -192,7 +192,7 @@ 0x5 0x0>; rockchip,phy-timing = <0x48f9aab4 0xea0910 0x1002c200 0xa60 0x40 0x10 0x0>; - rockchip,sdram-channel = /bits/ 8 <0x1 0xa 0x3 0x2 0x1 0x0 0xf 0xf>; + rockchip,sdram-channel = /bits/ 8 <0x1 0xa 0x3 0x2 0x1 0x0 0xf 0xf 0xff>; rockchip,sdram-params = <0x30B25564 0x627 3 666000000 3 9 1>; }; diff --git a/arch/arm/dts/rk3288-veyron.dtsi b/arch/arm/dts/rk3288-veyron.dtsi index 421d212..d9d5187 100644 --- a/arch/arm/dts/rk3288-veyron.dtsi +++ b/arch/arm/dts/rk3288-veyron.dtsi @@ -253,7 +253,7 @@ 0x5 0x0>; rockchip,phy-timing = <0x48f9aab4 0xea0910 0x1002c200 0xa60 0x40 0x10 0x0>; - rockchip,sdram-channel = /bits/ 8 <0x1 0xa 0x3 0x2 0x1 0x0 0xf 0xf>; + rockchip,sdram-channel = /bits/ 8 <0x1 0xa 0x3 0x2 0x1 0x0 0xf 0xf 0xff>; rockchip,sdram-params = <0x30B25564 0x627 3 666000000 3 9 1>; }; -- 1.9.1

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[U-Boot] [PATCH] rockchip: add fastboot support for rk3036 board
by Ziyuan Xu 04 Aug '16

04 Aug '16

Enable fastboot feature on rk3036, please refer to doc/README.rockchip for more detailed usage. Signed-off-by: Ziyuan Xu <xzy.xu(a)rock-chips.com> --- arch/arm/dts/rk3036-sdk.dts | 2 -- board/rockchip/evb_rk3036/evb_rk3036.c | 46 ++++++++++++++++++++++++++++++ board/rockchip/kylin_rk3036/kylin_rk3036.c | 46 ++++++++++++++++++++++++++++++ include/configs/rk3036_common.h | 21 +++++++++++++- 4 files changed, 112 insertions(+), 3 deletions(-) diff --git a/arch/arm/dts/rk3036-sdk.dts b/arch/arm/dts/rk3036-sdk.dts index a83badb..1c9ddf9 100644 --- a/arch/arm/dts/rk3036-sdk.dts +++ b/arch/arm/dts/rk3036-sdk.dts @@ -41,6 +41,4 @@ &usb_otg { status = "okay"; - - dr_mode = "host"; }; diff --git a/board/rockchip/evb_rk3036/evb_rk3036.c b/board/rockchip/evb_rk3036/evb_rk3036.c index f5758b1..e5582b4 100644 --- a/board/rockchip/evb_rk3036/evb_rk3036.c +++ b/board/rockchip/evb_rk3036/evb_rk3036.c @@ -47,3 +47,49 @@ void enable_caches(void) dcache_enable(); } #endif + +#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG) +#include <usb.h> +#include <usb/dwc2_udc.h> + +static struct dwc2_plat_otg_data rk3036_otg_data = { + .rx_fifo_sz = 512, + .np_tx_fifo_sz = 16, + .tx_fifo_sz = 128, +}; + +int board_usb_init(int index, enum usb_init_type init) +{ + int node; + const char *mode; + bool matched = false; + const void *blob = gd->fdt_blob; + + /* find the usb_otg node */ + node = fdt_node_offset_by_compatible(blob, -1, + "rockchip,rk3288-usb"); + + while (node > 0) { + mode = fdt_getprop(blob, node, "dr_mode", NULL); + if (mode && strcmp(mode, "otg") == 0) { + matched = true; + break; + } + + node = fdt_node_offset_by_compatible(blob, node, + "rockchip,rk3288-usb"); + } + if (!matched) { + debug("Not found usb_otg device\n"); + return -ENODEV; + } + rk3036_otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg"); + + return dwc2_udc_probe(&rk3036_otg_data); +} + +int board_usb_cleanup(int index, enum usb_init_type init) +{ + return 0; +} +#endif diff --git a/board/rockchip/kylin_rk3036/kylin_rk3036.c b/board/rockchip/kylin_rk3036/kylin_rk3036.c index 2a25871..5ade695 100644 --- a/board/rockchip/kylin_rk3036/kylin_rk3036.c +++ b/board/rockchip/kylin_rk3036/kylin_rk3036.c @@ -79,3 +79,49 @@ void enable_caches(void) dcache_enable(); } #endif + +#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG) +#include <usb.h> +#include <usb/dwc2_udc.h> + +static struct dwc2_plat_otg_data rk3036_otg_data = { + .rx_fifo_sz = 512, + .np_tx_fifo_sz = 16, + .tx_fifo_sz = 128, +}; + +int board_usb_init(int index, enum usb_init_type init) +{ + int node; + const char *mode; + bool matched = false; + const void *blob = gd->fdt_blob; + + /* find the usb_otg node */ + node = fdt_node_offset_by_compatible(blob, -1, + "rockchip,rk3288-usb"); + + while (node > 0) { + mode = fdt_getprop(blob, node, "dr_mode", NULL); + if (mode && strcmp(mode, "otg") == 0) { + matched = true; + break; + } + + node = fdt_node_offset_by_compatible(blob, node, + "rockchip,rk3288-usb"); + } + if (!matched) { + debug("Not found usb_otg device\n"); + return -ENODEV; + } + rk3036_otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg"); + + return dwc2_udc_probe(&rk3036_otg_data); +} + +int board_usb_cleanup(int index, enum usb_init_type init) +{ + return 0; +} +#endif diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h index ffcaa6f..21d4683 100644 --- a/include/configs/rk3036_common.h +++ b/include/configs/rk3036_common.h @@ -6,7 +6,7 @@ #ifndef __CONFIG_RK3036_COMMON_H #define __CONFIG_RK3036_COMMON_H -#define CONFIG_SYS_CACHELINE_SIZE 32 +#define CONFIG_SYS_CACHELINE_SIZE 64 #include <asm/arch/hardware.h> @@ -60,6 +60,25 @@ #define CONFIG_SF_DEFAULT_SPEED 20000000 #ifndef CONFIG_SPL_BUILD +/* usb otg */ +#define CONFIG_USB_GADGET +#define CONFIG_USB_GADGET_DUALSPEED +#define CONFIG_USB_GADGET_DWC2_OTG +#define CONFIG_USB_GADGET_VBUS_DRAW 0 + +/* fastboot */ +#define CONFIG_CMD_FASTBOOT +#define CONFIG_USB_FUNCTION_FASTBOOT +#define CONFIG_FASTBOOT_FLASH +#define CONFIG_FASTBOOT_FLASH_MMC_DEV 0 +#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR +#define CONFIG_FASTBOOT_BUF_SIZE 0x08000000 + +#define CONFIG_USB_GADGET_DOWNLOAD +#define CONFIG_G_DNL_MANUFACTURER "Rockchip" +#define CONFIG_G_DNL_VENDOR_NUM 0x2207 +#define CONFIG_G_DNL_PRODUCT_NUM 0x310a + #include <config_distro_defaults.h> #define ENV_MEM_LAYOUT_SETTINGS \ -- 1.9.1

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[U-Boot] [PATCH] configs: rk3399: add gpt and fs support
by Kever Yang 04 Aug '16

04 Aug '16

To compatible with distro boot, we need to add gpt and fs support, including gpt table and vfat, ext2, ext4 support. Signed-off-by: Kever Yang <kever.yang(a)rock-chips.com> --- include/configs/rk3399_common.h | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h index a9c9d29..12327d5 100644 --- a/include/configs/rk3399_common.h +++ b/include/configs/rk3399_common.h @@ -35,6 +35,15 @@ #define CONFIG_BOUNCE_BUFFER #define CONFIG_ROCKCHIP_SDHCI_MAX_FREQ 200000000 +#define CONFIG_DOS_PARTITION +#define CONFIG_PARTITION_UUIDS +#define CONFIG_SUPPORT_VFAT +#define CONFIG_FS_FAT +#define CONFIG_FAT_WRITE +#define CONFIG_CMD_PART + +/* EXT4 FS */ +#define CONFIG_FS_EXT4 #define CONFIG_FAT_WRITE /* RAW SD card / eMMC locations. */ @@ -60,6 +69,14 @@ "kernel_addr_r=0x02000000\0" \ "ramdisk_addr_r=0x04000000\0" +#define CONFIG_CMD_GPT +#define CONFIG_RANDOM_UUID +#define CONFIG_EFI_PARTITION +#define PARTS_DEFAULT \ + "uuid_disk=${uuid_gpt_disk};" \ + "name=boot,start=16M,size=32M,bootable;" \ + "name=rootfs,size=-,uuid=${uuid_gpt_rootfs};" \ + /* First try to boot from SD (index 0), then eMMC (index 1) */ #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) \ @@ -67,6 +84,8 @@ #include <config_distro_bootcmd.h> #define CONFIG_EXTRA_ENV_SETTINGS \ + ENV_MEM_LAYOUT_SETTINGS \ + "partitions=" PARTS_DEFAULT \ BOOTENV #endif -- 1.9.1

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[U-Boot] [PATCH] arm: cache: always flush cache line size for page table
by Stefan Agner 04 Aug '16

04 Aug '16

From: Stefan Agner <stefan.agner(a)toradex.com> The page table is maintained by the CPU, hence it is safe to always align cache flush to a whole cache line size. This allows to use mmu_page_table_flush for a single page table, e.g. when configure only small regions through mmu_set_region_dcache_behaviour. Signed-off-by: Stefan Agner <stefan.agner(a)toradex.com> --- This avoids two messages observed on a i.MX 7 based system: CACHE: Misaligned operation at range [9fff0000, 9fff0004] CACHE: Misaligned operation at range [9fff0024, 9fff0028] Those were caused by two calls to mmu_set_region_dcache_behaviour in arch/arm/imx-common/cache.c (enable_caches). Not sure if this is the right way to fix this... Also, we could do the alignment in mmu_set_region_dcache_behaviour. -- Stefan arch/arm/cpu/armv7/cache_v7.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/cpu/armv7/cache_v7.c b/arch/arm/cpu/armv7/cache_v7.c index 52f1856..71787fc 100644 --- a/arch/arm/cpu/armv7/cache_v7.c +++ b/arch/arm/cpu/armv7/cache_v7.c @@ -147,6 +147,13 @@ void arm_init_before_mmu(void) void mmu_page_table_flush(unsigned long start, unsigned long stop) { + /* + * Make sure range is cache line aligned + * Only CPU maintains page tables, hence it is save to always + * flush the complete cache line... + */ + start &= ~(CONFIG_SYS_CACHELINE_SIZE - 1); + stop = ALIGN(stop, CONFIG_SYS_CACHELINE_SIZE); flush_dcache_range(start, stop); v7_inval_tlb(); } -- 2.9.0

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[U-Boot] [PATCH 1/2] rockchip: add basic partitions support for rk3288
by Ziyuan Xu 04 Aug '16

04 Aug '16

For compatibility with distro boot, fastboot, and mount the mmc deivce to PC via usb mass storage feature, GPT partitions are essential. You should write the partitions to mmc device prior to use above feature. => gpt write mmc 1 $partitions GPT successfully written to block device! success! Signed-off-by: Ziyuan Xu <xzy.xu(a)rock-chips.com> --- include/configs/rk3288_common.h | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h index 814116c..fa37335 100644 --- a/include/configs/rk3288_common.h +++ b/include/configs/rk3288_common.h @@ -113,6 +113,12 @@ "kernel_addr_r=0x02000000\0" \ "ramdisk_addr_r=0x04000000\0" +#define CONFIG_RANDOM_UUID +#define PARTS_DEFAULT \ + "uuid_disk=${uuid_gpt_disk};" \ + "name=boot,start=8M,size=64M,bootable,uuid=${uuid_gpt_boot};" \ + "name=rootfs,size=-,uuid=${uuid_gpt_rootfs};\0" \ + /* First try to boot from SD (index 0), then eMMC (index 1 */ #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) \ @@ -125,6 +131,7 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "fdt_high=0x1fffffff\0" \ "initrd_high=0x1fffffff\0" \ + "partitions=" PARTS_DEFAULT \ ENV_MEM_LAYOUT_SETTINGS \ ROCKCHIP_DEVICE_SETTINGS \ BOOTENV -- 2.9.2

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[U-Boot] [PATCH v2 00/10] mx7: add dt support for Colibri iMX7S/iMX7D
by Stefan Agner 04 Aug '16

04 Aug '16

From: Stefan Agner <stefan.agner(a)toradex.com> This patchset adds device tree support for Colibri iMX7S/iMX7D. It is the first device tree enabled board for any i.MX 7 SoC hence the patchset adds some common infrastructure: - Add device tree support for serial_mxc. - imx7.dtsi - I descided to leave the s/d suffix since the SoCs are very similar and boards will likely use runtime detection to distinguish the two available SoCs. - The pinmux file imx7d-pinfunc.h is taken from the Kernel and stored in the same place Otherwise the conversion is quite straightforward and simplified the board code somewhat. Two patches enhance the board support with PMIC support, which has been the driver for this conversion. Changes since v1: - Add Linux kernel commit hash for imx7d-pinfunc.h - Removed obsolete init declaration in PMIC header file - Rebased and added Acks -- Stefan Stefan Agner (10): dm: imx: serial: support device tree pinctrl: imx: do not announce driver initialization arm: dts: imx7: add pinctrl defines arm: dts: imx7: add basic i.MX 7/Colibri iMX7 device tree colibri_imx7: remove legancy I2C support colibri_imx7: remove legancy UART platform data power: pmic: add Ricoh RN5T567 PMIC support arm: dts: imx7: add Ricoh RN5T567 PMIC node colibri_imx7: use Ricoh RN5T567 to reboot the board configs: enable device tree for Colibri iMX7 arch/arm/dts/Makefile | 2 + arch/arm/dts/imx7-colibri.dts | 97 ++ arch/arm/dts/imx7.dtsi | 194 ++++ arch/arm/dts/imx7d-pinfunc.h | 1151 ++++++++++++++++++++++++ board/toradex/colibri_imx7/colibri_imx7.c | 92 +- configs/colibri_imx7_defconfig | 10 +- doc/device-tree-bindings/pmic/rn5t567.txt | 17 + doc/device-tree-bindings/serial/mxc-serial.txt | 8 + drivers/pinctrl/nxp/pinctrl-imx.c | 2 +- drivers/power/pmic/Kconfig | 8 + drivers/power/pmic/Makefile | 1 + drivers/power/pmic/rn5t567.c | 64 ++ drivers/serial/serial_mxc.c | 28 +- include/configs/colibri_imx7.h | 3 +- include/power/rn5t567_pmic.h | 113 +++ 15 files changed, 1734 insertions(+), 56 deletions(-) create mode 100644 arch/arm/dts/imx7-colibri.dts create mode 100644 arch/arm/dts/imx7.dtsi create mode 100644 arch/arm/dts/imx7d-pinfunc.h create mode 100644 doc/device-tree-bindings/pmic/rn5t567.txt create mode 100644 doc/device-tree-bindings/serial/mxc-serial.txt create mode 100644 drivers/power/pmic/rn5t567.c create mode 100644 include/power/rn5t567_pmic.h -- 2.9.0

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[U-Boot] [PATCH 0/3] rk3399: enable dwmmc controller for sdcard
by Kever Yang 04 Aug '16

04 Aug '16

rk3399 using dwmmc controller for sdcard, let's enable it. this patch set has been test on rk3399 evb. Kever Yang (3): clock: rk3399: add support for dwmmc 400K dts: rk3399: enable dwmmc for sdcard config: rk3399: enable dwmmc controller arch/arm/dts/rk3399-evb.dts | 4 ++++ arch/arm/dts/rk3399.dtsi | 2 +- configs/evb-rk3399_defconfig | 1 + drivers/clk/clk_rk3399.c | 29 +++++++++++++++++++++-------- include/configs/rk3399_common.h | 1 + 5 files changed, 28 insertions(+), 9 deletions(-) -- 1.9.1

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[U-Boot] [PATCH 1/7] dt-bindings: allow child nodes inside the Tegra BPMP
by Stephen Warren 04 Aug '16

04 Aug '16

From: Stephen Warren <swarren(a)nvidia.com> The BPMP implements some services which must be represented by separate nodes. For example, it can provide access to certain I2C controllers, and the I2C bindings represent each I2C controller as a device tree node. Update the binding to describe how the BPMP supports this. Signed-off-by: Stephen Warren <swarren(a)nvidia.com> --- This series naturally depends on all the other Tegra186 patches I've sent. .../firmware/nvidia,tegra186-bpmp.txt | 23 ++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/doc/device-tree-bindings/firmware/nvidia,tegra186-bpmp.txt b/doc/device-tree-bindings/firmware/nvidia,tegra186-bpmp.txt index 9a3864f56955..447252e882b1 100644 --- a/doc/device-tree-bindings/firmware/nvidia,tegra186-bpmp.txt +++ b/doc/device-tree-bindings/firmware/nvidia,tegra186-bpmp.txt @@ -38,6 +38,24 @@ implemented by this node: - .../reset/reset.txt - <dt-bindings/reset/tegra186-reset.h> +The BPMP implements some services which must be represented by separate nodes. +For example, it can provide access to certain I2C controllers, and the I2C +bindings represent each I2C controller as a device tree node. Such nodes should +be nested directly inside the main BPMP node. + +Software can determine whether a child node of the BPMP node represents a device +by checking for a compatible property. Any node with a compatible property +represents a device that can be instantiated. Nodes without a compatible +property may be used to provide configuration information regarding the BPMP +itself, although no such configuration nodes are currently defined by this +binding. + +The BPMP firmware defines no single global name-/numbering-space for such +services. Put another way, the numbering scheme for I2C buses is distinct from +the numbering scheme for any other service the BPMP may provide (e.g. a future +hypothetical SPI bus service). As such, child device nodes will have no reg +property, and the BPMP node will have no #address-cells or #size-cells property. + The shared memory bindings for BPMP ----------------------------------- @@ -78,4 +96,9 @@ bpmp { #clock-cells = <1>; #power-domain-cells = <1>; #reset-cells = <1>; + + i2c { + compatible = "..."; + ... + }; }; -- 2.9.2

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