June 2016 - U-Boot

[U-Boot] How to support ATF on u-boot
by Kever Yang 27 Jul '16

27 Jul '16

Hi U-boot Maintainers, I want to upstream a new SoC named RK3399 from Rockchip which is AARCH64/ARMv8, we need to support Arm Trust Firmware base on U-boot. Right now we are using a miniloader(just like SPL in U-boot) to load ATF/U-boot, and PC jump from miniloader to ATF and then to U-boot(with CPU change to EL2 mode or nsEL1), then U-boot load kernel/rootfs as usual. The ATF support for RK3399 has already upstream Could you give your opinion on how to support ATF on U-boot upstream? When I asked Simon Glass offline, he suggest if we can build ATF as part of the U-boot build process, perhaps with a script in U-boot tree, Perhaps something like: make rk3399_board_defconfig make ./scripts/build-atf-image rk3399_board ^^ new script In any case, a good README would help. Thanks, - Kever

4 8

[U-Boot] [PATCH 0/4] Add SECURE BOOT support in SPL framework
by Sumit Garg 26 Jul '16

26 Jul '16

The patch-set does the following : 1. Enable chain of trust in SPL framework for ARM based platforms. 3. Add SD secure boot target for ls1021atwr platform. Sumit Garg (4): DM: crypto/fsl: Enable rsa DM driver usage before relocation SECURE_BOOT: Enable chain of trust in SPL framework SECURE_BOOT: Enable SD as a source for bootscript arm: ls1021atwr: Add SD secure boot target arch/arm/include/asm/fsl_secure_boot.h | 68 +++++++++++++++++----- arch/powerpc/include/asm/fsl_secure_boot.h | 4 +- board/freescale/common/fsl_chain_of_trust.c | 34 ++++++++++- board/freescale/ls1021atwr/ls1021atwr.c | 7 +++ .../ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig | 31 ++++++++++ drivers/crypto/fsl/fsl_rsa.c | 1 + include/config_fsl_chain_trust.h | 18 +++--- include/configs/ls1021atwr.h | 22 +++++++ 8 files changed, 159 insertions(+), 26 deletions(-) create mode 100644 configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig -- 1.8.1.4

3 14

[U-Boot] [PATCH v2] include: usb: Rename USB controller base address mapping
by Rajesh Bhagat 26 Jul '16

26 Jul '16

Remove Soc specific defines and use generic chasis specific defines for USB controller base address mapping. Signed-off-by: Rajesh Bhagat <rajesh.bhagat(a)nxp.com> --- Changes in v2: - Rebased patch for latest u-boot .../include/asm/arch-fsl-layerscape/immap_lsch2.h | 6 +++--- .../include/asm/arch-fsl-layerscape/immap_lsch3.h | 4 ++-- arch/arm/include/asm/arch-ls102xa/config.h | 6 ++---- include/linux/usb/xhci-fsl.h | 20 ++++++++------------ include/usb/ehci-ci.h | 2 +- 5 files changed, 16 insertions(+), 22 deletions(-) diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h index e98e055..0c87c2f 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h @@ -31,9 +31,9 @@ #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR + 0x011c0600) #define CONFIG_SYS_NS16550_COM3 (CONFIG_SYS_IMMR + 0x011d0500) #define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_IMMR + 0x011d0600) -#define CONFIG_SYS_LS1043A_XHCI_USB1_ADDR (CONFIG_SYS_IMMR + 0x01f00000) -#define CONFIG_SYS_LS1043A_XHCI_USB2_ADDR (CONFIG_SYS_IMMR + 0x02000000) -#define CONFIG_SYS_LS1043A_XHCI_USB3_ADDR (CONFIG_SYS_IMMR + 0x02100000) +#define CONFIG_SYS_XHCI_USB1_ADDR (CONFIG_SYS_IMMR + 0x01f00000) +#define CONFIG_SYS_XHCI_USB2_ADDR (CONFIG_SYS_IMMR + 0x02000000) +#define CONFIG_SYS_XHCI_USB3_ADDR (CONFIG_SYS_IMMR + 0x02100000) #define CONFIG_SYS_PCIE1_ADDR (CONFIG_SYS_IMMR + 0x2400000) #define CONFIG_SYS_PCIE2_ADDR (CONFIG_SYS_IMMR + 0x2500000) #define CONFIG_SYS_PCIE3_ADDR (CONFIG_SYS_IMMR + 0x2600000) diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h index 65b3357..2dc9e5c 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h @@ -51,8 +51,8 @@ #define I2C3_BASE_ADDR (CONFIG_SYS_IMMR + 0x01020000) #define I2C4_BASE_ADDR (CONFIG_SYS_IMMR + 0x01030000) -#define CONFIG_SYS_LS2080A_XHCI_USB1_ADDR (CONFIG_SYS_IMMR + 0x02100000) -#define CONFIG_SYS_LS2080A_XHCI_USB2_ADDR (CONFIG_SYS_IMMR + 0x02110000) +#define CONFIG_SYS_XHCI_USB1_ADDR (CONFIG_SYS_IMMR + 0x02100000) +#define CONFIG_SYS_XHCI_USB2_ADDR (CONFIG_SYS_IMMR + 0x02110000) /* TZ Address Space Controller Definitions */ #define TZASC1_BASE 0x01100000 /* as per CCSR map. */ diff --git a/arch/arm/include/asm/arch-ls102xa/config.h b/arch/arm/include/asm/arch-ls102xa/config.h index 04abec4..67a4311 100644 --- a/arch/arm/include/asm/arch-ls102xa/config.h +++ b/arch/arm/include/asm/arch-ls102xa/config.h @@ -35,13 +35,11 @@ #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_IMMR + 0x011c0500) #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR + 0x011d0500) #define CONFIG_SYS_DCU_ADDR (CONFIG_SYS_IMMR + 0x01ce0000) -#define CONFIG_SYS_LS102XA_XHCI_USB1_ADDR (CONFIG_SYS_IMMR + 0x02100000) -#define CONFIG_SYS_LS102XA_USB1_ADDR \ - (CONFIG_SYS_IMMR + CONFIG_SYS_LS102XA_USB1_OFFSET) +#define CONFIG_SYS_XHCI_USB1_ADDR (CONFIG_SYS_IMMR + 0x02100000) +#define CONFIG_SYS_EHCI_USB1_ADDR (CONFIG_SYS_IMMR + 0x07600000) #define CONFIG_SYS_FSL_SEC_OFFSET 0x00700000 #define CONFIG_SYS_FSL_JR0_OFFSET 0x00710000 -#define CONFIG_SYS_LS102XA_USB1_OFFSET 0x07600000 #define CONFIG_SYS_TSEC1_OFFSET 0x01d10000 #define CONFIG_SYS_TSEC2_OFFSET 0x01d50000 #define CONFIG_SYS_TSEC3_OFFSET 0x01d90000 diff --git a/include/linux/usb/xhci-fsl.h b/include/linux/usb/xhci-fsl.h index 253eddf..199f366 100644 --- a/include/linux/usb/xhci-fsl.h +++ b/include/linux/usb/xhci-fsl.h @@ -51,22 +51,18 @@ struct fsl_xhci { struct dwc3 *dwc3_reg; }; -#if defined(CONFIG_LS102XA) -#define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_LS102XA_XHCI_USB1_ADDR +#if defined(CONFIG_LS102XA) || defined(CONFIG_LS1012A) +#define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_XHCI_USB1_ADDR #define CONFIG_SYS_FSL_XHCI_USB2_ADDR 0 #define CONFIG_SYS_FSL_XHCI_USB3_ADDR 0 #elif defined(CONFIG_LS2080A) -#define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_LS2080A_XHCI_USB1_ADDR -#define CONFIG_SYS_FSL_XHCI_USB2_ADDR CONFIG_SYS_LS2080A_XHCI_USB2_ADDR -#define CONFIG_SYS_FSL_XHCI_USB3_ADDR 0 -#elif defined(CONFIG_LS1043A) || defined(CONFIG_LS1012A) -#define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_LS1043A_XHCI_USB1_ADDR -#define CONFIG_SYS_FSL_XHCI_USB2_ADDR CONFIG_SYS_LS1043A_XHCI_USB2_ADDR -#define CONFIG_SYS_FSL_XHCI_USB3_ADDR CONFIG_SYS_LS1043A_XHCI_USB3_ADDR -#elif defined(CONFIG_LS1012A) -#define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_LS1043A_XHCI_USB1_ADDR -#define CONFIG_SYS_FSL_XHCI_USB2_ADDR 0 +#define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_XHCI_USB1_ADDR +#define CONFIG_SYS_FSL_XHCI_USB2_ADDR CONFIG_SYS_XHCI_USB2_ADDR #define CONFIG_SYS_FSL_XHCI_USB3_ADDR 0 +#elif defined(CONFIG_LS1043A) +#define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_XHCI_USB1_ADDR +#define CONFIG_SYS_FSL_XHCI_USB2_ADDR CONFIG_SYS_XHCI_USB2_ADDR +#define CONFIG_SYS_FSL_XHCI_USB3_ADDR CONFIG_SYS_XHCI_USB3_ADDR #endif #define FSL_USB_XHCI_ADDR {CONFIG_SYS_FSL_XHCI_USB1_ADDR, \ diff --git a/include/usb/ehci-ci.h b/include/usb/ehci-ci.h index 586d32a..882aed4 100644 --- a/include/usb/ehci-ci.h +++ b/include/usb/ehci-ci.h @@ -160,7 +160,7 @@ #define CONFIG_SYS_FSL_USB1_ADDR CONFIG_SYS_MPC512x_USB1_ADDR #define CONFIG_SYS_FSL_USB2_ADDR 0 #elif defined(CONFIG_LS102XA) -#define CONFIG_SYS_FSL_USB1_ADDR CONFIG_SYS_LS102XA_USB1_ADDR +#define CONFIG_SYS_FSL_USB1_ADDR CONFIG_SYS_EHCI_USB1_ADDR #define CONFIG_SYS_FSL_USB2_ADDR 0 #endif -- 1.7.7.4

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[U-Boot] [PATCH] i2c: fsl: Fix driver initialization
by Mario Six 26 Jul '16

26 Jul '16

Due to a oversight in testing, the initialization of the recently introduced Freescale I2C DM driver works only for 36 bit mode of e.g. the MPC85XX SoCs (specifically, if the physical addresses are 64 bit wide and the DT addresses 32 bit wide). This patch corrects the initialization so that it will work in a more general setting. Signed-off-by: Mario Six <mario.six(a)gdsys.cc> --- drivers/i2c/fsl_i2c.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/drivers/i2c/fsl_i2c.c b/drivers/i2c/fsl_i2c.c index b8cc647..407c4a7 100644 --- a/drivers/i2c/fsl_i2c.c +++ b/drivers/i2c/fsl_i2c.c @@ -583,12 +583,11 @@ static int fsl_i2c_set_bus_speed(struct udevice *bus, unsigned int speed) static int fsl_i2c_ofdata_to_platdata(struct udevice *bus) { struct fsl_i2c_dev *dev = dev_get_priv(bus); - u64 reg; - u32 addr, size; + fdt_addr_t addr; + fdt_size_t size; - reg = fdtdec_get_addr(gd->fdt_blob, bus->of_offset, "reg"); - addr = reg >> 32; - size = reg & 0xFFFFFFFF; + addr = fdtdec_get_addr_size_auto_noparent(gd->fdt_blob, bus->of_offset, + "reg", 0, &size); dev->base = map_sysmem(CONFIG_SYS_IMMR + addr, size); -- 2.7.0.GIT

2 1

[U-Boot] [PATCH v2] net: usb: r8152: Add DM support
by Stefan Roese 26 Jul '16

26 Jul '16

Add support for driver model, so that CONFIG_DM_ETH can be defined and used with this driver. This patch also adds the read_rom_hwaddr() callback so that the ROM MAC address will be used to the DM part of this driver. Signed-off-by: Stefan Roese <sr(a)denx.de> Cc: Stephen Warren <swarren(a)nvidia.com> Cc: Ted Chen <tedchen(a)realtek.com> Reviewed-by: Simon Glass <sjg(a)chromium.org> Cc: Joe Hershberger <joe.hershberger(a)ni.com> --- v2: - Return all errors from usb_ether_receive() in r8152_eth_recv() - Use ENOSPC as error return code in r8152_eth_recv() instead of EINVAL - Return error if rtl_ops_init() fails drivers/usb/eth/r8152.c | 237 ++++++++++++++++++++++++++++++++++++++++----- drivers/usb/eth/r8152.h | 4 + drivers/usb/eth/r8152_fw.c | 2 + 3 files changed, 221 insertions(+), 22 deletions(-) diff --git a/drivers/usb/eth/r8152.c b/drivers/usb/eth/r8152.c index 325b70c..070aadf 100644 --- a/drivers/usb/eth/r8152.c +++ b/drivers/usb/eth/r8152.c @@ -3,9 +3,10 @@ * * SPDX-License-Identifier: GPL-2.0 * - */ + */ #include <common.h> +#include <dm.h> #include <errno.h> #include <malloc.h> #include <usb.h> @@ -15,6 +16,7 @@ #include "usb_ether.h" #include "r8152.h" +#ifndef CONFIG_DM_ETH /* local vars */ static int curr_eth_dev; /* index for name of next device detected */ @@ -23,12 +25,6 @@ struct r8152_dongle { unsigned short product; }; -struct r8152_version { - unsigned short tcr; - unsigned short version; - bool gmii; -}; - static const struct r8152_dongle const r8152_dongles[] = { /* Realtek */ { 0x0bda, 0x8050 }, @@ -54,6 +50,13 @@ static const struct r8152_dongle const r8152_dongles[] = { /* Nvidia */ { 0x0955, 0x09ff }, }; +#endif + +struct r8152_version { + unsigned short tcr; + unsigned short version; + bool gmii; +}; static const struct r8152_version const r8152_versions[] = { { 0x4c00, RTL_VER_01, 0 }, @@ -1176,11 +1179,8 @@ static int rtl_ops_init(struct r8152 *tp) return ret; } -static int r8152_init(struct eth_device *eth, bd_t *bd) +static int r8152_init_common(struct r8152 *tp) { - struct ueth_data *dev = (struct ueth_data *)eth->priv; - struct r8152 *tp = (struct r8152 *)dev->dev_priv; - u8 speed; int timeout = 0; int link_detected; @@ -1210,14 +1210,11 @@ static int r8152_init(struct eth_device *eth, bd_t *bd) return 0; } -static int r8152_send(struct eth_device *eth, void *packet, int length) +static int r8152_send_common(struct ueth_data *ueth, void *packet, int length) { - struct ueth_data *dev = (struct ueth_data *)eth->priv; - + struct usb_device *udev = ueth->pusb_dev; u32 opts1, opts2 = 0; - int err; - int actual_len; unsigned char msg[PKTSIZE + sizeof(struct tx_desc)]; struct tx_desc *tx_desc = (struct tx_desc *)msg; @@ -1231,18 +1228,31 @@ static int r8152_send(struct eth_device *eth, void *packet, int length) memcpy(msg + sizeof(struct tx_desc), (void *)packet, length); - err = usb_bulk_msg(dev->pusb_dev, - usb_sndbulkpipe(dev->pusb_dev, dev->ep_out), - (void *)msg, - length + sizeof(struct tx_desc), - &actual_len, - USB_BULK_SEND_TIMEOUT); + err = usb_bulk_msg(udev, usb_sndbulkpipe(udev, ueth->ep_out), + (void *)msg, length + sizeof(struct tx_desc), + &actual_len, USB_BULK_SEND_TIMEOUT); debug("Tx: len = %zu, actual = %u, err = %d\n", length + sizeof(struct tx_desc), actual_len, err); return err; } +#ifndef CONFIG_DM_ETH +static int r8152_init(struct eth_device *eth, bd_t *bd) +{ + struct ueth_data *dev = (struct ueth_data *)eth->priv; + struct r8152 *tp = (struct r8152 *)dev->dev_priv; + + return r8152_init_common(tp); +} + +static int r8152_send(struct eth_device *eth, void *packet, int length) +{ + struct ueth_data *dev = (struct ueth_data *)eth->priv; + + return r8152_send_common(dev, packet, length); +} + static int r8152_recv(struct eth_device *eth) { struct ueth_data *dev = (struct ueth_data *)eth->priv; @@ -1454,3 +1464,186 @@ int r8152_eth_get_info(struct usb_device *dev, struct ueth_data *ss, debug("MAC %pM\n", eth->enetaddr); return 1; } +#endif /* !CONFIG_DM_ETH */ + +#ifdef CONFIG_DM_ETH +static int r8152_eth_start(struct udevice *dev) +{ + struct r8152 *tp = dev_get_priv(dev); + + debug("** %s (%d)\n", __func__, __LINE__); + + return r8152_init_common(tp); +} + +void r8152_eth_stop(struct udevice *dev) +{ + struct r8152 *tp = dev_get_priv(dev); + + debug("** %s (%d)\n", __func__, __LINE__); + + tp->rtl_ops.disable(tp); +} + +int r8152_eth_send(struct udevice *dev, void *packet, int length) +{ + struct r8152 *tp = dev_get_priv(dev); + + return r8152_send_common(&tp->ueth, packet, length); +} + +int r8152_eth_recv(struct udevice *dev, int flags, uchar **packetp) +{ + struct r8152 *tp = dev_get_priv(dev); + struct ueth_data *ueth = &tp->ueth; + uint8_t *ptr; + int ret, len; + struct rx_desc *rx_desc; + u16 packet_len; + + len = usb_ether_get_rx_bytes(ueth, &ptr); + debug("%s: first try, len=%d\n", __func__, len); + if (!len) { + if (!(flags & ETH_RECV_CHECK_DEVICE)) + return -EAGAIN; + ret = usb_ether_receive(ueth, RTL8152_AGG_BUF_SZ); + if (ret) + return ret; + + len = usb_ether_get_rx_bytes(ueth, &ptr); + debug("%s: second try, len=%d\n", __func__, len); + } + + rx_desc = (struct rx_desc *)ptr; + packet_len = le32_to_cpu(rx_desc->opts1) & RX_LEN_MASK; + packet_len -= CRC_SIZE; + + if (packet_len > len - (sizeof(struct rx_desc) + CRC_SIZE)) { + debug("Rx: too large packet: %d\n", packet_len); + goto err; + } + + *packetp = ptr + sizeof(struct rx_desc); + return packet_len; + +err: + usb_ether_advance_rxbuf(ueth, -1); + return -ENOSPC; +} + +static int r8152_free_pkt(struct udevice *dev, uchar *packet, int packet_len) +{ + struct r8152 *tp = dev_get_priv(dev); + + packet_len += sizeof(struct rx_desc) + CRC_SIZE; + packet_len = ALIGN(packet_len, 8); + usb_ether_advance_rxbuf(&tp->ueth, packet_len); + + return 0; +} + +static int r8152_write_hwaddr(struct udevice *dev) +{ + struct eth_pdata *pdata = dev_get_platdata(dev); + struct r8152 *tp = dev_get_priv(dev); + + unsigned char enetaddr[8] = { 0 }; + + debug("** %s (%d)\n", __func__, __LINE__); + memcpy(enetaddr, pdata->enetaddr, ETH_ALEN); + + ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG); + pla_ocp_write(tp, PLA_IDR, BYTE_EN_SIX_BYTES, 8, enetaddr); + ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML); + + debug("MAC %pM\n", pdata->enetaddr); + return 0; +} + +int r8152_read_rom_hwaddr(struct udevice *dev) +{ + struct eth_pdata *pdata = dev_get_platdata(dev); + struct r8152 *tp = dev_get_priv(dev); + + debug("** %s (%d)\n", __func__, __LINE__); + r8152_read_mac(tp, pdata->enetaddr); + return 0; +} + +static int r8152_eth_probe(struct udevice *dev) +{ + struct usb_device *udev = dev_get_parent_priv(dev); + struct eth_pdata *pdata = dev_get_platdata(dev); + struct r8152 *tp = dev_get_priv(dev); + struct ueth_data *ueth = &tp->ueth; + int ret; + + tp->udev = udev; + r8152_read_mac(tp, pdata->enetaddr); + + r8152b_get_version(tp); + + ret = rtl_ops_init(tp); + if (ret) + return ret; + + tp->rtl_ops.init(tp); + tp->rtl_ops.up(tp); + + rtl8152_set_speed(tp, AUTONEG_ENABLE, + tp->supports_gmii ? SPEED_1000 : SPEED_100, + DUPLEX_FULL); + + return usb_ether_register(dev, ueth, RTL8152_AGG_BUF_SZ); +} + +static const struct eth_ops r8152_eth_ops = { + .start = r8152_eth_start, + .send = r8152_eth_send, + .recv = r8152_eth_recv, + .free_pkt = r8152_free_pkt, + .stop = r8152_eth_stop, + .write_hwaddr = r8152_write_hwaddr, + .read_rom_hwaddr = r8152_read_rom_hwaddr, +}; + +U_BOOT_DRIVER(r8152_eth) = { + .name = "r8152_eth", + .id = UCLASS_ETH, + .probe = r8152_eth_probe, + .ops = &r8152_eth_ops, + .priv_auto_alloc_size = sizeof(struct r8152), + .platdata_auto_alloc_size = sizeof(struct eth_pdata), +}; + +static const struct usb_device_id r8152_eth_id_table[] = { + /* Realtek */ + { USB_DEVICE(0x0bda, 0x8050) }, + { USB_DEVICE(0x0bda, 0x8152) }, + { USB_DEVICE(0x0bda, 0x8153) }, + + /* Samsung */ + { USB_DEVICE(0x04e8, 0xa101) }, + + /* Lenovo */ + { USB_DEVICE(0x17ef, 0x304f) }, + { USB_DEVICE(0x17ef, 0x3052) }, + { USB_DEVICE(0x17ef, 0x3054) }, + { USB_DEVICE(0x17ef, 0x3057) }, + { USB_DEVICE(0x17ef, 0x7205) }, + { USB_DEVICE(0x17ef, 0x720a) }, + { USB_DEVICE(0x17ef, 0x720b) }, + { USB_DEVICE(0x17ef, 0x720c) }, + + /* TP-LINK */ + { USB_DEVICE(0x2357, 0x0601) }, + + /* Nvidia */ + { USB_DEVICE(0x0955, 0x09ff) }, + + { } /* Terminating entry */ +}; + +U_BOOT_USB_DEVICE(r8152_eth, r8152_eth_id_table); +#endif /* CONFIG_DM_ETH */ + diff --git a/drivers/usb/eth/r8152.h b/drivers/usb/eth/r8152.h index cd44da2..784ad99 100644 --- a/drivers/usb/eth/r8152.h +++ b/drivers/usb/eth/r8152.h @@ -594,6 +594,10 @@ struct r8152 { u16 ocp_base; u8 version; + +#ifdef CONFIG_DM_ETH + struct ueth_data ueth; +#endif }; int generic_ocp_write(struct r8152 *tp, u16 index, u16 byteen, diff --git a/drivers/usb/eth/r8152_fw.c b/drivers/usb/eth/r8152_fw.c index f820b16..b6c8228 100644 --- a/drivers/usb/eth/r8152_fw.c +++ b/drivers/usb/eth/r8152_fw.c @@ -5,7 +5,9 @@ * */ #include <common.h> +#include <dm.h> #include <errno.h> +#include "usb_ether.h" #include "r8152.h" static u8 r8152b_pla_patch_a[] = { -- 2.9.0

3 4

[U-Boot] [PATCH 1/2] tools: env: Fix format warnings in debug
by Marcin Niestroj 26 Jul '16

26 Jul '16

Format warnings (-Wformat) were shown in printf() calls after defining DEBUG macro. Update format string and explicitly cast variables to suppress all warnings. Signed-off-by: Marcin Niestroj <m.niestroj(a)grinn-global.com> --- tools/env/fw_env.c | 17 ++++++++++------- 1 file changed, 10 insertions(+), 7 deletions(-) diff --git a/tools/env/fw_env.c b/tools/env/fw_env.c index 06cf63d..b4b542a 100644 --- a/tools/env/fw_env.c +++ b/tools/env/fw_env.c @@ -649,8 +649,8 @@ static int flash_bad_block (int fd, uint8_t mtd_type, loff_t *blockstart) if (badblock) { #ifdef DEBUG - fprintf (stderr, "Bad block at 0x%llx, " - "skipping\n", *blockstart); + fprintf (stderr, "Bad block at 0x%llx, skipping\n", + (unsigned long long) *blockstart); #endif return badblock; } @@ -737,7 +737,8 @@ static int flash_read_buf (int dev, int fd, void *buf, size_t count, } #ifdef DEBUG fprintf(stderr, "Read 0x%x bytes at 0x%llx on %s\n", - rc, blockstart + block_seek, DEVNAME(dev)); + rc, (unsigned long long) blockstart + block_seek, + DEVNAME(dev)); #endif processed += readlen; readlen = min (blocklen, count - processed); @@ -835,8 +836,9 @@ static int flash_write_buf (int dev, int fd, void *buf, size_t count, if (block_seek + count != write_total) { if (block_seek != 0) fprintf(stderr, " and "); - fprintf(stderr, "0x%lx - 0x%x", - block_seek + count, write_total - 1); + fprintf(stderr, "0x%lx - 0x%lx", + (unsigned long) block_seek + count, + (unsigned long) write_total - 1); } fprintf(stderr, "\n"); #endif @@ -899,8 +901,9 @@ static int flash_write_buf (int dev, int fd, void *buf, size_t count, } #ifdef DEBUG - fprintf(stderr, "Write 0x%x bytes at 0x%llx\n", erasesize, - blockstart); + fprintf(stderr, "Write 0x%llx bytes at 0x%llx\n", + (unsigned long long) erasesize, + (unsigned long long) blockstart); #endif if (write (fd, data + processed, erasesize) != erasesize) { fprintf (stderr, "Write error on %s: %s\n", -- 2.8.0

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[U-Boot] [PATCH] cmd, nand: add an option to disable the verification when writing in raw mode
by Boris Brezillon 25 Jul '16

25 Jul '16

Modern NANDs do not guarantee that data written in raw mode will not contain bitflips just after writing them. This is fine since the number of bitflips should be rather low and thus fixable by the ECC engine, but since we are reading data in raw mode to verify if they match the input data we cannot prevent failures if some bits are flipped. The option of using standard mode to verify the data is not acceptable either, since one of the usage of raw mode is to allow flashing images that do not respect the standard NAND page layout or the default ECC config (this is the case on Allwinner platforms, where the ROM code tests several hardcoded configs, which are not necessarily matching the NAND characteristics). Add an extension to the nand write.raw command allowing one to disable the verification step. Signed-off-by: Boris Brezillon <boris.brezillon(a)free-electrons.com> --- cmd/nand.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/cmd/nand.c b/cmd/nand.c index 583a18f..3a5e3a0 100644 --- a/cmd/nand.c +++ b/cmd/nand.c @@ -306,7 +306,7 @@ static void nand_print_and_set_info(int idx) } static int raw_access(struct mtd_info *mtd, ulong addr, loff_t off, - ulong count, int read) + ulong count, int read, int noverify) { int ret = 0; @@ -324,7 +324,7 @@ static int raw_access(struct mtd_info *mtd, ulong addr, loff_t off, ret = mtd_read_oob(mtd, off, &ops); } else { ret = mtd_write_oob(mtd, off, &ops); - if (!ret) + if (!ret && !no_verify) ret = nand_verify_page_oob(mtd, &ops, off); } @@ -546,6 +546,7 @@ static int do_nand(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) ulong pagecount = 1; int read; int raw = 0; + int no_verify = 0; if (argc < 4) goto usage; @@ -557,9 +558,12 @@ static int do_nand(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) s = strchr(cmd, '.'); - if (s && !strcmp(s, ".raw")) { + if (s && !strncmp(s, ".raw", 4)) { raw = 1; + if (!strcmp(s, ".raw.noverify")) + no_verify = 1; + if (mtd_arg_off(argv[3], &dev, &off, &size, &maxsize, MTD_DEV_TYPE_NAND, nand_info[dev]->size)) @@ -633,7 +637,8 @@ static int do_nand(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) else ret = mtd_write_oob(mtd, off, &ops); } else if (raw) { - ret = raw_access(mtd, addr, off, pagecount, read); + ret = raw_access(mtd, addr, off, pagecount, read, + no_verify); } else { printf("Unknown nand command suffix '%s'.\n", s); return 1; @@ -758,7 +763,7 @@ static char nand_help_text[] = " read/write 'size' bytes starting at offset 'off'\n" " to/from memory address 'addr', skipping bad blocks.\n" "nand read.raw - addr off|partition [count]\n" - "nand write.raw - addr off|partition [count]\n" + "nand write.raw[.noverify] - addr off|partition [count]\n" " Use read.raw/write.raw to avoid ECC and access the flash as-is.\n" #ifdef CONFIG_CMD_NAND_TRIMFFS "nand write.trimffs - addr off|partition size\n" -- 2.7.4

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[U-Boot] [PATCH v2] i2c_eeprom: Add reading support
by Mario Six 23 Jul '16

23 Jul '16

From: "mario.six(a)gdsys.cc" <mario.six(a)gdsys.cc> This patch implements the reading functionality for the generic I2C EEPROM driver, which was just a non-functional stub until now. Since the page size will be of importance for the writing support, we add suitable members to the private data structure to keep track of it. Compatibility strings for a range of at24c* chips are added. Signed-off-by: Mario Six <mario.six(a)gdsys.cc> --- Changes in v2: - Simplified and documented the i2c_eeprom struct - Simplified the read function - Corrected Kconfig dependency (from DM to MISC) --- drivers/misc/Kconfig | 5 +++++ drivers/misc/i2c_eeprom.c | 39 +++++++++++++++++++++++++++++++-------- include/i2c_eeprom.h | 4 ++++ 3 files changed, 40 insertions(+), 8 deletions(-) diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index 2373037..b84e351 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -144,4 +144,9 @@ config QFW Hidden option to enable QEMU fw_cfg interface. This will be selected by either CONFIG_CMD_QFW or CONFIG_GENERATE_ACPI_TABLE. +config I2C_EEPROM + bool "Enable driver for generic I2C-attached EEPROMs" + depends on MISC + help + Enable a generic driver for EEPROMs attached via I2C. endmenu diff --git a/drivers/misc/i2c_eeprom.c b/drivers/misc/i2c_eeprom.c index 814134a..c9f4174 100644 --- a/drivers/misc/i2c_eeprom.c +++ b/drivers/misc/i2c_eeprom.c @@ -13,7 +13,7 @@ static int i2c_eeprom_read(struct udevice *dev, int offset, uint8_t *buf, int size) { - return -ENODEV; + return dm_i2c_read(dev, offset, buf, size); } static int i2c_eeprom_write(struct udevice *dev, int offset, @@ -27,23 +27,46 @@ struct i2c_eeprom_ops i2c_eeprom_std_ops = { .write = i2c_eeprom_write, }; +static int i2c_eeprom_std_ofdata_to_platdata(struct udevice *dev) +{ + struct i2c_eeprom *priv = dev_get_priv(dev); + u64 data = dev_get_driver_data(dev); + + /* 6 bit -> page size of up to 2^63 (should be sufficient) */ + priv->pagewidth = data & 0x3F; + priv->pagesize = (1 << priv->pagewidth); + + return 0; +} + int i2c_eeprom_std_probe(struct udevice *dev) { return 0; } static const struct udevice_id i2c_eeprom_std_ids[] = { - { .compatible = "i2c-eeprom" }, + { .compatible = "i2c-eeprom", .data = 0 }, + { .compatible = "atmel,24c01a", .data = 3 }, + { .compatible = "atmel,24c02", .data = 3 }, + { .compatible = "atmel,24c04", .data = 4 }, + { .compatible = "atmel,24c08a", .data = 4 }, + { .compatible = "atmel,24c16a", .data = 4 }, + { .compatible = "atmel,24c32", .data = 5 }, + { .compatible = "atmel,24c64", .data = 5 }, + { .compatible = "atmel,24c128", .data = 6 }, + { .compatible = "atmel,24c256", .data = 6 }, + { .compatible = "atmel,24c512", .data = 6 }, { } }; U_BOOT_DRIVER(i2c_eeprom_std) = { - .name = "i2c_eeprom", - .id = UCLASS_I2C_EEPROM, - .of_match = i2c_eeprom_std_ids, - .probe = i2c_eeprom_std_probe, - .priv_auto_alloc_size = sizeof(struct i2c_eeprom), - .ops = &i2c_eeprom_std_ops, + .name = "i2c_eeprom", + .id = UCLASS_I2C_EEPROM, + .of_match = i2c_eeprom_std_ids, + .probe = i2c_eeprom_std_probe, + .ofdata_to_platdata = i2c_eeprom_std_ofdata_to_platdata, + .priv_auto_alloc_size = sizeof(struct i2c_eeprom), + .ops = &i2c_eeprom_std_ops, }; UCLASS_DRIVER(i2c_eeprom) = { diff --git a/include/i2c_eeprom.h b/include/i2c_eeprom.h index ea6c962..0452892 100644 --- a/include/i2c_eeprom.h +++ b/include/i2c_eeprom.h @@ -14,6 +14,10 @@ struct i2c_eeprom_ops { }; struct i2c_eeprom { + /* The EEPROM's page size in byte */ + unsigned long pagesize; + /* The EEPROM's page width in bits (pagesize = 2^pagewidth) */ + unsigned pagewidth; }; #endif -- 2.7.0.GIT

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[U-Boot] testing: [PATCH v7 0/3] common: usb_storage: Implement logic to calculate optimal usb maximum trasfer blocks
by Matthew Bright 22 Jul '16

22 Jul '16

On 06/16/2016 12:35 PM, Rajesh Bhagat wrote: > Performs code cleanup by making common function for usb_stor_read/write > and implements the logic to calculate the optimal usb maximum trasfer blocks > instead of sending USB_MAX_XFER_BLK blocks which is 65535 and 20 in case > of EHCI and other USB protocols respectively. > > Rajesh Bhagat (3): > common: usb_storage: Make common function for usb_read_10/usb_write_10 > common: usb_storage: Make common function for > usb_stor_read/usb_stor_write > common: usb_storage : Implement logic to calculate optimal usb maximum > trasfer blocks > > common/usb_storage.c | 213 +++++++++++++++++++++++---------------------------- > include/usb.h | 1 + > 2 files changed, 98 insertions(+), 116 deletions(-) > Hi Rajesh & Marek I have spend the last couple of days testing these patches on the v2016.05 release, with an usb mass storage device that is able to consistently reproduce the USB_MAX_XFER_BLK issue as described in the "Issue with USB mass storage (thumb drives)" u-boot thread. http://lists.denx.de/pipermail/u-boot/2016-February/244464.html I can confirm the patch correctly increases the max transfer bocks after a successful read, and decreases the max transfer bocks after a read failure. However, I have noticed that once the ehci time out error occurs, the usb device appears to lock up. When in this state the usb device will stop responding to any further transfers. This behavior is independent of the number of blocks, and will continue until the ehci has been reset. The following debug output demonstrates this behavior: (note: the retry attempts has been set to 4) ---------------------------------------------------------------------- => fatload usb 0:auto 0x1000000 test.rel ------ (where test.rel is dd if=/dev/urandom of=test.rel bs=32M count=2) ------ usb_stor_read_write: udev 0 usb_stor_read_write: dev 0 startblk 0, blccnt 1 buffer 7fb0d980 usb_stor_read_write: retry #4, cur_xfer_blks 4095, smallblks 1 usb_read_write_10: start 0 blocks 1 usb_stor_read_write: end startblk 1, blccnt 1 buffer 7fb0db80 ------ (40 further transfers occur with blccnt bewteen 1 and 8 blocks) ------ usb_stor_read_write: udev 0 usb_stor_read_write: dev 0 startblk 169a0, blccnt 20000 buffer 1000000 usb_stor_read_write: retry #4, cur_xfer_blks 4095, smallblks 4095 usb_read_write_10: start 169a0 blocks 4095 usb_stor_read_write: retry #4, cur_xfer_blks 8191, smallblks 8191 usb_read_write_10: start 1799f blocks 8191 usb_stor_read_write: retry #4, cur_xfer_blks 16383, smallblks 16383 usb_read_write_10: start 1999e blocks 16383 usb_stor_read_write: retry #4, cur_xfer_blks 32767, smallblks 32767 usb_read_write_10: start 1d99d blocks 32767 usb_stor_read_write: retry #4, cur_xfer_blks 65535, smallblks 65535 usb_read_write_10: start 2599c blocks 65535 EHCI timed out on TD - token=0x26008d80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x80008d80 usb_stor_read_write: retry #3, cur_xfer_blks 32767, smallblks 32767 usb_read_write_10: start 2599c blocks 32767 EHCI timed out on TD - token=0x801f8c80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x801f8c80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x80008d80 usb_stor_read_write: retry #2, cur_xfer_blks 16383, smallblks 16383 usb_read_write_10: start 2599c blocks 16383 EHCI timed out on TD - token=0x801f8c80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x801f8c80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x80008d80 usb_stor_read_write: retry #1, cur_xfer_blks 8191, smallblks 8191 usb_read_write_10: start 2599c blocks 8191 EHCI timed out on TD - token=0x801f8c80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x801f8c80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x80008d80 usb_stor_read_write: retry #0, cur_xfer_blks 4095, smallblks 4095 usb_read_write_10: start 2599c blocks 4095 EHCI timed out on TD - token=0x801f8c80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x801f8c80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x80008d80 usb_stor_read_write: end startblk 2599c, blccnt fff buffer 2dff800 Error reading cluster ** Unable to read file test.rel ** => fatload usb 0:auto 0x1000000 test.rel usb_stor_read_write: udev 0 usb_stor_read_write: dev 0 startblk 0, blccnt 1 buffer 7fb0d980 usb_stor_read_write: retry #4, cur_xfer_blks 4095, smallblks 1 usb_read_write_10: start 0 blocks 1 EHCI timed out on TD - token=0x801f8c80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x801f8c80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x80008d80 usb_stor_read_write: retry #3, cur_xfer_blks 4095, smallblks 1 usb_read_write_10: start 0 blocks 1 EHCI timed out on TD - token=0x801f8c80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x801f8c80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x80008d80 usb_stor_read_write: retry #2, cur_xfer_blks 4095, smallblks 1 usb_read_write_10: start 0 blocks 1 EHCI timed out on TD - token=0x801f8c80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x801f8c80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x80008d80 usb_stor_read_write: retry #1, cur_xfer_blks 4095, smallblks 1 usb_read_write_10: start 0 blocks 1 EHCI timed out on TD - token=0x801f8c80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x801f8c80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x80008d80 usb_stor_read_write: retry #0, cur_xfer_blks 4095, smallblks 1 usb_read_write_10: start 0 blocks 1 EHCI timed out on TD - token=0x801f8c80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x801f8c80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x80008d80 usb_stor_read_write: end startblk 0, blccnt 1 buffer 7fb0d980 ** Can't read partition table on 0:0 ** ------ (usb_read_write_10 is repeated 15 more times producing the same errors) ------ ** No valid partitions found ** => usb reset resetting USB... USB0: USB EHCI 1.00 scanning bus 0 for devices... 2 USB Device(s) found scanning usb for storage devices... usb_stor_read_write: udev 0 usb_stor_read_write: dev 0 startblk 0, blccnt 1 buffer 7fb0d980 usb_stor_read_write: retry #4, cur_xfer_blks 4095, smallblks 1 usb_read_write_10: start 0 blocks 1 usb_stor_read_write: end startblk 1, blccnt 1 buffer 7fb0db80 1 Storage Device(s) found => fatload usb 0:auto 0x1000000 test.rel usb_stor_read_write: udev 0 usb_stor_read_write: dev 0 startblk 0, blccnt 1 buffer 7fb0d980 usb_stor_read_write: retry #4, cur_xfer_blks 4095, smallblks 1 usb_read_write_10: start 0 blocks 1 usb_stor_read_write: end startblk 1, blccnt 1 buffer 7fb0db80 ------ (transfers continues on happily until 65535 blocks is hit again) ------ ---------------------------------------------------------------------- This debug output shows the ehci timeout error occur for a transfer with 65535 blocks (as expected) however the timeout error continues for each proceeding transfer. This occurs even though the number of blocks are reduced back to what should be an acceptable number. I am currently unsure if this "lock up" behavior is simply a quirk of the specific usb device that I am using. However, if such behavior is common, then it could render this fix moot. This is assuming that the ehci cannot be reset part way through a transfer (i.e. after the echi time out error occurs). I have been able to consistently reproduce this "lock up" behavior on a single 4-GB Apacer usb flash device (details below). However I have been unable to reproduce this behavior on several 8GB counterparts as they appear to work fine with the maximum possible block size. ---------------------------------------------------------------------- => usb info 1: Hub, USB Revision 2.0 - u-boot EHCI Host Controller - Class: Hub - PacketSize: 64 Configurations: 1 - Vendor: 0x0000 Product 0x0000 Version 1.0 Configuration: 1 - Interfaces: 1 Self Powered 0mA Interface: 0 - Alternate Setting 0, Endpoints: 1 - Class Hub - Endpoint 1 In Interrupt MaxPacket 2048 Interval 255ms 2: Mass Storage, USB Revision 2.0 - USB FLASH DRIVE AP9BDE1B0918CBDB - Class: (from Interface) Mass Storage - PacketSize: 64 Configurations: 1 - Vendor: 0x1005 Product 0xb113 Version 1.0 Configuration: 1 - Interfaces: 1 Bus Powered 500mA Interface: 0 - Alternate Setting 0, Endpoints: 2 - Class Mass Storage, Transp. SCSI, Bulk only - Endpoint 2 In Bulk MaxPacket 512 - Endpoint 1 Out Bulk MaxPacket 512 ---------------------------------------------------------------------- I think this patch is a good solution to the original problem. Please let me know if there is anything I can do to help. Cheers. - Matt Bright

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[U-Boot] [PATCH] arch-mx6: fix MX6_PAD_DECLARE macro to work with MX6 duallite
by Hannes Schmelzer 21 Jul '16

21 Jul '16

if we build for an i.mx6 (d)ual(l)ite CONFIC_MX6DL we shall use MX6DL_PAD instead the common MX6_PAD. Signed-off-by: Hannes Schmelzer <oe5hpm(a)oevsv.at> --- arch/arm/include/asm/arch-mx6/mx6-pins.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/include/asm/arch-mx6/mx6-pins.h b/arch/arm/include/asm/arch-mx6/mx6-pins.h index 4b6bb18..3465205 100644 --- a/arch/arm/include/asm/arch-mx6/mx6-pins.h +++ b/arch/arm/include/asm/arch-mx6/mx6-pins.h @@ -18,7 +18,7 @@ enum { #include "mx6q_pins.h" #undef MX6_PAD_DECL #define MX6_PAD_DECL(name, pco, mc, mm, sio, si, pc) \ - MX6_PAD_DECLARE(MX6DL_PAD_,name, pco, mc, mm, sio, si, pc), + MX6_PAD_DECLARE(MX6DL_PAD_, name, pco, mc, mm, sio, si, pc), #include "mx6dl_pins.h" }; #elif defined(CONFIG_MX6Q) @@ -30,7 +30,7 @@ enum { #elif defined(CONFIG_MX6DL) || defined(CONFIG_MX6S) enum { #define MX6_PAD_DECL(name, pco, mc, mm, sio, si, pc) \ - MX6_PAD_DECLARE(MX6_PAD_,name, pco, mc, mm, sio, si, pc), + MX6_PAD_DECLARE(MX6DL_PAD_, name, pco, mc, mm, sio, si, pc), #include "mx6dl_pins.h" }; #elif defined(CONFIG_MX6SL) -- 1.9.1

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