June 2016 - U-Boot

[U-Boot] [PATCH 1/1] cmd: bootefi: cosmetic
by Sergey Kubushyn 25 Jun '16

25 Jun '16

Short help (description) in bootefi command has a trailing "\n" that breaks the "help" command output (empty line after "bootefi"). Nothing important, doesn't affect anything but better be fixed in the upcoming release. Still working on i.MX6 and their siblings NAND U-Boot update -- it works here but not ready for a submission yet. Anyway it is for the next cycle, not going to go into this release because it is too big and may affect something else. Also have some thoughts about fastboot (using multiple devices) but this will go into separate email with RFC. Signed-off-by: Sergey Kubushyn <ksi(a)koi8.net> --- diff --git a/cmd/bootefi.c b/cmd/bootefi.c index 2169065..011f62c 100644 --- a/cmd/bootefi.c +++ b/cmd/bootefi.c @@ -255,7 +255,7 @@ static char bootefi_help_text[] = U_BOOT_CMD( bootefi, 3, 0, do_bootefi, - "Boots an EFI payload from memory\n", + "Boots an EFI payload from memory", bootefi_help_text ); --- ****************************************************************** * KSI@home KOI8 Net < > The impossible we do immediately. * * Las Vegas NV, USA < > Miracles require 24-hour notice. * ******************************************************************

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[U-Boot] [PATCH 1/1] omap3: bugfix in timer on rollover
by Daniel Gorsulowski 25 Jun '16

25 Jun '16

Signed-off-by: Daniel Gorsulowski <daniel.gorsulowski(a)esd.eu> --- arch/arm/cpu/armv7/omap-common/timer.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/cpu/armv7/omap-common/timer.c b/arch/arm/cpu/armv7/omap-common/timer.c index 032bd2c..49e3a97 100644 --- a/arch/arm/cpu/armv7/omap-common/timer.c +++ b/arch/arm/cpu/armv7/omap-common/timer.c @@ -77,7 +77,7 @@ ulong get_timer_masked(void) /* move stamp fordward with absoulte diff ticks */ gd->arch.tbl += (now - gd->arch.lastinc); } else { /* we have rollover of incrementer */ - gd->arch.tbl += ((TIMER_LOAD_VAL / (TIMER_CLOCK / + gd->arch.tbl += ((TIMER_OVERFLOW_VAL / (TIMER_CLOCK / CONFIG_SYS_HZ)) - gd->arch.lastinc) + now; } gd->arch.lastinc = now; -- 2.7.1

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[U-Boot] [Patch v4 0/5] Supporting ARM v8 USB errata for FSL
by Sriram Dash 25 Jun '16

25 Jun '16

The patch-set does the following : 1. Adds support for ARM for USB Erratum Checking code for implementing the USB Erratum for fsl. 2. Performs code cleanup to reduce redundancy when adding fsl device tree fixup. 3. Implements Erratum A008751 for LS2 platform. Sriram Dash (5): arm64: fsl-layerscape: add get_svr and IS_SVR_REV helper usb: xhci: fsl: code cleanup for device tree fixup for fsl usb controllers fsl: usb: make errata function common for PPC and ARM armv8/ls2080: Remove workaround for erratum A008751 usb: xhci: fsl: Add workaround for USB erratum A-008751 arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 7 + arch/arm/cpu/armv8/fsl-layerscape/soc.c | 10 -- .../include/asm/arch-fsl-layerscape/immap_lsch2.h | 2 + .../include/asm/arch-fsl-layerscape/immap_lsch3.h | 4 + arch/arm/include/asm/arch-fsl-layerscape/soc.h | 2 + board/freescale/ls2080aqds/ls2080aqds.c | 2 + board/freescale/ls2080ardb/ls2080ardb.c | 2 + drivers/usb/common/Makefile | 4 +- drivers/usb/common/fsl-dt-fixup.c | 100 +++++++---- .../fsl_usb.h => drivers/usb/common/fsl-errata.c | 152 ++++------------ drivers/usb/host/xhci-fsl.c | 24 +++ include/fsl_usb.h | 192 +-------------------- 12 files changed, 153 insertions(+), 348 deletions(-) copy include/fsl_usb.h => drivers/usb/common/fsl-errata.c (50%) -- 2.1.0

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[U-Boot] [PATCH] README: Device Tree: Add & explain undocumented options.
by Ahmed Samir Khalil 24 Jun '16

24 Jun '16

There are no info about these options in the README. Documenting these options makes getting startup, configuration & testing easier. Signed-off-by: Ahmed Samir Khalil <engkhalil86(a)gmail.com> --- README | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/README b/README index 1d0b946..1c9f778 100644 --- a/README +++ b/README @@ -1154,6 +1154,14 @@ The following options need to be configured: still use the individual files if you need something more exotic. + CONFIG_OF_HOSTFILE + If this variable is defined, U-Boot will read the device tree + from a file on startup. This is only useful for sandbox. You + may use either CONFIG_OF_HOSTFILE or CONFIG_OF_CONTROL. + + CONFIG_OF_SPI_FLASH + Define to enable setting up a new SPI flash (slave) from an fdt node. + - Watchdog: CONFIG_WATCHDOG If this variable is defined, it enables watchdog -- 2.7.4

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[U-Boot] error: sdhci_send_command: Timeout for status update!
by Steve Rae 24 Jun '16

24 Jun '16

Stefan, I am asking you about this code, because of this: commit 29905a4 - mmc: sdhci: Use timer based timeout detection in sdhci_send_command() Occasionally, I am seeing failures when writing to flash on my device: Flashing sparse image at offset 2078720 Flashing Sparse Image sdhci_send_command: Timeout for status update! mmc fail to send stop cmd write_sparse_image: Write failed, block #2181088 [0] I can eliminate this error if I kludge the following code: diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c index 5c71ab8..854f7ce 100644 --- a/drivers/mmc/sdhci.c +++ b/drivers/mmc/sdhci.c @@ -243,9 +243,9 @@ static int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd, if (stat & SDHCI_INT_ERROR) break; } while (((stat & mask) != mask) && - (get_timer(start) < CONFIG_SDHCI_CMD_DEFAULT_TIMEOUT)); + (get_timer(start) < 600 /*CONFIG_SDHCI_CMD_DEFAULT_TIMEOUT*/)); - if (get_timer(start) >= CONFIG_SDHCI_CMD_DEFAULT_TIMEOUT) { + if (get_timer(start) >= 600 /*CONFIG_SDHCI_CMD_DEFAULT_TIMEOUT*/) { if (host->quirks & SDHCI_QUIRK_BROKEN_R1B) return 0; else { I don't know much about this - I arrived at 600 by trial and error (500 fails...) Any ideas? Thanks, Steve steve.rae(a)raedomain.com (previously: srae(a)broadcom.com)

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[U-Boot] Message handling problem in dwc2_otg driver
by Gyorgy Kovesdi 24 Jun '16

24 Jun '16

Hi, I am using u-boot revision d141e218f3195e305c1521a0d67c81b7cb504b71 (dec 28 2015). The platform is socfpga cyclone-V. I connected some different USB devices to my USB port, and some of them have problems. Especially, if i connect another linux box with CDC mass storage or ethernet emulation, the device is not detected. I found that the problem is the NAK message handling: if i connect a pendrive then no NAK messages returned, but using CDC mass storage device, there are a lot of them. The problem is that the NAK messages are not handled at all: if such one received, the driver enters an endless loop (in file dwc2_otg-hcd.c: see the /* TODO: no endless loop */ comment). AFAIK, the NAK handling is basically necessary for USB communication: i do not understand how can it work without NAK handling at all. Am i the only one having NAK messages in this case? I need some help to resolve the NAK handling here. Thanx in advance Gyorgy Kovesdi

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[U-Boot] [PATCH] pci: tegra: actually program REFCLK_CFG* on recent SoCs
by Stephen Warren 24 Jun '16

24 Jun '16

From: Stephen Warren <swarren(a)nvidia.com> On recent SoCs, tegra_pcie_phy_enable() isn't called; but instead tegra_pcie_enable_controller() calls tegra_xusb_phy_enable(). However, part of tegra_pcie_phy_enable() needs to happen in all cases. Move that code to tegra_pcie_port_enable() instead. For reference, NVIDIA's downstream Linux kernel performs this operation in tegra_pcie_enable_rp_features(), which is called immediately after tegra_pcie_port_enable(). Since that function doesn't exist in the U-Boot driver, we'll just add it to the tail of tegra_pcie_port_enable() instead. Signed-off-by: Stephen Warren <swarren(a)nvidia.com> --- drivers/pci/pci_tegra.c | 19 ++++++++++--------- 1 file changed, 10 insertions(+), 9 deletions(-) diff --git a/drivers/pci/pci_tegra.c b/drivers/pci/pci_tegra.c index 1aa56fc93739..352cdef56ab4 100644 --- a/drivers/pci/pci_tegra.c +++ b/drivers/pci/pci_tegra.c @@ -620,11 +620,6 @@ static int tegra_pcie_phy_enable(struct tegra_pcie *pcie) value |= PADS_PLL_CTL_RST_B4SM; pads_writel(pcie, value, soc->pads_pll_ctl); - /* configure the reference clock driver */ - pads_writel(pcie, soc->pads_refclk_cfg0, PADS_REFCLK_CFG0); - if (soc->num_ports > 2) - pads_writel(pcie, soc->pads_refclk_cfg1, PADS_REFCLK_CFG1); - /* wait for the PLL to lock */ err = tegra_pcie_pll_wait(pcie, 500); if (err < 0) { @@ -818,20 +813,21 @@ static void tegra_pcie_port_reset(struct tegra_pcie_port *port) static void tegra_pcie_port_enable(struct tegra_pcie_port *port) { - const struct tegra_pcie_soc *soc = port->pcie->soc; + struct tegra_pcie *pcie = port->pcie; + const struct tegra_pcie_soc *soc = pcie->soc; unsigned long ctrl = tegra_pcie_port_get_pex_ctrl(port); unsigned long value; /* enable reference clock */ - value = afi_readl(port->pcie, ctrl); + value = afi_readl(pcie, ctrl); value |= AFI_PEX_CTRL_REFCLK_EN; - if (port->pcie->soc->has_pex_clkreq_en) + if (pcie->soc->has_pex_clkreq_en) value |= AFI_PEX_CTRL_CLKREQ_EN; value |= AFI_PEX_CTRL_OVERRIDE_EN; - afi_writel(port->pcie, value, ctrl); + afi_writel(pcie, value, ctrl); tegra_pcie_port_reset(port); @@ -840,6 +836,11 @@ static void tegra_pcie_port_enable(struct tegra_pcie_port *port) value |= RP_VEND_CTL2_PCA_ENABLE; rp_writel(port, value, RP_VEND_CTL2); } + + /* configure the reference clock driver */ + pads_writel(pcie, soc->pads_refclk_cfg0, PADS_REFCLK_CFG0); + if (soc->num_ports > 2) + pads_writel(pcie, soc->pads_refclk_cfg1, PADS_REFCLK_CFG1); } static bool tegra_pcie_port_check_link(struct tegra_pcie_port *port) -- 2.9.0

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[U-Boot] [RFC PATCH v1 0/6] SPL: DFU Support in SPL
by Ravi Babu 24 Jun '16

24 Jun '16

Traditionally the DFU support is available only as part 2nd stage boot loader(u-boot) and DFU is not supported in SPL. The SPL-DFU feature is useful for boards which has only USB inteface and do not have external interface like ethernet or MMC/SD to boot the board. This feature enable DFU to be builtin part of SPL and boot the u-boot directly by loading u-boot image to RAM from PC using dfu-util. This patch series adds DFU support in SPL to flash binary images to factory or bare-metal boards to memory devices like SPI, RAM, eMMC, MMC/SD card using USB interface. As a reference, refer to application note [3] on SPL-DFU support based on 2014.07 u-boot. steps for SPL-DFU/RAM: 1) Soc ROMcode loads the u-boot-spl.bin(+DFU) to IRAM from PC host via usb interface and execute DFU(RAM/SPI). 2) if DFU/RAM is selected, then load u-boot.img to RAM using dfu-util from PC-host. 3) After loading u-boot, press ctrl+c to exit to jump to u-boot. Once u-boot steps for SPL-DFU/SPI: 1) Soc ROMcode loads the u-boot-spl.bin(+DFU) to IRAM from PC host via usb interface and execute DFU(RAM/SPI). 2) If DFU/SPI is selected, then load MLO/u-boot/kernel/dtb images directly to spi partitions. Note: I could not find better option to isolate dfu source to include/exclude in Makefile when SPL-DFU feature enabled/disabled, please suggest any better option. Tested on dra7xx SoCs family. [1] is EVM console output with SPL-DFU/SPI enabled. [2] is ubuntu host console output. references: [1] http://pastebin.ubuntu.com/16730701/ [2] http://pastebin.ubuntu.com/16730765/ [3] http://www.ti.com/lit/an/sprac33/sprac33.pdf Ravi Babu (6): spl: dfu: add dfu support in SPL spl: dfu: adding dfu support functions for SPL-DFU dfu: spl: add generic spl-dfu function in common-spl dra7x: spl: dfu: adding SPL-DFU support for dra7x platform dfu: spl: dra7x: enable SPL-dfu support for dra7x platform dfu: spl: am335x: SPL-DFU support for am335x Kconfig | 33 ++++++++ board/ti/am335x/board.c | 15 ++++ board/ti/dra7xx/evm.c | 17 ++++ common/Makefile | 26 +++++-- common/command.c | 2 +- common/spl/Makefile | 1 + common/spl/spl.c | 9 +++ common/spl/spl_dfu.c | 154 +++++++++++++++++++++++++++++++++++++ include/configs/am335x_evm.h | 17 +++- include/configs/dra7xx_evm.h | 8 +- include/configs/ti_omap5_common.h | 2 - include/spl.h | 11 +++ scripts/Makefile.spl | 13 ++++ 13 files changed, 293 insertions(+), 15 deletions(-) create mode 100644 common/spl/spl_dfu.c -- 1.7.9.5

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[U-Boot] u-boot
by Venky Venkatesh 24 Jun '16

24 Jun '16

Hi, How can i load the kernel by using first stage boot loader (MLO) directly, without giving the control to the second stage boot loader (i.e u-boot.bin). Here at the end of the first stage boot loader i want to load the kernel, so that i can boot the kernel by using x-loader directly. Give me suggestions Thanks, Venkatesh

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[U-Boot] [PATCH][v2] armv8: fsl-layerscape: Append "a" in SoC name for ARM
by Prabhakar Kushwaha 24 Jun '16

24 Jun '16

From: Pratiyush Mohan Srivastava <pratiyush.srivastava(a)nxp.com> Freescale ARMv8 SoC name ends with "a" to represent ARM SoCs. like LS2080A, LS1043A, LS1012A. So append "a" at the last of SoCs. Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava(a)nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha(a)nxp.com> --- Changes for v2: updated the description arch/arm/include/asm/arch-fsl-layerscape/cpu.h | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/arch/arm/include/asm/arch-fsl-layerscape/cpu.h b/arch/arm/include/asm/arch-fsl-layerscape/cpu.h index df877dd..09a9f19 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/cpu.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/cpu.h @@ -8,13 +8,13 @@ #define _FSL_LAYERSCAPE_CPU_H static struct cpu_type cpu_type_list[] = { - CPU_TYPE_ENTRY(LS2080, LS2080, 8), - CPU_TYPE_ENTRY(LS2085, LS2085, 8), - CPU_TYPE_ENTRY(LS2045, LS2045, 4), - CPU_TYPE_ENTRY(LS1043, LS1043, 4), - CPU_TYPE_ENTRY(LS1023, LS1023, 2), - CPU_TYPE_ENTRY(LS2040, LS2040, 4), - CPU_TYPE_ENTRY(LS1012, LS1012, 1), + CPU_TYPE_ENTRY(LS2080A, LS2080, 8), + CPU_TYPE_ENTRY(LS2085A, LS2085, 8), + CPU_TYPE_ENTRY(LS2045A, LS2045, 4), + CPU_TYPE_ENTRY(LS1043A, LS1043, 4), + CPU_TYPE_ENTRY(LS1023A, LS1023, 2), + CPU_TYPE_ENTRY(LS2040A, LS2040, 4), + CPU_TYPE_ENTRY(LS1012A, LS1012, 1), }; #ifndef CONFIG_SYS_DCACHE_OFF -- 1.9.1

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