March 2016 - U-Boot

[U-Boot] [PATCH v2] spl_mmc: allow to load raw image
by Masahiro Yamada 29 Apr '16

29 Apr '16

The function spl_parse_image_header() falls back to a raw image if the U-Boot header is missing and CONFIG_SPL_PANIC_ON_RAW_IMAGE is undefined. While, mmc_load_image_raw_sector() only accepts a U-Boot legacy image or an FIT image, preventing us from loading a raw image. Signed-off-by: Masahiro Yamada <yamada.masahiro(a)socionext.com> --- Changes in v2: - rebase on commit 41bccb814285 and rephrase git-log according to it common/spl/spl_mmc.c | 18 ++++-------------- 1 file changed, 4 insertions(+), 14 deletions(-) diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c index c0e76be..7d3bfc6 100644 --- a/common/spl/spl_mmc.c +++ b/common/spl/spl_mmc.c @@ -41,7 +41,6 @@ static int mmc_load_legacy(struct mmc *mmc, ulong sector, return 0; } -#ifdef CONFIG_SPL_LOAD_FIT static ulong h_spl_load_read(struct spl_load_info *load, ulong sector, ulong count, void *buf) { @@ -49,7 +48,6 @@ static ulong h_spl_load_read(struct spl_load_info *load, ulong sector, return mmc->block_dev.block_read(&mmc->block_dev, sector, count, buf); } -#endif static int mmc_load_image_raw_sector(struct mmc *mmc, unsigned long sector) { @@ -68,12 +66,8 @@ static int mmc_load_image_raw_sector(struct mmc *mmc, unsigned long sector) goto end; } - switch (image_get_magic(header)) { - case IH_MAGIC: - ret = mmc_load_legacy(mmc, sector, header); - break; -#ifdef CONFIG_SPL_LOAD_FIT - case FDT_MAGIC: { + if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) && + image_get_magic(header) == FDT_MAGIC) { struct spl_load_info load; debug("Found FIT\n"); @@ -82,12 +76,8 @@ static int mmc_load_image_raw_sector(struct mmc *mmc, unsigned long sector) load.bl_len = mmc->read_bl_len; load.read = h_spl_load_read; ret = spl_load_simple_fit(&load, sector, header); - break; - } -#endif - default: - puts("bad magic\n"); - return -1; + } else { + ret = mmc_load_legacy(mmc, sector, header); } end: -- 1.9.1

3 3

[U-Boot] [PATCH v5 0/4] usb: Reduce USB scanning time
by Stefan Roese 28 Apr '16

28 Apr '16

My current x86 platform (Bay Trail, not in mainline yet) has a quite complex USB infrastructure with many USB hubs. Here the USB scan takes an incredible huge amount of time: starting USB... USB0: USB EHCI 1.00 scanning bus 0 for devices... 9 USB Device(s) found time: 28.415 seconds This is of course not acceptable on platforms, where USB needs to get scanned at every bootup. As this increases the bootup time of this device by nearly 30 seconds! This patch series greatly reduces the USB scanning time. This is done by multiple means: - Remove or reduce delays and timeouts - Remove a 2nd reset of the USB hubs - Change USB port timeout handling and introduce quasi parallel USB port scanning As a result, the USB scanning time is greatly reduced: starting USB... USB0: USB EHCI 1.00 scanning bus 0 for devices... 9 USB Device(s) found time: 1.822 seconds As you can see, the time is reduced from 28.4 to 1.8 seconds! Please find more details to the changes in the patch description. Testing and comments welcome! Thanks, Stefan Changes in v5: - Removed superfluous debug output from usb_scan_port() - Replaced usb_hub_power_on() with usb_set_port_feature() in case of overcurrent detection. This is whats really needed here. - Added a per-port overcurrent counter and stop re-scanning of a device that exceeds the PORT_OVERCURRENT_MAX_SCAN_COUNT - Moved list_del() to end of loop in usb_scan_port() - Moved timeout / delay variables from USB dev to hub struct as they are hub specific - Moved state_get_skip_delays() to usb_hub_power_on() so that the timeouts are not set there Changes in v4: - Minor rewording / fixes of the commit text - Add Acked-by / Tested-by from Hans and Stephen - Minor rewording / fixes of the commit text - Add Acked-by from Hans - Moved check for query_delay into usb_scan_port() as suggested by Hans - Correct list handling (drop INIT_LIST_HEAD) - Added some missing free() calls - Changed connect_timeout calculation as suggested by Stephen - Moved usb_scan_list to other globals to be cleaned up in a later patch - Added timeout check for non-functional ports (usb_get_port_status return error - Reverted if logic in loop to remove an indentation level - Moved debug() output - Removed unnecessary if when already connected - Added Hans's Acked-by - Added Stephen's Tested-by - Minor rewording / fixes of the commit text Changes in v3: - Changed small timeout from 10ms to 20ms as this results in a much faster USB scanning time (10ms too small and 20ms enough in many cases) - Introduced scanning list containing all USB devices of one USB controller that need to get scanned - Don't delay in usb_hub_power_on(). Instead skip querying these devices until the delay time is reached. Changes in v2: - Add Acked-by / Tested-by from Hans and Stephen - Make this change unconditional - Add Acked-by / Tested-by from Hans and Stephen - Make this change unconditional - Add Tested-by from Stephen - Remove static USB port configuration patch (for now) Stefan Roese (4): usb: legacy_hub_port_reset(): Speedup hub reset handling usb: Remove 200 ms delay in usb_hub_port_connect_change() usb: Don't reset the USB hub a 2nd time usb: Change power-on / scanning timeout handling common/usb.c | 13 +-- common/usb_hub.c | 329 ++++++++++++++++++++++++++++++++++++++----------------- include/usb.h | 4 + 3 files changed, 235 insertions(+), 111 deletions(-) -- 2.7.3

6 17

[U-Boot] [PATCH 1/5] arm: include: Import unified.h from Linux kernel
by Marek Vasut 28 Apr '16

28 Apr '16

Import unified.h from Linux kernel 4.4.6 , commit 0d1912303e54ed1b2a371be0bba51c384dd57326 . This header file contains macros used in libgcc functions in Linux kernel on ARM and will be needed for the libgcc sync. Since unified.h defines the W(instr) macro, we must drop this from the macro from memcpy.S , otherwise this triggers a warning about symbol redefinition. In order to keep the changes to unified.h to the minimum, tweak arch/arm/lib/Makefile such that it defines new CONFIG_THUMB2_KERNEL macro, which is already checked by unified.h, only if Thumb build is enabled, but the target does not support Thumb2 . This way we can remove ad-hoc -DMEMSET_NO_THUMB_BUILD and -DMEMCPY_NO_THUMB_BUILD and we do not change the logic. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Albert Aribaud <albert.u.boot(a)aribaud.net> Cc: Masahiro Yamada <yamada.masahiro(a)socionext.com> Cc: Simon Glass <sjg(a)chromium.org> Cc: Tom Rini <trini(a)konsulko.com> --- arch/arm/include/asm/assembler.h | 1 + arch/arm/include/asm/unified.h | 140 +++++++++++++++++++++++++++++++++++++++ arch/arm/lib/Makefile | 6 +- arch/arm/lib/memcpy.S | 6 -- 4 files changed, 144 insertions(+), 9 deletions(-) create mode 100644 arch/arm/include/asm/unified.h diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h index 11b80fb..ae1e42f 100644 --- a/arch/arm/include/asm/assembler.h +++ b/arch/arm/include/asm/assembler.h @@ -15,6 +15,7 @@ */ #include <config.h> +#include <asm/unified.h> /* * Endian independent macros for shifting bytes within registers. diff --git a/arch/arm/include/asm/unified.h b/arch/arm/include/asm/unified.h new file mode 100644 index 0000000..a91ae49 --- /dev/null +++ b/arch/arm/include/asm/unified.h @@ -0,0 +1,140 @@ +/* + * include/asm-arm/unified.h - Unified Assembler Syntax helper macros + * + * Copyright (C) 2008 ARM Limited + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#ifndef __ASM_UNIFIED_H +#define __ASM_UNIFIED_H + +#if defined(__ASSEMBLY__) && defined(CONFIG_ARM_ASM_UNIFIED) + .syntax unified +#endif + +#ifdef CONFIG_CPU_V7M +#define AR_CLASS(x...) +#define M_CLASS(x...) x +#else +#define AR_CLASS(x...) x +#define M_CLASS(x...) +#endif + +#ifdef CONFIG_THUMB2_KERNEL + +#if __GNUC__ < 4 +#error Thumb-2 kernel requires gcc >= 4 +#endif + +/* The CPSR bit describing the instruction set (Thumb) */ +#define PSR_ISETSTATE PSR_T_BIT + +#define ARM(x...) +#define THUMB(x...) x +#ifdef __ASSEMBLY__ +#define W(instr) instr.w +#else +#define WASM(instr) #instr ".w" +#endif + +#else /* !CONFIG_THUMB2_KERNEL */ + +/* The CPSR bit describing the instruction set (ARM) */ +#define PSR_ISETSTATE 0 + +#define ARM(x...) x +#define THUMB(x...) +#ifdef __ASSEMBLY__ +#define W(instr) instr +#else +#define WASM(instr) #instr +#endif + +#endif /* CONFIG_THUMB2_KERNEL */ + +#ifndef CONFIG_ARM_ASM_UNIFIED + +/* + * If the unified assembly syntax isn't used (in ARM mode), these + * macros expand to an empty string + */ +#ifdef __ASSEMBLY__ + .macro it, cond + .endm + .macro itt, cond + .endm + .macro ite, cond + .endm + .macro ittt, cond + .endm + .macro itte, cond + .endm + .macro itet, cond + .endm + .macro itee, cond + .endm + .macro itttt, cond + .endm + .macro ittte, cond + .endm + .macro ittet, cond + .endm + .macro ittee, cond + .endm + .macro itett, cond + .endm + .macro itete, cond + .endm + .macro iteet, cond + .endm + .macro iteee, cond + .endm +#else /* !__ASSEMBLY__ */ +__asm__( +" .macro it, cond\n" +" .endm\n" +" .macro itt, cond\n" +" .endm\n" +" .macro ite, cond\n" +" .endm\n" +" .macro ittt, cond\n" +" .endm\n" +" .macro itte, cond\n" +" .endm\n" +" .macro itet, cond\n" +" .endm\n" +" .macro itee, cond\n" +" .endm\n" +" .macro itttt, cond\n" +" .endm\n" +" .macro ittte, cond\n" +" .endm\n" +" .macro ittet, cond\n" +" .endm\n" +" .macro ittee, cond\n" +" .endm\n" +" .macro itett, cond\n" +" .endm\n" +" .macro itete, cond\n" +" .endm\n" +" .macro iteet, cond\n" +" .endm\n" +" .macro iteee, cond\n" +" .endm\n"); +#endif /* __ASSEMBLY__ */ + +#endif /* CONFIG_ARM_ASM_UNIFIED */ + +#endif /* !__ASM_UNIFIED_H */ diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile index 7a0fb58..a930744 100644 --- a/arch/arm/lib/Makefile +++ b/arch/arm/lib/Makefile @@ -80,8 +80,8 @@ CFLAGS_cache-cp15.o := -marm AFLAGS_REMOVE_memset.o := -mthumb -mthumb-interwork AFLAGS_REMOVE_memcpy.o := -mthumb -mthumb-interwork -AFLAGS_memset.o := -DMEMSET_NO_THUMB_BUILD -AFLAGS_memcpy.o := -DMEMCPY_NO_THUMB_BUILD - +else +AFLAGS_memset.o := -DCONFIG_THUMB2_KERNEL +AFLAGS_memcpy.o := -DCONFIG_THUMB2_KERNEL endif endif diff --git a/arch/arm/lib/memcpy.S b/arch/arm/lib/memcpy.S index 7d9fc0f..00602e9 100644 --- a/arch/arm/lib/memcpy.S +++ b/arch/arm/lib/memcpy.S @@ -13,12 +13,6 @@ #include <linux/linkage.h> #include <asm/assembler.h> -#if defined(CONFIG_SYS_THUMB_BUILD) && !defined(MEMCPY_NO_THUMB_BUILD) -#define W(instr) instr.w -#else -#define W(instr) instr -#endif - #define LDR1W_SHIFT 0 #define STR1W_SHIFT 0 -- 2.7.0

5 39

[U-Boot] [PATCH] net: Add mv88e60xx support to the mv88e61xx driver
by Joshua Scott 26 Apr '16

26 Apr '16

The Marvell Link Street mv88e60xx is a series of FastEthernet switch chips, some of which also support Gigabit ports. It is similar to the mv88e61xx series which support Gigabit on all ports. There is already a driver for the mv88e61xx in U-Boot, and this patch updates it to also work with the mv88e60xx. The main change that was required was the size of the port bitmaps. Previously, 8-bit port bitmaps were in use, as the driver had only been used with six-port mv88e61xx devices. This has been changed so that 16-bit port bitmaps are now used, which covers the largest port-counts available for the mv88e60xx / mv88e61xx. Reviewed-by: Chris Packham <chris.packham(a)alliedtelesis.co.nz> Signed-off-by: Joshua Scott <joshua.scott(a)alliedtelesis.co.nz> --- drivers/net/phy/mv88e61xx.c | 29 +++++++++++++++++++++-------- drivers/net/phy/mv88e61xx.h | 2 -- include/netdev.h | 20 +++++++++++++++----- 3 files changed, 36 insertions(+), 15 deletions(-) diff --git a/drivers/net/phy/mv88e61xx.c b/drivers/net/phy/mv88e61xx.c index 302abe8..79204f3 100644 --- a/drivers/net/phy/mv88e61xx.c +++ b/drivers/net/phy/mv88e61xx.c @@ -215,17 +215,17 @@ static void mv88e61xx_port_vlan_config(struct mv88e61xx_config *swconfig) u32 port_mask = swconfig->ports_enabled; /* apply internal vlan config */ - for (prt = 0; prt < MV88E61XX_MAX_PORTS_NUM; prt++) { + for (prt = 0; prt < swconfig->numports; prt++) { /* only for enabled ports */ if ((1 << prt) & port_mask) { /* take vlan map from swconfig */ - u8 vlanmap = swconfig->vlancfg[prt]; + u16 vlanmap = swconfig->vlancfg[prt]; /* remove disabled ports from vlan map */ vlanmap &= swconfig->ports_enabled; /* apply vlan map to port */ RD_SWITCH_PORT_REG(name, prt, MV88E61XX_PRT_VMAP_REG, &reg); - reg &= ~((1 << MV88E61XX_MAX_PORTS_NUM) - 1); + reg &= ~((1 << swconfig->numports) - 1); reg |= vlanmap; WR_SWITCH_PORT_REG(name, prt, MV88E61XX_PRT_VMAP_REG, reg); @@ -331,32 +331,44 @@ int mv88e61xx_switch_initialize(struct mv88e61xx_config *swconfig) return -1; } - if (!(swconfig->cpuport & ((1 << 4) | (1 << 5)))) { + if (!(swconfig->cpuport & ((1 << 4) | (1 << 5) | (1 << 10)))) { swconfig->cpuport = (1 << 5); printf("Invalid cpu port config, using default port5\n"); } RD_SWITCH_PORT_REG(name, 0, MII_PHYSID2, &reg); switch (reg &= 0xfff0) { + case 0x0980: + idstr = "88E6096"; + swconfig->numports = 0x0b; + break; + case 0x0990: + idstr = "88E6097"; + swconfig->numports = 0x0b; + break; case 0x1610: idstr = "88E6161"; + swconfig->numports = 0x06; break; case 0x1650: idstr = "88E6165"; + swconfig->numports = 0x06; break; case 0x1210: idstr = "88E6123"; + swconfig->numports = 0x06; /* ports 2,3,4 not available */ swconfig->ports_enabled &= 0x023; break; default: /* Could not detect switch id */ idstr = "88E61??"; + swconfig->numports = 0x06; break; } /* be sure all ports are disabled */ - for (prt = 0; prt < MV88E61XX_MAX_PORTS_NUM; prt++) { + for (prt = 0; prt < swconfig->numports; prt++) { RD_SWITCH_PORT_REG(name, prt, MV88E61XX_PRT_CTRL_REG, &reg); reg &= ~0x3; WR_SWITCH_PORT_REG(name, prt, MV88E61XX_PRT_CTRL_REG, reg); @@ -405,12 +417,13 @@ int mv88e61xx_switch_initialize(struct mv88e61xx_config *swconfig) WR_SWITCH_PORT_REG(name, 5, MV88E61XX_PCS_CTRL_REG, 0x3e); } - for (prt = 0; prt < MV88E61XX_MAX_PORTS_NUM; prt++) { + for (prt = 0; prt < swconfig->numports; prt++) { /* configure port's PHY */ if (!((1 << prt) & swconfig->cpuport)) { - /* port 4 has phy 6, not 4 */ - int phy = (prt == 4) ? 6 : prt; + /* 88e61xx: port 4 has phy 6, not 4 */ + int phy = (swconfig->numports == 6 && + prt == 4) ? 6 : prt; if (mv88361xx_powerup(swconfig, phy)) return -1; if (mv88361xx_reverse_mdipn(swconfig, phy)) diff --git a/drivers/net/phy/mv88e61xx.h b/drivers/net/phy/mv88e61xx.h index 9c62e4a..b289f21 100644 --- a/drivers/net/phy/mv88e61xx.h +++ b/drivers/net/phy/mv88e61xx.h @@ -11,8 +11,6 @@ #include <miiphy.h> -#define MV88E61XX_CPU_PORT 0x5 - #define MV88E61XX_PHY_TIMEOUT 100000 /* port dev-addr (= port + 0x10) */ diff --git a/include/netdev.h b/include/netdev.h index 34651ab..cbd0420 100644 --- a/include/netdev.h +++ b/include/netdev.h @@ -154,7 +154,9 @@ static inline int pci_eth_init(bd_t *bis) #if defined(CONFIG_MV88E61XX_SWITCH) /* constants for any 88E61xx switch */ -#define MV88E61XX_MAX_PORTS_NUM 6 +/* Allow enough space in the struct to fit 11 ports, as this is + * the number used in the mv88e60xx */ +#define MV88E61XX_MAX_PORTS_NUM 0x0b enum mv88e61xx_cfg_mdip { MV88E61XX_MDIP_NOCHANGE, @@ -180,13 +182,14 @@ enum mv88e61xx_cfg_prtstt { struct mv88e61xx_config { char *name; - u8 vlancfg[MV88E61XX_MAX_PORTS_NUM]; + u16 vlancfg[MV88E61XX_MAX_PORTS_NUM]; enum mv88e61xx_cfg_rgmiid rgmii_delay; enum mv88e61xx_cfg_prtstt portstate; enum mv88e61xx_cfg_ledinit led_init; enum mv88e61xx_cfg_mdip mdip; + u32 numports; u32 ports_enabled; - u8 cpuport; + u32 cpuport; }; /* @@ -196,10 +199,17 @@ struct mv88e61xx_config { */ /* Switch mode : routes any port to any port */ -#define MV88E61XX_VLANCFG_SWITCH { 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F } +#define MV88E61XX_VLANCFG_SWITCH { 0x003F, 0x003F, 0x003F, 0x003F, 0x003F, \ + 0x003F, 0x0000, 0x0000, 0x0000, 0x0000, \ + 0x0000 } /* Router mode: routes only CPU port 5 to/from non-CPU ports 0-4 */ -#define MV88E61XX_VLANCFG_ROUTER { 0x20, 0x20, 0x20, 0x20, 0x20, 0x1F } +#define MV88E61XX_VLANCFG_ROUTER { 0x0020, 0x0020, 0x0020, 0x0020, 0x0020, \ + 0x001F, 0x0000, 0x0000, 0x0000, 0x0000, \ + 0x0000 } +#define MV88E60XX_VLANCFG_ROUTER { 0x0400, 0x0400, 0x0400, 0x0400, 0x0400, \ + 0x0400, 0x0400, 0x0400, 0x0400, 0x0400, \ + 0x03ff } int mv88e61xx_switch_initialize(struct mv88e61xx_config *swconfig); #endif /* CONFIG_MV88E61XX_SWITCH */ -- 1.9.1

2 2

[U-Boot] [PATCH 1/3] phy: Add phy driver support for xilinx PCS/PMA core
by Michal Simek 26 Apr '16

26 Apr '16

From: Siva Durga Prasad Paladugu <siva.durga.paladugu(a)xilinx.com> Add phy driver support for xilinx PCS/PMA core Signed-off-by: Siva Durga Prasad Paladugu <sivadur(a)xilinx.com> Signed-off-by: Kedareswara rao Appana <appanad(a)xilinx.com> Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- drivers/net/phy/Makefile | 1 + drivers/net/phy/phy.c | 3 + drivers/net/phy/xilinx_phy.c | 144 +++++++++++++++++++++++++++++++++++++++++++ include/phy.h | 1 + 4 files changed, 149 insertions(+) create mode 100644 drivers/net/phy/xilinx_phy.c diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile index 9e4d4927e676..1e299b97b961 100644 --- a/drivers/net/phy/Makefile +++ b/drivers/net/phy/Makefile @@ -25,4 +25,5 @@ obj-$(CONFIG_PHY_REALTEK) += realtek.o obj-$(CONFIG_PHY_SMSC) += smsc.o obj-$(CONFIG_PHY_TERANETICS) += teranetics.o obj-$(CONFIG_PHY_TI) += ti.o +obj-$(CONFIG_PHY_XILINX) += xilinx_phy.o obj-$(CONFIG_PHY_VITESSE) += vitesse.o diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c index 17866a244b3a..23c82bb36e93 100644 --- a/drivers/net/phy/phy.c +++ b/drivers/net/phy/phy.c @@ -503,6 +503,9 @@ int phy_init(void) #ifdef CONFIG_PHY_VITESSE phy_vitesse_init(); #endif +#ifdef CONFIG_PHY_XILINX + phy_xilinx_init(); +#endif return 0; } diff --git a/drivers/net/phy/xilinx_phy.c b/drivers/net/phy/xilinx_phy.c new file mode 100644 index 000000000000..f3eaf2e97ced --- /dev/null +++ b/drivers/net/phy/xilinx_phy.c @@ -0,0 +1,144 @@ +/* + * Xilinx PCS/PMA Core phy driver + * + * Copyright (C) 2015 - 2016 Xilinx, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <config.h> +#include <common.h> +#include <phy.h> +#include <dm.h> + +DECLARE_GLOBAL_DATA_PTR; + +#define MII_PHY_STATUS_SPD_MASK 0x0C00 +#define MII_PHY_STATUS_FULLDUPLEX 0x1000 +#define MII_PHY_STATUS_1000 0x0800 +#define MII_PHY_STATUS_100 0x0400 +#define XPCSPMA_PHY_CTRL_ISOLATE_DISABLE 0xFBFF + +/* Mask used for ID comparisons */ +#define XILINX_PHY_ID_MASK 0xfffffff0 + +/* Known PHY IDs */ +#define XILINX_PHY_ID 0x01740c00 + +/* struct phy_device dev_flags definitions */ +#define XAE_PHY_TYPE_MII 0 +#define XAE_PHY_TYPE_GMII 1 +#define XAE_PHY_TYPE_RGMII_1_3 2 +#define XAE_PHY_TYPE_RGMII_2_0 3 +#define XAE_PHY_TYPE_SGMII 4 +#define XAE_PHY_TYPE_1000BASE_X 5 + +static int xilinxphy_startup(struct phy_device *phydev) +{ + int err; + int status = 0; + + debug("%s\n", __func__); + /* Update the link, but return if there + * was an error + */ + err = genphy_update_link(phydev); + if (err) + return err; + + if (AUTONEG_ENABLE == phydev->autoneg) { + status = phy_read(phydev, MDIO_DEVAD_NONE, MII_LPA); + status = status & MII_PHY_STATUS_SPD_MASK; + + if (status & MII_PHY_STATUS_FULLDUPLEX) + phydev->duplex = DUPLEX_FULL; + else + phydev->duplex = DUPLEX_HALF; + + switch (status) { + case MII_PHY_STATUS_1000: + phydev->speed = SPEED_1000; + break; + + case MII_PHY_STATUS_100: + phydev->speed = SPEED_100; + break; + + default: + phydev->speed = SPEED_10; + break; + } + } else { + int bmcr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); + + if (bmcr < 0) + return bmcr; + + if (bmcr & BMCR_FULLDPLX) + phydev->duplex = DUPLEX_FULL; + else + phydev->duplex = DUPLEX_HALF; + + if (bmcr & BMCR_SPEED1000) + phydev->speed = SPEED_1000; + else if (bmcr & BMCR_SPEED100) + phydev->speed = SPEED_100; + else + phydev->speed = SPEED_10; + } + + /* + * For 1000BASE-X Phy Mode the speed/duplex will always be + * 1000Mbps/fullduplex + */ + if (phydev->flags == XAE_PHY_TYPE_1000BASE_X) { + phydev->duplex = DUPLEX_FULL; + phydev->speed = SPEED_1000; + } + + return 0; +} + +static int xilinxphy_of_init(struct phy_device *phydev) +{ + struct udevice *dev = (struct udevice *)&phydev->dev; + u32 phytype; + + debug("%s\n", __func__); + phytype = fdtdec_get_int(gd->fdt_blob, dev->of_offset, "phy-type", -1); + if (phytype == XAE_PHY_TYPE_1000BASE_X) + phydev->flags |= XAE_PHY_TYPE_1000BASE_X; + + return 0; +} + +static int xilinxphy_config(struct phy_device *phydev) +{ + int temp; + + debug("%s\n", __func__); + xilinxphy_of_init(phydev); + temp = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); + temp &= XPCSPMA_PHY_CTRL_ISOLATE_DISABLE; + phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, temp); + + return 0; +} + +static struct phy_driver xilinxphy_driver = { + .uid = XILINX_PHY_ID, + .mask = XILINX_PHY_ID_MASK, + .name = "Xilinx PCS/PMA PHY", + .features = PHY_GBIT_FEATURES, + .config = &xilinxphy_config, + .startup = &xilinxphy_startup, + .shutdown = &genphy_shutdown, +}; + +int phy_xilinx_init(void) +{ + debug("%s\n", __func__); + phy_register(&xilinxphy_driver); + + return 0; +} diff --git a/include/phy.h b/include/phy.h index 09bbe483a4b1..21459a8c8093 100644 --- a/include/phy.h +++ b/include/phy.h @@ -264,6 +264,7 @@ int phy_smsc_init(void); int phy_teranetics_init(void); int phy_ti_init(void); int phy_vitesse_init(void); +int phy_xilinx_init(void); int board_phy_config(struct phy_device *phydev); int get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id); -- 1.9.1

3 6

[U-Boot] [PATCH 1/2] net: phy: Add SGMII support for TI phy
by Michal Simek 26 Apr '16

26 Apr '16

From: Siva Durga Prasad Paladugu <siva.durga.paladugu(a)xilinx.com> Add support of SGMII to TI phy dp838367 Enable the SGMII and PCS settings in phy control, CFG2 and BIST registers Signed-off-by: Siva Durga Prasad Paladugu <sivadur(a)xilinx.com> Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- drivers/net/phy/ti.c | 39 ++++++++++++++++++++++++++++++++++++++- 1 file changed, 38 insertions(+), 1 deletion(-) diff --git a/drivers/net/phy/ti.c b/drivers/net/phy/ti.c index c3912d52f320..937426bc8565 100644 --- a/drivers/net/phy/ti.c +++ b/drivers/net/phy/ti.c @@ -12,6 +12,8 @@ #define MII_DP83867_PHYCTRL 0x10 #define MII_DP83867_MICR 0x12 +#define MII_DP83867_CFG2 0x14 +#define MII_DP83867_BISCR 0x16 #define DP83867_CTRL 0x1f /* Extended Registers */ @@ -43,10 +45,22 @@ #define DP83867_PHYCR_FIFO_DEPTH_SHIFT 14 #define DP83867_MDI_CROSSOVER 5 #define DP83867_MDI_CROSSOVER_AUTO 2 +#define DP83867_MDI_CROSSOVER_MDIX 2 +#define DP83867_PHYCTRL_SGMIIEN 0x0800 +#define DP83867_PHYCTRL_RXFIFO_SHIFT 12 +#define DP83867_PHYCTRL_TXFIFO_SHIFT 14 /* RGMIIDCTL bits */ #define DP83867_RGMII_TX_CLK_DELAY_SHIFT 4 +/* CFG2 bits */ +#define MII_DP83867_CFG2_SPEEDOPT_10EN 0x0040 +#define MII_DP83867_CFG2_SGMII_AUTONEGEN 0x0080 +#define MII_DP83867_CFG2_SPEEDOPT_ENH 0x0100 +#define MII_DP83867_CFG2_SPEEDOPT_CNT 0x0800 +#define MII_DP83867_CFG2_SPEEDOPT_INTLOW 0x2000 +#define MII_DP83867_CFG2_MASK 0x003F + #define MII_MMD_CTRL 0x0d /* MMD Access Control Register */ #define MII_MMD_DATA 0x0e /* MMD Access Data Register */ @@ -141,7 +155,7 @@ static inline bool phy_interface_is_rgmii(struct phy_device *phydev) static int dp83867_config(struct phy_device *phydev) { - unsigned int val, delay; + unsigned int val, delay, cfg2; int ret; /* Restart the PHY. */ @@ -155,6 +169,29 @@ static int dp83867_config(struct phy_device *phydev) (FIFO_DEPTH << DP83867_PHYCR_FIFO_DEPTH_SHIFT)); if (ret) return ret; + } else { + phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, + (BMCR_ANENABLE | BMCR_FULLDPLX | BMCR_SPEED1000)); + + cfg2 = phy_read(phydev, phydev->addr, MII_DP83867_CFG2); + cfg2 &= MII_DP83867_CFG2_MASK; + cfg2 |= (MII_DP83867_CFG2_SPEEDOPT_10EN | + MII_DP83867_CFG2_SGMII_AUTONEGEN | + MII_DP83867_CFG2_SPEEDOPT_ENH | + MII_DP83867_CFG2_SPEEDOPT_CNT | + MII_DP83867_CFG2_SPEEDOPT_INTLOW); + phy_write(phydev, MDIO_DEVAD_NONE, MII_DP83867_CFG2, cfg2); + + phy_write_mmd_indirect(phydev, DP83867_RGMIICTL, + DP83867_DEVADDR, phydev->addr, 0x0); + + phy_write(phydev, MDIO_DEVAD_NONE, MII_DP83867_PHYCTRL, + DP83867_PHYCTRL_SGMIIEN | + (DP83867_MDI_CROSSOVER_MDIX << + DP83867_MDI_CROSSOVER) | + (FIFO_DEPTH << DP83867_PHYCTRL_RXFIFO_SHIFT) | + (FIFO_DEPTH << DP83867_PHYCTRL_TXFIFO_SHIFT)); + phy_write(phydev, MDIO_DEVAD_NONE, MII_DP83867_BISCR, 0x0); } if ((phydev->interface >= PHY_INTERFACE_MODE_RGMII_ID) && -- 1.9.1

2 3

[U-Boot] [PATCH] net: zynq_gem: Return error incase of invalid phy address
by Michal Simek 26 Apr '16

26 Apr '16

From: Siva Durga Prasad Paladugu <siva.durga.paladugu(a)xilinx.com> Return error from probe in case of invalid phy address. This fixes the issue of uboot crash if phy is not detected. Signed-off-by: Siva Durga Prasad Paladugu <sivadur(a)xilinx.com> Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- drivers/net/zynq_gem.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index 103ed6169c0f..52a8f2760012 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -638,9 +638,7 @@ static int zynq_gem_probe(struct udevice *dev) if (ret) return ret; - zynq_phy_init(dev); - - return 0; + return zynq_phy_init(dev); } static int zynq_gem_remove(struct udevice *dev) -- 1.9.1

2 1

[U-Boot] [PATCH] net: axi_emac: Report phy-node error message permanently
by Michal Simek 26 Apr '16

26 Apr '16

Do not use debug() when printing error message. Use printf instead. Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- drivers/net/xilinx_axi_emac.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/xilinx_axi_emac.c b/drivers/net/xilinx_axi_emac.c index 3d69bed3093c..5de06ef01e8d 100644 --- a/drivers/net/xilinx_axi_emac.c +++ b/drivers/net/xilinx_axi_emac.c @@ -715,7 +715,7 @@ static int axi_emac_ofdata_to_platdata(struct udevice *dev) if (phy_mode) pdata->phy_interface = phy_get_interface_by_name(phy_mode); if (pdata->phy_interface == -1) { - debug("%s: Invalid PHY interface '%s'\n", __func__, phy_mode); + printf("%s: Invalid PHY interface '%s'\n", __func__, phy_mode); return -EINVAL; } priv->interface = pdata->phy_interface; -- 1.9.1

2 1

[U-Boot] [PATCH] mtd, ubi: set free_count to zero before walking through erase list
by Heiko Schocher 25 Apr '16

25 Apr '16

Set free_count to zero before walking through ai->erase list in wl_init(). As U-Boot has no workqueue/threads, it immediately calls erase_worker(), which increase for each erased block free_count. Without this patch, free_count gets after this initialized to zero in wl_init(), so the free_count variable always has the maybe wrong value 0. Detected this behaviour on the dxr2 board, where the UBI fastmap gets not written when attaching/dettaching on an empty NAND. It drops instead the error message: could not find any anchor PEB With this patch, fastmap gets written on dettach. Signed-off-by: Heiko Schocher <hs(a)denx.de> --- added Richard to this EMail, as maybe this could be a problem in linux too ... ? drivers/mtd/ubi/wl.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mtd/ubi/wl.c b/drivers/mtd/ubi/wl.c index 507b091..e823ca5 100644 --- a/drivers/mtd/ubi/wl.c +++ b/drivers/mtd/ubi/wl.c @@ -1528,6 +1528,7 @@ int ubi_wl_init(struct ubi_device *ubi, struct ubi_attach_info *ai) INIT_LIST_HEAD(&ubi->pq[i]); ubi->pq_head = 0; + ubi->free_count = 0; list_for_each_entry_safe(aeb, tmp, &ai->erase, u.list) { cond_resched(); @@ -1546,7 +1547,6 @@ int ubi_wl_init(struct ubi_device *ubi, struct ubi_attach_info *ai) found_pebs++; } - ubi->free_count = 0; list_for_each_entry(aeb, &ai->free, u.list) { cond_resched(); -- 2.5.0

3 14

[U-Boot] [PATCH v2 1/2] m68k: add malloc memory for early malloc
by Angelo Dureghello 23 Apr '16

23 Apr '16

To use serial uclass and DM, CONFIG_SYS_MALLOC_F must be used. So CONFIG_SYS_GENERIC_GLOBAL_DATA has been undefined and call to board_init_f_mem() is added for all cpu's. Signed-off-by: Angelo Dureghello <angelo(a)sysam.it> --- Changes in v2: None arch/m68k/cpu/mcf5227x/start.S | 8 ++++++++ arch/m68k/cpu/mcf523x/start.S | 8 ++++++++ arch/m68k/cpu/mcf52x2/start.S | 8 ++++++++ arch/m68k/cpu/mcf530x/cpu_init.c | 2 +- arch/m68k/cpu/mcf530x/start.S | 8 ++++++++ arch/m68k/cpu/mcf532x/start.S | 8 ++++++++ arch/m68k/cpu/mcf5445x/start.S | 8 ++++++++ arch/m68k/cpu/mcf547x_8x/start.S | 8 ++++++++ arch/m68k/include/asm/config.h | 2 -- 9 files changed, 57 insertions(+), 3 deletions(-) diff --git a/arch/m68k/cpu/mcf5227x/start.S b/arch/m68k/cpu/mcf5227x/start.S index 23024f9..bcb5611 100644 --- a/arch/m68k/cpu/mcf5227x/start.S +++ b/arch/m68k/cpu/mcf5227x/start.S @@ -379,6 +379,14 @@ _start: move.l #__got_start, %a5 /* put relocation table address to a5 */ + /* Allocate and zero GD, update SP */ + move.l %sp,-(%sp) + bsr board_init_f_mem + + /* Update stack- and frame-pointers */ + move.l %d0, %sp + move.l %sp, %fp + bsr cpu_init_f /* run low-level CPU init code (from flash) */ bsr board_init_f /* run low-level board init code (from flash) */ diff --git a/arch/m68k/cpu/mcf523x/start.S b/arch/m68k/cpu/mcf523x/start.S index 8a23e72..14b3025 100644 --- a/arch/m68k/cpu/mcf523x/start.S +++ b/arch/m68k/cpu/mcf523x/start.S @@ -141,6 +141,14 @@ _start: move.l #__got_start, %a5 /* put relocation table address to a5 */ + /* Allocate and zero GD, update SP */ + move.l %sp,-(%sp) + bsr board_init_f_mem + + /* Update stack- and frame-pointers */ + move.l %d0, %sp + move.l %sp, %fp + bsr cpu_init_f /* run low-level CPU init code (from flash) */ bsr board_init_f /* run low-level board init code (from flash) */ diff --git a/arch/m68k/cpu/mcf52x2/start.S b/arch/m68k/cpu/mcf52x2/start.S index 8a59496..abb9291 100644 --- a/arch/m68k/cpu/mcf52x2/start.S +++ b/arch/m68k/cpu/mcf52x2/start.S @@ -198,6 +198,14 @@ _after_flashbar_copy: move.l #__got_start, %a5 /* put relocation table address to a5 */ + /* Allocate and zero GD, update SP */ + move.l %sp,-(%sp) + bsr board_init_f_mem + + /* Update stack- and frame-pointers */ + move.l %d0, %sp + move.l %sp, %fp + bsr cpu_init_f /* run low-level CPU init code (from flash) */ bsr board_init_f /* run low-level board init code (from flash) */ diff --git a/arch/m68k/cpu/mcf530x/cpu_init.c b/arch/m68k/cpu/mcf530x/cpu_init.c index 80dc239..b09eed8 100644 --- a/arch/m68k/cpu/mcf530x/cpu_init.c +++ b/arch/m68k/cpu/mcf530x/cpu_init.c @@ -142,7 +142,7 @@ int cpu_init_r(void) return 0; } -void uart_port_conf(void) +void uart_port_conf(int port) { } diff --git a/arch/m68k/cpu/mcf530x/start.S b/arch/m68k/cpu/mcf530x/start.S index 097958a..d9034e1 100644 --- a/arch/m68k/cpu/mcf530x/start.S +++ b/arch/m68k/cpu/mcf530x/start.S @@ -137,6 +137,14 @@ _start: /* put relocation table address to a5 */ move.l #__got_start, %a5 + /* Allocate and zero GD, update SP */ + move.l %sp,-(%sp) + bsr board_init_f_mem + + /* Update stack- and frame-pointers */ + move.l %d0, %sp + move.l %sp, %fp + /* run low-level CPU init code (from flash) */ bsr cpu_init_f diff --git a/arch/m68k/cpu/mcf532x/start.S b/arch/m68k/cpu/mcf532x/start.S index 3b9ede0..98a5401 100644 --- a/arch/m68k/cpu/mcf532x/start.S +++ b/arch/m68k/cpu/mcf532x/start.S @@ -155,6 +155,14 @@ _start: move.l #__got_start, %a5 /* put relocation table address to a5 */ + /* Allocate and zero GD, update SP */ + move.l %sp,-(%sp) + bsr board_init_f_mem + + /* Update stack- and frame-pointers */ + move.l %d0, %sp + move.l %sp, %fp + bsr cpu_init_f /* run low-level CPU init code (from flash) */ bsr board_init_f /* run low-level board init code (from flash) */ diff --git a/arch/m68k/cpu/mcf5445x/start.S b/arch/m68k/cpu/mcf5445x/start.S index 979eb5a..340ab84 100644 --- a/arch/m68k/cpu/mcf5445x/start.S +++ b/arch/m68k/cpu/mcf5445x/start.S @@ -664,6 +664,14 @@ _start: move.l #__got_start, %a5 /* put relocation table address to a5 */ + /* Allocate and zero GD, update SP */ + move.l %sp,-(%sp) + bsr board_init_f_mem + + /* Update stack- and frame-pointers */ + move.l %d0, %sp + move.l %sp, %fp + bsr cpu_init_f /* run low-level CPU init code (from flash) */ bsr board_init_f /* run low-level board init code (from flash) */ diff --git a/arch/m68k/cpu/mcf547x_8x/start.S b/arch/m68k/cpu/mcf547x_8x/start.S index 75de22d..0468d1a 100644 --- a/arch/m68k/cpu/mcf547x_8x/start.S +++ b/arch/m68k/cpu/mcf547x_8x/start.S @@ -148,6 +148,14 @@ _start: move.l #__got_start, %a5 /* put relocation table address to a5 */ + /* Allocate and zero GD, update SP */ + move.l %sp,-(%sp) + bsr board_init_f_mem + + /* Update stack- and frame-pointers */ + move.l %d0, %sp + move.l %sp, %fp + jbsr cpu_init_f /* run low-level CPU init code (from flash) */ jbsr board_init_f /* run low-level board init code (from flash) */ diff --git a/arch/m68k/include/asm/config.h b/arch/m68k/include/asm/config.h index e1458ac..9c4d3fb 100644 --- a/arch/m68k/include/asm/config.h +++ b/arch/m68k/include/asm/config.h @@ -7,8 +7,6 @@ #ifndef _ASM_CONFIG_H_ #define _ASM_CONFIG_H_ -#define CONFIG_SYS_GENERIC_GLOBAL_DATA - #define CONFIG_NEEDS_MANUAL_RELOC #define CONFIG_LMB -- 2.5.3

2 9