February 2016 - U-Boot

[U-Boot] [PATCH] ls2085a: Correct the model & board name of RDB and QDS
by Ashish Kumar 01 Feb '16

01 Feb '16

* LS2085ARDB and LS2085AQDS host LS2080A and LS2085A, So update model and board name. Signed-off-by: Ashish Kumar <Ashish.Kumar(a)nxp.com> --- arch/arm/dts/fsl-ls2080a-qds.dts | 2 +- arch/arm/dts/fsl-ls2080a-rdb.dts | 2 +- board/freescale/ls2080aqds/ls2080aqds.c | 3 +-- board/freescale/ls2080ardb/ls2080ardb.c | 4 +--- 4 files changed, 4 insertions(+), 7 deletions(-) diff --git a/arch/arm/dts/fsl-ls2080a-qds.dts b/arch/arm/dts/fsl-ls2080a-qds.dts index 547ec27..7b1dae8 100644 --- a/arch/arm/dts/fsl-ls2080a-qds.dts +++ b/arch/arm/dts/fsl-ls2080a-qds.dts @@ -11,7 +11,7 @@ #include "fsl-ls2080a.dtsi" / { - model = "Freescale Layerscape 2080a QDS Board"; + model = "Freescale Layerscape 2085a QDS Board"; compatible = "fsl,ls2080a-qds", "fsl,ls2080a"; aliases { diff --git a/arch/arm/dts/fsl-ls2080a-rdb.dts b/arch/arm/dts/fsl-ls2080a-rdb.dts index 1a1813b..71d1969 100644 --- a/arch/arm/dts/fsl-ls2080a-rdb.dts +++ b/arch/arm/dts/fsl-ls2080a-rdb.dts @@ -11,7 +11,7 @@ #include "fsl-ls2080a.dtsi" / { - model = "Freescale Layerscape 2080a RDB Board"; + model = "Freescale Layerscape 2085a RDB Board"; compatible = "fsl,ls2080a-rdb", "fsl,ls2080a"; aliases { diff --git a/board/freescale/ls2080aqds/ls2080aqds.c b/board/freescale/ls2080aqds/ls2080aqds.c index aa256a2..fe20f3a 100644 --- a/board/freescale/ls2080aqds/ls2080aqds.c +++ b/board/freescale/ls2080aqds/ls2080aqds.c @@ -61,8 +61,7 @@ int checkboard(void) "100 separate SSCG"}; int clock; - cpu_name(buf); - printf("Board: %s-QDS, ", buf); + printf("Board: LS2085A-QDS, "); sw = QIXIS_READ(arch); printf("Board Arch: V%d, ", sw >> 4); diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c index c63b639..ccf98c9 100644 --- a/board/freescale/ls2080ardb/ls2080ardb.c +++ b/board/freescale/ls2080ardb/ls2080ardb.c @@ -54,10 +54,8 @@ unsigned long long get_qixis_addr(void) int checkboard(void) { u8 sw; - char buf[15]; - cpu_name(buf); - printf("Board: %s-RDB, ", buf); + printf("Board: LS2085A-RDB, "); sw = QIXIS_READ(arch); printf("Board Arch: V%d, ", sw >> 4); -- 1.7.6.GIT

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[U-Boot] Pull request: u-boot-arm/master
by Albert ARIBAUD 01 Feb '16

01 Feb '16

Hello Tom, The following changes since commit 8cdae1dacde7dbe74d53a8ac1a05761a53c4f191: video: Correct 'tor' typo in comment (2016-01-30 10:58:47 +0100) are available in the git repository at: git://git.denx.de/u-boot-arm master for you to fetch changes up to 735b1a2e5a61401868bb35702b6e5e18bce6eb97: arm: novena: Fix EEPROM i2c configuration (2016-01-31 16:32:56 +0100) ---------------------------------------------------------------- Albert ARIBAUD (1): armv7: add cacheline sizes where missing Marek Vasut (4): arm: Replace test for CONFIG_ARMV7 with CONFIG_CPU_V7 arm: Remove S bit from MMU section entry arm: cache: Implement cache range check for v7 arm: novena: Fix EEPROM i2c configuration Peng Fan (1): arm: config: enforce -fno-pic for gcc Wang Dongsheng (1): ARM: Disable "DISCARD" for secure section if CONFIG_ARMV7_SECURE_BASE isn't defined arch/arm/config.mk | 1 + arch/arm/cpu/armv7/cache_v7.c | 21 +++++++++++++++++++++ arch/arm/cpu/u-boot.lds | 27 ++++++++++++++------------- arch/arm/include/asm/system.h | 7 +++---- arch/arm/lib/cache-cp15.c | 2 +- include/configs/am3517_crane.h | 2 ++ include/configs/am3517_evm.h | 2 ++ include/configs/at91-sama5_common.h | 2 ++ include/configs/bcm_ep_board.h | 1 + include/configs/cm_t35.h | 2 ++ include/configs/cm_t3517.h | 2 ++ include/configs/colibri_vf.h | 2 ++ include/configs/kzm9g.h | 2 ++ include/configs/nokia_rx51.h | 2 ++ include/configs/novena.h | 3 ++- include/configs/pcm052.h | 2 ++ include/configs/rcar-gen2-common.h | 2 ++ include/configs/rk3036_common.h | 2 ++ include/configs/rk3288_common.h | 2 ++ include/configs/s5p_goni.h | 2 ++ include/configs/smdkc100.h | 2 ++ include/configs/tao3530.h | 2 ++ include/configs/ti814x_evm.h | 2 ++ include/configs/ti816x_evm.h | 2 ++ include/configs/ti_omap3_common.h | 5 +++++ include/configs/tricorder.h | 2 ++ include/configs/vexpress_common.h | 2 ++ include/configs/vf610twr.h | 2 ++ 28 files changed, 88 insertions(+), 19 deletions(-) Amicalement, -- Albert.

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[U-Boot] Converting arm_dcc to driver model
by Simon Glass 01 Feb '16

01 Feb '16

Hi Michal, I notice that the only user of this driver appears to be a board you maintain. Do you think you could convert this to driver model? Please see doc/driver-model/serial-howto.txt. I'm hoping you might have hardware to test with. Regards, Simon

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[U-Boot] DM ethernet driver with multiple interfaces per device
by Stefan Roese 01 Feb '16

01 Feb '16

Hi! I'm currently porting the Marvell mvpp2 driver for the Armada 375 to U-Boot. This controller is a bit different, as it exposes multiple interfaces per controller. In this specific case its 2 interfaces. Here the current dts node: /* Network controller */ ethernet@f0000 { compatible = "marvell,armada-375-pp2"; reg = <0xf0000 0xa000>, /* Packet Processor regs */ <0xc0000 0x3060>, /* LMS regs */ <0xc4000 0x100>, /* eth0 regs */ <0xc5000 0x100>; /* eth1 regs */ clocks = <&gateclk 3>, <&gateclk 19>; clock-names = "pp_clk", "gop_clk"; status = "disabled"; eth0: eth0@c4000 { interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; port-id = <0>; status = "disabled"; }; eth1: eth1@c5000 { interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; port-id = <1>; status = "disabled"; }; }; Now I'm unsure, how to support those multiple network interfaces with DM. As the driver will only get called once. And I can't instantiate 2 network interfaces from the one probe function call. I could work around this problem, by restructuring the DT node into 2 separate DT nodes, each referencing the shared resources. But this would be a ugly, since it results in a different DT source between Linux and U-Boot. So my question is, is this something that is supported by the current DM networking infrastructure? And if not, if you have some hints on how to best support such a constellation with multiple network interfaces via one ethernet controller. Thanks, Stefan

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[U-Boot] [PATCH v2] armv8/ls1043a: Implement workaround for erratum A009660
by Mingkai Hu 01 Feb '16

01 Feb '16

From: Mingkai Hu <mingkai.hu(a)nxp.com> Memory controller performance is not optimal with default internal target queue register value, write required value for optimal DDR performance. Signed-off-by: Mingkai Hu <mingkai.hu(a)nxp.com> --- v2: - Add a check to make sure A009660 and A008514 is are not both enabled. - Add comment for the offset of eddrtqcr1. arch/arm/cpu/armv8/fsl-layerscape/soc.c | 15 +++++++++++++++ arch/arm/include/asm/arch-fsl-layerscape/config.h | 5 +++++ 2 files changed, 20 insertions(+) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c index 7ff0148..8b01fd2 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c @@ -213,6 +213,20 @@ static void erratum_a009929(void) #endif } +/* + * This erratum requires setting a value to eddrtqcr1 to optimal + * the DDR performance. The eddrtqcr1 register is in SCFG space + * of LS1043A and the offset is 0x157_020c. + */ +static void erratum_a009660(void) +{ +#if defined(CONFIG_SYS_FSL_ERRATUM_A009660) \ + && !defined(CONFIG_SYS_FSL_ERRATUM_A008514) + u32 *eddrtqcr1 = (void *)CONFIG_SYS_FSL_SCFG_ADDR + 0x20c; + out_be32(eddrtqcr1, 0x63b20042); +#endif +} + void fsl_lsch2_early_init_f(void) { struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR; @@ -238,6 +252,7 @@ void fsl_lsch2_early_init_f(void) /* Erratum */ erratum_a009929(); + erratum_a009660(); } #endif diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h index f1b164f..854ed0b 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/config.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h @@ -171,6 +171,11 @@ #define CONFIG_SYS_FSL_ERRATUM_A009663 #define CONFIG_SYS_FSL_ERRATUM_A009929 +#define CONFIG_SYS_FSL_ERRATUM_A009660 +#if defined(CONFIG_SYS_FSL_ERRATUM_A009660) \ + && defined(CONFIG_SYS_FSL_ERRATUM_A008514) +#error "A009660 and A008514 are both enabed for LS1043A, please check it." +#endif #else #error SoC not defined #endif -- 2.1.0.27.g96db324

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[U-Boot] [PATCH v4 0/4] QE patchset introduction
by Zhao Qiang 01 Feb '16

01 Feb '16

*Changes in v4: -[PATCH v4 4/4] qe: assgin pins to qe-hdlc - modify the format of multi-line comments *Changes in v3: -split [PATCH v2 3/3] QE: assgin pins to QE-HDLC to two patches: [PATCH v3 3/4] ls1043rdb: move USB mux config to config_board_mux and [PATCH v3 4/4] qe: assgin pins to qe-hdlc. *Changes in v2: -Add new patch in patchset.QE: mask the codes not used for micro QE -[PATCH v2 2/3] QE: add QE support on ls1043ardb -get qe_immr and qe_immr directly instead of from qe_base

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[U-Boot] [PATCH] OMAP3: omap3_logic: Remove YAFFS support.
by Adam Ford 01 Feb '16

01 Feb '16

UBIFS is the preferred OS, and YAFFS isn't officially included in Linux. Removing this feature reduces the code size. Signed-off-by: Adam Ford <aford173(a)gmail.com> --- include/configs/omap3_logic.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h index a153928..3cb71f1 100644 --- a/include/configs/omap3_logic.h +++ b/include/configs/omap3_logic.h @@ -66,8 +66,6 @@ #define CONFIG_CMD_PING #define CONFIG_CMD_DHCP -#define CONFIG_YAFFS2 - /* I2C */ #define CONFIG_SYS_I2C_OMAP34XX #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM AT24C64 */ -- 1.9.1

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[U-Boot] [PATCH] armv8/ls1043a: Implement workaround for erratum A009660
by Mingkai Hu 01 Feb '16

01 Feb '16

From: Mingkai Hu <mingkai.hu(a)nxp.com> Memory controller performance is not optimal with default internal target queue register value, write required value for optimal DDR performance. Signed-off-by: Mingkai Hu <mingkai.hu(a)nxp.com> --- arch/arm/cpu/armv8/fsl-layerscape/soc.c | 13 +++++++++++++ arch/arm/include/asm/arch-fsl-layerscape/config.h | 1 + 2 files changed, 14 insertions(+) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c index 23d6b73..485f5cd 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c @@ -210,6 +210,18 @@ static void erratum_a009929(void) #endif } +/* + * This erratum requires setting a value to eddrtqcr1 to + * optimal the DDR performance. + */ +static void erratum_a009660(void) +{ +#ifdef CONFIG_SYS_FSL_ERRATUM_A009660 + u32 *eddrtqcr1 = (void *)CONFIG_SYS_FSL_SCFG_ADDR + 0x20c; + out_be32(eddrtqcr1, 0x63b20042); +#endif +} + void fsl_lsch2_early_init_f(void) { struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR; @@ -232,6 +244,7 @@ void fsl_lsch2_early_init_f(void) /* Erratum */ erratum_a009929(); + erratum_a009660(); } #endif diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h index 49b113d..66399b2 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/config.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h @@ -167,6 +167,7 @@ #define GICC_BASE 0x01402000 #define CONFIG_SYS_FSL_ERRATUM_A009929 +#define CONFIG_SYS_FSL_ERRATUM_A009660 #else #error SoC not defined #endif -- 2.1.0.27.g96db324

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[U-Boot] Conversion of serial_pxa.c to driver model
by Simon Glass 01 Feb '16

01 Feb '16

Hi Marek, Are you planning to convert this to driver model? I see that two boards still use it. Regards, Simon

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[U-Boot] [PATCH] fdt: introudce fdt_get_child_count
by Peng Fan 01 Feb '16

01 Feb '16

Introudce fdt_get_child_count for get the number of subnodes of one parent node. Signed-off-by: Peng Fan <van.freenix(a)gmail.com> Cc: Simon Glass <sjg(a)chromium.org> --- include/libfdt.h | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/include/libfdt.h b/include/libfdt.h index e48c21a..94d29e6 100644 --- a/include/libfdt.h +++ b/include/libfdt.h @@ -193,6 +193,24 @@ int fdt_next_subnode(const void *fdt, int offset); node >= 0; \ node = fdt_next_subnode(fdt, node)) +/** + * fdt_get_child_count() - get the number of subnodes of one node + * + * @fdt: FDT blob + * @node: Offset of node + * @return number of child nodes of node, or 0 if there is no subnode. + */ +static inline int fdt_get_child_count(void *fdt, int node) +{ + int subnode; + int num = 0; + + fdt_for_each_subnode(fdt, subnode, node) + num++; + + return num; +} + /**********************************************************************/ /* General functions */ /**********************************************************************/ -- 2.6.2

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