December 2016 - U-Boot

[U-Boot] [PATCH] tools: imximage: use 'new style' header length for imximage v1
by Martin Kaiser 27 Jan '17

27 Jan '17

From: Martin Kaiser <martin(a)kaiser.cx> We can use the same mechanism for the imximage v1 header length calculations that we're using for v2. Doing so, we can share more code between v1 and v2. Additionally, *header_size_ptr in imximage_set_header() will then have the correct value for both v1 and v2. Signed-off-by: Martin Kaiser <martin(a)kaiser.cx> --- I discovered the problem when I tried to use csf_ptr with imximage v1 (as part of a private modification). *csf_ptr = params->ep + *header_size_ptr - imximage_init_loadsize; = params->ep + sbuf->st_size + imximage_ivt_offset - imximage_init_loadsize; = params->ep + padded data file size + alloc_len - (imximage_init_loadsize - imximage_ivt_offset); This works only if alloc_len == imximage_init_loadsize - imximage_ivt_offset, not if alloc_len is always 4096. tools/imximage.c | 43 ++++++++++++++++++++----------------------- 1 file changed, 20 insertions(+), 23 deletions(-) diff --git a/tools/imximage.c b/tools/imximage.c index 092d550..e280da6 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -291,8 +291,7 @@ static void set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len, /* Set magic number */ fhdr_v1->app_code_barker = APP_CODE_BARKER; - /* TODO: check i.MX image V1 handling, for now use 'old' style */ - hdr_base = entry_point - 4096; + hdr_base = entry_point - imximage_init_loadsize + flash_offset; fhdr_v1->app_dest_ptr = hdr_base - flash_offset; fhdr_v1->app_code_jump_vector = entry_point; @@ -649,6 +648,7 @@ static void imximage_set_header(void *ptr, struct stat *sbuf, int ifd, { struct imx_header *imxhdr = (struct imx_header *)ptr; uint32_t dcd_len; + uint32_t imx_hdr_size; /* * In order to not change the old imx cfg file @@ -664,12 +664,13 @@ static void imximage_set_header(void *ptr, struct stat *sbuf, int ifd, /* Parse dcd configuration file */ dcd_len = parse_cfg_file(imxhdr, params->imagename); - if (imximage_version == IMXIMAGE_V2) { - if (imximage_init_loadsize < imximage_ivt_offset + - sizeof(imx_header_v2_t)) - imximage_init_loadsize = imximage_ivt_offset + - sizeof(imx_header_v2_t); - } + if (imximage_version == IMXIMAGE_V1) + imx_hdr_size = sizeof(imx_header_v1_t); + else + imx_hdr_size = sizeof(imx_header_v2_t); + + if (imximage_init_loadsize < imximage_ivt_offset + imx_hdr_size) + imximage_init_loadsize = imximage_ivt_offset + imx_hdr_size; /* Set the imx header */ (*set_imx_hdr)(imxhdr, dcd_len, params->ep, imximage_ivt_offset); @@ -722,6 +723,7 @@ static int imximage_generate(struct image_tool_params *params, struct stat sbuf; char *datafile = params->datafile; uint32_t pad_len; + uint32_t imx_hdr_size; memset(&imximage_header, 0, sizeof(imximage_header)); @@ -739,16 +741,15 @@ static int imximage_generate(struct image_tool_params *params, /* Parse dcd configuration file */ parse_cfg_file(&imximage_header, params->imagename); - /* TODO: check i.MX image V1 handling, for now use 'old' style */ - if (imximage_version == IMXIMAGE_V1) { - alloc_len = 4096; - } else { - if (imximage_init_loadsize < imximage_ivt_offset + - sizeof(imx_header_v2_t)) - imximage_init_loadsize = imximage_ivt_offset + - sizeof(imx_header_v2_t); - alloc_len = imximage_init_loadsize - imximage_ivt_offset; - } + if (imximage_version == IMXIMAGE_V1) + imx_hdr_size = sizeof(imx_header_v1_t); + else + imx_hdr_size = sizeof(imx_header_v2_t); + + if (imximage_init_loadsize < imximage_ivt_offset + imx_hdr_size) + imximage_init_loadsize = imximage_ivt_offset + imx_hdr_size; + + alloc_len = imximage_init_loadsize - imximage_ivt_offset; if (alloc_len < sizeof(struct imx_header)) { fprintf(stderr, "%s: header error\n", @@ -779,11 +780,7 @@ static int imximage_generate(struct image_tool_params *params, pad_len = ROUND(sbuf.st_size, 4096) - sbuf.st_size; - /* TODO: check i.MX image V1 handling, for now use 'old' style */ - if (imximage_version == IMXIMAGE_V1) - return 0; - else - return pad_len; + return pad_len; } -- 1.7.10.4

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[U-Boot] [PATCH 1/2] armv8: calculate __bss_size in u-boot-spl.lds
by Oded Gabbay 26 Jan '17

26 Jan '17

This patch adds a missing __bss_size symbol to the default armv8 u-boot-spl.lds file. Makefile.spl relies on __bss_size to be present when it creates the SPL image. It uses that symbol to create a pad file that will be used to place the dtb after the bss section. In ARMv8 default u-boot-spl.lds, __bss_size was missing and therefore, the pad file was always 0. As a result, the dtb was placed after _image_binary_end, which caused a failure when loading it inside the SPL. Signed-off-by: Oded Gabbay <oded.gabbay(a)gmail.com> Cc: Albert Aribaud <albert.u.boot(a)aribaud.net> --- arch/arm/cpu/armv8/u-boot-spl.lds | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/cpu/armv8/u-boot-spl.lds b/arch/arm/cpu/armv8/u-boot-spl.lds index cc427c3..e7799cc 100644 --- a/arch/arm/cpu/armv8/u-boot-spl.lds +++ b/arch/arm/cpu/armv8/u-boot-spl.lds @@ -70,6 +70,7 @@ SECTIONS KEEP(*(.__bss_end)); } >.sdram + __bss_size = __bss_end - _image_binary_end; /DISCARD/ : { *(.dynsym) } /DISCARD/ : { *(.dynstr*) } /DISCARD/ : { *(.dynamic*) } -- 2.7.4

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[U-Boot] [PATCH 0/5][v2] Update LS2080A SoC code to support LS2088A SoC
by Priyanka Jain 25 Jan '17

25 Jan '17

From: Priyanka Jain <Priyanka.Jain(a)freescale.com> LS2088A is similar to LS2080A SoC with some differences like 1)Timer controller offset is different 2)It has A72 cores 3)Process to release secondary cores is different 4)LS2088A SoC has TZASC controller In preparation of using same binary for LS2088A and LS2080A as both are using same development boards. code is update to detect difference based on SVR at runtime Priyanka Jain (5): armv8: lsch3: Use SVR based timer base address detection armv8: fsl-layerscape: Update TZASC registers type armv8: fsl-layerscape : Check SVR for initializing TZASC armv8: fsl-layerscape: Add NXP LS2088A SoC support armv8/fsl-lsch3: Update code to release secondary cores arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 16 +++++- arch/arm/cpu/armv8/fsl-layerscape/cpu.h | 1 + arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc | 58 +++++++++++++++++++ arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S | 47 +++++++++++----- arch/arm/cpu/armv8/fsl-layerscape/mp.c | 59 ++++++++++++++++++- arch/arm/cpu/armv8/fsl-layerscape/soc.c | 6 +- arch/arm/include/asm/arch-fsl-layerscape/config.h | 1 + arch/arm/include/asm/arch-fsl-layerscape/cpu.h | 4 + .../include/asm/arch-fsl-layerscape/immap_lsch3.h | 7 ++- arch/arm/include/asm/arch-fsl-layerscape/soc.h | 10 +++ board/freescale/ls2080a/MAINTAINERS | 2 +- board/freescale/ls2080aqds/MAINTAINERS | 2 +- board/freescale/ls2080aqds/README | 12 ++-- board/freescale/ls2080ardb/MAINTAINERS | 2 +- board/freescale/ls2080ardb/README | 8 +- 15 files changed, 198 insertions(+), 37 deletions(-) -- Changes for v2: Rename LS2080A_LS2085A_TIMER_ADDR to SYS_FSL_LS2080A_LS2085A_TIMER_ADDR in first patch 1.7.4.1

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[U-Boot] [PATCH v2] mpc85xx: pci: Implement workaround for Erratum A007815
by Tony O'Brien 24 Jan '17

24 Jan '17

The read-only-write-enable bit is set by default and must be cleared to prevent overwriting read-only registers. This should be done immediately after resetting the PCI Express controller. Reviewed-by: Hamish Martin <hamish.martin(a)alliedtelesis.co.nz> Signed-off-by: Tony O'Brien <tony.obrien(a)alliedtelesis.co.nz> --- Note that this does not implement the whole fix for this erratum, just what is necessary for our implementation. Since we are using a fixed RC configuration, no support has been added for EP mode or any consideration of link-up/down events. --- arch/powerpc/cpu/mpc85xx/cmd_errata.c | 3 +++ arch/powerpc/include/asm/config_mpc85xx.h | 1 + arch/powerpc/include/asm/fsl_pci.h | 4 +++- drivers/pci/fsl_pci_init.c | 7 +++++++ 4 files changed, 14 insertions(+), 1 deletion(-) diff --git a/arch/powerpc/cpu/mpc85xx/cmd_errata.c b/arch/powerpc/cpu/mpc85xx/cmd_errata.c index 402a1ff..aabb56b 100644 --- a/arch/powerpc/cpu/mpc85xx/cmd_errata.c +++ b/arch/powerpc/cpu/mpc85xx/cmd_errata.c @@ -330,6 +330,9 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) #ifdef CONFIG_SYS_FSL_ERRATUM_A009663 puts("Work-around for Erratum A009663 enabled\n"); #endif +#ifdef CONFIG_SYS_FSL_ERRATUM_A007815 + puts("Work-around for Erratum A007815 enabled\n"); +#endif return 0; } diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index c92bc1e..c298e44 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -785,6 +785,7 @@ defined(CONFIG_PPC_T1014) || defined(CONFIG_PPC_T1013) #define CONFIG_SYS_FSL_ERRATUM_A006593 #define CONFIG_SYS_FSL_ERRATUM_A007186 #define CONFIG_SYS_FSL_ERRATUM_A006379 +#define CONFIG_SYS_FSL_ERRATUM_A007815 #define ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE #define CONFIG_SYS_FSL_SFP_VER_3_0 diff --git a/arch/powerpc/include/asm/fsl_pci.h b/arch/powerpc/include/asm/fsl_pci.h index 8bee8ca..cad341e 100644 --- a/arch/powerpc/include/asm/fsl_pci.h +++ b/arch/powerpc/include/asm/fsl_pci.h @@ -79,7 +79,9 @@ typedef struct ccsr_pci { u32 pme_msg_dis; /* 0x024 - PCIE PME & message disable register */ u32 pme_msg_int_en; /* 0x028 - PCIE PME & message interrupt enable register */ u32 pm_command; /* 0x02c - PCIE PM Command register */ - char res4[3016]; /* (- #xbf8 #x30)3016 */ + char res3[2188]; /* (0x8bc - 0x30 = 2188) */ + u32 dbi_ro_wr_en; /* 0x8bc - DBI read only write enable reg */ + char res4[824]; /* (0xbf8 - 0x8c0 = 824) */ u32 block_rev1; /* 0xbf8 - PCIE Block Revision register 1 */ u32 block_rev2; /* 0xbfc - PCIE Block Revision register 2 */ diff --git a/drivers/pci/fsl_pci_init.c b/drivers/pci/fsl_pci_init.c index 52792dc..af20cf0 100644 --- a/drivers/pci/fsl_pci_init.c +++ b/drivers/pci/fsl_pci_init.c @@ -543,6 +543,13 @@ void fsl_pci_init(struct pci_controller *hose, struct fsl_pci_info *pci_info) pciauto_prescan_setup_bridge(hose, dev, hose->current_busno); } +#ifdef CONFIG_SYS_FSL_ERRATUM_A007815 + /* The Read-Only Write Enable bit defaults to 1 instead of 0. + * Set to 0 to protect the read-only registers. + */ + clrbits_be32(&pci->dbi_ro_wr_en, 0x01); +#endif + /* Use generic setup_device to initialize standard pci regs, * but do not allocate any windows since any BAR found (such * as PCSRBAR) is not in this cpu's memory space. -- 2.10.2

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[U-Boot] [PATCH] mpc85xx: pci: Implement workaround for Erratum A007815
by Tony O'Brien 24 Jan '17

24 Jan '17

The read-only-write-enable bit is set by default and must be cleared to prevent overwriting read-only registers. This should be done immediately after resetting the PCI Express controller. Reviewed-by: Hamish Martin <hamish.martin(a)alliedtelesis.co.nz> --- Note that this does not implement the whole fix for this erratum, just what is necessary for our implementation. Since we are using a fixed RC configuration, no support has been added for EP mode or any consideration of link-up/down events. Signed-off-by: Tony O'Brien <tony.obrien(a)alliedtelesis.co.nz> --- arch/powerpc/cpu/mpc85xx/cmd_errata.c | 3 +++ arch/powerpc/include/asm/config_mpc85xx.h | 1 + arch/powerpc/include/asm/fsl_pci.h | 4 +++- drivers/pci/fsl_pci_init.c | 7 +++++++ 4 files changed, 14 insertions(+), 1 deletion(-) diff --git a/arch/powerpc/cpu/mpc85xx/cmd_errata.c b/arch/powerpc/cpu/mpc85xx/cmd_errata.c index 402a1ff..aabb56b 100644 --- a/arch/powerpc/cpu/mpc85xx/cmd_errata.c +++ b/arch/powerpc/cpu/mpc85xx/cmd_errata.c @@ -330,6 +330,9 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) #ifdef CONFIG_SYS_FSL_ERRATUM_A009663 puts("Work-around for Erratum A009663 enabled\n"); #endif +#ifdef CONFIG_SYS_FSL_ERRATUM_A007815 + puts("Work-around for Erratum A007815 enabled\n"); +#endif return 0; } diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index c92bc1e..c298e44 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -785,6 +785,7 @@ defined(CONFIG_PPC_T1014) || defined(CONFIG_PPC_T1013) #define CONFIG_SYS_FSL_ERRATUM_A006593 #define CONFIG_SYS_FSL_ERRATUM_A007186 #define CONFIG_SYS_FSL_ERRATUM_A006379 +#define CONFIG_SYS_FSL_ERRATUM_A007815 #define ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE #define CONFIG_SYS_FSL_SFP_VER_3_0 diff --git a/arch/powerpc/include/asm/fsl_pci.h b/arch/powerpc/include/asm/fsl_pci.h index 8bee8ca..cad341e 100644 --- a/arch/powerpc/include/asm/fsl_pci.h +++ b/arch/powerpc/include/asm/fsl_pci.h @@ -79,7 +79,9 @@ typedef struct ccsr_pci { u32 pme_msg_dis; /* 0x024 - PCIE PME & message disable register */ u32 pme_msg_int_en; /* 0x028 - PCIE PME & message interrupt enable register */ u32 pm_command; /* 0x02c - PCIE PM Command register */ - char res4[3016]; /* (- #xbf8 #x30)3016 */ + char res3[2188]; /* (0x8bc - 0x30 = 2188) */ + u32 dbi_ro_wr_en; /* 0x8bc - DBI read only write enable reg */ + char res4[824]; /* (0xbf8 - 0x8c0 = 824) */ u32 block_rev1; /* 0xbf8 - PCIE Block Revision register 1 */ u32 block_rev2; /* 0xbfc - PCIE Block Revision register 2 */ diff --git a/drivers/pci/fsl_pci_init.c b/drivers/pci/fsl_pci_init.c index 52792dc..af20cf0 100644 --- a/drivers/pci/fsl_pci_init.c +++ b/drivers/pci/fsl_pci_init.c @@ -543,6 +543,13 @@ void fsl_pci_init(struct pci_controller *hose, struct fsl_pci_info *pci_info) pciauto_prescan_setup_bridge(hose, dev, hose->current_busno); } +#ifdef CONFIG_SYS_FSL_ERRATUM_A007815 + /* The Read-Only Write Enable bit defaults to 1 instead of 0. + * Set to 0 to protect the read-only registers. + */ + clrbits_be32(&pci->dbi_ro_wr_en, 0x01); +#endif + /* Use generic setup_device to initialize standard pci regs, * but do not allocate any windows since any BAR found (such * as PCSRBAR) is not in this cpu's memory space. -- 2.10.2

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[U-Boot] [PATCH v2] powerpc/t2080: CPU erratum A-007907
by Darwin Dingel 24 Jan '17

24 Jan '17

Core hang occurs when using L1 stashes. Workaround is to disable L1 stashes so software uses L2 cache for stashes instead. Reviewed-by: Chris Packham <chris.packham(a)alliedtelesis.co.nz> Signed-off-by: Darwin Dingel <darwin.dingel(a)alliedtelesis.co.nz> Cc: York Sun <york.sun(a)nxp.com> --- Changes for v2: - Enabled for T4240 and B4860 arch/powerpc/cpu/mpc85xx/cmd_errata.c | 4 +++- arch/powerpc/cpu/mpc85xx/cpu_init.c | 7 +++++++ arch/powerpc/include/asm/config_mpc85xx.h | 3 +++ arch/powerpc/include/asm/processor.h | 1 + 4 files changed, 14 insertions(+), 1 deletion(-) diff --git a/arch/powerpc/cpu/mpc85xx/cmd_errata.c b/arch/powerpc/cpu/mpc85xx/cmd_errata.c index 3b06ae4..197eb2f 100644 --- a/arch/powerpc/cpu/mpc85xx/cmd_errata.c +++ b/arch/powerpc/cpu/mpc85xx/cmd_errata.c @@ -329,7 +329,9 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) #ifdef CONFIG_SYS_FSL_ERRATUM_A009663 puts("Work-around for Erratum A009663 enabled\n"); #endif - +#ifdef CONFIG_SYS_FSL_ERRATUM_A007907 + puts("Work-around for Erratum A007907 enabled\n"); +#endif return 0; } diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index 53b3729..0e744f0 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -775,6 +775,13 @@ int cpu_init_r(void) sync(); } #endif + +#ifdef CONFIG_SYS_FSL_ERRATUM_A007907 + flush_dcache(); + mtspr(L1CSR2, (mfspr(L1CSR2) & ~L1CSR2_DCSTASHID)); + sync(); +#endif + #ifdef CONFIG_SYS_FSL_ERRATUM_A005812 /* * A-005812 workaround sets bit 32 of SPR 976 for SoCs running diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index 6d845e8..c2bf44b 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -642,6 +642,7 @@ #define CONFIG_SYS_NUM_FM2_10GEC 2 #define CONFIG_NUM_DDR_CONTROLLERS 3 #define CONFIG_SYS_FSL_ERRATUM_A006261 +#define CONFIG_SYS_FSL_ERRATUM_A007907 #else #define CONFIG_SYS_NUM_FM1_DTSEC 6 #define CONFIG_SYS_NUM_FM1_10GEC 1 @@ -748,6 +749,7 @@ #define CONFIG_SYS_FSL_SRIO_OB_WIN_NUM 9 #define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM 5 #define CONFIG_SYS_FSL_SRIO_LIODN +#define CONFIG_SYS_FSL_ERRATUM_A007907 #else #define CONFIG_MAX_CPUS 2 #define CONFIG_MAX_DSP_CPUS 2 @@ -910,6 +912,7 @@ defined(CONFIG_PPC_T1014) || defined(CONFIG_PPC_T1013) #define CONFIG_SYS_FSL_ERRATUM_A006593 #define CONFIG_SYS_FSL_ERRATUM_A007186 #define CONFIG_SYS_FSL_ERRATUM_A006379 +#define CONFIG_SYS_FSL_ERRATUM_A007907 #define ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE #define CONFIG_SYS_FSL_SFP_VER_3_0 diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h index fdfca90..6f9b297 100644 --- a/arch/powerpc/include/asm/processor.h +++ b/arch/powerpc/include/asm/processor.h @@ -501,6 +501,7 @@ #define L1CSR1_ICE 0x00000001 /* Instruction Cache Enable */ #define SPRN_L1CSR2 0x25e /* L1 Data Cache Control and Status Register 2 */ #define L1CSR2_DCWS 0x40000000 /* Data Cache Write Shadow */ +#define L1CSR2_DCSTASHID 0x000003ff /* Data Cache Stash ID */ #define SPRN_L2CSR0 0x3f9 /* L2 Data Cache Control and Status Register 0 */ #define L2CSR0_L2E 0x80000000 /* L2 Cache Enable */ #define L2CSR0_L2PE 0x40000000 /* L2 Cache Parity/ECC Enable */ -- 2.10.1

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[U-Boot] ext4: crash when writing a file
by Sébastien Szymanski 24 Jan '17

24 Jan '17

Hello, I am working on a i.MX6UL based board with a 4GB eMMC partitioned as following: Device Boot Start End Sectors Size Id Type /dev/sdb1 2048 264191 262144 128M 83 Linux /dev/sdb2 264192 4458495 4194304 2G 83 Linux /dev/sdb3 4458496 7634943 3176448 1.5G 83 Linux On the 2nd partition, I write this ext4 filesystem file generated by Buildroot: Filesystem volume name: "ROOTFS" Last mounted on: <not available> Filesystem UUID: b9833a36-e89d-429a-b120-c3b00bcb7785 Filesystem magic number: 0xEF53 Filesystem revision #: 1 (dynamic) Filesystem features: has_journal dir_index filetype extent sparse_super uninit_bg Filesystem flags: signed_directory_hash Default mount options: (none) Filesystem state: clean Errors behavior: Unknown (continue) Filesystem OS type: Linux Inode count: 3456 Block count: 91756 Reserved block count: 4587 Free blocks: 13458 Free inodes: 488 First block: 1 Block size: 1024 Fragment size: 1024 Blocks per group: 7648 Fragments per group: 7648 Inodes per group: 288 Inode blocks per group: 36 Last mount time: n/a Last write time: Tue Nov 29 09:44:52 2016 Mount count: 0 Maximum mount count: -1 Last checked: Tue Nov 29 09:44:52 2016 Check interval: 0 (<none>) Reserved blocks uid: 0 (user root) Reserved blocks gid: 0 (group root) First inode: 11 Inode size: 128 Journal inode: 8 Default directory hash: half_md4 Directory Hash Seed: a583a07f-6b59-442d-8e08-9be305f78d17 Journal backup: inode blocks This filesystem is written with the following commands: BIOS> setexpr nbblocks ${filesize} / 0x200 BIOS> setexpr nbblocks ${nbblocks} + 1 BIOS> mmc write ${loadaddr} 0x40800 ${nbblocks} MMC write: dev # 0, block # 264192, count 183513 ... 183513 blocks written: OK I can boot Linux with it without any issues, however if I try to write a file in it I get the following crash: BIOS> ext4write mmc 0:2 ${loadaddr} /boot/${kernelimg} ${filesize} File System is consistent file found, deleting update journal finished File System is consistent update journal finished data abort pc : [<8ff783ac>] lr : [<8ff86c95>] reloc pc : [<8780e3ac>] lr : [<8781cc95>] sp : 8ef696b8 ip : 00000000 fp : 8ffbc6d8 r10: 00000200 r9 : 8ef69ee8 r8 : 8ffbc744 r7 : 8ef9f600 r6 : 8ef999b6 r5 : 00000003 r4 : 8ffa35fc r3 : 8ef999b8 r2 : 00000001 r1 : fffffffe r0 : 8ef999c0 Flags: NzCv IRQs off FIQs off Mode SVC_32 Resetting CPU ... resetting ... I have investigated a bit and I found that the crash is in the ext4fs_deinit() function provoked by the free() call at line 722 (fs/ext4/ext4_write.c) and the ext4fs_deinit() is called in ext4fs_write() at line 980. If I resize the filesystem under Linux, I don't get the crash but the following error: ext4fs_devread read outside partition 4294967294 error in File System init ** Error ext4fs_write() ** ** Unable to write file /boot/opos6ul-linux.bin ** Any idea ? Regards, -- Sébastien Szymanski Software Engineer, Armadeus Systems sebastien.szymanski(a)armadeus.com Tel: +33 (0)9 72 29 41 44 Fax: +33 (0)9 72 28 79 26

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[U-Boot] [PATCH] arm: layerscape: Enable UUID & GPT partition for NXP's ARM SoC
by Prabhakar Kushwaha 23 Jan '17

23 Jan '17

Enable UUID and GPT partition support for NXP's ARM based SoCs i.e. LS1012A, LS1021A, LS1043A, LS1046A and LS2080A. Also enable DOS partition for LS1012AFRDM boards. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha(a)nxp.com> --- include/configs/ls1012afrdm.h | 5 +++++ include/configs/ls1012aqds.h | 4 ++++ include/configs/ls1012ardb.h | 4 ++++ include/configs/ls1021aiot.h | 3 +++ include/configs/ls1021aqds.h | 3 +++ include/configs/ls1021atwr.h | 3 +++ include/configs/ls1043aqds.h | 4 ++++ include/configs/ls1043ardb.h | 4 ++++ include/configs/ls1046aqds.h | 4 ++++ include/configs/ls1046ardb.h | 4 ++++ include/configs/ls2080aqds.h | 3 +++ include/configs/ls2080ardb.h | 3 +++ 12 files changed, 44 insertions(+) diff --git a/include/configs/ls1012afrdm.h b/include/configs/ls1012afrdm.h index f6f88e8..94f7460 100644 --- a/include/configs/ls1012afrdm.h +++ b/include/configs/ls1012afrdm.h @@ -42,6 +42,11 @@ #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 #endif +#define CONFIG_DOS_PARTITION +#define CONFIG_PARTITION_UUIDS +#define CONFIG_EFI_PARTITION +#define CONFIG_CMD_GPT + #define CONFIG_CMD_MEMINFO #define CONFIG_CMD_MEMTEST #define CONFIG_SYS_MEMTEST_START 0x80000000 diff --git a/include/configs/ls1012aqds.h b/include/configs/ls1012aqds.h index 0cc1791..ec4b825 100644 --- a/include/configs/ls1012aqds.h +++ b/include/configs/ls1012aqds.h @@ -154,6 +154,10 @@ #define CONFIG_SYS_SCSI_MAX_LUN 1 #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ CONFIG_SYS_SCSI_MAX_LUN) +#define CONFIG_PARTITION_UUIDS +#define CONFIG_EFI_PARTITION +#define CONFIG_CMD_GPT + #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE_LAYERSCAPE /* Use common FSL Layerscape PCIe code */ #define FSL_PCIE_COMPAT "fsl,ls1043a-pcie" diff --git a/include/configs/ls1012ardb.h b/include/configs/ls1012ardb.h index 15410dd..1e8cc45 100644 --- a/include/configs/ls1012ardb.h +++ b/include/configs/ls1012ardb.h @@ -67,6 +67,10 @@ #define CONFIG_SYS_SCSI_MAX_LUN 1 #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ CONFIG_SYS_SCSI_MAX_LUN) +#define CONFIG_PARTITION_UUIDS +#define CONFIG_EFI_PARTITION +#define CONFIG_CMD_GPT + #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE_LAYERSCAPE /* Use common FSL Layerscape PCIe code */ #define FSL_PCIE_COMPAT "fsl,ls1043a-pcie" diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h index 7af4bc4..a441022 100644 --- a/include/configs/ls1021aiot.h +++ b/include/configs/ls1021aiot.h @@ -180,6 +180,9 @@ #define CONFIG_CMD_FAT #define CONFIG_DOS_PARTITION +#define CONFIG_PARTITION_UUIDS +#define CONFIG_EFI_PARTITION +#define CONFIG_CMD_GPT /* SPI */ #if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 128da8a..86b42dd 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -398,6 +398,9 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_GENERIC_MMC #define CONFIG_DOS_PARTITION +#define CONFIG_PARTITION_UUIDS +#define CONFIG_EFI_PARTITION +#define CONFIG_CMD_GPT /* SPI */ #if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index 1458332..25bebc0 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -299,6 +299,9 @@ #define CONFIG_GENERIC_MMC #define CONFIG_DOS_PARTITION +#define CONFIG_PARTITION_UUIDS +#define CONFIG_EFI_PARTITION +#define CONFIG_CMD_GPT /* SPI */ #if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h index 561a05a..431c8f8 100644 --- a/include/configs/ls1043aqds.h +++ b/include/configs/ls1043aqds.h @@ -100,6 +100,10 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_DOS_PARTITION #define CONFIG_BOARD_LATE_INIT +#define CONFIG_PARTITION_UUIDS +#define CONFIG_EFI_PARTITION +#define CONFIG_CMD_GPT + /* EEPROM */ #define CONFIG_ID_EEPROM #define CONFIG_SYS_I2C_EEPROM_NXID diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h index 71c26bd..36df331 100644 --- a/include/configs/ls1043ardb.h +++ b/include/configs/ls1043ardb.h @@ -310,6 +310,10 @@ #define SCSI_DEV_ID 0x9170 #define CONFIG_SCSI_DEV_LIST {SCSI_VEND_ID, SCSI_DEV_ID} +#define CONFIG_PARTITION_UUIDS +#define CONFIG_EFI_PARTITION +#define CONFIG_CMD_GPT + #include <asm/fsl_secure_boot.h> #endif /* __LS1043ARDB_H__ */ diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h index 29e0aa5..3618a06 100644 --- a/include/configs/ls1046aqds.h +++ b/include/configs/ls1046aqds.h @@ -143,6 +143,10 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_DOS_PARTITION #define CONFIG_BOARD_LATE_INIT +#define CONFIG_PARTITION_UUIDS +#define CONFIG_EFI_PARTITION +#define CONFIG_CMD_GPT + /* EEPROM */ #define CONFIG_ID_EEPROM #define CONFIG_SYS_I2C_EEPROM_NXID diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h index 2fe8fc1..42597ac 100644 --- a/include/configs/ls1046ardb.h +++ b/include/configs/ls1046ardb.h @@ -225,6 +225,10 @@ #define CONFIG_SYS_SCSI_MAX_LUN 1 #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ CONFIG_SYS_SCSI_MAX_LUN) +#define CONFIG_PARTITION_UUIDS +#define CONFIG_EFI_PARTITION +#define CONFIG_CMD_GPT + #define CONFIG_BOOTCOMMAND "sf probe 0:0;sf read $kernel_load" \ "$kernel_start $kernel_size;" \ "bootm $kernel_load" diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h index 838568f..b3872b5 100644 --- a/include/configs/ls2080aqds.h +++ b/include/configs/ls2080aqds.h @@ -63,6 +63,9 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_SCSI_MAX_LUN 1 #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ CONFIG_SYS_SCSI_MAX_LUN) +#define CONFIG_PARTITION_UUIDS +#define CONFIG_EFI_PARTITION +#define CONFIG_CMD_GPT /* undefined CONFIG_FSL_DDR_SYNC_REFRESH for simulator */ diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index 31df781..9ffb48c 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -71,6 +71,9 @@ unsigned long get_board_sys_clk(void); #define CONFIG_SYS_SCSI_MAX_LUN 1 #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ CONFIG_SYS_SCSI_MAX_LUN) +#define CONFIG_PARTITION_UUIDS +#define CONFIG_EFI_PARTITION +#define CONFIG_CMD_GPT /* undefined CONFIG_FSL_DDR_SYNC_REFRESH for simulator */ -- 2.7.4

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[U-Boot] [PATCH] i2c: mux: Allow muxes to work as children of i2c bus without i2c-parent
by Moritz Fischer 23 Jan '17

23 Jan '17

For mux check if the parent is already a device of UCLASS_I2C and if yes just use that. Otherwise see if someone specified an i2c-parent phandle. This mimics the behavior found in the Kernel, as it removes the requirement to explicitly specify a i2c-parent phandle. Signed-off-by: Moritz Fischer <moritz.fischer(a)ettus.com> Cc: Heiko Schocher <hs(a)denx.de> Cc: Bin Meng <bmeng.cn(a)gmail.com> Cc: Simon Glass <sjg(a)chromium.org> Cc: Michal Simek <michal.simek(a)xilinx.com> Cc: u-boot(a)lists.denx.de --- drivers/i2c/muxes/i2c-mux-uclass.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/i2c/muxes/i2c-mux-uclass.c b/drivers/i2c/muxes/i2c-mux-uclass.c index 7a698b6..e01b773 100644 --- a/drivers/i2c/muxes/i2c-mux-uclass.c +++ b/drivers/i2c/muxes/i2c-mux-uclass.c @@ -86,6 +86,15 @@ static int i2c_mux_post_probe(struct udevice *mux) debug("%s: %s\n", __func__, mux->name); priv->selected = -1; + /* if parent is of i2c uclass already, we'll take that, otherwise + * look if we find an i2c-parent phandle */ + if (UCLASS_I2C == device_get_uclass_id(mux->parent)) { + priv->i2c_bus = dev_get_parent(mux); + debug("%s: bus=%p/%s\n", __func__, priv->i2c_bus, + priv->i2c_bus->name); + return 0; + } + ret = uclass_get_device_by_phandle(UCLASS_I2C, mux, "i2c-parent", &priv->i2c_bus); if (ret) -- 2.7.4

3 7

[U-Boot] [PATCH v6 00/13] binman: A tool for creating firmware images
by Simon Glass 21 Jan '17

21 Jan '17

This series introduces binman, a tool designed to create firmware images. It provides a way to bring together various binaries and place them in an image, at particular positions and with configurable alignment. Packaging of firmware is quite a different task from building the various parts. In many cases the various binaries which go into the image come from separate build systems. For example, ARM Trusted Firmware is used on ARMv8 devices but is not built in the U-Boot tree. If a Linux kernel is included in the firmware image, it is built elsewhere. It is of course possible to add more and more build rules to the U-Boot build system to cover these cases. It can shell out to other Makefiles and build scripts. But it seems better to create a clear divide between building software and packaging it. U-Boot supports a very large number of boards. Many of these have their own specific rules for how an image should be put together so that it boots correctly. At present these rules are described by manual instructions, different for each board. By turning these instructions into a standard format, we can support making valid images for any board without manual effort, lots of READMEs, etc. Images consist of a number of entries which are combined to make up the final image. The image is described in the device tree for the board, meaning that it can be accessed at run-time if desired. Binman is an extensible tool. A set of standard entries is provides, but new entries can be created fairly easily. Entries can be as simple as providing the name of a file to include. They can also handle more complex requirements, such as adjusting the input file or reading header information from one entry to control the position of another. U-Boot's mkimage builds FIT images and various other binaries. Binman augments this by allowing these binaries to be packed together. While FIT should be used where possible, it cannot be used everywhere. For example, many devices require executable code at a particular offset in the image. X86 machines require lots of binary blobs at particular places, and a microcode collection easily accessible at boot. So far binman has enough functionality to be useful, so sunxi and x86 boards are switched over to use it, as examples. The series is available at u-boot-dm/binman-working Future work and missing features are documented in the README. Changes in v6: - Deal with optional microcode in SPL - Drop unwanted root-node properties from tegra20-u-boot.dtsi - Use __import__() when importlib is not available Changes in v5: - Add a Makefile 'warning' line for debugging - Add a dependency on u-boot.dtb for buildman - Add a new for optional microcode - Add a new patch to drop microcode features from ifdtool - Add a new tegra patch to use an automatically included .dtsi file - Add documentation for the 'optional-ucode' property - Add documentation for this feature - Add instructions on how to generate html code coverage - Add missing 'descriptor.bin' file - Allow microcode to be optional - Allow the compiled device tree to be returned from _DoReadFileDtb() - Change the Makefile variable from binman_... to u_boot_... - Print 'binman' before all errors - Put the code to calculate dtb total length in a function - Remove commented-out PYTHONPATH code which is not needed now Changes in v4: - Add an option to bring in an soc .dtsi file also - Add new patch to support building x86 images with FSP/CMC - Fix incorrect comments at the top of intel_*.py - Remove RFC tag - Use binman for all sunxi boards - Use binman for all x86 boards Changes in v3: - Add a new patch to automatically include a U-Boot .dtsi file - Put the binman definition in u-boot.dtsi - Use a <dts>-u-boot.dtsi file for the binman changes Changes in v2: - Add automated test coverage - Add test for code coverage - Fix the -b option - Put the binman definition in a common file for x86 - Various changes and improvements based on using this tool for a while - drop the unused __len__() method Simon Glass (13): binman: Introduce binman, a tool for building binary images binman: Add basic entry types for U-Boot binman: Add support for building x86 ROMs binman: Add support for u-boot.img as an input binary binman: Add support for building x86 ROMs with SPL binman: Add support for building x86 images with FSP/CMC binman: Add a build rule for binman binman: Allow configuration options to be used in .dts files binman: Automatically include a U-Boot .dtsi file tegra: Use a U-Boot-specific .dtsi file sunxi: Use binman for sunxi boards x86: Use binman all x86 boards binman: Drop microcode features from ifdtool Makefile | 57 +- arch/arm/dts/sunxi-u-boot.dtsi | 14 + arch/arm/dts/tegra124-nyan-big-u-boot.dtsi | 15 + arch/arm/dts/tegra124-nyan-big.dts | 2 - arch/arm/dts/tegra20-u-boot.dtsi | 8 + arch/arm/dts/tegra20.dtsi | 2 - arch/x86/dts/emulation-u-boot.dtsi | 18 + arch/x86/dts/u-boot.dtsi | 62 ++ scripts/Makefile.lib | 25 +- tools/binman/.gitignore | 1 + tools/binman/README | 541 ++++++++++++++ tools/binman/binman | 1 + tools/binman/binman.py | 114 +++ tools/binman/cmdline.py | 53 ++ tools/binman/control.py | 118 +++ tools/binman/entry_test.py | 27 + tools/binman/etype/_testing.py | 26 + tools/binman/etype/blob.py | 37 + tools/binman/etype/entry.py | 200 +++++ tools/binman/etype/intel_cmc.py | 17 + tools/binman/etype/intel_descriptor.py | 55 ++ tools/binman/etype/intel_fsp.py | 17 + tools/binman/etype/intel_me.py | 17 + tools/binman/etype/intel_mrc.py | 17 + tools/binman/etype/intel_vga.py | 17 + tools/binman/etype/u_boot.py | 17 + tools/binman/etype/u_boot_dtb.py | 17 + tools/binman/etype/u_boot_dtb_with_ucode.py | 78 ++ tools/binman/etype/u_boot_img.py | 17 + tools/binman/etype/u_boot_nodtb.py | 17 + tools/binman/etype/u_boot_spl.py | 17 + tools/binman/etype/u_boot_spl_bss_pad.py | 26 + tools/binman/etype/u_boot_spl_with_ucode_ptr.py | 28 + tools/binman/etype/u_boot_ucode.py | 84 +++ tools/binman/etype/u_boot_with_ucode_ptr.py | 87 +++ tools/binman/etype/x86_start16.py | 17 + tools/binman/etype/x86_start16_spl.py | 17 + tools/binman/fdt_test.py | 48 ++ tools/binman/func_test.py | 822 +++++++++++++++++++++ tools/binman/image.py | 229 ++++++ tools/binman/test/01_invalid.dts | 5 + tools/binman/test/02_missing_node.dts | 6 + tools/binman/test/03_empty.dts | 9 + tools/binman/test/04_invalid_entry.dts | 11 + tools/binman/test/05_simple.dts | 11 + tools/binman/test/06_dual_image.dts | 22 + tools/binman/test/07_bad_align.dts | 12 + tools/binman/test/08_pack.dts | 30 + tools/binman/test/09_pack_extra.dts | 35 + tools/binman/test/10_pack_align_power2.dts | 12 + tools/binman/test/11_pack_align_size_power2.dts | 12 + tools/binman/test/12_pack_inv_align.dts | 13 + tools/binman/test/13_pack_inv_size_align.dts | 13 + tools/binman/test/14_pack_overlap.dts | 16 + tools/binman/test/15_pack_overflow.dts | 12 + tools/binman/test/16_pack_image_overflow.dts | 13 + tools/binman/test/17_pack_image_size.dts | 13 + tools/binman/test/18_pack_image_align.dts | 13 + tools/binman/test/19_pack_inv_image_align.dts | 14 + .../binman/test/20_pack_inv_image_align_power2.dts | 13 + tools/binman/test/21_image_pad.dts | 16 + tools/binman/test/22_image_name.dts | 21 + tools/binman/test/23_blob.dts | 12 + tools/binman/test/24_sorted.dts | 17 + tools/binman/test/25_pack_zero_size.dts | 15 + tools/binman/test/26_pack_u_boot_dtb.dts | 14 + tools/binman/test/27_pack_4gb_no_size.dts | 18 + tools/binman/test/28_pack_4gb_outside.dts | 19 + tools/binman/test/29_x86-rom.dts | 19 + tools/binman/test/30_x86-rom-me-no-desc.dts | 15 + tools/binman/test/31_x86-rom-me.dts | 18 + tools/binman/test/32_intel-vga.dts | 13 + tools/binman/test/33_x86-start16.dts | 13 + tools/binman/test/34_x86_ucode.dts | 29 + tools/binman/test/35_x86_single_ucode.dts | 26 + tools/binman/test/36_u_boot_img.dts | 11 + tools/binman/test/37_x86_no_ucode.dts | 20 + tools/binman/test/38_x86_ucode_missing_node.dts | 26 + tools/binman/test/39_x86_ucode_missing_node2.dts | 23 + tools/binman/test/40_x86_ucode_not_in_image.dts | 28 + tools/binman/test/41_unknown_pos_size.dts | 11 + tools/binman/test/42_intel-fsp.dts | 13 + tools/binman/test/43_intel-cmc.dts | 13 + tools/binman/test/44_x86_optional_ucode.dts | 30 + tools/binman/test/descriptor.bin | Bin 0 -> 4096 bytes tools/binman/test/u_boot_no_ucode_ptr | Bin 0 -> 4182 bytes tools/binman/test/u_boot_no_ucode_ptr.c | 15 + tools/binman/test/u_boot_ucode_ptr | Bin 0 -> 4175 bytes tools/binman/test/u_boot_ucode_ptr.c | 15 + tools/binman/test/u_boot_ucode_ptr.lds | 18 + tools/ifdtool.c | 254 +------ 91 files changed, 3709 insertions(+), 300 deletions(-) create mode 100644 arch/arm/dts/sunxi-u-boot.dtsi create mode 100644 arch/arm/dts/tegra124-nyan-big-u-boot.dtsi create mode 100644 arch/arm/dts/tegra20-u-boot.dtsi create mode 100644 arch/x86/dts/emulation-u-boot.dtsi create mode 100644 arch/x86/dts/u-boot.dtsi create mode 100644 tools/binman/.gitignore create mode 100644 tools/binman/README create mode 120000 tools/binman/binman create mode 100755 tools/binman/binman.py create mode 100644 tools/binman/cmdline.py create mode 100644 tools/binman/control.py create mode 100644 tools/binman/entry_test.py create mode 100644 tools/binman/etype/_testing.py create mode 100644 tools/binman/etype/blob.py create mode 100644 tools/binman/etype/entry.py create mode 100644 tools/binman/etype/intel_cmc.py create mode 100644 tools/binman/etype/intel_descriptor.py create mode 100644 tools/binman/etype/intel_fsp.py create mode 100644 tools/binman/etype/intel_me.py create mode 100644 tools/binman/etype/intel_mrc.py create mode 100644 tools/binman/etype/intel_vga.py create mode 100644 tools/binman/etype/u_boot.py create mode 100644 tools/binman/etype/u_boot_dtb.py create mode 100644 tools/binman/etype/u_boot_dtb_with_ucode.py create mode 100644 tools/binman/etype/u_boot_img.py create mode 100644 tools/binman/etype/u_boot_nodtb.py create mode 100644 tools/binman/etype/u_boot_spl.py create mode 100644 tools/binman/etype/u_boot_spl_bss_pad.py create mode 100644 tools/binman/etype/u_boot_spl_with_ucode_ptr.py create mode 100644 tools/binman/etype/u_boot_ucode.py create mode 100644 tools/binman/etype/u_boot_with_ucode_ptr.py create mode 100644 tools/binman/etype/x86_start16.py create mode 100644 tools/binman/etype/x86_start16_spl.py create mode 100644 tools/binman/fdt_test.py create mode 100644 tools/binman/func_test.py create mode 100644 tools/binman/image.py create mode 100644 tools/binman/test/01_invalid.dts create mode 100644 tools/binman/test/02_missing_node.dts create mode 100644 tools/binman/test/03_empty.dts create mode 100644 tools/binman/test/04_invalid_entry.dts create mode 100644 tools/binman/test/05_simple.dts create mode 100644 tools/binman/test/06_dual_image.dts create mode 100644 tools/binman/test/07_bad_align.dts create mode 100644 tools/binman/test/08_pack.dts create mode 100644 tools/binman/test/09_pack_extra.dts create mode 100644 tools/binman/test/10_pack_align_power2.dts create mode 100644 tools/binman/test/11_pack_align_size_power2.dts create mode 100644 tools/binman/test/12_pack_inv_align.dts create mode 100644 tools/binman/test/13_pack_inv_size_align.dts create mode 100644 tools/binman/test/14_pack_overlap.dts create mode 100644 tools/binman/test/15_pack_overflow.dts create mode 100644 tools/binman/test/16_pack_image_overflow.dts create mode 100644 tools/binman/test/17_pack_image_size.dts create mode 100644 tools/binman/test/18_pack_image_align.dts create mode 100644 tools/binman/test/19_pack_inv_image_align.dts create mode 100644 tools/binman/test/20_pack_inv_image_align_power2.dts create mode 100644 tools/binman/test/21_image_pad.dts create mode 100644 tools/binman/test/22_image_name.dts create mode 100644 tools/binman/test/23_blob.dts create mode 100644 tools/binman/test/24_sorted.dts create mode 100644 tools/binman/test/25_pack_zero_size.dts create mode 100644 tools/binman/test/26_pack_u_boot_dtb.dts create mode 100644 tools/binman/test/27_pack_4gb_no_size.dts create mode 100644 tools/binman/test/28_pack_4gb_outside.dts create mode 100644 tools/binman/test/29_x86-rom.dts create mode 100644 tools/binman/test/30_x86-rom-me-no-desc.dts create mode 100644 tools/binman/test/31_x86-rom-me.dts create mode 100644 tools/binman/test/32_intel-vga.dts create mode 100644 tools/binman/test/33_x86-start16.dts create mode 100644 tools/binman/test/34_x86_ucode.dts create mode 100644 tools/binman/test/35_x86_single_ucode.dts create mode 100644 tools/binman/test/36_u_boot_img.dts create mode 100644 tools/binman/test/37_x86_no_ucode.dts create mode 100644 tools/binman/test/38_x86_ucode_missing_node.dts create mode 100644 tools/binman/test/39_x86_ucode_missing_node2.dts create mode 100644 tools/binman/test/40_x86_ucode_not_in_image.dts create mode 100644 tools/binman/test/41_unknown_pos_size.dts create mode 100644 tools/binman/test/42_intel-fsp.dts create mode 100644 tools/binman/test/43_intel-cmc.dts create mode 100644 tools/binman/test/44_x86_optional_ucode.dts create mode 100644 tools/binman/test/descriptor.bin create mode 100755 tools/binman/test/u_boot_no_ucode_ptr create mode 100644 tools/binman/test/u_boot_no_ucode_ptr.c create mode 100755 tools/binman/test/u_boot_ucode_ptr create mode 100644 tools/binman/test/u_boot_ucode_ptr.c create mode 100644 tools/binman/test/u_boot_ucode_ptr.lds -- 2.8.0.rc3.226.g39d4020

5 46