December 2016 - U-Boot

[U-Boot] [PATCH 1/6] udoo_neo: Remove USDHC3 support
by Breno Lima 16 Dec '16

16 Dec '16

It's not necessary to support USDHC3 in U-Boot as it's being used for the WLAN. Signed-off-by: Breno Lima <breno.lima(a)nxp.com> --- board/udoo/neo/neo.c | 94 +++------------------------------------------- include/configs/udoo_neo.h | 1 - 2 files changed, 6 insertions(+), 89 deletions(-) diff --git a/board/udoo/neo/neo.c b/board/udoo/neo/neo.c index 7f17469..efe8605 100644 --- a/board/udoo/neo/neo.c +++ b/board/udoo/neo/neo.c @@ -81,16 +81,6 @@ static iomux_v3_cfg_t const board_recognition_pads[] = { MX6_PAD_NAND_ALE__GPIO4_IO_0 | BOARD_DETECT_PAD_CFG, }; -static iomux_v3_cfg_t const usdhc3_pads[] = { - /* Configured for WLAN */ - MX6_PAD_SD3_CLK__USDHC3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_CMD__USDHC3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DATA0__USDHC3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DATA1__USDHC3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DATA2__USDHC3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DATA3__USDHC3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), -}; - static iomux_v3_cfg_t const wdog_b_pad = { MX6_PAD_GPIO1_IO13__GPIO1_IO_13 | MUX_PAD_CTRL(WDOG_PAD_CTRL), }; @@ -171,91 +161,19 @@ static struct fsl_esdhc_cfg usdhc_cfg[2] = { int board_mmc_getcd(struct mmc *mmc) { - struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; - int ret = 0; - - switch (cfg->esdhc_base) { - case USDHC2_BASE_ADDR: - ret = !gpio_get_value(USDHC2_CD_GPIO); - break; - } - - return ret; + return !gpio_get_value(USDHC2_CD_GPIO); } int board_mmc_init(bd_t *bis) { -#ifndef CONFIG_SPL_BUILD - int i, ret; - - /* - * According to the board_mmc_init() the following map is done: - * (U-boot device node) (Physical Port) - * mmc0 USDHC2 - */ - for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) { - switch (i) { - case 0: - imx_iomux_v3_setup_multiple_pads( - usdhc2_pads, ARRAY_SIZE(usdhc2_pads)); - usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); - gpio_direction_input(USDHC2_CD_GPIO); - gpio_direction_output(USDHC2_PWR_GPIO, 1); - break; - case 1: - imx_iomux_v3_setup_multiple_pads( - usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); - usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); - break; - default: - printf("Warning: you configured more USDHC controllers\ - (%d) than supported by the board\n", i + 1); - return -EINVAL; - } - - ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]); - if (ret) { - printf("Warning:\ - failed to initialize mmc dev %d\n", i); - return ret; - } - } - - return 0; -#else - struct src *src_regs = (struct src *)SRC_BASE_ADDR; - u32 val; - u32 port; - - val = readl(&src_regs->sbmr1); - - if ((val & 0xc0) != 0x40) { - printf("Not boot from USDHC!\n"); - return -EINVAL; - } - - port = (val >> 11) & 0x3; - printf("port %d\n", port); - switch (port) { - case 1: - imx_iomux_v3_setup_multiple_pads( - usdhc2_pads, ARRAY_SIZE(usdhc2_pads)); - usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); - usdhc_cfg[0].esdhc_base = USDHC2_BASE_ADDR; - gpio_direction_input(USDHC2_CD_GPIO); - gpio_direction_output(USDHC2_PWR_GPIO, 1); - break; - case 2: - imx_iomux_v3_setup_multiple_pads( - usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); - usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); - usdhc_cfg[1].esdhc_base = USDHC3_BASE_ADDR; - break; - } + imx_iomux_v3_setup_multiple_pads(usdhc2_pads, ARRAY_SIZE(usdhc2_pads)); + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); + usdhc_cfg[0].esdhc_base = USDHC2_BASE_ADDR; + gpio_direction_input(USDHC2_CD_GPIO); + gpio_direction_output(USDHC2_PWR_GPIO, 1); gd->arch.sdhc_clk = usdhc_cfg[0].sdhc_clk; return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); -#endif } char *board_string(void) diff --git a/include/configs/udoo_neo.h b/include/configs/udoo_neo.h index 81e0481..cf75186 100644 --- a/include/configs/udoo_neo.h +++ b/include/configs/udoo_neo.h @@ -27,7 +27,6 @@ /* Command definition */ #define CONFIG_MXC_UART_BASE UART1_BASE -#define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_MMC_ENV_DEV 0 /*USDHC2*/ /* Linux only */ -- 2.7.4

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[U-Boot] [PATCH 0/2] arm: imx: add boards apalis imx6, colibri imx6
by Max Krummenacher 16 Dec '16

16 Dec '16

This series adds support for the Toradex Apalis iMX6 and Colibri iMX6 computer on modules. Tha Apalis iMX6 requires the following patch currently in the u-boot-imx maintainer tree: http://git.denx.de/?p=u-boot/u-boot-imx.git;a=commit;h=15fde0fc11f93f19f40c… The whole series is also available here: http://git.toradex.com/cgit/u-boot-toradex.git/log/?h=for-next Max Krummenacher (2): arm: imx: initial support for apalis imx6 arm: imx: initial support for colibri imx6 arch/arm/cpu/armv7/mx6/Kconfig | 16 + board/toradex/apalis_imx6/1066mhz_4x128mx16.cfg | 48 + board/toradex/apalis_imx6/1066mhz_4x256mx16.cfg | 48 + board/toradex/apalis_imx6/Kconfig | 55 + board/toradex/apalis_imx6/MAINTAINERS | 9 + board/toradex/apalis_imx6/Makefile | 5 + board/toradex/apalis_imx6/apalis_imx6.c | 1292 +++++++++++++++++++++++ board/toradex/apalis_imx6/apalis_imx6q.cfg | 34 + board/toradex/apalis_imx6/clocks.cfg | 42 + board/toradex/apalis_imx6/ddr-setup.cfg | 97 ++ board/toradex/apalis_imx6/do_fuse.c | 98 ++ board/toradex/apalis_imx6/pf0100.c | 228 ++++ board/toradex/apalis_imx6/pf0100.h | 56 + board/toradex/apalis_imx6/pf0100_otp.inc | 191 ++++ board/toradex/colibri_imx6/800mhz_2x64mx16.cfg | 59 ++ board/toradex/colibri_imx6/800mhz_4x64mx16.cfg | 59 ++ board/toradex/colibri_imx6/Kconfig | 44 + board/toradex/colibri_imx6/MAINTAINERS | 8 + board/toradex/colibri_imx6/Makefile | 5 + board/toradex/colibri_imx6/clocks.cfg | 42 + board/toradex/colibri_imx6/colibri_imx6.c | 1130 ++++++++++++++++++++ board/toradex/colibri_imx6/colibri_imx6.cfg | 38 + board/toradex/colibri_imx6/ddr-setup.cfg | 98 ++ board/toradex/colibri_imx6/do_fuse.c | 98 ++ board/toradex/colibri_imx6/pf0100.c | 211 ++++ board/toradex/colibri_imx6/pf0100.h | 56 + board/toradex/colibri_imx6/pf0100_otp.inc | 189 ++++ configs/apalis_imx6_defconfig | 52 + configs/apalis_imx6_nospl_com_defconfig | 42 + configs/apalis_imx6_nospl_it_defconfig | 44 + configs/colibri_imx6_defconfig | 50 + configs/colibri_imx6_nospl_defconfig | 44 + include/configs/apalis_imx6.h | 342 ++++++ include/configs/colibri_imx6.h | 310 ++++++ 34 files changed, 5140 insertions(+) create mode 100644 board/toradex/apalis_imx6/1066mhz_4x128mx16.cfg create mode 100644 board/toradex/apalis_imx6/1066mhz_4x256mx16.cfg create mode 100644 board/toradex/apalis_imx6/Kconfig create mode 100644 board/toradex/apalis_imx6/MAINTAINERS create mode 100644 board/toradex/apalis_imx6/Makefile create mode 100644 board/toradex/apalis_imx6/apalis_imx6.c create mode 100644 board/toradex/apalis_imx6/apalis_imx6q.cfg create mode 100644 board/toradex/apalis_imx6/clocks.cfg create mode 100644 board/toradex/apalis_imx6/ddr-setup.cfg create mode 100644 board/toradex/apalis_imx6/do_fuse.c create mode 100644 board/toradex/apalis_imx6/pf0100.c create mode 100644 board/toradex/apalis_imx6/pf0100.h create mode 100644 board/toradex/apalis_imx6/pf0100_otp.inc create mode 100644 board/toradex/colibri_imx6/800mhz_2x64mx16.cfg create mode 100644 board/toradex/colibri_imx6/800mhz_4x64mx16.cfg create mode 100644 board/toradex/colibri_imx6/Kconfig create mode 100644 board/toradex/colibri_imx6/MAINTAINERS create mode 100644 board/toradex/colibri_imx6/Makefile create mode 100644 board/toradex/colibri_imx6/clocks.cfg create mode 100644 board/toradex/colibri_imx6/colibri_imx6.c create mode 100644 board/toradex/colibri_imx6/colibri_imx6.cfg create mode 100644 board/toradex/colibri_imx6/ddr-setup.cfg create mode 100644 board/toradex/colibri_imx6/do_fuse.c create mode 100644 board/toradex/colibri_imx6/pf0100.c create mode 100644 board/toradex/colibri_imx6/pf0100.h create mode 100644 board/toradex/colibri_imx6/pf0100_otp.inc create mode 100644 configs/apalis_imx6_defconfig create mode 100644 configs/apalis_imx6_nospl_com_defconfig create mode 100644 configs/apalis_imx6_nospl_it_defconfig create mode 100644 configs/colibri_imx6_defconfig create mode 100644 configs/colibri_imx6_nospl_defconfig create mode 100644 include/configs/apalis_imx6.h create mode 100644 include/configs/colibri_imx6.h -- 2.7.4

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[U-Boot] [PATCH] fpga: zynqmp: Remove empty functions
by Michal Simek 16 Dec '16

16 Dec '16

Xilinx core files will take care about it. There is no need to have these functions because they do nothing. Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- drivers/fpga/zynqpl.c | 6 ------ 1 file changed, 6 deletions(-) diff --git a/drivers/fpga/zynqpl.c b/drivers/fpga/zynqpl.c index 2b0318797e33..2ff716c25228 100644 --- a/drivers/fpga/zynqpl.c +++ b/drivers/fpga/zynqpl.c @@ -38,11 +38,6 @@ #define CONFIG_SYS_FPGA_PROG_TIME (CONFIG_SYS_HZ * 4) /* 4 s */ #endif -static int zynq_info(xilinx_desc *desc) -{ - return FPGA_SUCCESS; -} - #define DUMMY_WORD 0xffffffff /* Xilinx binary format header */ @@ -486,5 +481,4 @@ struct xilinx_fpga_op zynq_op = { #if defined(CONFIG_CMD_FPGA_LOADFS) .loadfs = zynq_loadfs, #endif - .info = zynq_info, }; -- 1.9.1

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[U-Boot] [PATCH v2 0/6] cleanup and enhancements for Colibri VFxx
by Stefan Agner 16 Dec '16

16 Dec '16

From: Stefan Agner <stefan.agner(a)toradex.com> This patchset cleans up the board file, speeds up NAND slightly and enhances the board support with device tree MTD partition support. It also fixes a bug in the new Toradex config block code. Not sure through which tree that should go, especially since patch 1 and 2 touches common code... Tom? -- Stefan Changes in v2: - Rebased ontop of master (after config block support merged) - Add patch which uses proper config to guard g_dnl_bind_fixup - Add patch to fix device tree warning Stefan Agner (6): toradex: fix USB Download gadget fixup callback toradex: allow custom fdt board setup in board file colibri_vf: use device-tree for MTD partitions colibri_vf: cleanup USB clock initialization colibri_vf: use same NAND clock as Linux uses ARM: dts: vf: Fix warning about missing reg property arch/arm/dts/vf.dtsi | 2 ++ board/toradex/apalis_t30/apalis_t30.c | 8 ++++++ board/toradex/colibri_imx7/colibri_imx7.c | 8 ++++++ board/toradex/colibri_pxa270/colibri_pxa270.c | 8 ++++++ board/toradex/colibri_t20/colibri_t20.c | 8 ++++++ board/toradex/colibri_t30/colibri_t30.c | 8 ++++++ board/toradex/colibri_vf/colibri_vf.c | 37 +++++++++++++++++++++++---- board/toradex/common/tdx-common.c | 12 ++++----- board/toradex/common/tdx-common.h | 2 ++ 9 files changed, 81 insertions(+), 12 deletions(-) -- 2.10.2

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[U-Boot] [PATCH 1/2] ARM64: zynqmp: Increase environment size to 32K
by Michal Simek 16 Dec '16

16 Dec '16

From: Siva Durga Prasad Paladugu <siva.durga.paladugu(a)xilinx.com> Increase environment size to 32K as the current default environment itself is greater than 4K. Signed-off-by: Siva Durga Prasad Paladugu <sivadur(a)xilinx.com> Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- include/configs/xilinx_zynqmp.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index fb4f6d680672..3a990a057eb9 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -135,7 +135,7 @@ /* Do not preserve environment */ #define CONFIG_ENV_IS_NOWHERE 1 -#define CONFIG_ENV_SIZE 0x1000 +#define CONFIG_ENV_SIZE 0x8000 /* Monitor Command Prompt */ /* Console I/O Buffer Size */ -- 1.9.1

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[U-Boot] [PATCH v2] armv8: fsl-lsch2: enable snoopable usb read and write
by Changming Huang 16 Dec '16

16 Dec '16

By default the USB IP on the ls1012a/ls1043a/ls1046a SoCs does not generat coherent/snoopable transactions. Here enable it in the SCFG_SNPCNFGCR register. In addition, the dma-coherent property must be set in USB DTS nodes. Signed-off-by: Changming Huang <jerry.huang(a)nxp.com> --- Changes in v2: - fix one comment that is not only for SEC arch/arm/cpu/armv8/fsl-layerscape/soc.c | 15 +++++++++++++-- .../include/asm/arch-fsl-layerscape/immap_lsch2.h | 6 ++++++ 2 files changed, 19 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c index 2f54625..c1dbe53 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c @@ -340,6 +340,7 @@ void fsl_lsch2_early_init_f(void) { struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR; struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR; + u32 snp_usb; #ifdef CONFIG_LAYERSCAPE_NS_ACCESS enable_layerscape_ns_access(); @@ -352,11 +353,21 @@ void fsl_lsch2_early_init_f(void) #if defined(CONFIG_FSL_QSPI) && !defined(CONFIG_QSPI_BOOT) out_be32(&scfg->qspi_cfg, SCFG_QSPI_CLKSEL); #endif - /* Make SEC reads and writes snoopable */ + + snp_usb = SCFG_SNPCNFGCR_USB1RDSNP | SCFG_SNPCNFGCR_USB1WRSNP; +#if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A) + snp_usb |= SCFG_SNPCNFGCR_USB2WRSNP | + SCFG_SNPCNFGCR_USB2RDSNP | + SCFG_SNPCNFGCR_USB3WRSNP | + SCFG_SNPCNFGCR_USB3RDSNP; +#endif + + /* Enable some IP's reads and writes snoopable */ setbits_be32(&scfg->snpcnfgcr, SCFG_SNPCNFGCR_SECRDSNP | SCFG_SNPCNFGCR_SECWRSNP | SCFG_SNPCNFGCR_SATARDSNP | - SCFG_SNPCNFGCR_SATAWRSNP); + SCFG_SNPCNFGCR_SATAWRSNP | + snp_usb); /* * Enable snoop requests and DVM message requests for diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h index b3cfd89..b82db03 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h @@ -340,6 +340,12 @@ struct ccsr_gur { #define SCFG_SNPCNFGCR_SECWRSNP 0x40000000 #define SCFG_SNPCNFGCR_SATARDSNP 0x00800000 #define SCFG_SNPCNFGCR_SATAWRSNP 0x00400000 +#define SCFG_SNPCNFGCR_USB1RDSNP 0x00200000 +#define SCFG_SNPCNFGCR_USB1WRSNP 0x00100000 +#define SCFG_SNPCNFGCR_USB2WRSNP 0x00010000 +#define SCFG_SNPCNFGCR_USB2RDSNP 0x00008000 +#define SCFG_SNPCNFGCR_USB3WRSNP 0x00004000 +#define SCFG_SNPCNFGCR_USB3RDSNP 0x00002000 /* Supplemental Configuration Unit */ struct ccsr_scfg { -- 1.7.9.5

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[U-Boot] [PATCH 1/2] microblaze: Remove hardcoded IP address from config
by Michal Simek 16 Dec '16

16 Dec '16

IP addresses shouldn't be hardcoded in board config. This patch removes them. Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- include/configs/microblaze-generic.h | 3 --- 1 file changed, 3 deletions(-) diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index 7abffdb2ef08..6b380f005ecc 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -235,9 +235,6 @@ #define CONFIG_BOOTARGS "root=romfs" #define CONFIG_HOSTNAME XILINX_BOARD_NAME #define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" -#define CONFIG_IPADDR 192.168.0.3 -#define CONFIG_SERVERIP 192.168.0.5 -#define CONFIG_GATEWAYIP 192.168.0.1 /* architecture dependent code */ #define CONFIG_SYS_USR_EXCEP /* user exception */ -- 1.9.1

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[U-Boot] [PATCH] microblaze: Make the board configuration name user definable
by Michal Simek 16 Dec '16

16 Dec '16

From: Sai Pavan Boddu <sai.pavan.boddu(a)xilinx.com> Add a prompt for editing in menuconfig Signed-off-by: Sai Pavan Boddu <saipava(a)xilinx.com> Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- board/xilinx/microblaze-generic/Kconfig | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/board/xilinx/microblaze-generic/Kconfig b/board/xilinx/microblaze-generic/Kconfig index 02ac65c1d3d5..6e93a3d948d4 100644 --- a/board/xilinx/microblaze-generic/Kconfig +++ b/board/xilinx/microblaze-generic/Kconfig @@ -7,7 +7,12 @@ config SYS_VENDOR default "xilinx" config SYS_CONFIG_NAME + string "Board configuration name" default "microblaze-generic" + help + This option contains information about board configuration name. + Based on this option include/configs/<CONFIG_SYS_CONFIG_NAME>.h header + will be used for board configuration. config XILINX_MICROBLAZE0_USE_MSR_INSTR int "USE_MSR_INSTR range (0:1)" -- 1.9.1

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[U-Boot] [PATCH] Makefile: Fix linking with modern binutils
by Joel Stanley 16 Dec '16

16 Dec '16

Since Binutils 1a9ccd70f9a7[1] u-boot will not link targets that set CONFIG_SYS_TEXT_BASE=0 with the following error: LD u-boot arm-linux-gnueabi-ld.bfd: u-boot: Not enough room for program headers, try linking with -N arm-linux-gnueabi-ld.bfd: final link failed: Bad value The issue can reproduced the bad binutils and the rock2_defconfig target. This issue was also encountered by the powerpc kernel[2], with the fix being to pass --no-dynamic-linker for linkers newer than 2.26 when this flag was introduced. While version 2.26 and 2.27 will not show this error, we are technically creating invalid ELF files without this option. Ubuntu Zesty's Binutils 2.27.51.20161202 hits this error. [1] https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=commit;h=1a9ccd7… [2] https://git.kernel.org/cgit/linux/kernel/git/powerpc/linux.git/commit/?h=ne… Signed-off-by: Joel Stanley <joel(a)jms.id.au> --- Makefile | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/Makefile b/Makefile index dfed58bec661..0bfd57d81646 100644 --- a/Makefile +++ b/Makefile @@ -792,7 +792,11 @@ ifneq ($(CONFIG_BUILD_TARGET),) ALL-y += $(CONFIG_BUILD_TARGET:"%"=%) endif -LDFLAGS_u-boot += $(LDFLAGS_FINAL) +# Avoid Not enough room for program headers on binutils 2.28 onwards. +# Flag was introduced in 2.26 +LDFLAGS_u-boot += $(LDFLAGS_FINAL) \ + $(call ld-ifversion, -ge, 22600000, --no-dynamic-linker) + ifneq ($(CONFIG_SYS_TEXT_BASE),) LDFLAGS_u-boot += -Ttext $(CONFIG_SYS_TEXT_BASE) endif -- 2.11.0

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[U-Boot] [PATCH] armv8: fsl-lsch2: enable snoopable usb read and write
by Changming Huang 15 Dec '16

15 Dec '16

By default the USB IP on the ls1012a/ls1043a/ls1046a SoCs does not generat coherent/snoopable transactions. Here enable it in the SCFG_SNPCNFGCR register. In addition, the dma-coherent property must be set in USB DTS nodes. Signed-off-by: Changming Huang <jerry.huang(a)nxp.com> --- arch/arm/cpu/armv8/fsl-layerscape/soc.c | 13 ++++++++++++- .../include/asm/arch-fsl-layerscape/immap_lsch2.h | 6 ++++++ 2 files changed, 18 insertions(+), 1 deletion(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c index 2f54625..74eb8a1 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c @@ -340,6 +340,7 @@ void fsl_lsch2_early_init_f(void) { struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR; struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR; + u32 snp_usb; #ifdef CONFIG_LAYERSCAPE_NS_ACCESS enable_layerscape_ns_access(); @@ -352,11 +353,21 @@ void fsl_lsch2_early_init_f(void) #if defined(CONFIG_FSL_QSPI) && !defined(CONFIG_QSPI_BOOT) out_be32(&scfg->qspi_cfg, SCFG_QSPI_CLKSEL); #endif + + snp_usb = SCFG_SNPCNFGCR_USB1RDSNP | SCFG_SNPCNFGCR_USB1WRSNP; +#if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A) + snp_usb |= SCFG_SNPCNFGCR_USB2WRSNP | + SCFG_SNPCNFGCR_USB2RDSNP | + SCFG_SNPCNFGCR_USB3WRSNP | + SCFG_SNPCNFGCR_USB3RDSNP; +#endif + /* Make SEC reads and writes snoopable */ setbits_be32(&scfg->snpcnfgcr, SCFG_SNPCNFGCR_SECRDSNP | SCFG_SNPCNFGCR_SECWRSNP | SCFG_SNPCNFGCR_SATARDSNP | - SCFG_SNPCNFGCR_SATAWRSNP); + SCFG_SNPCNFGCR_SATAWRSNP | + snp_usb); /* * Enable snoop requests and DVM message requests for diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h index b3cfd89..b82db03 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h @@ -340,6 +340,12 @@ struct ccsr_gur { #define SCFG_SNPCNFGCR_SECWRSNP 0x40000000 #define SCFG_SNPCNFGCR_SATARDSNP 0x00800000 #define SCFG_SNPCNFGCR_SATAWRSNP 0x00400000 +#define SCFG_SNPCNFGCR_USB1RDSNP 0x00200000 +#define SCFG_SNPCNFGCR_USB1WRSNP 0x00100000 +#define SCFG_SNPCNFGCR_USB2WRSNP 0x00010000 +#define SCFG_SNPCNFGCR_USB2RDSNP 0x00008000 +#define SCFG_SNPCNFGCR_USB3WRSNP 0x00004000 +#define SCFG_SNPCNFGCR_USB3RDSNP 0x00002000 /* Supplemental Configuration Unit */ struct ccsr_scfg { -- 1.7.9.5

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