November 2016 - U-Boot

[U-Boot] [PATCH] armv8/spin_table.c: fix spin table release address
by Tsung-Han Lin 26 Nov '16

26 Nov '16

Since only the master core will relocate itself, the spin-table release address seen by master core and other slave cores is different. This commit fixes this issue by recalculating the spin-table release address' offset instead of leaving it to compiler. Signed-off-by: Tsung-Han Lin <tsunghan.tw(a)gmail.com> --- arch/arm/cpu/armv8/spin_table.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/arm/cpu/armv8/spin_table.c b/arch/arm/cpu/armv8/spin_table.c index ec1c9b8ddb6f..1169e2df5f47 100644 --- a/arch/arm/cpu/armv8/spin_table.c +++ b/arch/arm/cpu/armv8/spin_table.c @@ -11,12 +11,16 @@ int spin_table_update_dt(void *fdt) { + extern unsigned long _start; int cpus_offset, offset; const char *prop; int ret; unsigned long rsv_addr = (unsigned long)&spin_table_reserve_begin; unsigned long rsv_size = &spin_table_reserve_end - &spin_table_reserve_begin; + unsigned long unreloc_spin_release_addr = CONFIG_SYS_TEXT_BASE + + (unsigned long)&spin_table_cpu_release_addr - + (unsigned long)&_start; cpus_offset = fdt_path_offset(fdt, "/cpus"); if (cpus_offset < 0) @@ -47,7 +51,7 @@ int spin_table_update_dt(void *fdt) continue; ret = fdt_setprop_u64(fdt, offset, "cpu-release-addr", - (unsigned long)&spin_table_cpu_release_addr); + unreloc_spin_release_addr); if (ret) return -ENOSPC; } -- 2.7.4

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[U-Boot] [Pull request v2]: u-boot-spi/sunxi
by Jagan Teki 25 Nov '16

25 Nov '16

Hi Tom, These are the pending patches, from u-boot-sunxi/next. Will send sunxi PR on top of u-boot-sunxi repo once I get the access, meanwhile please take this PR. Hans, Let me know if I miss any patches from next. Changes for v2: - Dropped 3 patches, which are still in review. thanks! Jagan. The following changes since commit fc127d184aea293ec415dd66e3282dba0b66c5f3: colibri_pxa270: drop edit, elf, fpga, hush, regex et al. for space reason (2016-11-23 13:53:20 +0100) are available in the git repository at: git://git.denx.de/u-boot-spi.git sunxi for you to fetch changes up to 2e34089969b9443b969c3b209b73799df4451eb1: mtd: nand: add support for the TC58NVG2S0H chip (2016-11-25 00:23:25 +0530) ---------------------------------------------------------------- Boris Brezillon (1): mtd: nand: add support for the TC58NVG2S0H chip Chen-Yu Tsai (9): ARM: PSCI: Set ARMV7_PSCI_NR_CPUS default to 8 for sun9i/A80 sunxi: Add CCI-400 and CPUCFG registers base address for sun9i/A80 sunxi: Add base address of secure SRAM B for sun9i/A80 sunxi: Use secure SRAM B for secure RAM for sun9i/A80 sunxi: Add PRCM register definition for sun9i/A80 sunxi: Add CPUCFG register definitions for sun9i/A80 sunxi: Add support for TZPC on sun9i/A80 sunxi: Add basic PSCI implementation for A80 sunxi: Enable PSCI on sun9i/A80 Emmanuel Vadot (1): sunxi: mmc: Set CONFIG_SYS_MMC_MAX_DEVICE Hans de Goede (1): sunxi: Mele_M5_defconfig: Drop non existing STATUSLED setting Jelle van der Waa (1): sunxi: Use the available Kconfig option for AHCI Marcel Ziswiler (1): colibri_pxa270: transition to driver model for serial Yann E. MORIN (1): arm: sunxi: do not force USB for arch-sunxi arch/arm/Kconfig | 10 +- arch/arm/cpu/armv7/Kconfig | 1 + arch/arm/cpu/armv7/sunxi/Makefile | 5 + arch/arm/cpu/armv7/sunxi/psci-mcpm.c | 234 +++++++++++++++++++++++++ arch/arm/cpu/armv7/sunxi/tzpc.c | 6 + arch/arm/include/asm/arch-sunxi/cpu_sun9i.h | 5 + arch/arm/include/asm/arch-sunxi/cpucfg_sun9i.h | 51 ++++++ arch/arm/include/asm/arch-sunxi/prcm_sun9i.h | 55 ++++++ arch/arm/include/asm/arch-sunxi/tzpc.h | 4 + arch/arm/mach-sunxi/board.c | 3 +- board/sunxi/Kconfig | 4 + board/toradex/colibri_pxa270/colibri_pxa270.c | 18 +- configs/A10-OLinuXino-Lime_defconfig | 3 +- configs/A20-OLinuXino-Lime2_defconfig | 3 +- configs/A20-OLinuXino-Lime_defconfig | 3 +- configs/A20-OLinuXino_MICRO_defconfig | 3 +- configs/A20-Olimex-SOM-EVB_defconfig | 3 +- configs/Bananapi_defconfig | 3 +- configs/Bananapro_defconfig | 3 +- configs/Cubieboard2_defconfig | 3 +- configs/Cubieboard_defconfig | 3 +- configs/Cubietruck_defconfig | 3 +- configs/Itead_Ibox_A20_defconfig | 3 +- configs/Lamobo_R1_defconfig | 3 +- configs/Linksprite_pcDuino3_Nano_defconfig | 3 +- configs/Linksprite_pcDuino3_defconfig | 3 +- configs/Marsboard_A10_defconfig | 3 +- configs/Mele_A1000_defconfig | 3 +- configs/Mele_M5_defconfig | 3 +- configs/Orangepi_defconfig | 3 +- configs/Orangepi_mini_defconfig | 3 +- configs/Wits_Pro_A20_DKT_defconfig | 3 +- configs/colibri_pxa270_defconfig | 2 + drivers/mtd/nand/nand_ids.c | 3 + include/configs/colibri_pxa270.h | 2 - include/configs/sun9i.h | 4 + include/configs/sunxi-common.h | 1 + scripts/config_whitelist.txt | 1 - 38 files changed, 438 insertions(+), 31 deletions(-) create mode 100644 arch/arm/cpu/armv7/sunxi/psci-mcpm.c create mode 100644 arch/arm/include/asm/arch-sunxi/cpucfg_sun9i.h create mode 100644 arch/arm/include/asm/arch-sunxi/prcm_sun9i.h

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[U-Boot] [PATCH 0/4] enable the host controller for rk3036
by Kever Yang 25 Nov '16

25 Nov '16

To enable usb host function, you need: - enable the host port power, usually controled by a gpio named vbus_drv; - enable the controller driver like dwc2; - enable the usb framework like CONFIG_CMD_USB and CONFIG_USB; - enable the usb function like storage or ether; Kever Yang (4): config: rk3036: enable configs for USB HOST config: rk3036: enable fix regulator dts: arm: rk3036: add usb vbus node rk3036: enable the vbus regulator when borad_init arch/arm/dts/rk3036-sdk.dts | 37 +++++++++++++++++++++++++++++++---- arch/arm/mach-rockchip/rk3036-board.c | 20 +++++++++++++++++++ configs/kylin-rk3036_defconfig | 4 ++++ include/configs/rk3036_common.h | 7 +++++++ 4 files changed, 64 insertions(+), 4 deletions(-) -- 1.9.1

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[U-Boot] [PATCH] config: evb-rk3399: enable PWM_ROCKCHIP
by Kever Yang 25 Nov '16

25 Nov '16

PWM_ROCKCHIP need to enable for PWM regulator, this config is missing during rebase and new patch set in previous submission. Signed-off-by: Kever Yang <kever.yang(a)rock-chips.com> --- configs/evb-rk3399_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig index e3edeb7..40a8295 100644 --- a/configs/evb-rk3399_defconfig +++ b/configs/evb-rk3399_defconfig @@ -24,6 +24,7 @@ CONFIG_ROCKCHIP_DWMMC=y CONFIG_ROCKCHIP_SDHCI=y CONFIG_PINCTRL=y CONFIG_ROCKCHIP_RK3399_PINCTRL=y +CONFIG_PWM_ROCKCHIP=y CONFIG_REGULATOR_PWM=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_RAM=y -- 1.9.1

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[U-Boot] [PATCH] evb-rk3399: deduced the dram node size when space reserved
by Kever Yang 25 Nov '16

25 Nov '16

The size dram node need to be deduced by the same amount of reserved space. Signed-off-by: Kever Yang <kever.yang(a)rock-chips.com> --- board/rockchip/evb_rk3399/evb-rk3399.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/rockchip/evb_rk3399/evb-rk3399.c b/board/rockchip/evb_rk3399/evb-rk3399.c index c6e6cd3..c437f1b 100644 --- a/board/rockchip/evb_rk3399/evb-rk3399.c +++ b/board/rockchip/evb_rk3399/evb-rk3399.c @@ -71,5 +71,5 @@ void dram_init_banksize(void) { /* Reserve 0x200000 for ATF bl31 */ gd->bd->bi_dram[0].start = 0x200000; - gd->bd->bi_dram[0].size = 0x80000000; + gd->bd->bi_dram[0].size = 0x7e000000; } -- 1.9.1

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[U-Boot] [PATCH] arm: rockchip: Fix typo in ROCKCHIP_RK3288 help
by Andreas Färber 25 Nov '16

25 Nov '16

UART,s -> UARTs, to avoid this spreading via copy&paste. Signed-off-by: Andreas Färber <afaerber(a)suse.de> --- arch/arm/mach-rockchip/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 1aac3c8..ffd281c 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -21,7 +21,7 @@ config ROCKCHIP_RK3288 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two video interfaces supporting HDMI and eDP, several DDR3 options and video codec support. Peripherals include Gigabit Ethernet, - USB2 host and OTG, SDIO, I2S, UART,s, SPI, I2C and PWMs. + USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. config ROCKCHIP_RK3399 bool "Support Rockchip RK3399" -- 2.6.6

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[U-Boot] [PATCH] arm: dts: Fix Rockchip sort order
by Andreas Färber 25 Nov '16

25 Nov '16

Sort rk3036 before rk3288. Signed-off-by: Andreas Färber <afaerber(a)suse.de> --- arch/arm/dts/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 756535b..7f6545e 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -28,6 +28,7 @@ dtb-$(CONFIG_EXYNOS5) += exynos5250-arndale.dtb \ exynos5422-odroidxu3.dtb dtb-$(CONFIG_EXYNOS7420) += exynos7420-espresso7420.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += \ + rk3036-sdk.dtb \ rk3288-firefly.dtb \ rk3288-jerry.dtb \ rk3288-rock2-square.dtb \ @@ -35,7 +36,6 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \ rk3288-fennec.dtb \ rk3288-miniarm.dtb \ rk3288-popmetal.dtb \ - rk3036-sdk.dtb \ rk3399-evb.dtb dtb-$(CONFIG_ARCH_MESON) += \ meson-gxbb-odroidc2.dtb -- 2.6.6

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[U-Boot] [PATCH 1/3] power: regulator: Introduce regulator_set_value_force function
by Keerthy 25 Nov '16

25 Nov '16

In case we want to force a particular value on a regulator irrespective of the min/max constraints for testing purposes one can call regulator_set_value_force function. Signed-off-by: Keerthy <j-keerthy(a)ti.com> --- cmd/regulator.c | 5 ++++- drivers/power/regulator/regulator-uclass.c | 14 ++++++++++++++ include/power/regulator.h | 10 ++++++++++ 3 files changed, 28 insertions(+), 1 deletion(-) diff --git a/cmd/regulator.c b/cmd/regulator.c index bfea6e0..2ef5bc9 100644 --- a/cmd/regulator.c +++ b/cmd/regulator.c @@ -292,7 +292,10 @@ static int do_value(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) return CMD_RET_FAILURE; } - ret = regulator_set_value(dev, value); + if (!force) + ret = regulator_set_value(dev, value); + else + ret = regulator_set_value_force(dev, value); if (ret) { printf("Regulator: %s - can't set the Voltage!\n", uc_pdata->name); diff --git a/drivers/power/regulator/regulator-uclass.c b/drivers/power/regulator/regulator-uclass.c index 4434e36..d644009 100644 --- a/drivers/power/regulator/regulator-uclass.c +++ b/drivers/power/regulator/regulator-uclass.c @@ -48,6 +48,20 @@ int regulator_set_value(struct udevice *dev, int uV) return ops->set_value(dev, uV); } +/* + * To be called with at most caution as there is no check + * before setting the actual voltage value. + */ +int regulator_set_value_force(struct udevice *dev, int uV) +{ + const struct dm_regulator_ops *ops = dev_get_driver_ops(dev); + + if (!ops || !ops->set_value) + return -ENOSYS; + + return ops->set_value(dev, uV); +} + int regulator_get_current(struct udevice *dev) { const struct dm_regulator_ops *ops = dev_get_driver_ops(dev); diff --git a/include/power/regulator.h b/include/power/regulator.h index f47ab67..1a8e575 100644 --- a/include/power/regulator.h +++ b/include/power/regulator.h @@ -261,6 +261,16 @@ int regulator_get_value(struct udevice *dev); int regulator_set_value(struct udevice *dev, int uV); /** + * regulator_set_value_force: set the microvoltage value of a given regulator + * without any min-,max condition check + * + * @dev - pointer to the regulator device + * @uV - the output value to set [micro Volts] + * @return - 0 on success or -errno val if fails + */ +int regulator_set_value_force(struct udevice *dev, int uV); + +/** * regulator_get_current: get microampere value of a given regulator * * @dev - pointer to the regulator device -- 1.9.1

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[U-Boot] [PATCH 00/82] x86: Add initial support for 64-bit U-Boot
by Simon Glass 25 Nov '16

25 Nov '16

At present U-Boot runs entirely in 32-bit mode on x86, except for the initial switch from 16-bit mode. On 64-bit machines it is possible to run in 64-bit mode. This series starts the process of adding this support. The main benefit of 64-bit mode for a boot loader is direct access to all available memory. There are also more registers, but this makes very little difference. This feature is implemented by putting all of the 32-bit code in an SPL build. SPL then runs through all the init that has to be done in 32-bit mode, changes to 64-bit mode and then jumps to U-Boot proper. Typically the total code size increases slightly. For example, on link in 32-bit mode, U-Boot has around 480KB of code (admittedly with a large number of features enabled). In 64-bit mode, U-Boot falls to around 460KB, but SPL adds another 60KB, for a net increase of 40KB. Partly this is due to code duplication and partly it is due to the worse code density of 64-bit code on x86. Many major features are not implemented yet, for example: - SDRAM sizing - Booting linux - FSP support - EFI support - SCSI device init - Running video ROMs Still, this is a big step forward towards full 64-bit support. To enable it, select CONFIG_X86_RUN_64BIT. This series is available at u-boot-x86/64-working Simon Glass (82): WIP: x86: Fix up types in smbios code Add _image_binary_end section declaration bios_emulator: Fix cast for 64-bit compilation board_f: Drop the extra fdtdec_prepare_fdt() console: Don't enable CONFIG-CONSOLE_MUX, etc. in SPL elf: Add the Elf64_Rela type mmc: Fix cast for 64-bit compilation rtc: Use CONFIG_X86 instead of __I386__ spl: spi: Add a debug message if loading fails spl: Makefile: Define SPL_ earlier spl: Allow CPU drivers to be used in SPL spl: Allow PCI drivers to be used in SPL spl: Allow RTC drivers to be used in SPL spl: Allow timer drivers to be used in SPL spl: Allow PCH drivers to be used in SPL spl: Don't create a BSS padding when it is separate tpm: Tidy up use of size_t usb: pci: Fix cast for 64-bit compilation video: Use ulong for video frame buffer address x86: Allow interrupts to be disabled in 64-bit mode x86: Correct address casts in cpu code x86: Correct address casts in interrupt code x86: Use unsigned long for address in table generation WIP: x86: Update mpspec to build on 64-bit machines x86: Add basic support for U-Boot as a 64-bit EFI application x86: ivybridge: Declare global data where it is used x86: i2c: Fix cast of address to 32-bit value x86: Don't export interrupt handlers with x86_64 x86: ivybridge: Add more debugging for failures x86: ivybridge: Fix types for 64-bit compilation x86: ivybridge: Fix PCH power setup x86: ivybridge: Tidy up enable_clock_gating() for 64-bit x86: dts: Mark serial as needed before relocation x86: fsp: Fix cast for 64-bit compilation x86: Drop unused init_helper functions x86: lib: Fix types and casts for 64-bit compilation x86: mrccache: Fix error handling in mrccache_get_region() x86: Add Kconfig options to build 64-bit U-Boot x86: Kconfig: Add location options for 16/32-bit init x86: Use X86_16BIT_INIT instead of X86_RESET_VECTOR x86: Use X86_32BIT_INIT instead of X86_RESET_VECTOR x86: ivybridge: Allow 32-bit init to move to SPL x86: Add 64-bit start-up code x86: board_f: Update init sequence for 64-bit startup x86: board_r: Set the global data pointer after relocation x86: Do relocation before clearing BSS x86: Refactor relocation to prepare for 64-bit x86: Add support for 64-bit relocation x86: Tidy up use of size_t in relocation x86: Add an SPL implementation x86: Move the i386 code into its own directory x86: Add cpu code for x86_64 x86: Support global_data on x86_64 x86: Fix up CONFIG_X86_64 check x86: Add a link script for 64-bit x86 x86: Add a link script for SPL x86: Add SPL build rules for start-up code x86: Fix up byteorder.h for x86_64 x86: Drop flag_is_changable() on x86_64 x86: Fix up type sizes for 64-bit x86: Mention the MRC region in the README x86: ivybridge: Only do graphics init in 32-bit mode x86: ivybridge: Skipt SATA init in SPL x86: ivybridge: Provide a dummy SDRAM init for 64-bit x86: Don't try to run the VGA BIOS in 64-bit mode x86: Don't build call64 and setjmp on 64-bit x86: Don't build cpu files which are not supported on 64-bit x86: Don't try to boot Linux from SPL x86: Drop interrupt support in 64-bit mode x86: Support jumping from SPL to U-Boot x86: Move pirq_routing_table to global_data x86: Move turbo_state to global_data x86: Change irq_already_routed to a local variable x86: Move call64 to the i386 directory x86: Move setjmp to the i386 directory x86: Add a dummy setjmp implementation for x86_64 x86: link: Add a text base for 64-bit U-Boot x86: link: Add SPL declarations to the binman image x86: link: Set up device tree for SPL x86: link: Add build options for SPL x86: Update compile/link flags to support 64-bit U-Boot x86: link: Switch to 64-bit U-Boot Makefile | 7 +- arch/x86/Kconfig | 85 ++++ arch/x86/Makefile | 9 +- arch/x86/config.mk | 30 +- arch/x86/cpu/Makefile | 24 +- arch/x86/cpu/config.mk | 8 +- arch/x86/cpu/cpu.c | 506 -------------------- arch/x86/cpu/efi/elf_x86_64_efi.lds | 3 + arch/x86/cpu/i386/Makefile | 9 + arch/x86/cpu/{ => i386}/call64.S | 3 + arch/x86/cpu/i386/cpu.c | 599 ++++++++++++++++++++++++ arch/x86/cpu/{interrupts.c => i386/interrupt.c} | 13 +- arch/x86/cpu/{ => i386}/setjmp.S | 0 arch/x86/cpu/intel_common/Makefile | 10 +- arch/x86/cpu/irq.c | 14 +- arch/x86/cpu/ivybridge/Makefile | 11 +- arch/x86/cpu/ivybridge/bd82x6x.c | 6 + arch/x86/cpu/ivybridge/cpu.c | 4 +- arch/x86/cpu/ivybridge/gma.c | 4 +- arch/x86/cpu/ivybridge/lpc.c | 18 +- arch/x86/cpu/ivybridge/model_206ax.c | 2 + arch/x86/cpu/ivybridge/northbridge.c | 2 + arch/x86/cpu/ivybridge/sata.c | 4 +- arch/x86/cpu/ivybridge/sdram.c | 36 +- arch/x86/cpu/ivybridge/sdram_nop.c | 29 ++ arch/x86/cpu/start64.S | 39 ++ arch/x86/cpu/turbo.c | 8 +- arch/x86/cpu/u-boot-64.lds | 76 +++ arch/x86/cpu/u-boot-spl.lds | 74 +++ arch/x86/cpu/u-boot.lds | 2 +- arch/x86/cpu/x86_64/Makefile | 6 + arch/x86/cpu/x86_64/cpu.c | 48 ++ arch/x86/cpu/x86_64/interrupts.c | 30 ++ arch/x86/cpu/x86_64/setjmp.c | 20 + arch/x86/dts/binman.dtsi | 19 + arch/x86/dts/chromebook_link.dts | 15 +- arch/x86/dts/serial.dtsi | 1 + arch/x86/include/asm/acpi_table.h | 2 +- arch/x86/include/asm/byteorder.h | 17 +- arch/x86/include/asm/cpu.h | 12 + arch/x86/include/asm/fsp/fsp_hob.h | 2 +- arch/x86/include/asm/global_data.h | 8 +- arch/x86/include/asm/init_helpers.h | 2 - arch/x86/include/asm/mp.h | 3 + arch/x86/include/asm/mpspec.h | 10 +- arch/x86/include/asm/posix_types.h | 5 + arch/x86/include/asm/sfi.h | 2 +- arch/x86/include/asm/smbios.h | 4 +- arch/x86/include/asm/spl.h | 8 + arch/x86/include/asm/tables.h | 2 +- arch/x86/include/asm/types.h | 5 + arch/x86/lib/Makefile | 9 + arch/x86/lib/acpi_table.c | 4 +- arch/x86/lib/bios.c | 4 +- arch/x86/lib/bootm.c | 2 + arch/x86/lib/init_helpers.c | 12 +- arch/x86/lib/interrupts.c | 5 + arch/x86/lib/mpspec.c | 14 +- arch/x86/lib/mrccache.c | 8 +- arch/x86/lib/pinctrl_ich6.c | 2 +- arch/x86/lib/pirq_routing.c | 14 +- arch/x86/lib/reloc_x86_64.c | 90 ++++ arch/x86/lib/relocate.c | 102 +++- arch/x86/lib/sfi.c | 6 +- arch/x86/lib/smbios.c | 22 +- arch/x86/lib/spl.c | 149 ++++++ arch/x86/lib/tables.c | 2 +- arch/x86/lib/zimage.c | 2 +- board/google/chromebook_link/Kconfig | 3 +- common/board_f.c | 17 +- common/board_r.c | 5 + common/console.c | 30 +- common/spl/Kconfig | 47 ++ common/spl/spl_spi.c | 4 +- configs/chromebook_link_defconfig | 22 +- doc/README.x86 | 1 + drivers/Makefile | 5 + drivers/bios_emulator/atibios.c | 2 +- drivers/i2c/intel_i2c.c | 6 +- drivers/misc/qfw.c | 4 +- drivers/mmc/pci_mmc.c | 2 +- drivers/pci/pci_rom.c | 2 +- drivers/rtc/mc146818.c | 2 +- drivers/tpm/tpm_tis_lpc.c | 4 +- drivers/usb/host/ehci-pci.c | 4 +- include/_exports.h | 2 +- include/asm-generic/sections.h | 1 + include/configs/chromebook_link.h | 9 + include/elf.h | 6 + include/video_fb.h | 2 +- scripts/Makefile.spl | 18 +- 91 files changed, 1796 insertions(+), 705 deletions(-) create mode 100644 arch/x86/cpu/i386/Makefile rename arch/x86/cpu/{ => i386}/call64.S (98%) create mode 100644 arch/x86/cpu/i386/cpu.c rename arch/x86/cpu/{interrupts.c => i386/interrupt.c} (98%) rename arch/x86/cpu/{ => i386}/setjmp.S (100%) create mode 100644 arch/x86/cpu/ivybridge/sdram_nop.c create mode 100644 arch/x86/cpu/start64.S create mode 100644 arch/x86/cpu/u-boot-64.lds create mode 100644 arch/x86/cpu/u-boot-spl.lds create mode 100644 arch/x86/cpu/x86_64/Makefile create mode 100644 arch/x86/cpu/x86_64/cpu.c create mode 100644 arch/x86/cpu/x86_64/interrupts.c create mode 100644 arch/x86/cpu/x86_64/setjmp.c create mode 100644 arch/x86/include/asm/spl.h create mode 100644 arch/x86/lib/reloc_x86_64.c create mode 100644 arch/x86/lib/spl.c -- 2.8.0.rc3.226.g39d4020

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[U-Boot] [PATCH] cmd/fdt: Make fdt get value endian-safe for single-cell properties
by Andreas Färber 25 Nov '16

25 Nov '16

On a Raspberry Pi 2 disagreements on cell endianness can be observed: U-Boot> fdt print /soc/gpio@7e200000 phandle phandle = <0x0000000d> U-Boot> fdt get value myvar /soc/gpio@7e200000 phandle; printenv myvar myvar=0x0D000000 Fix this by always treating the pointer as __be32 and converting it in fdt_value_setenv(), like its counterpart fdt_parse_prop() already does. Fixes: bc80295 ("fdt: Add get commands to fdt") Cc: Joe Hershberger <joe.hershberger(a)ni.com> Cc: Gerald Van Baren <gvb(a)unssw.com> Signed-off-by: Andreas Färber <afaerber(a)suse.de> --- cmd/fdt.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/cmd/fdt.c b/cmd/fdt.c index b503357..a131f17 100644 --- a/cmd/fdt.c +++ b/cmd/fdt.c @@ -58,7 +58,7 @@ static int fdt_value_setenv(const void *nodep, int len, const char *var) else if (len == 4) { char buf[11]; - sprintf(buf, "0x%08X", *(uint32_t *)nodep); + sprintf(buf, "0x%08X", __be32_to_cpu(*(__be32 *)nodep)); setenv(var, buf); } else if (len%4 == 0 && len <= 20) { /* Needed to print things like sha1 hashes. */ -- 2.6.6

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