October 2016 - U-Boot

[U-Boot] [PATCH v2] powerpc/t2080: CPU erratum A-007907
by Darwin Dingel 24 Jan '17

24 Jan '17

Core hang occurs when using L1 stashes. Workaround is to disable L1 stashes so software uses L2 cache for stashes instead. Reviewed-by: Chris Packham <chris.packham(a)alliedtelesis.co.nz> Signed-off-by: Darwin Dingel <darwin.dingel(a)alliedtelesis.co.nz> Cc: York Sun <york.sun(a)nxp.com> --- Changes for v2: - Enabled for T4240 and B4860 arch/powerpc/cpu/mpc85xx/cmd_errata.c | 4 +++- arch/powerpc/cpu/mpc85xx/cpu_init.c | 7 +++++++ arch/powerpc/include/asm/config_mpc85xx.h | 3 +++ arch/powerpc/include/asm/processor.h | 1 + 4 files changed, 14 insertions(+), 1 deletion(-) diff --git a/arch/powerpc/cpu/mpc85xx/cmd_errata.c b/arch/powerpc/cpu/mpc85xx/cmd_errata.c index 3b06ae4..197eb2f 100644 --- a/arch/powerpc/cpu/mpc85xx/cmd_errata.c +++ b/arch/powerpc/cpu/mpc85xx/cmd_errata.c @@ -329,7 +329,9 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) #ifdef CONFIG_SYS_FSL_ERRATUM_A009663 puts("Work-around for Erratum A009663 enabled\n"); #endif - +#ifdef CONFIG_SYS_FSL_ERRATUM_A007907 + puts("Work-around for Erratum A007907 enabled\n"); +#endif return 0; } diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index 53b3729..0e744f0 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -775,6 +775,13 @@ int cpu_init_r(void) sync(); } #endif + +#ifdef CONFIG_SYS_FSL_ERRATUM_A007907 + flush_dcache(); + mtspr(L1CSR2, (mfspr(L1CSR2) & ~L1CSR2_DCSTASHID)); + sync(); +#endif + #ifdef CONFIG_SYS_FSL_ERRATUM_A005812 /* * A-005812 workaround sets bit 32 of SPR 976 for SoCs running diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index 6d845e8..c2bf44b 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -642,6 +642,7 @@ #define CONFIG_SYS_NUM_FM2_10GEC 2 #define CONFIG_NUM_DDR_CONTROLLERS 3 #define CONFIG_SYS_FSL_ERRATUM_A006261 +#define CONFIG_SYS_FSL_ERRATUM_A007907 #else #define CONFIG_SYS_NUM_FM1_DTSEC 6 #define CONFIG_SYS_NUM_FM1_10GEC 1 @@ -748,6 +749,7 @@ #define CONFIG_SYS_FSL_SRIO_OB_WIN_NUM 9 #define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM 5 #define CONFIG_SYS_FSL_SRIO_LIODN +#define CONFIG_SYS_FSL_ERRATUM_A007907 #else #define CONFIG_MAX_CPUS 2 #define CONFIG_MAX_DSP_CPUS 2 @@ -910,6 +912,7 @@ defined(CONFIG_PPC_T1014) || defined(CONFIG_PPC_T1013) #define CONFIG_SYS_FSL_ERRATUM_A006593 #define CONFIG_SYS_FSL_ERRATUM_A007186 #define CONFIG_SYS_FSL_ERRATUM_A006379 +#define CONFIG_SYS_FSL_ERRATUM_A007907 #define ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE #define CONFIG_SYS_FSL_SFP_VER_3_0 diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h index fdfca90..6f9b297 100644 --- a/arch/powerpc/include/asm/processor.h +++ b/arch/powerpc/include/asm/processor.h @@ -501,6 +501,7 @@ #define L1CSR1_ICE 0x00000001 /* Instruction Cache Enable */ #define SPRN_L1CSR2 0x25e /* L1 Data Cache Control and Status Register 2 */ #define L1CSR2_DCWS 0x40000000 /* Data Cache Write Shadow */ +#define L1CSR2_DCSTASHID 0x000003ff /* Data Cache Stash ID */ #define SPRN_L2CSR0 0x3f9 /* L2 Data Cache Control and Status Register 0 */ #define L2CSR0_L2E 0x80000000 /* L2 Cache Enable */ #define L2CSR0_L2PE 0x40000000 /* L2 Cache Parity/ECC Enable */ -- 2.10.1

2 3

[U-Boot] [PATCH v1 0/2] ARM: dts: at91: add dts files for the boards of SAMA5D3
by Wenyou Yang 10 Jan '17

10 Jan '17

The purpose of the patchset is add the dts files for boards, sama5d3 Xplained board and sama5d3xek board. Wenyou Yang (2): ARM: at91: dt: add dts files for sama5d3ek board ARM: at91: dt: add dts file for sama5d3 Xplained arch/arm/dts/Makefile | 7 + arch/arm/dts/at91-sama5d3_xplained.dts | 341 ++++++++ arch/arm/dts/sama5d3.dtsi | 1505 ++++++++++++++++++++++++++++++++ arch/arm/dts/sama5d31.dtsi | 16 + arch/arm/dts/sama5d31ek.dts | 52 ++ arch/arm/dts/sama5d33.dtsi | 14 + arch/arm/dts/sama5d33ek.dts | 45 + arch/arm/dts/sama5d34.dtsi | 16 + arch/arm/dts/sama5d34ek.dts | 62 ++ arch/arm/dts/sama5d35.dtsi | 18 + arch/arm/dts/sama5d35ek.dts | 55 ++ arch/arm/dts/sama5d36.dtsi | 20 + arch/arm/dts/sama5d36ek.dts | 57 ++ arch/arm/dts/sama5d36ek_cmp.dts | 55 ++ arch/arm/dts/sama5d3_can.dtsi | 74 ++ arch/arm/dts/sama5d3_emac.dtsi | 55 ++ arch/arm/dts/sama5d3_gmac.dtsi | 88 ++ arch/arm/dts/sama5d3_lcd.dtsi | 215 +++++ arch/arm/dts/sama5d3_mci2.dtsi | 59 ++ arch/arm/dts/sama5d3_tcb1.dtsi | 39 + arch/arm/dts/sama5d3_uart.dtsi | 79 ++ arch/arm/dts/sama5d3xcm.dtsi | 123 +++ arch/arm/dts/sama5d3xcm_cmp.dtsi | 166 ++++ arch/arm/dts/sama5d3xdm.dtsi | 41 + arch/arm/dts/sama5d3xmb.dtsi | 221 +++++ arch/arm/dts/sama5d3xmb_cmp.dtsi | 230 +++++ 26 files changed, 3653 insertions(+) create mode 100644 arch/arm/dts/at91-sama5d3_xplained.dts create mode 100644 arch/arm/dts/sama5d3.dtsi create mode 100644 arch/arm/dts/sama5d31.dtsi create mode 100644 arch/arm/dts/sama5d31ek.dts create mode 100644 arch/arm/dts/sama5d33.dtsi create mode 100644 arch/arm/dts/sama5d33ek.dts create mode 100644 arch/arm/dts/sama5d34.dtsi create mode 100644 arch/arm/dts/sama5d34ek.dts create mode 100644 arch/arm/dts/sama5d35.dtsi create mode 100644 arch/arm/dts/sama5d35ek.dts create mode 100644 arch/arm/dts/sama5d36.dtsi create mode 100644 arch/arm/dts/sama5d36ek.dts create mode 100644 arch/arm/dts/sama5d36ek_cmp.dts create mode 100644 arch/arm/dts/sama5d3_can.dtsi create mode 100644 arch/arm/dts/sama5d3_emac.dtsi create mode 100644 arch/arm/dts/sama5d3_gmac.dtsi create mode 100644 arch/arm/dts/sama5d3_lcd.dtsi create mode 100644 arch/arm/dts/sama5d3_mci2.dtsi create mode 100644 arch/arm/dts/sama5d3_tcb1.dtsi create mode 100644 arch/arm/dts/sama5d3_uart.dtsi create mode 100644 arch/arm/dts/sama5d3xcm.dtsi create mode 100644 arch/arm/dts/sama5d3xcm_cmp.dtsi create mode 100644 arch/arm/dts/sama5d3xdm.dtsi create mode 100644 arch/arm/dts/sama5d3xmb.dtsi create mode 100644 arch/arm/dts/sama5d3xmb_cmp.dtsi -- 2.7.4

2 3

[U-Boot] [PATCH 1/5] common/Kconfig: remove NOR_BOOT's depends on NOR
by Zhiqiang Hou 05 Jan '17

05 Jan '17

From: Hou Zhiqiang <Zhiqiang.Hou(a)nxp.com> Remove this dependency to make the NOR_BOOT available for other SoCs which do not have the config NOR, not only for am335x. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou(a)nxp.com> --- common/Kconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/common/Kconfig b/common/Kconfig index c69c141..7fd6c49 100644 --- a/common/Kconfig +++ b/common/Kconfig @@ -101,7 +101,6 @@ menu "Boot media" config NOR_BOOT bool "Support for booting from NOR flash" - depends on NOR help Enabling this will make a U-Boot binary that is capable of being booted via NOR. In this case we will enable certain pinmux early -- 2.1.0.27.g96db324

6 13

[U-Boot] [PATCH] powerpc/t2080: DDR controller erratum A-009942
by Hamish Martin 04 Jan '17

04 Jan '17

This erratum is already implemented for other ARM based QorIQ platforms with the Gen4 DDR controller. Port the fix to the Gen3 controller and enable it for T2080 and T2081. Reviewed-by: Chris Packham <chris.packham(a)alliedtelesis.co.nz> Signed-off-by: Hamish Martin <hamish.martin(a)alliedtelesis.co.nz> Cc: York Sun <york.sun(a)nxp.com> --- arch/powerpc/cpu/mpc85xx/cmd_errata.c | 3 +++ arch/powerpc/include/asm/config_mpc85xx.h | 1 + drivers/ddr/fsl/mpc85xx_ddr_gen3.c | 17 +++++++++++++++++ 3 files changed, 21 insertions(+) diff --git a/arch/powerpc/cpu/mpc85xx/cmd_errata.c b/arch/powerpc/cpu/mpc85xx/cmd_errata.c index 3b06ae42e4bc..94b6dcca96b6 100644 --- a/arch/powerpc/cpu/mpc85xx/cmd_errata.c +++ b/arch/powerpc/cpu/mpc85xx/cmd_errata.c @@ -329,6 +329,9 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) #ifdef CONFIG_SYS_FSL_ERRATUM_A009663 puts("Work-around for Erratum A009663 enabled\n"); #endif +#ifdef CONFIG_SYS_FSL_ERRATUM_A009942 + puts("Work-around for Erratum A009942 enabled\n"); +#endif return 0; } diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index 6d845e859f4a..9e1cd80e16e0 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -910,6 +910,7 @@ defined(CONFIG_PPC_T1014) || defined(CONFIG_PPC_T1013) #define CONFIG_SYS_FSL_ERRATUM_A006593 #define CONFIG_SYS_FSL_ERRATUM_A007186 #define CONFIG_SYS_FSL_ERRATUM_A006379 +#define CONFIG_SYS_FSL_ERRATUM_A009942 #define ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE #define CONFIG_SYS_FSL_SFP_VER_3_0 diff --git a/drivers/ddr/fsl/mpc85xx_ddr_gen3.c b/drivers/ddr/fsl/mpc85xx_ddr_gen3.c index 653b7f0c770c..a88884377f80 100644 --- a/drivers/ddr/fsl/mpc85xx_ddr_gen3.c +++ b/drivers/ddr/fsl/mpc85xx_ddr_gen3.c @@ -39,6 +39,10 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs, #ifdef CONFIG_SYS_FSL_ERRATUM_DDR_A003 u32 save1, save2; #endif +#ifdef CONFIG_SYS_FSL_ERRATUM_A009942 + ulong ddr_freq; + u32 tmp; +#endif switch (ctrl_num) { case 0: @@ -183,6 +187,19 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs, out_be32(&ddr->debug[21], 0x24000000); #endif /* CONFIG_SYS_FSL_ERRATUM_DDR_A003474 */ +#ifdef CONFIG_SYS_FSL_ERRATUM_A009942 + ddr_freq = get_ddr_freq(ctrl_num) / 1000000; + tmp = in_be32(&ddr->debug[28]); + if (ddr_freq <= 1333) + out_be32(&ddr->debug[28], tmp | 0x0080006a); + else if (ddr_freq <= 1600) + out_be32(&ddr->debug[28], tmp | 0x0070006f); + else if (ddr_freq <= 1867) + out_be32(&ddr->debug[28], tmp | 0x00700076); + else if (ddr_freq <= 2133) + out_be32(&ddr->debug[28], tmp | 0x0060007b); +#endif + /* * For RDIMMs, JEDEC spec requires clocks to be stable before reset is * deasserted. Clocks start when any chip select is enabled and clock -- 2.10.1

4 6

[U-Boot] [PATCH v2 0/3] LS1046A secure boot target addition
by Sumit Garg 03 Jan '17

03 Jan '17

The patch-set does the following: 1. Add NOR secure boot target on ls1046aqds platform. 2. Add QSPI secure boot target on ls1046ardb platform. Changes in v2: Split patches logically from 2 to 3. Sumit Garg (3): SECURE_BOOT: Enable chain of trust on LS1046A platform LS1046AQDS: Add NOR Secure Boot Target LS1046ARDB: Add QSPI Secure Boot target arch/arm/include/asm/arch-fsl-layerscape/config.h | 2 +- arch/arm/include/asm/fsl_secure_boot.h | 37 ++++++++++++++++------- board/freescale/ls1046aqds/MAINTAINERS | 4 +++ board/freescale/ls1046aqds/ls1046aqds.c | 18 +++++++++++ board/freescale/ls1046ardb/MAINTAINERS | 4 +++ board/freescale/ls1046ardb/ls1046ardb.c | 19 ++++++++++++ configs/ls1046aqds_SECURE_BOOT_defconfig | 29 ++++++++++++++++++ configs/ls1046ardb_qspi_SECURE_BOOT_defconfig | 27 +++++++++++++++++ include/configs/ls1046ardb.h | 2 ++ 9 files changed, 130 insertions(+), 12 deletions(-) create mode 100644 configs/ls1046aqds_SECURE_BOOT_defconfig create mode 100644 configs/ls1046ardb_qspi_SECURE_BOOT_defconfig -- 1.8.1.4

4 9

[U-Boot] [PATCH] ML: SPL: NOR: Add CONFIG_SPL_NOR_COPY_ENTIRE_IMAGE define to enable whole image copy from NOR
by Lukasz Majewski 02 Jan '17

02 Jan '17

This define gives the possibility to copy entire image (including header) from NOR parallel memory to e.g. SDRAM. The legacy behavior is preserved, since other board don't enabled this option. Signed-off-by: Lukasz Majewski <l.majewski(a)majess.pl> --- Kconfig | 10 ++++++++++ README | 4 ++++ common/spl/spl_nor.c | 12 +++++++++--- 3 files changed, 23 insertions(+), 3 deletions(-) diff --git a/Kconfig b/Kconfig index e443490..473a099 100644 --- a/Kconfig +++ b/Kconfig @@ -159,6 +159,16 @@ config SPL_NOR_SUPPORT help This option enables SPL NOR driver. +config SPL_NOR_COPY_ENTIRE_IMAGE + bool + depends on SPL_NOR_SUPPORT + prompt "Copy entire image from NOR memory" + default n + help + By default the SPL NOR driver supports copying only payload to + destination address. Say Y if you want to copy entire image (including + its image header). + config SPL_SYS_MALLOC_SIMPLE bool depends on SPL diff --git a/README b/README index f41a6af..e9a3c5b 100644 --- a/README +++ b/README @@ -3661,6 +3661,10 @@ FIT uImage format: It conflicts with SPL env from storage medium specified by CONFIG_ENV_IS_xxx but CONFIG_ENV_IS_NOWHERE + CONFIG_SPL_NOR_COPY_ENTIRE_IMAGE + Allow NOR stored u-boot image to be copied by SPL with header to + SDRAM memory and executed from it + CONFIG_SPL_PAD_TO Image offset to which the SPL should be padded before appending the SPL payload. By default, this is defined as diff --git a/common/spl/spl_nor.c b/common/spl/spl_nor.c index 8ea874c..1e0f739 100644 --- a/common/spl/spl_nor.c +++ b/common/spl/spl_nor.c @@ -9,13 +9,15 @@ int spl_nor_load_image(void) { + void *img_src; int ret; +#ifndef CONFIG_SPL_NOR_COPY_ENTIRE_IMAGE /* * Loading of the payload to SDRAM is done with skipping of * the mkimage header in this SPL NOR driver */ spl_image.flags |= SPL_COPY_PAYLOAD_ONLY; - +#endif #ifdef CONFIG_SPL_OS_BOOT if (!spl_start_uboot()) { const struct image_header *header; @@ -64,9 +66,13 @@ int spl_nor_load_image(void) if (ret) return ret; + img_src = (void *)CONFIG_SYS_UBOOT_BASE; +#ifndef CONFIG_SPL_NOR_COPY_ENTIRE_IMAGE + img_src += sizeof(struct image_header)); +#endif + memcpy((void *)(unsigned long)spl_image.load_addr, - (void *)(CONFIG_SYS_UBOOT_BASE + sizeof(struct image_header)), - spl_image.size); + img_src, spl_image.size); return 0; } -- 2.1.4

4 26

[U-Boot] [PATCH] Fix fastboot boot address
by Peter.Chubb＠data61.csiro.au 30 Dec '16

30 Dec '16

Fastboot loads an image at CONFIG_FASTBOOT_BUF_ADDR, but currently tells do_bootm() to look for an image at $loadaddr. This breaks if CONFIG_FASTBOOT_BUF_ADDR is different from the current user-set loadaddr. Instead, tell do_bootm() to pick up the image where it was laoded. Signed-off-by: Peter Chubb <peter.chubb(a)data61.csiro.au> --- drivers/usb/gadget/f_fastboot.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c index 2160b1c..6d02248 100644 --- a/drivers/usb/gadget/f_fastboot.c +++ b/drivers/usb/gadget/f_fastboot.c @@ -553,7 +553,7 @@ static void do_bootm_on_complete(struct usb_ep *ep, struct usb_request *req) puts("Booting kernel..\n"); - sprintf(boot_addr_start, "0x%lx", load_addr); + sprintf(boot_addr_start, "0x%lx", CONFIG_FASTBOOT_BUF_ADDR); do_bootm(NULL, 0, 2, bootm_args); /* This only happens if image is somehow faulty so we start over */ -- 2.9.3

3 2

[U-Boot] [PATCH 2/7] ext4: determine group descriptor size for 64bit feature
by Stefan Brüns 27 Dec '16

27 Dec '16

If EXT4_FEATURE_INCOMPAT_64BIT is set, the descriptor can be read from the superblocks, otherwise it defaults to 32. Signed-off-by: Stefan Brüns <stefan.bruens(a)rwth-aachen.de> --- fs/ext4/ext4_common.c | 18 ++++++++++++++---- include/ext4fs.h | 2 ++ 2 files changed, 16 insertions(+), 4 deletions(-) diff --git a/fs/ext4/ext4_common.c b/fs/ext4/ext4_common.c index a78b0b8..416a9db 100644 --- a/fs/ext4/ext4_common.c +++ b/fs/ext4/ext4_common.c @@ -2233,13 +2233,23 @@ int ext4fs_mount(unsigned part_length) goto fail; } - if (le32_to_cpu(data->sblock.revision_level) == 0) + if (le32_to_cpu(data->sblock.revision_level) == 0) { fs->inodesz = 128; - else + } else { + debug("EXT4 features COMPAT: %08x INCOMPAT: %08x RO_COMPAT: %08x\n", + __le32_to_cpu(data->sblock.feature_compatibility), + __le32_to_cpu(data->sblock.feature_incompat), + __le32_to_cpu(data->sblock.feature_ro_compat)); + fs->inodesz = le16_to_cpu(data->sblock.inode_size); + fs->gdsize = le32_to_cpu(data->sblock.feature_incompat) & + EXT4_FEATURE_INCOMPAT_64BIT ? + le16_to_cpu(data->sblock.descriptor_size) : 32; + } - debug("EXT2 rev %d, inode_size %d\n", - le32_to_cpu(data->sblock.revision_level), fs->inodesz); + debug("EXT2 rev %d, inode_size %d, descriptor size %d\n", + le32_to_cpu(data->sblock.revision_level), + fs->inodesz, fs->gdsize); data->diropen.data = data; data->diropen.ino = 2; diff --git a/include/ext4fs.h b/include/ext4fs.h index 6e31c73..7e1ee6c 100644 --- a/include/ext4fs.h +++ b/include/ext4fs.h @@ -87,6 +87,8 @@ struct ext_filesystem { uint32_t inodesz; /* Sectors per Block */ uint32_t sect_perblk; + /* Group Descriptor size */ + uint16_t gdsize; /* Group Descriptor Block Number */ uint32_t gdtable_blkno; /* Total block groups of partition */ -- 2.10.0

4 3

[U-Boot] [PATCH 00/10] driver model bring-up of dwc3 usb peripheral
by Mugunthan V N 20 Dec '16

20 Dec '16

This patch series enables dwc3 usb driver to adopt driver model. This has been tested on AM437x evm sk (logs [1]) by loading kernel through usb ether Also pushed a branch for testing [2] [1] - http://pastebin.ubuntu.com/15391169/ [2] - git://git.ti.com/~mugunthanvnm/ti-u-boot/mugunth-ti-u-boot.git dm-dwc3 Kishon Vijay Abraham I (1): configs: am43xx: Add am43xx_evm_usbspl_defconfig Mugunthan V N (8): drivers: usb: dwc3: remove devm_zalloc from linux_compact drivers: usb: dwc3-omap: move usb_gadget_handle_interrupts from board files to drivers am437x: board: do not register usb devices when CONFIG_DM_USB is defined dra7xx: board: do not register usb devices when CONFIG_DM_USB is defined drivers: usb: dwc3: add ti dwc3 misc driver for wrapper drivers: usb: common: add support to get maximum speed from dt drivers: usb: dwc3: add ti dwc3 peripheral driver with driver model support defconfig: am437x_sk_evm: enable usb driver model Tom Rini (1): am43xx: Add USB device boot support to SPL board/ti/am43xx/MAINTAINERS | 1 + board/ti/am43xx/board.c | 52 +++++--- board/ti/am57xx/board.c | 11 -- board/ti/dra7xx/evm.c | 13 +- configs/am437x_sk_evm_defconfig | 4 + configs/am43xx_evm_usbspl_defconfig | 9 ++ drivers/Makefile | 2 + drivers/usb/common/common.c | 29 +++++ drivers/usb/dwc3/core.c | 64 +++++++++- drivers/usb/dwc3/core.h | 6 + drivers/usb/dwc3/dwc3-omap.c | 230 +++++++++++++++++++++++++++++++++++- drivers/usb/dwc3/gadget.c | 2 +- drivers/usb/dwc3/linux-compat.h | 5 - drivers/usb/dwc3/ti_usb_phy.c | 1 + drivers/usb/gadget/gadget_chips.h | 2 + include/configs/am43xx_evm.h | 13 ++ include/linux/usb/otg.h | 9 ++ 17 files changed, 406 insertions(+), 47 deletions(-) create mode 100644 configs/am43xx_evm_usbspl_defconfig -- 2.7.2.333.g70bd996

5 34

[U-Boot] [PATCH 0/2] ARM: imx6ul: Support liteSOM and liteBoard
by Marcin Niestroj 16 Dec '16

16 Dec '16

Hi, These patches add support for liteSOM (http://grinn-global.com/litesom/), and liteBoard (which uses liteSOM as it's base). liteSOM consists of processor (NXP i.MX6UL), RAM memory (up to 512M DDR3) and flash (eMMC card). The idea is that every board vendor can use liteSOM as it's base for designed board. Hence, we need a way to reuse common code between those board. liteBoard is a development kit (and reference platform for liteSOM), that mainly shows possibilities and use cases of liteSOM. Patches were developed and tested on 2016.09. Marcin Niestroj (2): ARM: imx6ul: Add support for liteSOM board/liteboard: Add support for liteBoard arch/arm/Kconfig | 2 + arch/arm/Makefile | 1 + arch/arm/cpu/armv7/mx6/Kconfig | 5 + arch/arm/mach-litesom/Kconfig | 6 + arch/arm/mach-litesom/Makefile | 6 + arch/arm/mach-litesom/include/mach/litesom.h | 16 ++ arch/arm/mach-litesom/litesom.c | 200 ++++++++++++++++++++ board/grinn/liteboard/Kconfig | 12 ++ board/grinn/liteboard/MAINTAINERS | 6 + board/grinn/liteboard/Makefile | 6 + board/grinn/liteboard/README | 31 +++ board/grinn/liteboard/board.c | 270 +++++++++++++++++++++++++++ configs/liteboard_defconfig | 22 +++ include/configs/liteboard.h | 174 +++++++++++++++++ 14 files changed, 757 insertions(+) create mode 100644 arch/arm/mach-litesom/Kconfig create mode 100644 arch/arm/mach-litesom/Makefile create mode 100644 arch/arm/mach-litesom/include/mach/litesom.h create mode 100644 arch/arm/mach-litesom/litesom.c create mode 100644 board/grinn/liteboard/Kconfig create mode 100644 board/grinn/liteboard/MAINTAINERS create mode 100644 board/grinn/liteboard/Makefile create mode 100644 board/grinn/liteboard/README create mode 100644 board/grinn/liteboard/board.c create mode 100644 configs/liteboard_defconfig create mode 100644 include/configs/liteboard.h -- 2.9.3

2 5