October 2016 - U-Boot

[U-Boot] [PATCH] usb gadget: increase envstr size in cb_getvar
by Nicolas le bayon 10 Mar '17

10 Mar '17

Hi, I propose you this patch in order to take into account strings larger than actual size (32). I recently faced to 'fastboot.partition-type:userdata' (it was in Android context) but this could be the case for other purposes. I propose to simply double the size. Is it ok for you? Regards --- drivers/usb/gadget/f_fastboot.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c index 2160b1c..84e22e4 100644 --- a/drivers/usb/gadget/f_fastboot.c +++ b/drivers/usb/gadget/f_fastboot.c @@ -432,7 +432,7 @@ static void cb_getvar(struct usb_ep *ep, struct usb_request *req) else strcpy(response, "FAILValue not set"); } else { - char envstr[32]; + char envstr[64]; snprintf(envstr, sizeof(envstr) - 1, "fastboot.%s", cmd); s = getenv(envstr); -- 1.9.1

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[U-Boot] [RFC] odroid: Add support for the ODROID-X board variant
by Siarhei Siamashka 07 Mar '17

07 Mar '17

ODROID-X uses a slightly older revision of the same base board as the ODROID-X2. But the CPU module in ODROID-X uses an older 1.4GHz revision of Exynos4412 SoC and less RAM (1GiB instead of 2GiB). The current U-Boot code deadlocks on ODROID-X when probing the RAM size via get_ram_size() function. Reducing CONFIG_NR_DRAM_BANKS from 8 to 4 can fix this problem. But this constant is used in a lot of places in U-Boot, while SDRAM_BANK_SIZE can be easily replaced with the code which relies on runtime detection of the board type. So we change 4 or 8 banks of 256MiB with just one fake bank of 2GiB or 1GiB. The runtime detection check tries to read the PRO_ID register in the hope that it might be different between Exynos4412 and Exynos4412 Prime and enough to detect the difference between X and X2 board variants. Signed-off-by: Siarhei Siamashka <siarhei.siamashka(a)gmail.com> --- I'm assuming that the X and X2 hardware is nearly identical and can be supported with a common code in U-Boot, based on the changelog of PCB revisions: http://com.odroid.com/sigong/blog/blog_list.php?bid=132 This is an RFC patch because I don't have an X2 board and can't test if checking the PRO_ID register is good enough. If it does not work, then maybe some other method could be tried (probe the DRAM controller registers?). Also does the number of DRAM banks have any special meaning on this platform in U-Boot and Linux (after the proprietary blob has already initialized the DRAM controller)? If this approach is wrong, then what would be the best way to add support for the ODROID-X board? Thanks. board/samsung/common/board.c | 21 +++++++++++++++++---- board/samsung/odroid/odroid.c | 14 ++++++++++---- include/configs/odroid.h | 10 ++++++---- 3 files changed, 33 insertions(+), 12 deletions(-) diff --git a/board/samsung/common/board.c b/board/samsung/common/board.c index d32c75d..ac3ed4c 100644 --- a/board/samsung/common/board.c +++ b/board/samsung/common/board.c @@ -94,14 +94,26 @@ int board_init(void) return exynos_init(); } +static u32 get_sdram_bank_size(void) +{ + u32 sdram_bank_size = SDRAM_BANK_SIZE; +#ifdef CONFIG_BOARD_TYPES + if (strcmp(CONFIG_SYS_BOARD, "odroid") == 0 && + strcmp(get_board_type(), "x") == 0) + sdram_bank_size = SDRAM_BANK_SIZE_ODROIDX; +#endif + return sdram_bank_size; +} + int dram_init(void) { unsigned int i; u32 addr; + u32 sdram_bank_size = get_sdram_bank_size(); for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { - addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE); - gd->ram_size += get_ram_size((long *)addr, SDRAM_BANK_SIZE); + addr = CONFIG_SYS_SDRAM_BASE + (i * sdram_bank_size); + gd->ram_size += get_ram_size((long *)addr, sdram_bank_size); } return 0; } @@ -110,10 +122,11 @@ void dram_init_banksize(void) { unsigned int i; u32 addr, size; + u32 sdram_bank_size = get_sdram_bank_size(); for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { - addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE); - size = get_ram_size((long *)addr, SDRAM_BANK_SIZE); + addr = CONFIG_SYS_SDRAM_BASE + (i * sdram_bank_size); + size = get_ram_size((long *)addr, sdram_bank_size); gd->bd->bi_dram[i].start = addr; gd->bd->bi_dram[i].size = size; diff --git a/board/samsung/odroid/odroid.c b/board/samsung/odroid/odroid.c index 32155f1..e98e3be 100644 --- a/board/samsung/odroid/odroid.c +++ b/board/samsung/odroid/odroid.c @@ -30,6 +30,7 @@ DECLARE_GLOBAL_DATA_PTR; enum { ODROID_TYPE_U3, ODROID_TYPE_X2, + ODROID_TYPE_X, ODROID_TYPES, }; @@ -56,15 +57,20 @@ void set_board_type(void) sdelay(200000); /* Check GPC1 pin2 - LED supplied by XCL205 - X2 only */ - if (readl(XCL205_STATE_GPIO_DAT) & (1 << XCL205_STATE_GPIO_PIN)) - gd->board_type = ODROID_TYPE_X2; - else + if (readl(XCL205_STATE_GPIO_DAT) & (1 << XCL205_STATE_GPIO_PIN)) { + /* Check the SoC product information ID */ + if (readl(EXYNOS4_PRO_ID) == 0xE4412211) + gd->board_type = ODROID_TYPE_X; + else + gd->board_type = ODROID_TYPE_X2; + } else { gd->board_type = ODROID_TYPE_U3; + } } const char *get_board_type(void) { - const char *board_type[] = {"u3", "x2"}; + const char *board_type[] = {"u3", "x2", "x"}; return board_type[gd->board_type]; } diff --git a/include/configs/odroid.h b/include/configs/odroid.h index 4c85e85..ae1b2b4 100644 --- a/include/configs/odroid.h +++ b/include/configs/odroid.h @@ -22,9 +22,10 @@ #define CONFIG_MACH_TYPE 4289 -#define CONFIG_NR_DRAM_BANKS 8 +#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE 0x40000000 -#define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */ +#define SDRAM_BANK_SIZE ((8 * 256) << 20) /* 8 * 256 MB */ +#define SDRAM_BANK_SIZE_ODROIDX ((4 * 256) << 20) /* 4 * 256 MB */ #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* Reserve the last 1 MiB for the secure firmware */ #define CONFIG_SYS_MEM_TOP_HIDE (1UL << 20UL) @@ -75,6 +76,7 @@ "uInitrd fat 0 1;" \ "exynos4412-odroidu3.dtb fat 0 1;" \ "exynos4412-odroidx2.dtb fat 0 1;" \ + "exynos4412-odroidx.dtb fat 0 1;" \ ""PARTS_BOOT" part 0 1;" \ ""PARTS_ROOT" part 0 2\0" \ @@ -209,8 +211,8 @@ #define CONFIG_USB_ETHER_SMSC95XX /* - * Supported Odroid boards: X3, U3 - * TODO: Add Odroid X support + * Supported Odroid boards: X, X2, U3 + * TODO: Add Odroid U2 support */ #define CONFIG_MISC_COMMON #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG -- 2.4.9

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[U-Boot] [PATCH] fastboot: avoid printing invalid data
by John Keeping 05 Mar '17

05 Mar '17

There is no guarantee that commands are null-terminated in the USB request buffer, so limit the length of data that is printed. Signed-off-by: John Keeping <john(a)metanate.com> --- drivers/usb/gadget/f_fastboot.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c index 2160b1c..a020b7d 100644 --- a/drivers/usb/gadget/f_fastboot.c +++ b/drivers/usb/gadget/f_fastboot.c @@ -710,7 +710,7 @@ static void rx_handler_command(struct usb_ep *ep, struct usb_request *req) } if (!func_cb) { - error("unknown command: %s", cmdbuf); + error("unknown command: %.*s", req->actual, cmdbuf); fastboot_tx_write_str("FAILunknown command"); } else { if (req->actual < req->length) { -- 2.9.3.728.g30b24b4.dirty

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[U-Boot] [PATCH v2 0/5] arm: imx6: tqma6: Kconfig rework
by Markus Niebel 19 Feb '17

19 Feb '17

From: Markus Niebel <Markus.Niebel(a)tq-group.com> This series extends the Kconfig options for TQMa6 to enable removal of CONFIG_SYS_EXTRA_OPTIONS for this boards. To enable env device / boot device configuration the first patch includes the Kconfig generated header in the board configuration header. To enable CPU selection the second patch moves the board selection to the i.MX6 CPU menu as implemented by the Seco mx6 boards Changed for v2: - rebase to current u-boot-imx - add new patch to fix envcrc build for non default boot / env devices - regenerate defconfigs to exclude defaults Markus Niebel (5): arm: imx6: tqma6: add kconfig to board header arm: mx6: tqma6: CPU type selection via Kconfig arm: imx6: tqma6: implement IMX_CONFIG with Kconfig arm: imx6: tqma6: boot device selection via Kconfig arm: imx6: tqma6: implement KConfig baseboard selection arch/arm/Kconfig | 5 ---- arch/arm/cpu/armv7/mx6/Kconfig | 5 ++++ board/tqc/tqma6/Kconfig | 58 +++++++++++++++++++++++++++++++++++++++ configs/tqma6q_mba6_mmc_defconfig | 2 +- configs/tqma6q_mba6_spi_defconfig | 3 +- configs/tqma6s_mba6_mmc_defconfig | 3 +- configs/tqma6s_mba6_spi_defconfig | 4 ++- include/configs/tqma6.h | 1 + 8 files changed, 72 insertions(+), 9 deletions(-) -- 2.3.0

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[U-Boot] [PATCH 0/9] arm64: Unify MMU code
by Alexander Graf 16 Feb '17

16 Feb '17

Howdy, Currently on arm64 there is a big pile of mess when it comes to MMU support and page tables. Each board does its own little thing and the generic code is pretty dumb and nobody actually uses it. This patch set tries to clean that up. After this series is applied, all boards except for the FSL Layerscape ones are converted to the new generic page table logic and have icache+dcache enabled. The new code always uses 4k page size. It dynamically allocates 1G or 2M pages for ranges that fit. When a dcache attribute request comes in that requires a smaller granularity than our previous allocation could fulfill, pages get automatically split. I have tested and verified the code works on HiKey (bare metal), vexpress64 (Foundation Model) and zynqmp (QEMU). The TX1 target is untested, but given the simplicity of the maps I doubt it'll break. ThunderX in theory should also work, but I haven't tested it. I would be very happy if people with access to those system could give the patch set a try. With this we're a big step closer to a good base line for EFI payload support, since we can now just require that all boards always have dcache enabled. I would also be incredibly happy if some Freescale people could look at their MMU code and try to unify it into the now cleaned up generic code. I don't think we're far off here. Alex Alexander Graf (9): thunderx: Calculate TCR dynamically arm64: Make full va map code more dynamic zymqmp: Replace home grown mmu code with generic table approach tegra: Replace home grown mmu code with generic table approach vexpress64: Add MMU tables dwmmc: Increase retry timeout hikey: Add MMU tables arm64: Remove non-full-va map code arm64: Only allow dcache disabled in SPL builds arch/arm/cpu/armv8/cache_v8.c | 444 ++++++++++++++++++------- arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 29 +- arch/arm/cpu/armv8/zynqmp/cpu.c | 169 ---------- arch/arm/include/asm/arch-fsl-layerscape/cpu.h | 94 +++--- arch/arm/include/asm/armv8/mmu.h | 120 ++----- arch/arm/include/asm/global_data.h | 6 +- arch/arm/include/asm/system.h | 7 +- arch/arm/mach-tegra/Makefile | 1 - arch/arm/mach-tegra/arm64-mmu.c | 131 -------- doc/README.arm64 | 20 -- drivers/mmc/dw_mmc.c | 2 +- include/configs/hikey.h | 18 +- include/configs/tegra210-common.h | 15 + include/configs/thunderx_88xx.h | 31 +- include/configs/vexpress_aemv8a.h | 19 +- include/configs/xilinx_zynqmp.h | 43 +++ 16 files changed, 526 insertions(+), 623 deletions(-) delete mode 100644 arch/arm/mach-tegra/arm64-mmu.c -- 1.8.5.6

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[U-Boot] [PATCH v2 0/8] board: sama5d4: convert boards to support DM/DT
by Wenyou Yang 06 Feb '17

06 Feb '17

The purpose of patch set is to convert the board to support Device Tree and Driver Model. They are based on the following patches: 1./ [PATCH v3 0/2] pinctrl: at91: Add pinctrl driver http://lists.denx.de/pipermail/u-boot/2016-October/270991.html 2./ [PATCH v1 0/2] ARM: dts: at91: add dts files for the boards of SAMA5D4 http://lists.denx.de/pipermail/u-boot/2016-October/271004.html 3./ [PATCH v3 0/2] serial: atmel_usart: Support to enable an early debug UART http://lists.denx.de/pipermail/u-boot/2016-October/270250.html 4./ [PATCH v1 0/3] gpio: at91_gpio: Add option and clock support http://lists.denx.de/pipermail/u-boot/2016-October/270687.html 5./ [PATCH v10] dm: at91: Add driver model support for the spi driver http://lists.denx.de/pipermail/u-boot/2016-October/270516.html Changes in v2: - Restore the wrong removal #define CONFIG_USB_ETHER. - Update the commit log. - Restore the wrong removal of USB related code. - Update the commit log. - Restore wrong removal of #define CONFIG_USB_ETHER. - Update the commit log. - Restore the wrong removal USB related code. - Update the commit log. Wenyou Yang (8): configs: at91-sama5_common: fix for CONFIG_AT91_GPIO board: sama5d4_xplained: move config options to defconfig board: sama5d4_xplained: clean up code board: sama5d4_xplained: enable early debug UART board: sama5d4ek: move config options to defconfig board: sama5d4ek: clean up code board: sama5d4ek: enable early debug UART configs: sama5d4: move CONFIG_SYS_NO_FLASH to *defconfig board/atmel/sama5d4_xplained/sama5d4_xplained.c | 100 ++++------------------- board/atmel/sama5d4ek/sama5d4ek.c | 101 ++++-------------------- configs/sama5d4_xplained_mmc_defconfig | 31 +++++++- configs/sama5d4_xplained_nandflash_defconfig | 33 +++++++- configs/sama5d4_xplained_spiflash_defconfig | 31 +++++++- configs/sama5d4ek_mmc_defconfig | 30 +++++++ configs/sama5d4ek_nandflash_defconfig | 30 +++++++ configs/sama5d4ek_spiflash_defconfig | 30 +++++++ include/configs/at91-sama5_common.h | 2 + include/configs/sama5d4_xplained.h | 28 +------ include/configs/sama5d4ek.h | 29 +------ 11 files changed, 216 insertions(+), 229 deletions(-) -- 2.7.4

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[U-Boot] [PATCH v2 0/3] gpio: at91_gpio: Add option and clock support
by Wenyou Yang 04 Feb '17

04 Feb '17

The CONFIG_AT91_GPIO option is added in Kconfig to be used to select the AT91 PIO GPIO driver, and the clock is supported. Changes in v2: - Add Reviewed-by tag. Wenyou Yang (3): gpio: Kconfig: Add CONFIG_AT91_GPIO option gpio: at91_gpio: Add the device tree support gpio: at91_gpio: Add the clock support drivers/gpio/Kconfig | 13 +++++++++++++ drivers/gpio/at91_gpio.c | 28 ++++++++++++++++++++++++++++ 2 files changed, 41 insertions(+) -- 2.7.4

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[U-Boot] [PATCH v1] clk: at91: pmc: add more compatibles
by Wenyou Yang 04 Feb '17

04 Feb '17

To keep the compatibles aligned with kernel, add more compatibles. Signed-off-by: Wenyou Yang <wenyou.yang(a)atmel.com> --- drivers/clk/at91/pmc.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/clk/at91/pmc.c b/drivers/clk/at91/pmc.c index 76ba91a..f866959 100644 --- a/drivers/clk/at91/pmc.c +++ b/drivers/clk/at91/pmc.c @@ -15,7 +15,13 @@ DECLARE_GLOBAL_DATA_PTR; static const struct udevice_id at91_pmc_match[] = { + { .compatible = "atmel,at91rm9200-pmc" }, + { .compatible = "atmel,at91sam9260-pmc" }, + { .compatible = "atmel,at91sam9g45-pmc" }, + { .compatible = "atmel,at91sam9n12-pmc" }, + { .compatible = "atmel,at91sam9x5-pmc" }, { .compatible = "atmel,sama5d2-pmc" }, + { .compatible = "atmel,sama5d3-pmc" }, {} }; -- 2.7.4

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[U-Boot] [PATCH] tools: imximage: use 'new style' header length for imximage v1
by Martin Kaiser 27 Jan '17

27 Jan '17

From: Martin Kaiser <martin(a)kaiser.cx> We can use the same mechanism for the imximage v1 header length calculations that we're using for v2. Doing so, we can share more code between v1 and v2. Additionally, *header_size_ptr in imximage_set_header() will then have the correct value for both v1 and v2. Signed-off-by: Martin Kaiser <martin(a)kaiser.cx> --- I discovered the problem when I tried to use csf_ptr with imximage v1 (as part of a private modification). *csf_ptr = params->ep + *header_size_ptr - imximage_init_loadsize; = params->ep + sbuf->st_size + imximage_ivt_offset - imximage_init_loadsize; = params->ep + padded data file size + alloc_len - (imximage_init_loadsize - imximage_ivt_offset); This works only if alloc_len == imximage_init_loadsize - imximage_ivt_offset, not if alloc_len is always 4096. tools/imximage.c | 43 ++++++++++++++++++++----------------------- 1 file changed, 20 insertions(+), 23 deletions(-) diff --git a/tools/imximage.c b/tools/imximage.c index 092d550..e280da6 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -291,8 +291,7 @@ static void set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len, /* Set magic number */ fhdr_v1->app_code_barker = APP_CODE_BARKER; - /* TODO: check i.MX image V1 handling, for now use 'old' style */ - hdr_base = entry_point - 4096; + hdr_base = entry_point - imximage_init_loadsize + flash_offset; fhdr_v1->app_dest_ptr = hdr_base - flash_offset; fhdr_v1->app_code_jump_vector = entry_point; @@ -649,6 +648,7 @@ static void imximage_set_header(void *ptr, struct stat *sbuf, int ifd, { struct imx_header *imxhdr = (struct imx_header *)ptr; uint32_t dcd_len; + uint32_t imx_hdr_size; /* * In order to not change the old imx cfg file @@ -664,12 +664,13 @@ static void imximage_set_header(void *ptr, struct stat *sbuf, int ifd, /* Parse dcd configuration file */ dcd_len = parse_cfg_file(imxhdr, params->imagename); - if (imximage_version == IMXIMAGE_V2) { - if (imximage_init_loadsize < imximage_ivt_offset + - sizeof(imx_header_v2_t)) - imximage_init_loadsize = imximage_ivt_offset + - sizeof(imx_header_v2_t); - } + if (imximage_version == IMXIMAGE_V1) + imx_hdr_size = sizeof(imx_header_v1_t); + else + imx_hdr_size = sizeof(imx_header_v2_t); + + if (imximage_init_loadsize < imximage_ivt_offset + imx_hdr_size) + imximage_init_loadsize = imximage_ivt_offset + imx_hdr_size; /* Set the imx header */ (*set_imx_hdr)(imxhdr, dcd_len, params->ep, imximage_ivt_offset); @@ -722,6 +723,7 @@ static int imximage_generate(struct image_tool_params *params, struct stat sbuf; char *datafile = params->datafile; uint32_t pad_len; + uint32_t imx_hdr_size; memset(&imximage_header, 0, sizeof(imximage_header)); @@ -739,16 +741,15 @@ static int imximage_generate(struct image_tool_params *params, /* Parse dcd configuration file */ parse_cfg_file(&imximage_header, params->imagename); - /* TODO: check i.MX image V1 handling, for now use 'old' style */ - if (imximage_version == IMXIMAGE_V1) { - alloc_len = 4096; - } else { - if (imximage_init_loadsize < imximage_ivt_offset + - sizeof(imx_header_v2_t)) - imximage_init_loadsize = imximage_ivt_offset + - sizeof(imx_header_v2_t); - alloc_len = imximage_init_loadsize - imximage_ivt_offset; - } + if (imximage_version == IMXIMAGE_V1) + imx_hdr_size = sizeof(imx_header_v1_t); + else + imx_hdr_size = sizeof(imx_header_v2_t); + + if (imximage_init_loadsize < imximage_ivt_offset + imx_hdr_size) + imximage_init_loadsize = imximage_ivt_offset + imx_hdr_size; + + alloc_len = imximage_init_loadsize - imximage_ivt_offset; if (alloc_len < sizeof(struct imx_header)) { fprintf(stderr, "%s: header error\n", @@ -779,11 +780,7 @@ static int imximage_generate(struct image_tool_params *params, pad_len = ROUND(sbuf.st_size, 4096) - sbuf.st_size; - /* TODO: check i.MX image V1 handling, for now use 'old' style */ - if (imximage_version == IMXIMAGE_V1) - return 0; - else - return pad_len; + return pad_len; } -- 1.7.10.4

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[U-Boot] [PATCH 0/5][v2] Update LS2080A SoC code to support LS2088A SoC
by Priyanka Jain 25 Jan '17

25 Jan '17

From: Priyanka Jain <Priyanka.Jain(a)freescale.com> LS2088A is similar to LS2080A SoC with some differences like 1)Timer controller offset is different 2)It has A72 cores 3)Process to release secondary cores is different 4)LS2088A SoC has TZASC controller In preparation of using same binary for LS2088A and LS2080A as both are using same development boards. code is update to detect difference based on SVR at runtime Priyanka Jain (5): armv8: lsch3: Use SVR based timer base address detection armv8: fsl-layerscape: Update TZASC registers type armv8: fsl-layerscape : Check SVR for initializing TZASC armv8: fsl-layerscape: Add NXP LS2088A SoC support armv8/fsl-lsch3: Update code to release secondary cores arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 16 +++++- arch/arm/cpu/armv8/fsl-layerscape/cpu.h | 1 + arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc | 58 +++++++++++++++++++ arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S | 47 +++++++++++----- arch/arm/cpu/armv8/fsl-layerscape/mp.c | 59 ++++++++++++++++++- arch/arm/cpu/armv8/fsl-layerscape/soc.c | 6 +- arch/arm/include/asm/arch-fsl-layerscape/config.h | 1 + arch/arm/include/asm/arch-fsl-layerscape/cpu.h | 4 + .../include/asm/arch-fsl-layerscape/immap_lsch3.h | 7 ++- arch/arm/include/asm/arch-fsl-layerscape/soc.h | 10 +++ board/freescale/ls2080a/MAINTAINERS | 2 +- board/freescale/ls2080aqds/MAINTAINERS | 2 +- board/freescale/ls2080aqds/README | 12 ++-- board/freescale/ls2080ardb/MAINTAINERS | 2 +- board/freescale/ls2080ardb/README | 8 +- 15 files changed, 198 insertions(+), 37 deletions(-) -- Changes for v2: Rename LS2080A_LS2085A_TIMER_ADDR to SYS_FSL_LS2080A_LS2085A_TIMER_ADDR in first patch 1.7.4.1

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