January 2016 - U-Boot

[U-Boot] [PATCH v2 0/8] driver model bring-up of keystone net on k2hk, k2l, k2e and k2g evm
by Mugunthan V N 25 Jan '16

25 Jan '16

This patch series enables keystone net to adopt driver model. This has been tested on the following evms (logs [1]) by tftp zImage from server. * k2hk evm * k2l evm Also pushed a branch for testing [2] Changes from initial version: * No code changes, changes only in commit text change in PATCH 2/8 *s/warning/error* [1] - http://pastebin.ubuntu.com/14596525/ [2] - git://git.ti.com/~mugunthanvnm/ti-u-boot/mugunth-ti-u-boot.git dm-keystone-net-v2 Mugunthan V N (8): board: ti: ks2_evm: remove board_eth_init when CONFIG_DM_ETH is defined drivers: net: phy: micrel: fix build errors with CONFIG_DM_ETH drivers: net: keystone_net: convert driver to adopt device driver model defconfig: k2hk_evm_defconfig: enable net driver model defconfig: k2l_evm_defconfig: enable net driver model defconfig: k2e_evm_defconfig: enable net driver model ARM: dts: k2g: Add keystone net dts files defconfig: k2g_evm_defconfig: enable net driver model arch/arm/dts/k2g-evm.dts | 12 ++ arch/arm/dts/k2g-netcp.dtsi | 151 ++++++++++++++++ arch/arm/dts/k2g.dtsi | 13 ++ board/ti/ks2_evm/board.c | 2 + configs/k2e_evm_defconfig | 1 + configs/k2g_evm_defconfig | 1 + configs/k2hk_evm_defconfig | 1 + configs/k2l_evm_defconfig | 1 + drivers/net/keystone_net.c | 418 +++++++++++++++++++++++++++++++++++++++----- drivers/net/phy/micrel.c | 6 +- 10 files changed, 562 insertions(+), 44 deletions(-) create mode 100644 arch/arm/dts/k2g-netcp.dtsi -- 2.7.0.rc3

3 19

[U-Boot] [PATCH v2 0/4] Add LPDDR3 support for A83T
by Vishnu Patekar 25 Jan '16

25 Jan '16

This adds LPDDR3 support for A83T and support for Banana Pi M3 which has LPDDR3. These patches are based on u-boot-sunxi next branch. These patches tesed on Banana-pi M3. DCDC5 voltage is kept as 1.2V changes from v1 -> v2 1. introduce CONFIG_DRAM_TYPE for A83T default 3(DDR3), removed DRAM_TYPE from Obsolete SYS_EXTRA_OPTIONS. 2. Cleanup in seperate patch. 3. set rank 2, in mctl_sys_init. Vishnu Patekar (4): sunxi: redundant code cleanup from a83t dram init sunxi: groundwork to support new dram type for A83T sunxi: add support for LPDDR3 for A83T sunxi: Add suport for A83T based Banana-pi M3 Board arch/arm/cpu/armv7/sunxi/dram_sun8i_a83t.c | 70 +++++++++++++++++++---- arch/arm/dts/Makefile | 3 +- arch/arm/dts/sun8i-a83t-bananapi-m3-v1.2.dts | 64 +++++++++++++++++++++ arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h | 9 ++- board/sunxi/Kconfig | 6 ++ board/sunxi/MAINTAINERS | 5 ++ configs/Bananapi_m3_defconfig | 26 +++++++++ 7 files changed, 170 insertions(+), 13 deletions(-) create mode 100644 arch/arm/dts/sun8i-a83t-bananapi-m3-v1.2.dts create mode 100644 configs/Bananapi_m3_defconfig -- 1.9.1

3 7

[U-Boot] [PATCH 0/4] atmel_nand: misc update in atmel nandflash driver
by Josh Wu 25 Jan '16

25 Jan '16

Since the nand driver is synced with v4.1 kernel, here is a update also for atmel_nand driver. which includes: 1. fix format and using definition not magic number. 2. use ecc_{strength, step}_ds instead of our own function. 3. add delay time to support MF29F32G08CBADA. Josh Wu (4): atmel_nand: use nand ecc_{strength,step}_ds instead of our own function atmel_nand: add '\n' in the end of error message for better display atmel_nand: increase more delay to support MT29F32G08CBADA atmel_nand: use the definition: PMECC_OOB_RESERVED_BYTES instead magic number drivers/mtd/nand/atmel_nand.c | 52 +++++++++---------------------------------- 1 file changed, 11 insertions(+), 41 deletions(-) -- 1.9.1

3 10

[U-Boot] [PATCH v2] usb: add clock support for generic EHCI
by Masahiro Yamada 25 Jan '16

25 Jan '16

This driver is designed in a generic manner, so clocks should be handled genericly as well. Signed-off-by: Masahiro Yamada <yamada.masahiro(a)socionext.com> --- Changes in v2: - rephrase git-log - rebase on commit 12f229ea - do not store clk devices and IDs in the private data drivers/usb/host/ehci-generic.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/drivers/usb/host/ehci-generic.c b/drivers/usb/host/ehci-generic.c index 1292caa..98f9db7 100644 --- a/drivers/usb/host/ehci-generic.c +++ b/drivers/usb/host/ehci-generic.c @@ -5,6 +5,7 @@ */ #include <common.h> +#include <clk.h> #include <dm.h> #include "ehci.h" @@ -21,6 +22,20 @@ static int ehci_usb_probe(struct udevice *dev) { struct ehci_hccr *hccr = (struct ehci_hccr *)dev_get_addr(dev); struct ehci_hcor *hcor; + int i = 0; + + while (1) { + struct udevice *clk_dev; + int clk_id; + + clk_id = clk_get_by_index(dev, i, &clk_dev); + if (clk_id < 0) + break; + if (clk_enable(clk_dev, clk_id)) + printf("failed to enable clock (dev=%s, id=%d)\n", + clk_dev->name, clk_id); + i++; + } hcor = (struct ehci_hcor *)((uintptr_t)hccr + HC_LENGTH(ehci_readl(&hccr->cr_capbase))); -- 1.9.1

2 3

[U-Boot] [PATCH 1/2] mx6: soc: Add ENET2 mac address support
by Ye Li 25 Jan '16

25 Jan '16

The i.MX6SX and i.MX6UL has two ENET controllers, add support for reading MAC address from fuse for ENET2. Signed-off-by: Ye Li <ye.li(a)nxp.com> --- arch/arm/cpu/armv7/mx6/soc.c | 32 +++++++++++++++++++++-------- arch/arm/include/asm/arch-mx6/imx-regs.h | 19 +---------------- 2 files changed, 24 insertions(+), 27 deletions(-) diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c index bf5ae8c..e521bf2 100644 --- a/arch/arm/cpu/armv7/mx6/soc.c +++ b/arch/arm/cpu/armv7/mx6/soc.c @@ -364,15 +364,29 @@ void imx_get_mac_from_fuse(int dev_id, unsigned char *mac) struct fuse_bank4_regs *fuse = (struct fuse_bank4_regs *)bank->fuse_regs; - u32 value = readl(&fuse->mac_addr_high); - mac[0] = (value >> 8); - mac[1] = value ; - - value = readl(&fuse->mac_addr_low); - mac[2] = value >> 24 ; - mac[3] = value >> 16 ; - mac[4] = value >> 8 ; - mac[5] = value ; + if ((is_cpu_type(MXC_CPU_MX6SX) || is_cpu_type(MXC_CPU_MX6UL)) && + 1 == dev_id) { + u32 value = readl(&fuse->mac_addr2); + mac[0] = value >> 24 ; + mac[1] = value >> 16 ; + mac[2] = value >> 8 ; + mac[3] = value ; + + value = readl(&fuse->mac_addr_high); + mac[4] = value >> 24 ; + mac[5] = value >> 16 ; + + } else { + u32 value = readl(&fuse->mac_addr_high); + mac[0] = (value >> 8); + mac[1] = value ; + + value = readl(&fuse->mac_addr_low); + mac[2] = value >> 24 ; + mac[3] = value >> 16 ; + mac[4] = value >> 8 ; + mac[5] = value ; + } } #endif diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h index f24525e..d0324a0 100644 --- a/arch/arm/include/asm/arch-mx6/imx-regs.h +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h @@ -715,7 +715,6 @@ struct fuse_bank1_regs { u32 rsvd7[3]; }; -#if (defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL)) struct fuse_bank4_regs { u32 sjc_resp_low; u32 rsvd0[3]; @@ -725,29 +724,13 @@ struct fuse_bank4_regs { u32 rsvd2[3]; u32 mac_addr_high; u32 rsvd3[3]; - u32 mac_addr2; + u32 mac_addr2; /*For i.MX6SX and i.MX6UL*/ u32 rsvd4[7]; u32 gp1; u32 rsvd5[3]; u32 gp2; u32 rsvd6[3]; }; -#else -struct fuse_bank4_regs { - u32 sjc_resp_low; - u32 rsvd0[3]; - u32 sjc_resp_high; - u32 rsvd1[3]; - u32 mac_addr_low; - u32 rsvd2[3]; - u32 mac_addr_high; - u32 rsvd3[0xb]; - u32 gp1; - u32 rsvd4[3]; - u32 gp2; - u32 rsvd5[3]; -}; -#endif struct aipstz_regs { u32 mprot0; -- 1.7.4.1

3 5

[U-Boot] [PATCH v3] ARM: Add Support for the VInCo platform
by Gregory CLEMENT 24 Jan '16

24 Jan '16

The Versatile Industrial Communication platform is a community oriented board from Landis + Gyr. It comes with: - an RS-485 port - 2 Ethernet ports - a wireless M-BUS - a 4G modem - a 4MB SPI flash - a 4GB eMMC Signed-off-by: Gregory CLEMENT <gregory.clement(a)free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre(a)atmel.com> --- Hi again, Some of my fixes were not commit in my previous version. This version should be the correct one, I also added the acked-by from Nicolas. Sorry for not having seen it before. Thanks, Gregory arch/arm/mach-at91/Kconfig | 6 ++ board/l+g/vinco/Kconfig | 12 +++ board/l+g/vinco/Makefile | 1 + board/l+g/vinco/vinco.c | 212 +++++++++++++++++++++++++++++++++++++++++++++ configs/vinco_defconfig | 13 +++ include/configs/vinco.h | 169 ++++++++++++++++++++++++++++++++++++ 6 files changed, 413 insertions(+) create mode 100644 board/l+g/vinco/Kconfig create mode 100644 board/l+g/vinco/Makefile create mode 100644 board/l+g/vinco/vinco.c create mode 100644 configs/vinco_defconfig create mode 100644 include/configs/vinco.h diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index c333647..3dfbb5f 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -114,6 +114,11 @@ config TARGET_SMARTWEB select CPU_ARM926EJS select SUPPORT_SPL +config TARGET_VINCO + bool "Support VINCO" + select CPU_V7 + select SUPPORT_SPL + endchoice config SYS_SOC @@ -136,6 +141,7 @@ source "board/bluewater/snapper9260/Kconfig" source "board/calao/usb_a9263/Kconfig" source "board/egnite/ethernut5/Kconfig" source "board/esd/meesc/Kconfig" +source "board/l+g/vinco/Kconfig" source "board/mini-box/picosam9g45/Kconfig" source "board/ronetix/pm9261/Kconfig" source "board/ronetix/pm9263/Kconfig" diff --git a/board/l+g/vinco/Kconfig b/board/l+g/vinco/Kconfig new file mode 100644 index 0000000..229b5ea --- /dev/null +++ b/board/l+g/vinco/Kconfig @@ -0,0 +1,12 @@ +if TARGET_VINCO + +config SYS_BOARD + default "vinco" + +config SYS_VENDOR + default "l+g" + +config SYS_CONFIG_NAME + default "vinco" + +endif diff --git a/board/l+g/vinco/Makefile b/board/l+g/vinco/Makefile new file mode 100644 index 0000000..a2b8a2b --- /dev/null +++ b/board/l+g/vinco/Makefile @@ -0,0 +1 @@ +obj-y += vinco.o diff --git a/board/l+g/vinco/vinco.c b/board/l+g/vinco/vinco.c new file mode 100644 index 0000000..3d7af09 --- /dev/null +++ b/board/l+g/vinco/vinco.c @@ -0,0 +1,212 @@ +/* + * Board file for the VInCo platform + * Based on the the SAMA5-EK board file + * Configuration settings for the VInCo platform. + * Copyright (C) 2014 Atmel + * Bo Shen <voice.shen(a)atmel.com> + * Copyright (C) 2015 Free Electrons + * Gregory CLEMENT <gregory.clement(a)free-electrons.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/at91_common.h> +#include <asm/arch/at91_pmc.h> +#include <asm/arch/at91_rstc.h> +#include <asm/arch/atmel_mpddrc.h> +#include <asm/arch/atmel_usba_udc.h> +#include <asm/arch/gpio.h> +#include <asm/arch/clk.h> +#include <asm/arch/sama5d3_smc.h> +#include <asm/arch/sama5d4.h> +#include <atmel_hlcdc.h> +#include <atmel_mci.h> +#include <lcd.h> +#include <mmc.h> +#include <net.h> +#include <netdev.h> +#include <nand.h> +#include <spi.h> +#include <version.h> + +DECLARE_GLOBAL_DATA_PTR; + +#ifdef CONFIG_ATMEL_SPI +int spi_cs_is_valid(unsigned int bus, unsigned int cs) +{ + return bus == 0 && cs == 0; +} + +void spi_cs_activate(struct spi_slave *slave) +{ + at91_set_pio_output(AT91_PIO_PORTC, 3, 0); +} + +void spi_cs_deactivate(struct spi_slave *slave) +{ + at91_set_pio_output(AT91_PIO_PORTC, 3, 1); +} + +static void vinco_spi0_hw_init(void) +{ + at91_set_a_periph(AT91_PIO_PORTC, 0, 0); /* SPI0_MISO */ + at91_set_a_periph(AT91_PIO_PORTC, 1, 0); /* SPI0_MOSI */ + at91_set_a_periph(AT91_PIO_PORTC, 2, 0); /* SPI0_SPCK */ + + at91_set_pio_output(AT91_PIO_PORTC, 3, 1); /* SPI0_CS0 */ + + /* Enable clock */ + at91_periph_clk_enable(ATMEL_ID_SPI0); +} +#endif /* CONFIG_ATMEL_SPI */ + + +#ifdef CONFIG_CMD_USB +static void vinco_usb_hw_init(void) +{ + at91_set_pio_output(AT91_PIO_PORTE, 11, 0); + at91_set_pio_output(AT91_PIO_PORTE, 12, 0); + at91_set_pio_output(AT91_PIO_PORTE, 10, 0); +} +#endif + + +#ifdef CONFIG_GENERIC_ATMEL_MCI +void vinco_mci0_hw_init(void) +{ + at91_set_b_periph(AT91_PIO_PORTC, 5, 1); /* MCI0 CDA */ + at91_set_b_periph(AT91_PIO_PORTC, 6, 1); /* MCI0 DA0 */ + at91_set_b_periph(AT91_PIO_PORTC, 7, 1); /* MCI0 DA1 */ + at91_set_b_periph(AT91_PIO_PORTC, 8, 1); /* MCI0 DA2 */ + at91_set_b_periph(AT91_PIO_PORTC, 9, 1); /* MCI0 DA3 */ + at91_set_b_periph(AT91_PIO_PORTC, 10, 1); /* MCI0 DA4 */ + at91_set_b_periph(AT91_PIO_PORTC, 11, 1); /* MCI0 DA5 */ + at91_set_b_periph(AT91_PIO_PORTC, 12, 1); /* MCI0 DA6 */ + at91_set_b_periph(AT91_PIO_PORTC, 13, 1); /* MCI0 DA7 */ + at91_set_b_periph(AT91_PIO_PORTC, 4, 0); /* MCI0 CLK */ + + /* + * As the mci io internal pull down is too strong, so if the io needs + * external pull up, the pull up resistor will be very small, if so + * the power consumption will increase, so disable the interanl pull + * down to save the power. + */ + at91_set_pio_pulldown(AT91_PIO_PORTC, 4, 0); + at91_set_pio_pulldown(AT91_PIO_PORTC, 5, 0); + at91_set_pio_pulldown(AT91_PIO_PORTC, 6, 0); + at91_set_pio_pulldown(AT91_PIO_PORTC, 7, 0); + at91_set_pio_pulldown(AT91_PIO_PORTC, 8, 0); + at91_set_pio_pulldown(AT91_PIO_PORTC, 9, 0); + at91_set_pio_pulldown(AT91_PIO_PORTC, 10, 0); + at91_set_pio_pulldown(AT91_PIO_PORTC, 11, 0); + at91_set_pio_pulldown(AT91_PIO_PORTC, 12, 0); + at91_set_pio_pulldown(AT91_PIO_PORTC, 13, 0); + + /* Enable clock */ + at91_periph_clk_enable(ATMEL_ID_MCI0); +} + +int board_mmc_init(bd_t *bis) +{ + /* Enable power for MCI0 interface */ + at91_set_pio_output(AT91_PIO_PORTE, 7, 1); + + return atmel_mci_init((void *)ATMEL_BASE_MCI0); +} +#endif /* CONFIG_GENERIC_ATMEL_MCI */ + +#ifdef CONFIG_MACB +void vinco_macb0_hw_init(void) +{ + at91_set_a_periph(AT91_PIO_PORTB, 0, 0); /* ETXCK_EREFCK */ + at91_set_a_periph(AT91_PIO_PORTB, 6, 0); /* ERXDV */ + at91_set_a_periph(AT91_PIO_PORTB, 8, 0); /* ERX0 */ + at91_set_a_periph(AT91_PIO_PORTB, 9, 0); /* ERX1 */ + at91_set_a_periph(AT91_PIO_PORTB, 7, 0); /* ERXER */ + at91_set_a_periph(AT91_PIO_PORTB, 2, 0); /* ETXEN */ + at91_set_a_periph(AT91_PIO_PORTB, 12, 0); /* ETX0 */ + at91_set_a_periph(AT91_PIO_PORTB, 13, 0); /* ETX1 */ + at91_set_a_periph(AT91_PIO_PORTB, 17, 0); /* EMDIO */ + at91_set_a_periph(AT91_PIO_PORTB, 16, 0); /* EMDC */ + + /* Enable clock */ + at91_periph_clk_enable(ATMEL_ID_GMAC0); + + /* Enable Phy*/ + at91_set_pio_output(AT91_PIO_PORTE, 8, 1); +} +#endif + +static void vinco_serial3_hw_init(void) +{ + at91_set_b_periph(AT91_PIO_PORTE, 17, 1); /* TXD3 */ + at91_set_b_periph(AT91_PIO_PORTE, 16, 0); /* RXD3 */ + + /* Enable clock */ + at91_periph_clk_enable(ATMEL_ID_USART3); +} + +int board_early_init_f(void) +{ + at91_periph_clk_enable(ATMEL_ID_PIOA); + at91_periph_clk_enable(ATMEL_ID_PIOB); + at91_periph_clk_enable(ATMEL_ID_PIOC); + at91_periph_clk_enable(ATMEL_ID_PIOD); + at91_periph_clk_enable(ATMEL_ID_PIOE); + + vinco_serial3_hw_init(); + + return 0; +} + +int board_init(void) +{ + /* adress of boot parameters */ + gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; + +#ifdef CONFIG_ATMEL_SPI + vinco_spi0_hw_init(); +#endif + +#ifdef CONFIG_GENERIC_ATMEL_MCI + vinco_mci0_hw_init(); +#endif +#ifdef CONFIG_MACB + vinco_macb0_hw_init(); +#endif +#ifdef CONFIG_CMD_USB + vinco_usb_hw_init(); +#endif +#ifdef CONFIG_USB_GADGET_ATMEL_USBA + at91_udp_hw_init(); +#endif + + return 0; +} + +int dram_init(void) +{ + gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE, + CONFIG_SYS_SDRAM_SIZE); + return 0; +} + +int board_eth_init(bd_t *bis) +{ + int rc = 0; + +#ifdef CONFIG_MACB + rc = macb_eth_initialize(0, (void *)ATMEL_BASE_GMAC0, 0x00); +#endif + +#ifdef CONFIG_USB_GADGET_ATMEL_USBA + usba_udc_probe(&pdata); +#ifdef CONFIG_USB_ETH_RNDIS + usb_eth_initialize(bis); +#endif +#endif + + return rc; +} diff --git a/configs/vinco_defconfig b/configs/vinco_defconfig new file mode 100644 index 0000000..7cae79b --- /dev/null +++ b/configs/vinco_defconfig @@ -0,0 +1,13 @@ +CONFIG_ARM=y +CONFIG_ARCH_AT91=y +CONFIG_TARGET_VINCO=y +CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_SERIALFLASH" +CONFIG_SYS_PROMPT="vinco => " +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_SPI_FLASH=y +CONFIG_NETDEVICES=y +CONFIG_ETH_DESIGNWARE=y diff --git a/include/configs/vinco.h b/include/configs/vinco.h new file mode 100644 index 0000000..b96150e --- /dev/null +++ b/include/configs/vinco.h @@ -0,0 +1,169 @@ +/* + * Configuration settings for the VInCo platform. + * + * Based on the settings for the SAMA5-EK board + * Copyright (C) 2014 Atmel + * Bo Shen <voice.shen(a)atmel.com> + * Copyright (C) 2015 Free Electrons + * Gregory CLEMENT gregory.clement(a)free-electrons.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/* No NOR flash, this definition should be put before common header */ +#define CONFIG_SYS_NO_FLASH + +#include "at91-sama5_common.h" + +/* The value in the common file is too far away for the VInCo platform */ +#ifdef CONFIG_SYS_TEXT_BASE +#undef CONFIG_SYS_TEXT_BASE +#endif +#define CONFIG_SYS_TEXT_BASE 0x20f00000 + +/* serial console */ +#define CONFIG_ATMEL_USART +#define CONFIG_USART_BASE ATMEL_BASE_USART3 +#define CONFIG_USART_ID ATMEL_ID_USART3 + +/* SDRAM */ +#define CONFIG_NR_DRAM_BANKS 1 +#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS +#define CONFIG_SYS_SDRAM_SIZE 0x4000000 + + +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE) + +#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ + +/* SerialFlash */ +#define CONFIG_CMD_SF + +#ifdef CONFIG_CMD_SF +#define CONFIG_ATMEL_SPI +#define CONFIG_ATMEL_SPI0 +#define CONFIG_SPI_FLASH_STMICRO +#define CONFIG_SF_DEFAULT_BUS 0 +#define CONFIG_SF_DEFAULT_CS 0 +#define CONFIG_SF_DEFAULT_SPEED 50000000 +#define CONFIG_ENV_SPI_MAX_HZ 50000000 +#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) +#define CONFIG_ENV_SPI_MODE (SPI_MODE_0) +#endif + + +/* MMC */ +#define CONFIG_CMD_MMC + +#ifdef CONFIG_CMD_MMC +#define CONFIG_SUPPORT_EMMC_BOOT +#define CONFIG_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_GENERIC_ATMEL_MCI +#define ATMEL_BASE_MMCI ATMEL_BASE_MCI1 +#define CONFIG_SYS_MMC_CLK_OD 500000 + +/* For generating MMC partitions */ +#define CONFIG_PARTITION_UUIDS +#define CONFIG_RANDOM_UUID +#define CONFIG_EFI_PARTITION +#define CONFIG_CMD_GPT + +#endif + +/* USB */ +#define CONFIG_CMD_USB + +#ifdef CONFIG_CMD_USB +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_ATMEL +#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3 +#define CONFIG_USB_STORAGE +#endif + +/* USB device */ +#define CONFIG_USB_GADGET +#define CONFIG_USB_GADGET_DUALSPEED +#define CONFIG_USB_GADGET_ATMEL_USBA +#define CONFIG_USB_ETHER +#define CONFIG_USB_ETH_RNDIS +#define CONFIG_USBNET_MANUFACTURER "L+G VInCo" + +#if defined(CONFIG_CMD_USB) || defined(CONFIG_CMD_MMC) +#define CONFIG_CMD_FAT +#define CONFIG_DOS_PARTITION +#endif + +/* Ethernet Hardware */ +#define CONFIG_PHYLIB +#define CONFIG_CMD_MII +#define CONFIG_PHY_SMSC +#define CONFIG_MACB +#define CONFIG_RMII +#define CONFIG_NET_RETRY_COUNT 20 +#define CONFIG_MACB_SEARCH_PHY + + +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_ETHER_SMSC95XX +#define CONFIG_USB_ETHER_RNDIS + + +#ifdef CONFIG_SYS_USE_SERIALFLASH +/* bootstrap + u-boot + env + linux in serial flash */ +#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS +#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS +/* Use our own mapping for the VInCo platform */ +#undef CONFIG_ENV_OFFSET +#undef CONFIG_ENV_SIZE + +#define CONFIG_ENV_OFFSET 0x10000 +#define CONFIG_ENV_SIZE 0x10000 + +/* Update the bootcommand according to our mapping for the VInCo platform */ +#undef CONFIG_BOOTCOMMAND +#define CONFIG_BOOTCOMMAND "mmc dev 0 0;" \ + "mmc read ${loadaddr} ${k_offset} ${k_blksize};" \ + "mmc read ${oftaddr} ${dtb_offset} ${dtb_blksize};" \ + "bootz ${loadaddr} - ${oftaddr}" + +#undef CONFIG_BOOTARGS +#define CONFIG_BOOTARGS "console=ttyS0,115200 earlyprintk rw root=/dev/mmcblk0p2 rootfstype=ext4 rootwait quiet lpj=1990656" + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "kernel_start=0x20000\0" \ + "kernel_size=0x800000\0" \ + "mmcblksize=0x200\0" \ + "oftaddr=0x21000000\0" \ + "loadaddr=0x22000000\0" \ + "update_uboot=tftp ${loadaddr} u-boot.bin;sf probe 0;" \ + "sf erase 0x20000 0x4B000; sf write ${loadaddr} 0x20000 0x4B000\0" \ + "create_partition=setexpr dtb_start ${kernel_start} + 0x400000;" \ + "setexpr rootfs_start ${kernel_start} + ${kernel_size};" \ + "setenv partitions 'name=kernel,size=${kernel_size}," \ + "start=${kernel_start};name=rootfs,size=-';" \ + "gpt write mmc 0 ${partitions} \0"\ + "f2blk_size=setexpr fileblksize ${filesize} / ${mmcblksize};" \ + "setexpr fileblksize ${fileblksize} + 1\0" \ + "store_kernel=tftp ${loadaddr} zImage; run f2blk_size;" \ + "setexpr k_blksize ${fileblksize};" \ + "setexpr k_offset ${kernel_start} / ${mmcblksize};" \ + "mmc write ${fileaddr} ${k_offset} ${fileblksize}\0" \ + "store_dtb=tftp ${loadaddr} at91-vinco.dtb; run f2blk_size;" \ + "setexpr dtb_blksize ${fileblksize};" \ + "setexpr dtb_offset ${dtb_start} / ${mmcblksize};" \ + "mmc write ${fileaddr} ${dtb_offset} ${fileblksize}\0" \ + "store_rootfs=tftp ${loadaddr} vinco-gateway-image-vinco.ext4;" \ + "setexpr rootfs_offset ${rootfs_start} / ${mmcblksize};" \ + "mmc write ${fileaddr} ${rootfs_offset} ${fileblksize}\0" \ + "bootdelay=0\0" + +#endif +#define CONFIG_ZERO_BOOTDELAY_CHECK + +#endif + -- 2.5.0

2 4

[U-Boot] Please pull u-boot-x86
by Bin Meng 24 Jan '16

24 Jan '16

Hi Tom, The following changes since commit 12f229ea8f6c8e20f8fd07906eafc853c4c354a9: Merge git://git.denx.de/u-boot-fdt (2016-01-22 17:01:22 -0500) are available in the git repository at: git://git.denx.de/u-boot-x86.git master for you to fetch changes up to 25d5352c71dcc599030a4a764d8087185ed537d3: x86: ivybridge: Use syscon for the GMA device (2016-01-24 12:09:42 +0800) ---------------------------------------------------------------- Simon Glass (70): dm: pci: Move pci_bus_to_hose() to compatibility dm: pci: Add a function to write a BAR dm: pci: Avoid using pci_bus_to_hose() in the uclass dm: Expand the uclass for Platform Controller Hubs (PCH) dm: x86: Add a driver for Intel PCH7 dm: x86: Add a driver for Intel PCH9 spi: ich: Separate out the read/write trace from normal debugging dm: x86: spi: Convert ICH SPI driver to driver model PCI API dm: x86: Create a driver for x86 interrupts dm: x86: Set up interrupt routing from interrupt_init() dm: x86: Add a common PIRQ init function x86: Use the IRQ device when setting up the mptable x86: Drop the irq router compatible string dm: x86: quark: Add an interrupt driver dm: x86: queensbay: Add an interrupt driver dm: x86: Drop the weak cpu_irq_init() function dm: core: Display the error number when driver binding fails dm: usb: Add a compatible string for PCI EHCI controller dm: syscon: Allow finding devices by driver data dm: pci: Convert bios_emu to use the driver model PCI API x86: ivybridge: Set up the LPC device using driver model x86: ivybridge: Move lpc_early_init() to probe() x86: ivybridge: Move more init to the probe() function x86: ivybridge: Rename bd82x6x_init() dm: x86: Add a northbridge uclass x86: ivybridge: Add a driver for the bd82x6x northbridge x86: ivybridge: Move northbridge init into the probe() method x86: ivybridge: Move LPC and PCH init into northbridge probe() x86: ivybridge: Rename lpc_init() to lpc_init_extra() x86: ivybridge: Probe the LPC in CPU init x86: ivybridge: Move graphics init much later x86: ivybridge: Move sandybridge init to the lpc probe() method x86: ivybridge: Move GPIO init to the LPC init() method x86: ivybridge: Use common CPU init code x86: ivybridge: Move CPU init code into the driver x86: ivybridge: Set up the thermal target correctly x86: ivybridge: Drop the dead MTRR code x86: ivybridge: Move early init code into northbridge.c x86: Make x86_init_cpus() static x86: Don't show an error when the MRC cache is up to date x86: Bring up northbridge, pch and lpc after the CPUs x86: ivybridge: Move northbridge and PCH init into drivers x86: ivybridge: Use driver model PCI API in bd82x6x.c x86: ivybridge: Drop unnecessary northbridge setup ahci: Add a disk-controller uclass x86: ivybridge: Do the SATA init before relocation x86: ivybridge: Drop the unused bd82x6x_init_extra() x86: ivybridge: Use the SATA driver to do the init x86: ivybridge: Use driver model PCI API in sata.c x86: ivybridge: Move lpc_enable() into gma.c x86: ivybridge: Move LPC init into the LPC probe() method x86: ivybridge: Drop the special PCI driver x86: ivybridge: Convert lpc init code to DM PCI API x86: Enable DM_USB for link and panther x86: i2c: Add a stub driver for Intel I2C/SMbus x86: ivybridge: Use the I2C driver to perform SMbus init x86: ivybridge: Convert enable_usb_bar() to use DM PCI API x86: ivybridge: Convert dram_init() to use DM PCI API x86: ivybridge: Convert sdram_initialise() to use DM PCI API x86: chromebook_link: Enable the syscon uclass x86: ivybridge: Convert SDRAM init to use driver model x86: ivybridge: Convert report_platform to DM PCI API x86: ivybridge: Convert pch.c to use DM PCI API x86: ivybridge: Move code from pch.c to bd82x6x.c x86: ivybridge: Sort out the calls to bridge_silicon_revision() x86: ivybridge: Drop special EHCI init x86: ivybridge: Drop XHCI support x86: ivybridge: Drop the SMM-locking code x86: Set up a shared syscon numbering schema x86: ivybridge: Use syscon for the GMA device arch/x86/cpu/baytrail/valleyview.c | 2 +- arch/x86/cpu/coreboot/pci.c | 3 +- arch/x86/cpu/cpu.c | 22 +++++++-- arch/x86/cpu/interrupts.c | 9 ++++ arch/x86/cpu/irq.c | 47 +++++++++++------- arch/x86/cpu/ivybridge/Makefile | 5 -- arch/x86/cpu/ivybridge/bd82x6x.c | 256 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++------------------------------- arch/x86/cpu/ivybridge/cpu.c | 146 ++++++++++++++------------------------------------------ arch/x86/cpu/ivybridge/early_init.c | 147 -------------------------------------------------------- arch/x86/cpu/ivybridge/early_me.c | 70 +++++++++++++++++---------- arch/x86/cpu/ivybridge/gma.c | 114 +++++++++++++++++++++++++++++++++++++------- arch/x86/cpu/ivybridge/lpc.c | 295 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++--------------------------------------------------- arch/x86/cpu/ivybridge/model_206ax.c | 126 +++++++++++++++++++++--------------------------- arch/x86/cpu/ivybridge/northbridge.c | 126 ++++++++++++++++++++++++++++++++++++------------ arch/x86/cpu/ivybridge/pch.c | 123 ----------------------------------------------- arch/x86/cpu/ivybridge/pci.c | 67 -------------------------- arch/x86/cpu/ivybridge/report_platform.c | 11 +++-- arch/x86/cpu/ivybridge/sata.c | 132 +++++++++++++++++++++++++++++++-------------------- arch/x86/cpu/ivybridge/sdram.c | 64 ++++++++++++++++--------- arch/x86/cpu/ivybridge/usb_ehci.c | 29 ------------ arch/x86/cpu/ivybridge/usb_xhci.c | 32 ------------- arch/x86/cpu/qemu/qemu.c | 5 -- arch/x86/cpu/quark/Makefile | 2 +- arch/x86/cpu/quark/irq.c | 49 +++++++++++++++++++ arch/x86/cpu/quark/quark.c | 27 +---------- arch/x86/cpu/queensbay/Makefile | 2 +- arch/x86/cpu/queensbay/irq.c | 65 +++++++++++++++++++++++++ arch/x86/cpu/queensbay/tnc.c | 39 +-------------- arch/x86/dts/bayleybay.dts | 160 ++++++++++++++++++++++++++++++++----------------------------- arch/x86/dts/broadwell_som-6896.dts | 24 ++++++---- arch/x86/dts/chromebook_link.dts | 91 ++++++++++++++++++++++++++++++----- arch/x86/dts/chromebox_panther.dts | 34 +++++++------ arch/x86/dts/crownbay.dts | 150 +++++++++++++++++++++++++++++---------------------------- arch/x86/dts/galileo.dts | 99 ++++++++++++++++++++------------------ arch/x86/dts/minnowmax.dts | 158 +++++++++++++++++++++++++++++++----------------------------- arch/x86/dts/qemu-x86_i440fx.dts | 26 +++++----- arch/x86/dts/qemu-x86_q35.dts | 38 ++++++++------- arch/x86/include/asm/arch-ivybridge/bd82x6x.h | 23 +-------- arch/x86/include/asm/arch-ivybridge/me.h | 45 ++++++++++++++++-- arch/x86/include/asm/arch-ivybridge/pch.h | 27 ++++++----- arch/x86/include/asm/arch-ivybridge/sandybridge.h | 13 +++-- arch/x86/include/asm/cpu.h | 11 +++++ arch/x86/include/asm/irq.h | 19 ++------ arch/x86/include/asm/u-boot-x86.h | 2 - arch/x86/lib/Makefile | 2 +- arch/x86/lib/mpspec.c | 14 +++--- arch/x86/lib/mrccache.c | 6 ++- arch/x86/lib/northbridge-uclass.c | 15 ++++++ board/google/chromebook_link/link.c | 8 ---- configs/chromebook_link_defconfig | 9 ++++ configs/chromebox_panther_defconfig | 4 ++ drivers/Makefile | 1 + drivers/bios_emulator/atibios.c | 109 ++++++++++++++++++++++++++++++++++++++++-- drivers/bios_emulator/bios.c | 39 +++++++++++++++ drivers/block/Kconfig | 9 ++++ drivers/block/Makefile | 1 + drivers/block/disk-uclass.c | 14 ++++++ drivers/core/lists.c | 3 +- drivers/core/syscon-uclass.c | 31 +++++++----- drivers/i2c/Kconfig | 9 ++++ drivers/i2c/Makefile | 1 + drivers/i2c/intel_i2c.c | 75 +++++++++++++++++++++++++++++ drivers/pch/Makefile | 7 +++ {arch/x86/lib => drivers/pch}/pch-uclass.c | 32 +++++++++++++ drivers/pch/pch7.c | 61 ++++++++++++++++++++++++ drivers/pch/pch9.c | 43 +++++++++++++++++ drivers/pci/pci-uclass.c | 24 ++++------ drivers/pci/pci_auto.c | 14 +++--- drivers/pci/pci_compat.c | 15 ++++++ drivers/pci/pci_internal.h | 12 +++++ drivers/pci/pci_rom.c | 6 +-- drivers/spi/ich.c | 176 ++++++++++++++++++++----------------------------------------------- drivers/usb/host/ehci-pci.c | 6 +++ include/bios_emul.h | 19 +++++++- include/configs/qemu-x86.h | 1 - include/dm/uclass-id.h | 3 ++ include/fdtdec.h | 1 - include/pch.h | 78 ++++++++++++++++++++++++++++++ include/pci.h | 17 ++++++- include/syscon.h | 14 ++++++ lib/fdtdec.c | 1 - test/dm/syscon.c | 17 +++++++ 82 files changed, 2203 insertions(+), 1629 deletions(-) delete mode 100644 arch/x86/cpu/ivybridge/early_init.c delete mode 100644 arch/x86/cpu/ivybridge/pch.c delete mode 100644 arch/x86/cpu/ivybridge/pci.c delete mode 100644 arch/x86/cpu/ivybridge/usb_ehci.c delete mode 100644 arch/x86/cpu/ivybridge/usb_xhci.c create mode 100644 arch/x86/cpu/quark/irq.c create mode 100644 arch/x86/cpu/queensbay/irq.c create mode 100644 arch/x86/lib/northbridge-uclass.c create mode 100644 drivers/block/disk-uclass.c create mode 100644 drivers/i2c/intel_i2c.c create mode 100644 drivers/pch/Makefile rename {arch/x86/lib => drivers/pch}/pch-uclass.c (50%) create mode 100644 drivers/pch/pch7.c create mode 100644 drivers/pch/pch9.c create mode 100644 include/pch.h Regards, Bin

2 1

[U-Boot] [PATCH] bug.h: move BUILD_BUG_* defines to include/linux/bug.h
by Masahiro Yamada 24 Jan '16

24 Jan '16

BUILD_BUG_* macros have been defined in several headers. It would be nice to collect them in include/linux/bug.h like Linux. Signed-off-by: Masahiro Yamada <yamada.masahiro(a)socionext.com> --- arch/arm/mach-tegra/ap.c | 1 + common/cmd_dtt.c | 1 + drivers/gpio/gpio-uclass.c | 1 + drivers/mtd/ubi/build.c | 1 + drivers/net/fsl-mc/mc.c | 1 + drivers/pinctrl/uniphier/pinctrl-uniphier.h | 4 +-- drivers/usb/dwc3/gadget.c | 1 + drivers/usb/dwc3/linux-compat.h | 2 -- fs/ubifs/replay.c | 1 + fs/ubifs/super.c | 1 + include/common.h | 3 -- include/linux/bug.h | 55 +++++++++++++++++++++++++++++ 12 files changed, 64 insertions(+), 8 deletions(-) create mode 100644 include/linux/bug.h diff --git a/arch/arm/mach-tegra/ap.c b/arch/arm/mach-tegra/ap.c index b4229f4..a4fa00c 100644 --- a/arch/arm/mach-tegra/ap.c +++ b/arch/arm/mach-tegra/ap.c @@ -8,6 +8,7 @@ /* Tegra AP (Application Processor) code */ #include <common.h> +#include <linux/bug.h> #include <asm/io.h> #include <asm/arch/gp_padctrl.h> #include <asm/arch/mc.h> diff --git a/common/cmd_dtt.c b/common/cmd_dtt.c index f2e750f..dd427a3 100644 --- a/common/cmd_dtt.c +++ b/common/cmd_dtt.c @@ -12,6 +12,7 @@ #include <dtt.h> #include <i2c.h> #include <tmu.h> +#include <linux/bug.h> #if defined CONFIG_DTT_SENSORS static unsigned long sensor_initialized; diff --git a/drivers/gpio/gpio-uclass.c b/drivers/gpio/gpio-uclass.c index 4cce11f..5e4cde1 100644 --- a/drivers/gpio/gpio-uclass.c +++ b/drivers/gpio/gpio-uclass.c @@ -10,6 +10,7 @@ #include <fdtdec.h> #include <malloc.h> #include <asm/gpio.h> +#include <linux/bug.h> #include <linux/ctype.h> DECLARE_GLOBAL_DATA_PTR; diff --git a/drivers/mtd/ubi/build.c b/drivers/mtd/ubi/build.c index f484e62..baf4e2d 100644 --- a/drivers/mtd/ubi/build.c +++ b/drivers/mtd/ubi/build.c @@ -30,6 +30,7 @@ #include <linux/slab.h> #include <linux/major.h> #else +#include <linux/bug.h> #include <linux/log2.h> #endif #include <linux/err.h> diff --git a/drivers/net/fsl-mc/mc.c b/drivers/net/fsl-mc/mc.c index bac4610..4b9b372 100644 --- a/drivers/net/fsl-mc/mc.c +++ b/drivers/net/fsl-mc/mc.c @@ -5,6 +5,7 @@ */ #include <common.h> #include <errno.h> +#include <linux/bug.h> #include <asm/io.h> #include <libfdt.h> #include <fdt_support.h> diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier.h b/drivers/pinctrl/uniphier/pinctrl-uniphier.h index 7eaec6a..6bdebf2 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier.h +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier.h @@ -7,9 +7,7 @@ #ifndef __PINCTRL_UNIPHIER_H__ #define __PINCTRL_UNIPHIER_H__ -/* TODO: move this to include/linux/bug.h */ -#define BUILD_BUG_ON_ZERO(e) (sizeof(struct { int:-!!(e); })) - +#include <linux/bug.h> #include <linux/kernel.h> #include <linux/types.h> diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c index 8ff949d..25ccc01 100644 --- a/drivers/usb/dwc3/gadget.c +++ b/drivers/usb/dwc3/gadget.c @@ -18,6 +18,7 @@ #include <malloc.h> #include <asm/dma-mapping.h> #include <usb/lin_gadget_compat.h> +#include <linux/bug.h> #include <linux/list.h> #include <linux/usb/ch9.h> diff --git a/drivers/usb/dwc3/linux-compat.h b/drivers/usb/dwc3/linux-compat.h index 6c9c279..9e944a3 100644 --- a/drivers/usb/dwc3/linux-compat.h +++ b/drivers/usb/dwc3/linux-compat.h @@ -17,8 +17,6 @@ #define dev_WARN(dev, format, arg...) debug(format, ##arg) #define WARN_ON_ONCE(val) debug("Error %d\n", val) -#define BUILD_BUG_ON_NOT_POWER_OF_2(n) - static inline size_t strlcat(char *dest, const char *src, size_t n) { strcat(dest, src); diff --git a/fs/ubifs/replay.c b/fs/ubifs/replay.c index d0fcd83..176125e 100644 --- a/fs/ubifs/replay.c +++ b/fs/ubifs/replay.c @@ -26,6 +26,7 @@ #include <linux/err.h> #endif #include "ubifs.h" +#include <linux/bug.h> #include <linux/list_sort.h> /** diff --git a/fs/ubifs/super.c b/fs/ubifs/super.c index abe861a..dcf3a47 100644 --- a/fs/ubifs/super.c +++ b/fs/ubifs/super.c @@ -31,6 +31,7 @@ #include <common.h> #include <malloc.h> #include <memalign.h> +#include <linux/bug.h> #include <linux/log2.h> #include <linux/stat.h> #include <linux/err.h> diff --git a/include/common.h b/include/common.h index 7bed0cc..1563d64 100644 --- a/include/common.h +++ b/include/common.h @@ -146,9 +146,6 @@ void __assert_fail(const char *assertion, const char *file, unsigned line, #define BUG_ON(condition) do { if (unlikely((condition)!=0)) BUG(); } while(0) #endif /* BUG */ -/* Force a compilation error if condition is true */ -#define BUILD_BUG_ON(condition) ((void)sizeof(char[1 - 2*!!(condition)])) - typedef void (interrupt_handler_t)(void *); #include <asm/u-boot.h> /* boot information for Linux kernel */ diff --git a/include/linux/bug.h b/include/linux/bug.h new file mode 100644 index 0000000..920e379 --- /dev/null +++ b/include/linux/bug.h @@ -0,0 +1,55 @@ +#ifndef _LINUX_BUG_H +#define _LINUX_BUG_H + +#include <linux/compiler.h> + +#ifdef __CHECKER__ +#define BUILD_BUG_ON_NOT_POWER_OF_2(n) (0) +#define BUILD_BUG_ON_ZERO(e) (0) +#define BUILD_BUG_ON_NULL(e) ((void*)0) +#define BUILD_BUG_ON_INVALID(e) (0) +#define BUILD_BUG_ON(condition) (0) +#define BUILD_BUG() (0) +#else /* __CHECKER__ */ + +/* Force a compilation error if a constant expression is not a power of 2 */ +#define BUILD_BUG_ON_NOT_POWER_OF_2(n) \ + BUILD_BUG_ON((n) == 0 || (((n) & ((n) - 1)) != 0)) + +/* Force a compilation error if condition is true, but also produce a + result (of value 0 and type size_t), so the expression can be used + e.g. in a structure initializer (or where-ever else comma expressions + aren't permitted). */ +#define BUILD_BUG_ON_ZERO(e) (sizeof(struct { int:-!!(e); })) +#define BUILD_BUG_ON_NULL(e) ((void *)sizeof(struct { int:-!!(e); })) + +/* + * BUILD_BUG_ON_INVALID() permits the compiler to check the validity of the + * expression but avoids the generation of any code, even if that expression + * has side-effects. + */ +#define BUILD_BUG_ON_INVALID(e) ((void)(sizeof((__force long)(e)))) + +/** + * BUILD_BUG_ON - break compile if a condition is true. + * @condition: the condition which the compiler should know is false. + * + * If you have some code which relies on certain constants being equal, or + * some other compile-time-evaluated condition, you should use BUILD_BUG_ON to + * detect if someone changes it. + * + * The implementation uses gcc's reluctance to create a negative array, but gcc + * (as of 4.4) only emits that error for obvious cases (e.g. not arguments to + * inline functions). Luckily, in 4.3 they added the "error" function + * attribute just for this type of case. Thus, we use a negative sized array + * (should always create an error on gcc versions older than 4.4) and then call + * an undefined function with the error attribute (should always create an + * error on gcc 4.3 and later). If for some reason, neither creates a + * compile-time error, we'll still have a link-time error, which is harder to + * track down. + */ +#define BUILD_BUG_ON(condition) ((void)sizeof(char[1 - 2*!!(condition)])) + +#endif /* __CHECKER__ */ + +#endif /* _LINUX_BUG_H */ -- 1.9.1

2 2

[U-Boot] [PATCH] imx: mx6sxsabresd: support emmc
by Peng Fan 24 Jan '16

24 Jan '16

From: Peng Fan <peng.fan(a)nxp.com> For i.MX6SX SABRESD, USDHC4 can be used for SD and EMMC, default it is used for SD. This patch introduces EMMC pinmux settings and a new macro CONFIG_MX6SXSABRESD_EMMC_REWORK. If the board has been reworked to support emmc, need to enable this macro. Signed-off-by: Peng Fan <peng.fan(a)nxp.com> Cc: Stefano Babic <sbabic(a)denx.de> --- board/freescale/mx6sxsabresd/mx6sxsabresd.c | 32 +++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/board/freescale/mx6sxsabresd/mx6sxsabresd.c b/board/freescale/mx6sxsabresd/mx6sxsabresd.c index 78f0151..6168b26 100644 --- a/board/freescale/mx6sxsabresd/mx6sxsabresd.c +++ b/board/freescale/mx6sxsabresd/mx6sxsabresd.c @@ -109,6 +109,20 @@ static iomux_v3_cfg_t const usdhc4_pads[] = { MX6_PAD_SD4_DATA7__GPIO6_IO_21 | MUX_PAD_CTRL(NO_PAD_CTRL), }; +static iomux_v3_cfg_t const usdhc4_emmc_pads[] = { + MX6_PAD_SD4_CLK__USDHC4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_CMD__USDHC4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DATA0__USDHC4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DATA1__USDHC4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DATA2__USDHC4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DATA3__USDHC4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DATA4__USDHC4_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DATA5__USDHC4_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DATA6__USDHC4_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DATA7__USDHC4_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_RESET_B__USDHC4_RESET_B | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + static iomux_v3_cfg_t const fec1_pads[] = { MX6_PAD_ENET1_MDC__ENET1_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL), MX6_PAD_ENET1_MDIO__ENET1_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL), @@ -302,7 +316,11 @@ int board_early_init_f(void) static struct fsl_esdhc_cfg usdhc_cfg[3] = { {USDHC2_BASE_ADDR, 0, 4}, {USDHC3_BASE_ADDR}, +#ifdef CONFIG_MX6SXSABRESD_EMMC_REWORK + {USDHC4_BASE_ADDR, 0, 8}, +#else {USDHC4_BASE_ADDR}, +#endif }; #define USDHC3_CD_GPIO IMX_GPIO_NR(2, 10) @@ -327,7 +345,11 @@ int board_mmc_getcd(struct mmc *mmc) ret = !gpio_get_value(USDHC3_CD_GPIO); break; case USDHC4_BASE_ADDR: +#ifdef CONFIG_MX6SXSABRESD_EMMC_REWORK + ret = 1; +#else ret = !gpio_get_value(USDHC4_CD_GPIO); +#endif break; } @@ -361,9 +383,14 @@ int board_mmc_init(bd_t *bis) usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); break; case 2: +#ifdef CONFIG_MX6SXSABRESD_EMMC_REWORK + imx_iomux_v3_setup_multiple_pads( + usdhc4_emmc_pads, ARRAY_SIZE(usdhc4_emmc_pads)); +#else imx_iomux_v3_setup_multiple_pads( usdhc4_pads, ARRAY_SIZE(usdhc4_pads)); gpio_direction_input(USDHC4_CD_GPIO); +#endif usdhc_cfg[2].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); break; default: @@ -410,9 +437,14 @@ int board_mmc_init(bd_t *bis) usdhc_cfg[0].esdhc_base = USDHC3_BASE_ADDR; break; case 3: +#ifdef CONFIG_MX6SXSABRESD_EMMC_REWORK + imx_iomux_v3_setup_multiple_pads( + usdhc4_emmc_pads, ARRAY_SIZE(usdhc4_emmc_pads)); +#else imx_iomux_v3_setup_multiple_pads( usdhc4_pads, ARRAY_SIZE(usdhc4_pads)); gpio_direction_input(USDHC4_CD_GPIO); +#endif usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); usdhc_cfg[0].esdhc_base = USDHC4_BASE_ADDR; break; -- 2.6.2

3 5

[U-Boot] [PATCH 1/2] imx: mx7: default enable MDIO open drain
by Peng Fan 24 Jan '16

24 Jan '16

The management data input/output (MDIO) requires open-drain, i.MX7D TO1.0 ENET MDIO pin has no open drain, but TO1.1 supports this feature. So to TO1.1, need to enable open drain by setting bits GPR0[8:7] for TO1.1. Signed-off-by: Peng Fan <peng.fan(a)nxp.com> Cc: Stefano Babic <sbabic(a)denx.de> --- arch/arm/cpu/armv7/mx7/soc.c | 20 ++++++++++++++++++++ arch/arm/include/asm/arch-mx7/imx-regs.h | 2 ++ 2 files changed, 22 insertions(+) diff --git a/arch/arm/cpu/armv7/mx7/soc.c b/arch/arm/cpu/armv7/mx7/soc.c index c777922..1d8e470 100644 --- a/arch/arm/cpu/armv7/mx7/soc.c +++ b/arch/arm/cpu/armv7/mx7/soc.c @@ -130,6 +130,24 @@ static void init_csu(void) writel(CSU_INIT_SEC_LEVEL0, CSU_IPS_BASE_ADDR + i * 4); } +static void imx_enet_mdio_fixup(void) +{ + struct iomuxc_gpr_base_regs *gpr_regs = + (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR; + + /* + * The management data input/output (MDIO) requires open-drain, + * i.MX7D TO1.0 ENET MDIO pin has no open drain, but TO1.1 supports + * this feature. So to TO1.1, need to enable open drain by setting + * bits GPR0[8:7]. + */ + + if (soc_rev() >= CHIP_REV_1_1) { + setbits_le32(&gpr_regs->gpr[0], + IOMUXC_GPR_GPR0_ENET_MDIO_OPEN_DRAIN_MASK); + } +} + int arch_cpu_init(void) { init_aips(); @@ -138,6 +156,8 @@ int arch_cpu_init(void) /* Disable PDE bit of WMCR register */ imx_set_wdog_powerdown(false); + imx_enet_mdio_fixup(); + #ifdef CONFIG_APBH_DMA /* Start APBH DMA */ mxs_dma_init(); diff --git a/arch/arm/include/asm/arch-mx7/imx-regs.h b/arch/arm/include/asm/arch-mx7/imx-regs.h index e28a807..58a25c7 100644 --- a/arch/arm/include/asm/arch-mx7/imx-regs.h +++ b/arch/arm/include/asm/arch-mx7/imx-regs.h @@ -272,6 +272,8 @@ struct src { #define IOMUXC_GPR_GPR0_DMAREQ_MUX_SEL5_SHIFT 5 #define IOMUXC_GPR_GPR0_DMAREQ_MUX_SEL6_MASK 0x40u #define IOMUXC_GPR_GPR0_DMAREQ_MUX_SEL6_SHIFT 6 +#define IOMUXC_GPR_GPR0_ENET_MDIO_OPEN_DRAIN_MASK (3 << 7) +#define IOMUXC_GPR_GPR0_ENET_MDIO_OPEN_DRAIN_SHIFT 7 /* GPR1 Bit Fields */ #define IOMUXC_GPR_GPR1_GPR_WEIM_ACT_CS0_MASK 0x1u #define IOMUXC_GPR_GPR1_GPR_WEIM_ACT_CS0_SHIFT 0 -- 2.6.2

2 4