July 2015 - U-Boot

[U-Boot] [PATCH] T210: P2571: Enable SD-card power via PMIC LDO2
by Tom Warren 05 Aug '15

05 Aug '15

This was done in the 32-bit AVP loader (SPL) but is board-specific so should be moved to the CPU portion. Signed-off-by: Tom Warren <twarren(a)nvidia.com> --- board/nvidia/p2571/Makefile | 1 - board/nvidia/p2571/max77620_init.c | 85 -------------------------------------- board/nvidia/p2571/max77620_init.h | 3 +- board/nvidia/p2571/p2571.c | 22 ++++++++++ 4 files changed, 24 insertions(+), 87 deletions(-) delete mode 100644 board/nvidia/p2571/max77620_init.c diff --git a/board/nvidia/p2571/Makefile b/board/nvidia/p2571/Makefile index 223062e..627b7ef 100644 --- a/board/nvidia/p2571/Makefile +++ b/board/nvidia/p2571/Makefile @@ -5,5 +5,4 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-y += max77620_init.o obj-y += p2571.o diff --git a/board/nvidia/p2571/max77620_init.c b/board/nvidia/p2571/max77620_init.c deleted file mode 100644 index ed8d4dc..0000000 --- a/board/nvidia/p2571/max77620_init.c +++ /dev/null @@ -1,85 +0,0 @@ -/* - * (C) Copyright 2013-2015 - * NVIDIA Corporation <www.nvidia.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <asm/io.h> -#include <asm/arch-tegra/tegra_i2c.h> -#include "max77620_init.h" - -/* MAX77620-PMIC-specific early init code - get CPU rails up, etc */ - -void tegra_i2c_ll_write_addr(uint addr, uint config) -{ - struct i2c_ctlr *reg = (struct i2c_ctlr *)TEGRA_DVC_BASE; - - writel(addr, &reg->cmd_addr0); - writel(config, &reg->cnfg); -} - -void tegra_i2c_ll_write_data(uint data, uint config) -{ - struct i2c_ctlr *reg = (struct i2c_ctlr *)TEGRA_DVC_BASE; - - writel(data, &reg->cmd_data1); - writel(config, &reg->cnfg); -} - -void pmic_enable_cpu_vdd(void) -{ - uint reg; - debug("%s entry\n", __func__); - - /* Setup/Enable GPIO5 - VDD_CPU_REG_EN */ - debug("%s: Setting GPIO5 to enable CPU regulator\n", __func__); - /* B3=1=logic high,B2=dontcare,B1=0=output,B0=1=push-pull */ - reg = 0x0900 | MAX77620_GPIO5_REG; - tegra_i2c_ll_write_addr(MAX77620_I2C_ADDR, 2); - tegra_i2c_ll_write_data(reg, I2C_SEND_2_BYTES); - udelay(10 * 1000); - - /* Setup/Enable GPIO1 - VDD_HDMI_5V0_BST_EN */ - debug("%s: Setting GPIO1 to enable HDMI\n", __func__); - reg = 0x0900 | MAX77620_GPIO1_REG; - tegra_i2c_ll_write_addr(MAX77620_I2C_ADDR, 2); - tegra_i2c_ll_write_data(reg, I2C_SEND_2_BYTES); - udelay(10 * 1000); - - /* GPIO 0,1,5,6,7 = GPIO, 2,3,4 = alt mode */ - reg = 0x1C00 | MAX77620_AME_GPIO; - tegra_i2c_ll_write_addr(MAX77620_I2C_ADDR, 2); - tegra_i2c_ll_write_data(reg, I2C_SEND_2_BYTES); - udelay(10 * 1000); - - /* Disable SD1 Remote Sense, Set SD1 for LPDDR4 to 1.125v */ - debug("%s: Set SD1 for LPDDR4, disable SD1RS, voltage to 1.125v\n", - __func__); - /* bit1=0, SD1 remote sense disabled */ - reg = 0x0400 | MAX77620_CNFG2SD_REG; - tegra_i2c_ll_write_addr(MAX77620_I2C_ADDR, 2); - tegra_i2c_ll_write_data(reg, I2C_SEND_2_BYTES); - udelay(10 * 1000); - - /* SD1 output = 1.125V */ - reg = 0x2A00 | MAX77620_SD1_REG; - tegra_i2c_ll_write_addr(MAX77620_I2C_ADDR, 2); - tegra_i2c_ll_write_data(reg, I2C_SEND_2_BYTES); - udelay(10 * 1000); - - debug("%s: Set LDO2 for VDDIO_SDMMC_AP power to 3.3V\n", __func__); - /* 0xF2 for 3.3v, enabled: bit7:6 = 11 = enable, bit5:0 = voltage */ - reg = 0xF200 | MAX77620_CNFG1_L2_REG; - tegra_i2c_ll_write_addr(MAX77620_I2C_ADDR, 2); - tegra_i2c_ll_write_data(reg, I2C_SEND_2_BYTES); - udelay(10 * 1000); - - debug("%s: Set LDO1 for USB3 phy power to 1.05V??\n", __func__); - /* 0xCA for 105v, enabled: bit7:6 = 11 = enable, bit5:0 = voltage */ - reg = 0xCA00 | MAX77620_CNFG1_L1_REG; - tegra_i2c_ll_write_addr(MAX77620_I2C_ADDR, 2); - tegra_i2c_ll_write_data(reg, I2C_SEND_2_BYTES); - udelay(10 * 1000); -} diff --git a/board/nvidia/p2571/max77620_init.h b/board/nvidia/p2571/max77620_init.h index 9d5cce7..92c3719 100644 --- a/board/nvidia/p2571/max77620_init.h +++ b/board/nvidia/p2571/max77620_init.h @@ -10,7 +10,8 @@ /* MAX77620-PMIC-specific early init regs */ -#define MAX77620_I2C_ADDR 0x78 /* or 0x3C 7-bit */ +#define MAX77620_I2C_ADDR 0x78 +#define MAX77620_I2C_ADDR_7BIT 0x3C #define MAX77620_SD0_REG 0x16 #define MAX77620_SD1_REG 0x17 diff --git a/board/nvidia/p2571/p2571.c b/board/nvidia/p2571/p2571.c index fc710c1..842242c 100644 --- a/board/nvidia/p2571/p2571.c +++ b/board/nvidia/p2571/p2571.c @@ -6,10 +6,32 @@ */ #include <common.h> +#include <i2c.h> #include <asm/arch/gpio.h> #include <asm/arch/pinmux.h> +#include "max77620_init.h" #include "pinmux-config-p2571.h" +void pin_mux_mmc(void) +{ + struct udevice *dev; + uchar val; + int ret; + + /* Turn on MAX77620 LDO2 to 3.3V for SD card power */ + debug("%s: Set LDO2 for VDDIO_SDMMC_AP power to 3.3V\n", __func__); + ret = i2c_get_chip_for_busnum(0, MAX77620_I2C_ADDR_7BIT, 1, &dev); + if (ret) { + printf("%s: Cannot find MAX77620 I2C chip\n", __func__); + return; + } + /* 0xF2 for 3.3v, enabled: bit7:6 = 11 = enable, bit5:0 = voltage */ + val = 0xF2; + ret = dm_i2c_write(dev, MAX77620_CNFG1_L2_REG, &val, 1); + if (ret) + printf("i2c_write 0 0x3c 0x27 failed: %d\n", ret); +} + /* * Routine: pinmux_init * Description: Do individual peripheral pinmux configs -- 1.8.2.1.610.g562af5b

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[U-Boot] [PATCH] ARM: tegra: restrict usable RAM size further
by Stephen Warren 05 Aug '15

05 Aug '15

From: Stephen Warren <swarren(a)nvidia.com> Additionally, ARM64 devices typically run a secure monitor in EL3 and U-Boot in EL2, and set up some secure RAM carve-outs to contain the EL3 code and data. These carve-outs are located at the top of 32-bit address space. Restrict U-Boot's RAM usage to well below the location of those carve-outs. Ideally, we would the secure monitor would inform U-Boot of exactly which RAM it could use at run-time. However, I'm not sure how to do that at present (and even if such a mechanism does exist, it would likely not be generic across all forms of secure monitor). Signed-off-by: Stephen Warren <swarren(a)nvidia.com> --- arch/arm/mach-tegra/board2.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c index 36bcfb04c021..7842caaa5afb 100644 --- a/arch/arm/mach-tegra/board2.c +++ b/arch/arm/mach-tegra/board2.c @@ -287,11 +287,20 @@ void pad_init_mmc(struct mmc_host *host) * 32-bits of the physical address space. Cap the maximum usable RAM area * at 4 GiB to avoid DMA buffers from being allocated beyond the 32-bit * boundary that most devices can address. + * + * Additionally, ARM64 devices typically run a secure monitor in EL3 and + * U-Boot in EL2, and set up some secure RAM carve-outs to contain the EL3 + * code and data. These carve-outs are located at the top of 32-bit address + * space. Restrict U-Boot's RAM usage to well below the location of those + * carve-outs. Ideally, we would the secure monitor would inform U-Boot of + * exactly which RAM it could use at run-time. However, I'm not sure how to + * do that at present (and even if such a mechanism does exist, it would + * likely not be generic across all forms of secure monitor). */ ulong board_get_usable_ram_top(ulong total_size) { - if (gd->ram_top > 0x100000000) - return 0x100000000; + if (gd->ram_top > 0xe0000000) + return 0xe0000000; return gd->ram_top; } -- 1.9.1

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[U-Boot] [PATCH v2 00/47] Add support for running U-Boot as an EFI payload/application
by Simon Glass 05 Aug '15

05 Aug '15

This series allows U-Boot to be build as an EFI payload so that U-Boot can be started on almost any x86 platform that supports EFI. This is implemented as a stub which EFI can load plus a payload that is copied to RAM. The payload contains a normal U-Boot binary image and device tree. This allows U-Boot to run on platforms that have EFI support but are not supported natively by U-Boot. It also allows testing and fiddling with the board using U-Boots memory display and other commands. In addition, U-Boot can be built as an EFI application. This should work regardless of the board type since it only relies on EFI services. However only 32-bit EFI is supported in this case. Again it can be used to snoop around the platform. A README provides further details of how this series operates. Changes in v2: - Add -no-red-zone for 64-bit only - Add ALIGN() before .dynamic in the linker script - Add a blank line before return in the _relocate() function - Add a comment about special handling for backspace - Add a comment about the REX prefix - Add a comment as to where LDFLAGS_EFI is used - Add a comment as to why .hash has to be first in the linker script - Add a comment as to why debug_uart_init() is empty - Add a comment as to why interrupt_init() must be skipped for EFI - Add a comment as to why the AFLAGS_REMOVE_.. lines are needed - Add a comment as to why we must call exit_boot_services() twice - Add a comment as to why we only allocate pages below 4GB - Add a comment as to why we use global_data_ptr - Add a marker for the cold reset entry point - Add a note that bootm does not work when running as an EFI app - Add comments as to why we need efi_memset(), efi_putc(), efi_puts() - Add descriptor bits for the base and limit - Add new patch to reserve the top 16 flag bits for architecture-specific use - Avoid useless u64 cast on EFI_RUNTIME_SERVICES_SIGNATURE - Change 'link script' to 'linker script' - Check the GDT selector's base and limit against the target address - Correct the return code to avoid a test failure - Drop . = 0x0; - Drop \n\t at the end of a one-line asm statement - Drop __packed from struct efi_device_path - Drop a left-over debug printf() - Drop duplicate OBJCOPYFLAGS_EFI - Drop no-red-zone as it is not needed for i386 - Drop patch "Add a link script entry for U-Boot as a payload" - Drop the REX prefix in 32-bit mode - Drop unnecessary .section .text - Drop unnecessary SYS_CAR_ADDR/SIZE Kconfig options - Drop unneeded include of asm/ptrace.h - Drop unused DECLARE_GLOBAL_DATA_INIT - Drop unused DECLARE_GLOBAL_DATA_PTR - Drop unused board_eth_init() - Drop use of CONFIG_X86_64 since we don't support a 64-bit EFI application yet - Explain in a comment how the debug UART is implemented for the EFI app - Fix 'command problem' typo - it should say 'command prompt' - Fix 'withU-Boot.' typo - Fix _aligned() typo - Fix a few comment typos - Fix alignment of region index field in the output - Fix comment style - Fix efi_mem_desc_VERSION typo - Fix indenting in board/emulation/qemu-x86/Kconfig - Fix indenting in board/intel/minnowmax/Kconfig - Fix mention of CHAR16 which should be wchar_t - Fix missing struct comments - Fix reference to elf_ia32_efi instead of elf_x86_64_efi - Fix spacing around operators - Fix text alignment in Kconfig files - Follow existing file conventions for type definitions - Merge in Bin's implementation of adding a U-Boot payload with objcopy - Move 64-bit crt0 to a later patch - Move EFI CAR settings to arch/x86/lib/efi/Kconfig - Move crt0 and reloc files into arch/x86/lib/efi/ - Move the 64-bit crt and reloc code into this patch - Move the 64-bit efi.h additions into this patch - Move the 64-bit payload code to a later patch - Move the crt and reloc files into arch/x86/lib/efi/ - Move this patch to before the EFI start-up code patch - Output the region index in decimal - Refer to FS as F segment register instead of frame segment register - Remove CONFIG_SYS_EARLY_PCI_INIT and CONFIG_PCI_PNP - Remove KEEP in the EFI linker script since garbage collection is not enabled - Remove comment about reset_cpu() returning to EFI in the stub - Remove extraneous '+' in comment - Remove superfluous Kconfig options - Rename CONFIG_ARCH_EFI to CONFIG_EFI_APP - Rename CONFIG_DEBUG_UART_EFI to CONFIG_DEBUG_EFI_CONSOLE - Rename EFI debug UART to EFI_CONSOLE - Rename GDT_4GB to GDT_4KB - Rename ImageBase to image_base - Reorder this patch to after CONFIG_EFI_APP is introduced - Replace 'Coreboot' with 'coreboot' - Replace serial_s5p with serial_efi - Return early in copy_uboot_to_ram() and clear_bbs() when relocation disabled - Reword the efi_putc() unicode comment to make more sense - Set text_base to 0 to avoid possible compiler warning - Update based on the elf.h changes - Use "efi,app" instead of "efi,payload" for the compatible string - Use CONFIG_EFI_APP instead of CONFIG_ARCH_EFI - Use SPDX for the EFI start and relocation code - Use image_base instead of ImageBase - Use one-line comments when appropriate - Use reserved instead of __reserved in struct efi_boot_services - Use the now-defined top 16-bits of the global_data flags - Use toolchain instead of tool chain - Use u-boot-app.efi instead of u-boot.efi - Zero BIST when starting from EFI/coreboot Ben Stoltz (6): efi: Avoid using non-existent text base efi: Drop CONFIG_SYS_TEXT_BASE for EFI x86: Set up toolchain flags for running as EFI application x86: Add support for U-Boot as an EFI application x86: Add EFI board code x86: Add definitions for the x86-efi board and plumb it in Simon Glass (41): Support removing default assembler flags dm: core: Check for empty list in uclass_find_device() dm: serial: Correct logic in serial_find_console_or_panic() elf: Add a few definitions for 64-bit relocation Add a way to skip relocation Allow objcopy to work without filling gaps with 0xff Bring in __aligned_u64 and friends to linux/types.h x86: Add various minor tidy-ups to the 32-bit startup code x86: Use CR0 constants in CPU init Reserve the top 16 flag bits for architecture-specific use x86: Tidy up global_data flags x86: Drop unused copy_fdt_to_ram() x86: Tidy up the 64-bit calling code x86: Add some missing global_data declarations in files that use gd x86: Tidy up a few minor issues with interrupts pci: Use debug() instead of DEBUGF() in pci_auto.c pci: Fix up code for CONFIG_PCI_ENUM_ONLY x86: Allow use of global_data with EFI efi: Add start-up library code efi: Display the correct initcall pre-relocation values efi: Add a serial driver efi: Support building a u-boot.efi executable x86: Support skipping relocation for EFI x86: Add asm/elf.h for x86-specific ELF definitions x86: dts: Add a device tree file for EFI x86: Allow relocation code to build without text base x86: Add relocation and link script for a 64-bit EFI application efi: Add support for loading U-Boot through an EFI stub x86: Support building the EFI stub x86: Add an enum for some commonly-used GDT bits x86: Add a way to call 32-bit code from 64-bit mode efi: Add 64-bit payload support x86: Add support for passing tables into U-Boot efi: Add functions for decoding the EFI tables efi: Add a command to display the memory map x86: Handle running as EFI payload x86: Add helper code for running from EFI x86: baytrail: Support operation as an EFI payload x86: qemu: Support operation as an EFI payload x86: Gracefully disable the vesa driver when running from EFI efi: Add a README to explain how things work Kconfig | 1 + Makefile | 34 +++- arch/x86/Kconfig | 10 + arch/x86/Makefile | 2 + arch/x86/config.mk | 48 ++++- arch/x86/cpu/Makefile | 7 + arch/x86/cpu/baytrail/Kconfig | 2 +- arch/x86/cpu/baytrail/cpu.c | 2 + arch/x86/cpu/baytrail/valleyview.c | 2 + arch/x86/cpu/call32.S | 64 ++++++ arch/x86/cpu/call64.S | 4 +- arch/x86/cpu/cpu.c | 23 ++- arch/x86/cpu/efi/Makefile | 8 + arch/x86/cpu/efi/efi.c | 42 ++++ arch/x86/cpu/efi/elf_ia32_efi.lds | 94 +++++++++ arch/x86/cpu/efi/elf_x86_64_efi.lds | 83 ++++++++ arch/x86/cpu/efi/sdram.c | 29 +++ arch/x86/cpu/interrupts.c | 25 ++- arch/x86/cpu/mp_init.c | 2 + arch/x86/cpu/qemu/Makefile | 5 +- arch/x86/cpu/qemu/qemu.c | 2 + arch/x86/cpu/start.S | 73 ++++--- arch/x86/dts/Makefile | 1 + arch/x86/dts/efi.dts | 22 +++ arch/x86/include/asm/arch-efi/gpio.h | 10 + arch/x86/include/asm/cpu.h | 27 +++ arch/x86/include/asm/elf.h | 46 +++++ arch/x86/include/asm/fsp/fsp_hob.h | 59 +----- arch/x86/include/asm/global_data.h | 16 +- arch/x86/include/asm/relocate.h | 1 - arch/x86/include/asm/types.h | 5 +- arch/x86/lib/Makefile | 3 +- arch/x86/lib/asm-offsets.c | 1 + arch/x86/lib/bootm.c | 7 + arch/x86/lib/efi/Kconfig | 11 ++ arch/x86/lib/efi/Makefile | 27 +++ arch/x86/lib/efi/car.S | 10 + arch/x86/lib/efi/crt0-efi-ia32.S | 52 +++++ arch/x86/lib/efi/crt0-efi-x86_64.S | 51 +++++ arch/x86/lib/efi/efi.c | 151 ++++++++++++++ arch/x86/lib/efi/reloc_ia32.c | 72 +++++++ arch/x86/lib/efi/reloc_x86_64.c | 66 +++++++ arch/x86/lib/fsp/fsp_common.c | 2 + arch/x86/lib/lpc-uclass.c | 2 + arch/x86/lib/pch-uclass.c | 2 + arch/x86/lib/relocate.c | 41 ++-- board/efi/Kconfig | 19 ++ board/efi/efi-x86/Kconfig | 15 ++ board/efi/efi-x86/MAINTAINERS | 6 + board/efi/efi-x86/Makefile | 7 + board/efi/efi-x86/efi.c | 18 ++ board/emulation/qemu-x86/Kconfig | 5 +- board/intel/minnowmax/Kconfig | 5 +- common/Makefile | 1 + common/board_f.c | 14 +- common/cmd_efi.c | 257 ++++++++++++++++++++++++ config.mk | 2 - configs/efi-x86_defconfig | 16 ++ doc/README.efi | 237 ++++++++++++++++++++++ drivers/core/uclass.c | 2 + drivers/gpio/intel_ich6_gpio.c | 2 + drivers/pci/pci_auto.c | 52 ++--- drivers/serial/Kconfig | 9 + drivers/serial/Makefile | 1 + drivers/serial/serial-uclass.c | 2 +- drivers/serial/serial_efi.c | 157 +++++++++++++++ drivers/video/vesa_fb.c | 8 + include/asm-generic/global_data.h | 3 +- include/common.h | 7 + include/configs/efi-x86.h | 34 ++++ include/efi.h | 368 +++++++++++++++++++++++++++++++++++ include/efi_api.h | 244 +++++++++++++++++++++++ include/elf.h | 26 +++ include/linux/types.h | 6 +- include/part_efi.h | 9 +- lib/Kconfig | 2 + lib/Makefile | 1 + lib/efi/Kconfig | 54 +++++ lib/efi/Makefile | 17 ++ lib/efi/efi.c | 101 ++++++++++ lib/efi/efi_app.c | 139 +++++++++++++ lib/efi/efi_info.c | 47 +++++ lib/efi/efi_stub.c | 363 ++++++++++++++++++++++++++++++++++ lib/initcall.c | 4 + scripts/Makefile.lib | 3 +- 85 files changed, 3329 insertions(+), 181 deletions(-) create mode 100644 arch/x86/cpu/call32.S create mode 100644 arch/x86/cpu/efi/Makefile create mode 100644 arch/x86/cpu/efi/efi.c create mode 100644 arch/x86/cpu/efi/elf_ia32_efi.lds create mode 100644 arch/x86/cpu/efi/elf_x86_64_efi.lds create mode 100644 arch/x86/cpu/efi/sdram.c create mode 100644 arch/x86/dts/efi.dts create mode 100644 arch/x86/include/asm/arch-efi/gpio.h create mode 100644 arch/x86/include/asm/elf.h create mode 100644 arch/x86/lib/efi/Kconfig create mode 100644 arch/x86/lib/efi/Makefile create mode 100644 arch/x86/lib/efi/car.S create mode 100644 arch/x86/lib/efi/crt0-efi-ia32.S create mode 100644 arch/x86/lib/efi/crt0-efi-x86_64.S create mode 100644 arch/x86/lib/efi/efi.c create mode 100644 arch/x86/lib/efi/reloc_ia32.c create mode 100644 arch/x86/lib/efi/reloc_x86_64.c create mode 100644 board/efi/Kconfig create mode 100644 board/efi/efi-x86/Kconfig create mode 100644 board/efi/efi-x86/MAINTAINERS create mode 100644 board/efi/efi-x86/Makefile create mode 100644 board/efi/efi-x86/efi.c create mode 100644 common/cmd_efi.c create mode 100644 configs/efi-x86_defconfig create mode 100644 doc/README.efi create mode 100644 drivers/serial/serial_efi.c create mode 100644 include/configs/efi-x86.h create mode 100644 include/efi.h create mode 100644 include/efi_api.h create mode 100644 lib/efi/Kconfig create mode 100644 lib/efi/Makefile create mode 100644 lib/efi/efi.c create mode 100644 lib/efi/efi_app.c create mode 100644 lib/efi/efi_info.c create mode 100644 lib/efi/efi_stub.c -- 2.5.0.rc2.392.g76e840b

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[U-Boot] [PATCH V3 1/2] ARM: tegra: Add e2220-1170 board
by Stephen Warren 05 Aug '15

05 Aug '15

From: Stephen Warren <swarren(a)nvidia.com> E2220-1170 is a Tegra210 bringup board with onboard SoC, DRAM, eMMC, SD card slot, HDMI, USB micro-B port, and sockets for various expansion modules. Signed-off-by: Stephen Warren <swarren(a)nvidia.com> --- v3: * More descriptions. * Add auto-generation notice to pinmux header. * Incorporate equivalent cleanups to those made to p2571. v2: Use named constants for PMIC I2C and register addresses. --- arch/arm/dts/Makefile | 1 + arch/arm/dts/tegra210-e2220-1170.dts | 58 +++++ arch/arm/mach-tegra/tegra210/Kconfig | 8 + board/nvidia/e2220-1170/Kconfig | 12 + board/nvidia/e2220-1170/MAINTAINERS | 6 + board/nvidia/e2220-1170/Makefile | 8 + board/nvidia/e2220-1170/e2220-1170.c | 51 ++++ board/nvidia/e2220-1170/pinmux-config-e2220-1170.h | 277 +++++++++++++++++++++ configs/e2220-1170_defconfig | 17 ++ include/configs/e2220-1170.h | 69 +++++ 10 files changed, 507 insertions(+) create mode 100644 arch/arm/dts/tegra210-e2220-1170.dts create mode 100644 board/nvidia/e2220-1170/Kconfig create mode 100644 board/nvidia/e2220-1170/MAINTAINERS create mode 100644 board/nvidia/e2220-1170/Makefile create mode 100644 board/nvidia/e2220-1170/e2220-1170.c create mode 100644 board/nvidia/e2220-1170/pinmux-config-e2220-1170.h create mode 100644 configs/e2220-1170_defconfig create mode 100644 include/configs/e2220-1170.h diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index ba6355379cba..d8e1841eb4d8 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -33,6 +33,7 @@ dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \ tegra124-jetson-tk1.dtb \ tegra124-nyan-big.dtb \ tegra124-venice2.dtb \ + tegra210-e2220-1170.dtb \ tegra210-p2571.dtb dtb-$(CONFIG_ARCH_UNIPHIER) += \ uniphier-ph1-sld3-ref.dtb \ diff --git a/arch/arm/dts/tegra210-e2220-1170.dts b/arch/arm/dts/tegra210-e2220-1170.dts new file mode 100644 index 000000000000..75efbba1061e --- /dev/null +++ b/arch/arm/dts/tegra210-e2220-1170.dts @@ -0,0 +1,58 @@ +/dts-v1/; + +#include "tegra210.dtsi" + +/ { + model = "NVIDIA E2220-1170"; + compatible = "nvidia,e2220-1170", "nvidia,tegra210"; + + chosen { + stdout-path = &uarta; + }; + + aliases { + i2c0 = "/i2c@0,7000d000"; + sdhci0 = "/sdhci@0,700b0600"; + sdhci1 = "/sdhci@0,700b0000"; + usb0 = "/usb@0,7d000000"; + }; + + memory { + reg = <0x0 0x80000000 0x0 0xc0000000>; + }; + + sdhci@0,700b0000 { + status = "okay"; + cd-gpios = <&gpio TEGRA_GPIO(Z, 1) GPIO_ACTIVE_LOW>; + power-gpios = <&gpio TEGRA_GPIO(Z, 4) GPIO_ACTIVE_HIGH>; + bus-width = <4>; + }; + + sdhci@0,700b0600 { + status = "okay"; + bus-width = <8>; + }; + + i2c@0,7000d000 { + status = "okay"; + clock-frequency = <400000>; + }; + + usb@0,7d000000 { + status = "okay"; + dr_mode = "peripheral"; + }; + + clocks { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + clk32k_in: clock@0 { + compatible = "fixed-clock"; + reg = <0>; + #clock-cells = <0>; + clock-frequency = <32768>; + }; + }; +}; diff --git a/arch/arm/mach-tegra/tegra210/Kconfig b/arch/arm/mach-tegra/tegra210/Kconfig index 147e6a83d722..a33fc5ce76b7 100644 --- a/arch/arm/mach-tegra/tegra210/Kconfig +++ b/arch/arm/mach-tegra/tegra210/Kconfig @@ -3,6 +3,13 @@ if TEGRA210 choice prompt "Tegra210 board select" +config TARGET_E2220_1170 + bool "NVIDIA Tegra210 E2220-1170 board" + help + E2220-1170 is a Tegra210 bringup board with onboard SoC, DRAM, + eMMC, SD card slot, HDMI, USB micro-B port, and sockets for various + expansion modules. + config TARGET_P2571 bool "NVIDIA Tegra210 P2571 base board" help @@ -13,6 +20,7 @@ endchoice config SYS_SOC default "tegra210" +source "board/nvidia/e2220-1170/Kconfig" source "board/nvidia/p2571/Kconfig" endif diff --git a/board/nvidia/e2220-1170/Kconfig b/board/nvidia/e2220-1170/Kconfig new file mode 100644 index 000000000000..0a30f4936223 --- /dev/null +++ b/board/nvidia/e2220-1170/Kconfig @@ -0,0 +1,12 @@ +if TARGET_E2220_1170 + +config SYS_BOARD + default "e2220-1170" + +config SYS_VENDOR + default "nvidia" + +config SYS_CONFIG_NAME + default "e2220-1170" + +endif diff --git a/board/nvidia/e2220-1170/MAINTAINERS b/board/nvidia/e2220-1170/MAINTAINERS new file mode 100644 index 000000000000..0abb37884018 --- /dev/null +++ b/board/nvidia/e2220-1170/MAINTAINERS @@ -0,0 +1,6 @@ +E2220-1170 BOARD +M: Tom Warren <twarren(a)nvidia.com> +S: Maintained +F: board/nvidia/e2220-1170/ +F: include/configs/e2220-1170.h +F: configs/e2220-1170_defconfig diff --git a/board/nvidia/e2220-1170/Makefile b/board/nvidia/e2220-1170/Makefile new file mode 100644 index 000000000000..c956b1972deb --- /dev/null +++ b/board/nvidia/e2220-1170/Makefile @@ -0,0 +1,8 @@ +# +# (C) Copyright 2013-2015 +# NVIDIA Corporation <www.nvidia.com> +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += e2220-1170.o diff --git a/board/nvidia/e2220-1170/e2220-1170.c b/board/nvidia/e2220-1170/e2220-1170.c new file mode 100644 index 000000000000..d66a72e5204c --- /dev/null +++ b/board/nvidia/e2220-1170/e2220-1170.c @@ -0,0 +1,51 @@ +/* + * (C) Copyright 2013-2015 + * NVIDIA Corporation <www.nvidia.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <i2c.h> +#include <asm/arch/gpio.h> +#include <asm/arch/pinmux.h> +#include "../p2571/max77620_init.h" +#include "pinmux-config-e2220-1170.h" + +void pin_mux_mmc(void) +{ + struct udevice *dev; + uchar val; + int ret; + + /* Turn on MAX77620 LDO2 to 3.3V for SD card power */ + debug("%s: Set LDO2 for VDDIO_SDMMC_AP power to 3.3V\n", __func__); + ret = i2c_get_chip_for_busnum(0, MAX77620_I2C_ADDR_7BIT, 1, &dev); + if (ret) { + printf("%s: Cannot find MAX77620 I2C chip\n", __func__); + return; + } + /* 0xF2 for 3.3v, enabled: bit7:6 = 11 = enable, bit5:0 = voltage */ + val = 0xF2; + ret = dm_i2c_write(dev, MAX77620_CNFG1_L2_REG, &val, 1); + if (ret) + printf("i2c_write 0 0x3c 0x27 failed: %d\n", ret); +} + +/* + * Routine: pinmux_init + * Description: Do individual peripheral pinmux configs + */ +void pinmux_init(void) +{ + pinmux_clear_tristate_input_clamping(); + + gpio_config_table(e2220_1170_gpio_inits, + ARRAY_SIZE(e2220_1170_gpio_inits)); + + pinmux_config_pingrp_table(e2220_1170_pingrps, + ARRAY_SIZE(e2220_1170_pingrps)); + + pinmux_config_drvgrp_table(e2220_1170_drvgrps, + ARRAY_SIZE(e2220_1170_drvgrps)); +} diff --git a/board/nvidia/e2220-1170/pinmux-config-e2220-1170.h b/board/nvidia/e2220-1170/pinmux-config-e2220-1170.h new file mode 100644 index 000000000000..7eb1e6c1b3e9 --- /dev/null +++ b/board/nvidia/e2220-1170/pinmux-config-e2220-1170.h @@ -0,0 +1,277 @@ +/* + * Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/* + * THIS FILE IS AUTO-GENERATED - DO NOT EDIT! + * + * To generate this file, use the tegra-pinmux-scripts tool available from + * https://github.com/NVIDIA/tegra-pinmux-scripts + * Run "board-to-uboot.py e2220-1170". + */ + +#ifndef _PINMUX_CONFIG_E2220_1170_H_ +#define _PINMUX_CONFIG_E2220_1170_H_ + +#define GPIO_INIT(_gpio, _init) \ + { \ + .gpio = GPIO_P##_gpio, \ + .init = TEGRA_GPIO_INIT_##_init, \ + } + +static const struct tegra_gpio_config e2220_1170_gpio_inits[] = { + /* gpio, init_val */ + GPIO_INIT(A5, IN), + GPIO_INIT(A6, IN), + GPIO_INIT(B4, IN), + GPIO_INIT(E6, IN), + GPIO_INIT(G2, OUT0), + GPIO_INIT(G3, OUT0), + GPIO_INIT(H0, OUT0), + GPIO_INIT(H1, OUT0), + GPIO_INIT(H2, IN), + GPIO_INIT(H3, OUT0), + GPIO_INIT(H4, OUT0), + GPIO_INIT(H5, IN), + GPIO_INIT(H6, OUT0), + GPIO_INIT(H7, OUT0), + GPIO_INIT(I0, OUT0), + GPIO_INIT(I1, IN), + GPIO_INIT(I2, OUT0), + GPIO_INIT(I3, OUT0), + GPIO_INIT(K0, IN), + GPIO_INIT(K1, OUT0), + GPIO_INIT(K2, OUT0), + GPIO_INIT(K3, OUT0), + GPIO_INIT(K4, IN), + GPIO_INIT(K5, OUT0), + GPIO_INIT(K6, IN), + GPIO_INIT(K7, OUT0), + GPIO_INIT(L0, OUT0), + GPIO_INIT(S4, OUT0), + GPIO_INIT(S5, OUT0), + GPIO_INIT(S6, OUT0), + GPIO_INIT(S7, OUT0), + GPIO_INIT(T0, OUT0), + GPIO_INIT(T1, OUT0), + GPIO_INIT(V1, OUT0), + GPIO_INIT(V2, OUT0), + GPIO_INIT(V3, IN), + GPIO_INIT(V5, OUT0), + GPIO_INIT(V6, OUT0), + GPIO_INIT(X0, IN), + GPIO_INIT(X1, IN), + GPIO_INIT(X2, IN), + GPIO_INIT(X3, IN), + GPIO_INIT(X4, IN), + GPIO_INIT(X5, IN), + GPIO_INIT(X6, IN), + GPIO_INIT(X7, IN), + GPIO_INIT(Y0, IN), + GPIO_INIT(Y1, IN), + GPIO_INIT(Z0, IN), + GPIO_INIT(Z4, OUT0), + GPIO_INIT(BB2, OUT0), + GPIO_INIT(BB3, OUT0), + GPIO_INIT(BB4, IN), + GPIO_INIT(CC1, IN), + GPIO_INIT(CC5, OUT0), + GPIO_INIT(CC6, IN), + GPIO_INIT(CC7, OUT0), +}; + +#define PINCFG(_pingrp, _mux, _pull, _tri, _io, _od, _e_io_hv) \ + { \ + .pingrp = PMUX_PINGRP_##_pingrp, \ + .func = PMUX_FUNC_##_mux, \ + .pull = PMUX_PULL_##_pull, \ + .tristate = PMUX_TRI_##_tri, \ + .io = PMUX_PIN_##_io, \ + .od = PMUX_PIN_OD_##_od, \ + .e_io_hv = PMUX_PIN_E_IO_HV_##_e_io_hv, \ + .lock = PMUX_PIN_LOCK_DEFAULT, \ + } + +static const struct pmux_pingrp_config e2220_1170_pingrps[] = { + /* pingrp, mux, pull, tri, e_input, od, e_io_hv */ + PINCFG(PEX_L0_RST_N_PA0, PE0, NORMAL, NORMAL, OUTPUT, DISABLE, NORMAL), + PINCFG(PEX_L0_CLKREQ_N_PA1, PE0, UP, NORMAL, INPUT, DISABLE, NORMAL), + PINCFG(PEX_WAKE_N_PA2, PE, UP, NORMAL, INPUT, DISABLE, NORMAL), + PINCFG(PEX_L1_RST_N_PA3, PE1, NORMAL, NORMAL, OUTPUT, DISABLE, NORMAL), + PINCFG(PEX_L1_CLKREQ_N_PA4, PE1, UP, NORMAL, INPUT, DISABLE, NORMAL), + PINCFG(SATA_LED_ACTIVE_PA5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(PA6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(DAP1_FS_PB0, I2S1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(DAP1_DIN_PB1, I2S1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(DAP1_DOUT_PB2, I2S1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(DAP1_SCLK_PB3, I2S1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(SPI2_MOSI_PB4, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(SPI2_MISO_PB5, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), + PINCFG(SPI2_SCK_PB6, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), + PINCFG(SPI2_CS0_PB7, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), + PINCFG(SPI1_MOSI_PC0, SPI1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(SPI1_MISO_PC1, SPI1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(SPI1_SCK_PC2, SPI1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(SPI1_CS0_PC3, SPI1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(SPI1_CS1_PC4, SPI1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(SPI4_SCK_PC5, SPI4, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(SPI4_CS0_PC6, SPI4, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(SPI4_MOSI_PC7, SPI4, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(SPI4_MISO_PD0, SPI4, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(UART3_TX_PD1, UARTC, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(UART3_RX_PD2, UARTC, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(UART3_RTS_PD3, UARTC, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(UART3_CTS_PD4, UARTC, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(DMIC1_CLK_PE0, DMIC1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(DMIC1_DAT_PE1, DMIC1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(DMIC2_CLK_PE2, DMIC2, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(DMIC2_DAT_PE3, DMIC2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(DMIC3_CLK_PE4, DMIC3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(DMIC3_DAT_PE5, DMIC3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(PE6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(PE7, PWM3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(GEN3_I2C_SCL_PF0, I2C3, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), + PINCFG(GEN3_I2C_SDA_PF1, I2C3, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), + PINCFG(UART2_TX_PG0, UART, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(UART2_RX_PG1, UART, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(UART2_RTS_PG2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(UART2_CTS_PG3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(WIFI_EN_PH0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(WIFI_RST_PH1, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(WIFI_WAKE_AP_PH2, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(AP_WAKE_BT_PH3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(BT_RST_PH4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(BT_WAKE_AP_PH5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(PH6, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(AP_WAKE_NFC_PH7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(NFC_EN_PI0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(NFC_INT_PI1, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(GPS_EN_PI2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(GPS_RST_PI3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(UART4_TX_PI4, UARTD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(UART4_RX_PI5, UARTD, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(UART4_RTS_PI6, UARTD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(UART4_CTS_PI7, UARTD, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(GEN1_I2C_SDA_PJ0, I2C1, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), + PINCFG(GEN1_I2C_SCL_PJ1, I2C1, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), + PINCFG(GEN2_I2C_SCL_PJ2, I2C2, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), + PINCFG(GEN2_I2C_SDA_PJ3, I2C2, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), + PINCFG(DAP4_FS_PJ4, I2S4B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(DAP4_DIN_PJ5, I2S4B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(DAP4_DOUT_PJ6, I2S4B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(DAP4_SCLK_PJ7, I2S4B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(PK0, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(PK1, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(PK2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(PK3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(PK4, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(PK5, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(PK6, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(PK7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(PL0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(PL1, SOC, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(SDMMC1_CLK_PM0, SDMMC1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(SDMMC1_CMD_PM1, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(SDMMC1_DAT3_PM2, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(SDMMC1_DAT2_PM3, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(SDMMC1_DAT1_PM4, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(SDMMC1_DAT0_PM5, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(SDMMC3_CLK_PP0, SDMMC3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(SDMMC3_CMD_PP1, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(SDMMC3_DAT3_PP2, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(SDMMC3_DAT2_PP3, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(SDMMC3_DAT1_PP4, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(SDMMC3_DAT0_PP5, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(CAM1_MCLK_PS0, EXTPERIPH3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(CAM2_MCLK_PS1, EXTPERIPH3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(CAM_I2C_SCL_PS2, I2CVI, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), + PINCFG(CAM_I2C_SDA_PS3, I2CVI, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), + PINCFG(CAM_RST_PS4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(CAM_AF_EN_PS5, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(CAM_FLASH_EN_PS6, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(CAM1_PWDN_PS7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(CAM2_PWDN_PT0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(CAM1_STROBE_PT1, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(UART1_TX_PU0, UARTA, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(UART1_RX_PU1, UARTA, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(UART1_RTS_PU2, UARTA, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(UART1_CTS_PU3, UARTA, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(LCD_BL_PWM_PV0, PWM0, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(LCD_BL_EN_PV1, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(LCD_RST_PV2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(LCD_GPIO1_PV3, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(LCD_GPIO2_PV4, PWM1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(AP_READY_PV5, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(TOUCH_RST_PV6, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(TOUCH_CLK_PV7, TOUCH, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(MODEM_WAKE_AP_PX0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(TOUCH_INT_PX1, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(MOTION_INT_PX2, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(ALS_PROX_INT_PX3, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(TEMP_ALERT_PX4, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(BUTTON_POWER_ON_PX5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(BUTTON_VOL_UP_PX6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(BUTTON_VOL_DOWN_PX7, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(BUTTON_SLIDE_SW_PY0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(BUTTON_HOME_PY1, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(LCD_TE_PY2, DISPLAYA, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(PWR_I2C_SCL_PY3, I2CPMU, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), + PINCFG(PWR_I2C_SDA_PY4, I2CPMU, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), + PINCFG(CLK_32K_OUT_PY5, SOC, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(PZ0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(PZ1, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(PZ2, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(PZ3, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(PZ4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(PZ5, SOC, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(DAP2_FS_PAA0, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(DAP2_SCLK_PAA1, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(DAP2_DIN_PAA2, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(DAP2_DOUT_PAA3, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(AUD_MCLK_PBB0, AUD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(DVFS_PWM_PBB1, CLDVFS, NORMAL, TRISTATE, OUTPUT, DISABLE, DEFAULT), + PINCFG(DVFS_CLK_PBB2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(GPIO_X1_AUD_PBB3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(GPIO_X3_AUD_PBB4, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(HDMI_CEC_PCC0, CEC, NORMAL, NORMAL, INPUT, DISABLE, HIGH), + PINCFG(HDMI_INT_DP_HPD_PCC1, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, NORMAL), + PINCFG(SPDIF_OUT_PCC2, SPDIF, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(SPDIF_IN_PCC3, SPDIF, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(USB_VBUS_EN0_PCC4, USB, NORMAL, NORMAL, INPUT, DISABLE, HIGH), + PINCFG(USB_VBUS_EN1_PCC5, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, NORMAL), + PINCFG(DP_HPD0_PCC6, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(PCC7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, NORMAL), + PINCFG(SPI2_CS1_PDD0, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), + PINCFG(QSPI_SCK_PEE0, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(QSPI_CS_N_PEE1, QSPI, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(QSPI_IO0_PEE2, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(QSPI_IO1_PEE3, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(QSPI_IO2_PEE4, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(QSPI_IO3_PEE5, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(CORE_PWR_REQ, CORE, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(CPU_PWR_REQ, CPU, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(PWR_INT_N, PMI, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(CLK_32K_IN, CLK, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(JTAG_RTCK, JTAG, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(CLK_REQ, SYS, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(SHUTDOWN, SHUTDOWN, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +}; + +#define DRVCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \ + { \ + .drvgrp = PMUX_DRVGRP_##_drvgrp, \ + .slwf = _slwf, \ + .slwr = _slwr, \ + .drvup = _drvup, \ + .drvdn = _drvdn, \ + .lpmd = PMUX_LPMD_##_lpmd, \ + .schmt = PMUX_SCHMT_##_schmt, \ + .hsm = PMUX_HSM_##_hsm, \ + } + +static const struct pmux_drvgrp_config e2220_1170_drvgrps[] = { +}; + +#endif /* PINMUX_CONFIG_E2220_1170_H */ diff --git a/configs/e2220-1170_defconfig b/configs/e2220-1170_defconfig new file mode 100644 index 000000000000..455e7892b5cb --- /dev/null +++ b/configs/e2220-1170_defconfig @@ -0,0 +1,17 @@ +CONFIG_ARM=y +CONFIG_TEGRA=y +CONFIG_TEGRA210=y +CONFIG_TARGET_E2220_1170=y +CONFIG_DEFAULT_DEVICE_TREE="tegra210-e2220-1170" +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set +CONFIG_SPL_DM=y +CONFIG_TEGRA114_SPI=y +CONFIG_SPI_FLASH=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/include/configs/e2220-1170.h b/include/configs/e2220-1170.h new file mode 100644 index 000000000000..f0afb6228457 --- /dev/null +++ b/include/configs/e2220-1170.h @@ -0,0 +1,69 @@ +/* + * (C) Copyright 2013-2015 + * NVIDIA Corporation <www.nvidia.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _E2220_1170_H +#define _E2220_1170_H + +#include <linux/sizes.h> + +/* enable PMIC */ +#define CONFIG_MAX77620_POWER + +#include "tegra210-common.h" + +/* High-level configuration options */ +#define V_PROMPT "Tegra210 (E2220-1170) # " +#define CONFIG_TEGRA_BOARD_STRING "NVIDIA E2220-1170" + +/* Board-specific serial config */ +#define CONFIG_SERIAL_MULTI +#define CONFIG_TEGRA_ENABLE_UARTA + +/* I2C */ +#define CONFIG_SYS_I2C_TEGRA +#define CONFIG_CMD_I2C + +/* SD/MMC */ +#define CONFIG_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_TEGRA_MMC +#define CONFIG_CMD_MMC + +/* Environment in eMMC, at the end of 2nd "boot sector" */ +#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_SYS_MMC_ENV_DEV 0 +#define CONFIG_SYS_MMC_ENV_PART 2 +#define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE) + +/* SPI */ +#define CONFIG_SPI_FLASH_WINBOND +#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 +#define CONFIG_SF_DEFAULT_SPEED 24000000 +#define CONFIG_CMD_SPI +#define CONFIG_CMD_SF +#define CONFIG_SPI_FLASH_SIZE (4 << 20) + +/* USB2.0 Host support */ +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_TEGRA +#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 +#define CONFIG_USB_STORAGE +#define CONFIG_CMD_USB + +/* USB networking support */ +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_ETHER_ASIX + +/* General networking support */ +#define CONFIG_CMD_DHCP + +#include "tegra-common-usb-gadget.h" +#include "tegra-common-post.h" + +#define COUNTER_FREQUENCY 38400000 + +#endif /* _E2220_1170_H */ -- 1.9.1

2 4

[U-Boot] [PATCH] Tegra: spi: Move TEGRA114_SPI switch to defconfigs
by Tom Warren 05 Aug '15

05 Aug '15

All T114+ Tegra boards should be using the Kconfig TEGRA114_SPI switch. Remove it from include/config and put it into defconfig. Also removed unused TEGRA114_SPI_CTRLS from T114+ configs. All Tegra SoCs build OK with this change. Signed-off-by: Tom Warren <twarren(a)nvidia.com> --- configs/dalmore_defconfig | 1 + configs/jetson-tk1_defconfig | 1 + configs/nyan-big_defconfig | 1 + configs/p2571_defconfig | 1 + configs/venice2_defconfig | 1 + include/configs/dalmore.h | 2 -- include/configs/jetson-tk1.h | 2 -- include/configs/nyan-big.h | 2 -- include/configs/p2571.h | 2 -- include/configs/venice2.h | 2 -- 10 files changed, 5 insertions(+), 10 deletions(-) diff --git a/configs/dalmore_defconfig b/configs/dalmore_defconfig index e7443f8..2d80247 100644 --- a/configs/dalmore_defconfig +++ b/configs/dalmore_defconfig @@ -10,6 +10,7 @@ CONFIG_DEFAULT_DEVICE_TREE="tegra114-dalmore" # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_NFS is not set CONFIG_SPL_DM=y +CONFIG_TEGRA114_SPI=y CONFIG_SPI_FLASH=y CONFIG_USB=y CONFIG_DM_USB=y diff --git a/configs/jetson-tk1_defconfig b/configs/jetson-tk1_defconfig index 7085469..44c7a8e 100644 --- a/configs/jetson-tk1_defconfig +++ b/configs/jetson-tk1_defconfig @@ -10,6 +10,7 @@ CONFIG_DEFAULT_DEVICE_TREE="tegra124-jetson-tk1" # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_NFS is not set CONFIG_SPL_DM=y +CONFIG_TEGRA114_SPI=y CONFIG_SPI_FLASH=y CONFIG_USB=y CONFIG_DM_USB=y diff --git a/configs/nyan-big_defconfig b/configs/nyan-big_defconfig index 79b74a7..ccf656b 100644 --- a/configs/nyan-big_defconfig +++ b/configs/nyan-big_defconfig @@ -10,6 +10,7 @@ CONFIG_DEFAULT_DEVICE_TREE="tegra124-nyan-big" # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_NFS is not set CONFIG_SPL_DM=y +CONFIG_TEGRA114_SPI=y CONFIG_SPI_FLASH=y CONFIG_CMD_CROS_EC=y CONFIG_CROS_EC=y diff --git a/configs/p2571_defconfig b/configs/p2571_defconfig index 8494bb5..5fd2a54 100644 --- a/configs/p2571_defconfig +++ b/configs/p2571_defconfig @@ -10,6 +10,7 @@ CONFIG_DEFAULT_DEVICE_TREE="tegra210-p2571" # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_NFS is not set CONFIG_SPL_DM=y +CONFIG_TEGRA114_SPI=y CONFIG_SPI_FLASH=y CONFIG_USB=y CONFIG_DM_USB=y diff --git a/configs/venice2_defconfig b/configs/venice2_defconfig index 9ccd739..a4735f6 100644 --- a/configs/venice2_defconfig +++ b/configs/venice2_defconfig @@ -10,6 +10,7 @@ CONFIG_DEFAULT_DEVICE_TREE="tegra124-venice2" # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_NFS is not set CONFIG_SPL_DM=y +CONFIG_TEGRA114_SPI=y CONFIG_SPI_FLASH=y CONFIG_USB=y CONFIG_DM_USB=y diff --git a/include/configs/dalmore.h b/include/configs/dalmore.h index 89b6f23..32fe9e8 100644 --- a/include/configs/dalmore.h +++ b/include/configs/dalmore.h @@ -51,8 +51,6 @@ #define MACH_TYPE_DALMORE 4304 /* not yet in mach-types.h */ /* SPI */ -#define CONFIG_TEGRA114_SPI -#define CONFIG_TEGRA114_SPI_CTRLS 6 #define CONFIG_SPI_FLASH_WINBOND #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 #define CONFIG_SF_DEFAULT_SPEED 24000000 diff --git a/include/configs/jetson-tk1.h b/include/configs/jetson-tk1.h index 3bbff28..5999504 100644 --- a/include/configs/jetson-tk1.h +++ b/include/configs/jetson-tk1.h @@ -41,8 +41,6 @@ #define CONFIG_SYS_MMC_ENV_PART 2 /* SPI */ -#define CONFIG_TEGRA114_SPI /* Compatible w/ Tegra114 SPI */ -#define CONFIG_TEGRA114_SPI_CTRLS 6 #define CONFIG_SPI_FLASH_WINBOND #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 #define CONFIG_SF_DEFAULT_SPEED 24000000 diff --git a/include/configs/nyan-big.h b/include/configs/nyan-big.h index dd549aa..4858dea 100644 --- a/include/configs/nyan-big.h +++ b/include/configs/nyan-big.h @@ -53,8 +53,6 @@ #define CONFIG_LCD_ALIGNMENT MMU_SECTION_SIZE /* SPI */ -#define CONFIG_TEGRA114_SPI /* Compatible w/ Tegra114 SPI */ -#define CONFIG_TEGRA114_SPI_CTRLS 6 #define CONFIG_SPI_FLASH_WINBOND #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 #define CONFIG_SF_DEFAULT_SPEED 24000000 diff --git a/include/configs/p2571.h b/include/configs/p2571.h index d39fa2a..5df7d2f 100644 --- a/include/configs/p2571.h +++ b/include/configs/p2571.h @@ -41,8 +41,6 @@ #define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE) /* SPI */ -#define CONFIG_TEGRA114_SPI /* Compatible w/ Tegra114 SPI */ -#define CONFIG_TEGRA114_SPI_CTRLS 6 #define CONFIG_SPI_FLASH_WINBOND #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 #define CONFIG_SF_DEFAULT_SPEED 24000000 diff --git a/include/configs/venice2.h b/include/configs/venice2.h index 1d9d053..0535a6b 100644 --- a/include/configs/venice2.h +++ b/include/configs/venice2.h @@ -38,8 +38,6 @@ #define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE) /* SPI */ -#define CONFIG_TEGRA114_SPI /* Compatible w/ Tegra114 SPI */ -#define CONFIG_TEGRA114_SPI_CTRLS 6 #define CONFIG_SPI_FLASH_WINBOND #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 #define CONFIG_SF_DEFAULT_SPEED 24000000 -- 1.8.2.1.610.g562af5b

5 5

[U-Boot] [PATCH 1/5] sf: sf_dataflash: Remove inline property of function dataflash_status
by Haikun Wang 05 Aug '15

05 Aug '15

Signed-off-by: Haikun Wang <haikun.wang(a)freescale.com> --- drivers/mtd/spi/sf_dataflash.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/mtd/spi/sf_dataflash.c b/drivers/mtd/spi/sf_dataflash.c index 3111f4f..f83f994 100644 --- a/drivers/mtd/spi/sf_dataflash.c +++ b/drivers/mtd/spi/sf_dataflash.c @@ -67,7 +67,6 @@ #define OP_WRITE_SECURITY_REVC 0x9A #define OP_WRITE_SECURITY 0x9B /* revision D */ - struct dataflash { uint8_t command[16]; unsigned short page_offset; /* offset in flash address */ @@ -76,7 +75,7 @@ struct dataflash { /* * Return the status of the DataFlash device. */ -static inline int dataflash_status(struct spi_slave *spi) +static int dataflash_status(struct spi_slave *spi) { int ret; u8 status; -- 2.1.0.27.g96db324

4 14

[U-Boot] [PATCH 4/4][v2] config: ls2085ardb: Add USB support for ls2085ardb
by Nikhil Badola 04 Aug '15

04 Aug '15

Add USB XHCI support for ls2085rdb platform Signed-off-by: Nikhil Badola <nikhil.badola(a)freescale.com> --- Changes for v2: None include/configs/ls2085ardb.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/include/configs/ls2085ardb.h b/include/configs/ls2085ardb.h index a0f0f6c..a81653c 100644 --- a/include/configs/ls2085ardb.h +++ b/include/configs/ls2085ardb.h @@ -288,6 +288,19 @@ unsigned long get_board_sys_clk(void); #define CONFIG_MISC_INIT_R +/* + * USB + */ +#define CONFIG_HAS_FSL_XHCI_USB +#define CONFIG_USB_XHCI +#define CONFIG_USB_XHCI_FSL +#define CONFIG_USB_XHCI_DWC3 +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 +#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 +#define CONFIG_CMD_USB +#define CONFIG_USB_STORAGE +#define CONFIG_CMD_EXT2 + /* Initial environment variables */ #undef CONFIG_EXTRA_ENV_SETTINGS #define CONFIG_EXTRA_ENV_SETTINGS \ -- 2.1.0

2 1

[U-Boot] [PATCH 3/4][v2] config: ls2085aqds: Add USB support for ls2085aqds
by Nikhil Badola 04 Aug '15

04 Aug '15

Add USB XHCI support for ls2085qds platform Signed-off-by: Nikhil Badola <nikhil.badola(a)freescale.com> --- Changes for v2 : None include/configs/ls2085aqds.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/include/configs/ls2085aqds.h b/include/configs/ls2085aqds.h index 731eca2..7b77fb4 100644 --- a/include/configs/ls2085aqds.h +++ b/include/configs/ls2085aqds.h @@ -354,4 +354,17 @@ unsigned long get_board_ddr_clk(void); #endif +/* + * USB + */ +#define CONFIG_HAS_FSL_XHCI_USB +#define CONFIG_USB_XHCI +#define CONFIG_USB_XHCI_FSL +#define CONFIG_USB_XHCI_DWC3 +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 +#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 +#define CONFIG_CMD_USB +#define CONFIG_USB_STORAGE +#define CONFIG_CMD_EXT2 + #endif /* __LS2_QDS_H */ -- 2.1.0

2 1

[U-Boot] [PATCH 2/4][v2] config: lsch3: Define USB XHCI controller base address for LS2085A
by Nikhil Badola 04 Aug '15

04 Aug '15

Define base address of both usb xhci controllers in lsch3 config in the format (IMMR + offset) for LS2085A Signed-off-by: Nikhil Badola <nikhil.badola(a)freescale.com> --- Changes for v2 : - Descriptive commit message arch/arm/include/asm/arch-fsl-lsch3/config.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/include/asm/arch-fsl-lsch3/config.h b/arch/arm/include/asm/arch-fsl-lsch3/config.h index 02332dc..992dc11 100644 --- a/arch/arm/include/asm/arch-fsl-lsch3/config.h +++ b/arch/arm/include/asm/arch-fsl-lsch3/config.h @@ -64,6 +64,9 @@ #define I2C3_BASE_ADDR (CONFIG_SYS_IMMR + 0x01020000) #define I2C4_BASE_ADDR (CONFIG_SYS_IMMR + 0x01030000) +#define CONFIG_SYS_LS2085A_XHCI_USB1_ADDR (CONFIG_SYS_IMMR + 0x02100000) +#define CONFIG_SYS_LS2085A_XHCI_USB2_ADDR (CONFIG_SYS_IMMR + 0x02110000) + /* TZ Protection Controller Definitions */ #define TZPC_BASE 0x02200000 #define TZPCR0SIZE_BASE (TZPC_BASE) -- 2.1.0

2 1

[U-Boot] [PATCH 1/4][v2] config: lsch3: Define CONFIG_SYS_CACHELINE_SIZE for LS2085A
by Nikhil Badola 04 Aug '15

04 Aug '15

Define CONFIG_SYS_CACHELINE_SIZE for LS2085A which is required by USB XHCI stack for alignment Signed-off-by: Nikhil Badola <nikhil.badola(a)freescale.com> --- changes for v2 : None arch/arm/include/asm/arch-fsl-lsch3/config.h | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/include/asm/arch-fsl-lsch3/config.h b/arch/arm/include/asm/arch-fsl-lsch3/config.h index ca8d38c..02332dc 100644 --- a/arch/arm/include/asm/arch-fsl-lsch3/config.h +++ b/arch/arm/include/asm/arch-fsl-lsch3/config.h @@ -10,6 +10,7 @@ #include <fsl_ddrc_version.h> #define CONFIG_SYS_PAGE_SIZE 0x10000 +#define CONFIG_SYS_CACHELINE_SIZE 64 #ifndef L1_CACHE_BYTES #define L1_CACHE_SHIFT 6 -- 2.1.0

2 1