May 2015 - U-Boot

[U-Boot] [PATCH 13/20] armv8/ls2085a: Avoid hard-coding for board name print
by Prabhakar Kushwaha 18 May '15

18 May '15

LS2085A supports 6 personalities i.e. LS2045AE, LS2045A, LS2080AE, LS2080A, LS2085AE and LS2085A personlities. Instead of hard-coding, board name should change as per selected personality. Signed-off-by: Prabhakar Kushwaha <prabhakar(a)freescale.com> --- board/freescale/ls2085aqds/ls2085aqds.c | 6 +++++- board/freescale/ls2085ardb/ls2085ardb.c | 5 ++++- include/configs/ls2085aqds.h | 3 --- include/configs/ls2085ardb.h | 3 --- 4 files changed, 9 insertions(+), 8 deletions(-) diff --git a/board/freescale/ls2085aqds/ls2085aqds.c b/board/freescale/ls2085aqds/ls2085aqds.c index b103224..5e15ab2 100644 --- a/board/freescale/ls2085aqds/ls2085aqds.c +++ b/board/freescale/ls2085aqds/ls2085aqds.c @@ -49,11 +49,15 @@ int checkboard(void) "100 separate SSCG"}; int clock; + cpu_name(buf); + printf("Board: %s-QDS, ", buf); + sw = QIXIS_READ(arch); - printf("Board: %s, ", CONFIG_IDENT_STRING); printf("Board Arch: V%d, ", sw >> 4); printf("Board version: %c, boot from ", (sw & 0xf) + 'A' - 1); + memset((u8 *)buf, 0x00, ARRAY_SIZE(buf)); + sw = QIXIS_READ(brdcfg[0]); sw = (sw & QIXIS_LBMAP_MASK) >> QIXIS_LBMAP_SHIFT; diff --git a/board/freescale/ls2085ardb/ls2085ardb.c b/board/freescale/ls2085ardb/ls2085ardb.c index a1f5cff..175943e 100644 --- a/board/freescale/ls2085ardb/ls2085ardb.c +++ b/board/freescale/ls2085ardb/ls2085ardb.c @@ -52,9 +52,12 @@ unsigned long long get_qixis_addr(void) int checkboard(void) { u8 sw; + char buf[15]; + + cpu_name(buf); + printf("Board: %s-RDB, ", buf); sw = QIXIS_READ(arch); - printf("Board: %s, ", CONFIG_IDENT_STRING); printf("Board Arch: V%d, ", sw >> 4); printf("Board version: %c, boot from ", (sw & 0xf) + 'A'); diff --git a/include/configs/ls2085aqds.h b/include/configs/ls2085aqds.h index 8cb8c78..731eca2 100644 --- a/include/configs/ls2085aqds.h +++ b/include/configs/ls2085aqds.h @@ -10,9 +10,6 @@ #include "ls2085a_common.h" #include <config_cmd_default.h> -#define CONFIG_IDENT_STRING " LS2085A-QDS" -#define CONFIG_BOOTP_VCI_STRING "U-boot.LS2085A-QDS" - #define CONFIG_DISPLAY_BOARDINFO #ifndef __ASSEMBLY__ diff --git a/include/configs/ls2085ardb.h b/include/configs/ls2085ardb.h index ba671dd..5a5884c 100644 --- a/include/configs/ls2085ardb.h +++ b/include/configs/ls2085ardb.h @@ -10,9 +10,6 @@ #include "ls2085a_common.h" #include <config_cmd_default.h> -#define CONFIG_IDENT_STRING " LS2085A-RDB" -#define CONFIG_BOOTP_VCI_STRING "U-boot.LS2085A-RDB" - #undef CONFIG_CONS_INDEX #define CONFIG_CONS_INDEX 2 -- 1.9.1

1 0

[U-Boot] [PATCH 12/20] armv8/fsl-ch3: Add support to print SoC personality
by Prabhakar Kushwaha 18 May '15

18 May '15

This patch adds support to print out the SoC personality. Freescale LS20xx SoCs (compliant to Chassis-3 specifications) can have 6 personalities: LS2045AE, LS2045A, LS2080AE, LS2080A, LS2085AE and LS2085A Signed-off-by: Bhupesh Sharma <bhupesh.sharma(a)freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar(a)freescale.com> --- arch/arm/cpu/armv8/fsl-lsch3/cpu.c | 37 +++++++++++++++++++++++++++++++ arch/arm/include/asm/arch-fsl-lsch3/soc.h | 20 +++++++++++++++++ 2 files changed, 57 insertions(+) diff --git a/arch/arm/cpu/armv8/fsl-lsch3/cpu.c b/arch/arm/cpu/armv8/fsl-lsch3/cpu.c index 19c3995..52bc731 100644 --- a/arch/arm/cpu/armv8/fsl-lsch3/cpu.c +++ b/arch/arm/cpu/armv8/fsl-lsch3/cpu.c @@ -9,6 +9,7 @@ #include <asm/system.h> #include <asm/armv8/mmu.h> #include <asm/io.h> +#include <asm/arch-fsl-lsch3/soc.h> #include <asm/arch-fsl-lsch3/immap_lsch3.h> #include <fsl_debug_server.h> #include <fsl-mc/fsl_mc.h> @@ -22,6 +23,35 @@ DECLARE_GLOBAL_DATA_PTR; +static struct cpu_type cpu_type_list[] = { +#ifdef CONFIG_LS2085A + CPU_TYPE_ENTRY(LS2085, LS2085, 8), + CPU_TYPE_ENTRY(LS2080, LS2080, 8), + CPU_TYPE_ENTRY(LS2045, LS2045, 4), +#endif +}; + +void cpu_name(char *name) +{ + struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); + unsigned int i, svr, ver; + + svr = in_le32(&gur->svr); + ver = SVR_SOC_VER(svr); + + for (i = 0; i < ARRAY_SIZE(cpu_type_list); i++) + if ((cpu_type_list[i].soc_ver & SVR_WO_E) == ver) { + strcpy(name, cpu_type_list[i].name); + + if (IS_E_PROCESSOR(svr)) + strcat(name, "E"); + break; + } + + if (i == ARRAY_SIZE(cpu_type_list)) + strcpy(name, "unknown"); +} + #ifndef CONFIG_SYS_DCACHE_OFF /* * To start MMU before DDR is available, we create MMU table in SRAM. @@ -380,6 +410,13 @@ int print_cpuinfo(void) unsigned int i, core; u32 type; + puts("SoC: "); + + cpu_name(buf); + printf(" %s (0x%x)\n", buf, in_le32(&gur->svr)); + + memset((u8 *)buf, 0x00, ARRAY_SIZE(buf)); + get_sys_info(&sysinfo); puts("Clock Configuration:"); for_each_cpu(i, core, cpu_numcores(), cpu_mask()) { diff --git a/arch/arm/include/asm/arch-fsl-lsch3/soc.h b/arch/arm/include/asm/arch-fsl-lsch3/soc.h index 16b723d..9a29272 100644 --- a/arch/arm/include/asm/arch-fsl-lsch3/soc.h +++ b/arch/arm/include/asm/arch-fsl-lsch3/soc.h @@ -4,5 +4,25 @@ * SPDX-License-Identifier: GPL-2.0+ */ +struct cpu_type { + char name[15]; + u32 soc_ver; + u32 num_cores; +}; + +#define CPU_TYPE_ENTRY(n, v, nc) \ + { .name = #n, .soc_ver = SVR_##v, .num_cores = (nc)} + +#define SVR_WO_E 0xFFFFFE +#define SVR_LS2045 0x870120 +#define SVR_LS2080 0x870110 +#define SVR_LS2085 0x870100 + +#define SVR_MAJ(svr) (((svr) >> 4) & 0xf) +#define SVR_MIN(svr) (((svr) >> 0) & 0xf) +#define SVR_SOC_VER(svr) (((svr) >> 8) & SVR_WO_E) +#define IS_E_PROCESSOR(svr) (!((svr >> 8) & 0x1)) + void fsl_lsch3_early_init_f(void); +void cpu_name(char *name); -- 1.9.1

1 0

[U-Boot] [PATCH 11/20] armv8/fsl-lsch3: Fix DDR speed message
by Prabhakar Kushwaha 18 May '15

18 May '15

From: York Sun <yorksun(a)freescale.com> DDR speed should be in MT/s, not MHz. Signed-off-by: York Sun <yorksun(a)freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar(a)freescale.com> --- arch/arm/cpu/armv8/fsl-lsch3/cpu.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/armv8/fsl-lsch3/cpu.c b/arch/arm/cpu/armv8/fsl-lsch3/cpu.c index 6714577..19c3995 100644 --- a/arch/arm/cpu/armv8/fsl-lsch3/cpu.c +++ b/arch/arm/cpu/armv8/fsl-lsch3/cpu.c @@ -394,8 +394,8 @@ int print_cpuinfo(void) } printf("\n Bus: %-4s MHz ", strmhz(buf, sysinfo.freq_systembus)); - printf("DDR: %-4s MHz", strmhz(buf, sysinfo.freq_ddrbus)); - printf(" DP-DDR: %-4s MHz", strmhz(buf, sysinfo.freq_ddrbus2)); + printf("DDR: %-4s MT/s", strmhz(buf, sysinfo.freq_ddrbus)); + printf(" DP-DDR: %-4s MT/s", strmhz(buf, sysinfo.freq_ddrbus2)); puts("\n"); /* Display the RCW, so that no one gets confused as to what RCW -- 1.9.1

1 0

[U-Boot] [PATCH 10/20] armv8/ls2085RDB: Update board version print logic
by Prabhakar Kushwaha 18 May '15

18 May '15

As per updated board document, no need to substract 1 from arch[BRD] bit field. Default value + 'A' represents the board revision. So update board version print logic to reflect the same. Signed-off-by: Prabhakar Kushwaha <prabhakar(a)freescale.com> --- board/freescale/ls2085ardb/ls2085ardb.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/freescale/ls2085ardb/ls2085ardb.c b/board/freescale/ls2085ardb/ls2085ardb.c index 5abf273..a1f5cff 100644 --- a/board/freescale/ls2085ardb/ls2085ardb.c +++ b/board/freescale/ls2085ardb/ls2085ardb.c @@ -56,7 +56,7 @@ int checkboard(void) sw = QIXIS_READ(arch); printf("Board: %s, ", CONFIG_IDENT_STRING); printf("Board Arch: V%d, ", sw >> 4); - printf("Board version: %c, boot from ", (sw & 0xf) + 'A' - 1); + printf("Board version: %c, boot from ", (sw & 0xf) + 'A'); sw = QIXIS_READ(brdcfg[0]); sw = (sw & QIXIS_LBMAP_MASK) >> QIXIS_LBMAP_SHIFT; -- 1.9.1

1 0

[U-Boot] [PATCH 09/20] board/fsl/common: Fix eeprom system version endianness
by Prabhakar Kushwaha 18 May '15

18 May '15

From: Jaiprakash Singh <b44839(a)freescale.com> SYSTEM ID EPPROM always store SYSTEM version info in big endian format. SoC with ARM or PowerPC core should read/write version info from eeprom in BIG endian format. So use cpu-specific APIs to read SYSTEM version. Signed-off-by: Jaiprakash Singh <b44839(a)freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar(a)freescale.com> --- board/freescale/common/sys_eeprom.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/board/freescale/common/sys_eeprom.c b/board/freescale/common/sys_eeprom.c index 5cb7570..29aa778 100644 --- a/board/freescale/common/sys_eeprom.c +++ b/board/freescale/common/sys_eeprom.c @@ -90,7 +90,7 @@ static void show_eeprom(void) /* EEPROM tag ID, either CCID or NXID */ #ifdef CONFIG_SYS_I2C_EEPROM_NXID printf("ID: %c%c%c%c v%u\n", e.id[0], e.id[1], e.id[2], e.id[3], - e.version); + be32_to_cpu(e.version)); #else printf("ID: %c%c%c%c\n", e.id[0], e.id[1], e.id[2], e.id[3]); #endif @@ -340,7 +340,7 @@ int do_mac(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) if (cmd == 'i') { #ifdef CONFIG_SYS_I2C_EEPROM_NXID memcpy(e.id, "NXID", sizeof(e.id)); - e.version = NXID_VERSION; + e.version = cpu_to_be32(NXID_VERSION); #else memcpy(e.id, "CCID", sizeof(e.id)); #endif @@ -485,7 +485,7 @@ int mac_read_from_eeprom(void) #ifdef CONFIG_SYS_I2C_EEPROM_NXID printf("%c%c%c%c v%u\n", e.id[0], e.id[1], e.id[2], e.id[3], - e.version); + be32_to_cpu(e.version)); #else printf("%c%c%c%c\n", e.id[0], e.id[1], e.id[2], e.id[3]); #endif @@ -496,7 +496,7 @@ int mac_read_from_eeprom(void) * that at boot time, U-Boot will still say "NXID v0". */ if (e.version == 0) { - e.version = NXID_VERSION; + e.version = cpu_to_be32(NXID_VERSION); update_crc(); } #endif -- 1.9.1

1 0

[U-Boot] [PATCH v2 0/3] ARM: zynq: include ps7_init_gpl.c/h of Zed, MicroZed, ZC702, ZC706
by Masahiro Yamada 18 May '15

18 May '15

Masahiro Yamada (3): ARM: zynq: drop legacy ps7_init.c/h support ARM: zynq: use separate configuration for ZC702 and ZC706 ARM: zynq: add default ps7_init_gpl.c/h for Zed, MicroZed, ZC70x arch/arm/cpu/armv7/zynq/Kconfig | 19 +- arch/arm/cpu/armv7/zynq/spl.c | 2 +- board/xilinx/zynq/Makefile | 20 +- .../zynq/MicroZed_hw_platform/ps7_init_gpl.c | 12978 ++++++++++++++++++ .../zynq/MicroZed_hw_platform/ps7_init_gpl.h | 130 + board/xilinx/zynq/ZC702_hw_platform/ps7_init_gpl.c | 13311 +++++++++++++++++++ board/xilinx/zynq/ZC702_hw_platform/ps7_init_gpl.h | 130 + board/xilinx/zynq/ZC706_hw_platform/ps7_init_gpl.c | 13218 ++++++++++++++++++ board/xilinx/zynq/ZC706_hw_platform/ps7_init_gpl.h | 130 + .../zynq/{ => custom_hw_platform}/.gitignore | 1 - board/xilinx/zynq/legacy.c | 2 - board/xilinx/zynq/zed_hw_platform/ps7_init_gpl.c | 12876 ++++++++++++++++++ board/xilinx/zynq/zed_hw_platform/ps7_init_gpl.h | 130 + .../{zynq_zc70x_defconfig => zynq_zc702_defconfig} | 2 +- configs/zynq_zc706_defconfig | 11 + doc/README.zynq | 15 +- 16 files changed, 52952 insertions(+), 23 deletions(-) create mode 100644 board/xilinx/zynq/MicroZed_hw_platform/ps7_init_gpl.c create mode 100644 board/xilinx/zynq/MicroZed_hw_platform/ps7_init_gpl.h create mode 100644 board/xilinx/zynq/ZC702_hw_platform/ps7_init_gpl.c create mode 100644 board/xilinx/zynq/ZC702_hw_platform/ps7_init_gpl.h create mode 100644 board/xilinx/zynq/ZC706_hw_platform/ps7_init_gpl.c create mode 100644 board/xilinx/zynq/ZC706_hw_platform/ps7_init_gpl.h rename board/xilinx/zynq/{ => custom_hw_platform}/.gitignore (56%) delete mode 100644 board/xilinx/zynq/legacy.c create mode 100644 board/xilinx/zynq/zed_hw_platform/ps7_init_gpl.c create mode 100644 board/xilinx/zynq/zed_hw_platform/ps7_init_gpl.h rename configs/{zynq_zc70x_defconfig => zynq_zc702_defconfig} (88%) create mode 100644 configs/zynq_zc706_defconfig -- 1.9.1

2 7

[U-Boot] [Resend PATCH 0/4] arm: imx6: tqma6: Kconfig rework
by Markus Niebel 18 May '15

18 May '15

From: Markus Niebel <Markus.Niebel(a)tq-group.com> This series extends the Kconfig options for TQMa6 to enable removal of CONFIG_SYS_EXTRA_OPTIONS for this boards. To enable CPU selection the first patch moves the board selection to the i.MX6 CPU menu as implemented by the Seco mx6 boards Markus Niebel (4): arm: mx6: tqma6: CPU type selection via Kconfig arm: imx6: tqma6: implement IMX_CONFIG with Kconfig arm: imx6: tqma6: boot device selection via Kconfig arm: imx6: tqma6: implement KConfig baseboard selection arch/arm/Kconfig | 5 ---- arch/arm/cpu/armv7/mx6/Kconfig | 5 ++++ board/tqc/tqma6/Kconfig | 55 +++++++++++++++++++++++++++++++++++++++ configs/tqma6q_mba6_mmc_defconfig | 5 +++- configs/tqma6q_mba6_spi_defconfig | 5 +++- configs/tqma6s_mba6_mmc_defconfig | 5 +++- configs/tqma6s_mba6_spi_defconfig | 5 +++- include/configs/tqma6.h | 2 -- 8 files changed, 76 insertions(+), 11 deletions(-) -- 2.3.0

2 6

[U-Boot] [PATCH v2 0/2]: imx: mx6: use OTP for freq grade
by Tim Harvey 17 May '15

17 May '15

This is a second take on my last series to obtain and use CPU frequency grade in print_cpuinfo(). Signed-off-by: Tim Harvey <tharvey(a)gateworks.com> -- v2: - split into two series: 1 for CPU frequency, other for Temperature grade Tim Harvey (2): imx: mx6: add get_cpu_speed_grade_hz func to return MHz speed grade from OTP mx: mx6: display max cpu frequency in print_cpuinfo() arch/arm/cpu/armv7/mx6/soc.c | 41 +++++++++++++++++++++++++++++++ arch/arm/imx-common/cpu.c | 16 +++++++++++- arch/arm/include/asm/arch-mx6/sys_proto.h | 1 + 3 files changed, 57 insertions(+), 1 deletion(-) -- 1.9.1

6 15

[U-Boot] [PATCH] sandbox: Tidy up terminal restore
by Simon Glass 17 May '15

17 May '15

For some reason 'u-boot -D' does not restore the terminal correctly when the 'reset' command is used. Call the terminal restore function explicitly in this case. Signed-off-by: Simon Glass <sjg(a)chromium.org> --- arch/sandbox/cpu/cpu.c | 2 ++ arch/sandbox/cpu/os.c | 8 +++++--- include/os.h | 8 ++++++++ 3 files changed, 15 insertions(+), 3 deletions(-) diff --git a/arch/sandbox/cpu/cpu.c b/arch/sandbox/cpu/cpu.c index b6aae37..02c4cd3 100644 --- a/arch/sandbox/cpu/cpu.c +++ b/arch/sandbox/cpu/cpu.c @@ -22,6 +22,8 @@ unsigned long map_len; void reset_cpu(ulong ignored) { + /* Do this here while it still has an effect */ + os_fd_restore(); if (state_uninit()) os_exit(2); diff --git a/arch/sandbox/cpu/os.c b/arch/sandbox/cpu/os.c index e6dd17e..8a4d719 100644 --- a/arch/sandbox/cpu/os.c +++ b/arch/sandbox/cpu/os.c @@ -107,10 +107,12 @@ void os_exit(int exit_code) static struct termios orig_term; static bool term_setup; -static void os_fd_restore(void) +void os_fd_restore(void) { - if (term_setup) + if (term_setup) { tcsetattr(0, TCSANOW, &orig_term); + term_setup = false; + } } /* Put tty into raw mode so <tab> and <ctrl+c> work */ @@ -120,7 +122,6 @@ void os_tty_raw(int fd, bool allow_sigs) if (term_setup) return; - term_setup = true; /* If not a tty, don't complain */ if (tcgetattr(fd, &orig_term)) @@ -134,6 +135,7 @@ void os_tty_raw(int fd, bool allow_sigs) if (tcsetattr(fd, TCSANOW, &term)) return; + term_setup = true; atexit(os_fd_restore); } diff --git a/include/os.h b/include/os.h index ffbdce8..954a48c 100644 --- a/include/os.h +++ b/include/os.h @@ -112,6 +112,14 @@ void os_exit(int exit_code) __attribute__((noreturn)); void os_tty_raw(int fd, bool allow_sigs); /** + * Restore the tty to its original mode + * + * Call this to restore the original terminal mode, after it has been changed + * by os_tty_raw(). This is an internal function. + */ +void os_fd_restore(void); + +/** * Acquires some memory from the underlying os. * * \param length Number of bytes to be allocated -- 2.2.0.rc0.207.ga3a616c

2 3

[U-Boot] [PATCH] dm: pci: Allow PCI bus numbering aliases
by Simon Glass 17 May '15

17 May '15

Commit 9cc36a2 'dm: core: Add a flag to control sequence numbering' changed the default uclass behaviour to not support bus numbering. This is incorrect for PCI and that commit should have enabled the flag for PCI. Enable it so that PCI buses can be found and the 'pci' command works again. Also add a test for this. Signed-off-by: Simon Glass <sjg(a)chromium.org> --- drivers/pci/pci-uclass.c | 1 + test/dm/pci.c | 11 +++++++++++ 2 files changed, 12 insertions(+) diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c index d48d865..de87505 100644 --- a/drivers/pci/pci-uclass.c +++ b/drivers/pci/pci-uclass.c @@ -596,6 +596,7 @@ int pci_bridge_write_config(struct udevice *bus, pci_dev_t devfn, uint offset, UCLASS_DRIVER(pci) = { .id = UCLASS_PCI, .name = "pci", + .flags = DM_UC_FLAG_SEQ_ALIAS, .post_bind = pci_uclass_post_bind, .pre_probe = pci_uclass_pre_probe, .post_probe = pci_uclass_post_probe, diff --git a/test/dm/pci.c b/test/dm/pci.c index 6c63fa4..d80ed2d 100644 --- a/test/dm/pci.c +++ b/test/dm/pci.c @@ -21,6 +21,17 @@ static int dm_test_pci_base(struct dm_test_state *dms) } DM_TEST(dm_test_pci_base, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT); +/* Test that sandbox PCI bus numbering works correctly */ +static int dm_test_pci_busnum(struct dm_test_state *dms) +{ + struct udevice *bus; + + ut_assertok(uclass_get_device_by_seq(UCLASS_PCI, 0, &bus)); + + return 0; +} +DM_TEST(dm_test_pci_busnum, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT); + /* Test that we can use the swapcase device correctly */ static int dm_test_pci_swapcase(struct dm_test_state *dms) { -- 2.2.0.rc0.207.ga3a616c

1 1