May 2015 - U-Boot

[U-Boot] [PATCH 0/1] Allow multiple USB ports to be used on Freescale mx5 boards
by Matthew Starr 21 May '15

21 May '15

Currently only one USB port on mx5 boards can be enabled and that USB port is defined by CONFIG_MXC_USB_PORT. Removing the use of CONFIG_MXC_USB_PORT and instead supporting CONFIG_USB_MAX_CONTROLLER_COUNT to populate that number of USB ports starting with port 0 allows multiple USB ports to be used. Examples: If port 0 and port 1 are populated, the value of CONFIG_USB_MAX_CONTROLLER_COUNT should be set to 2 and both port 0 and port 1 are initialized. If only port 1 is populated, the value of CONFIG_USB_MAX_CONTROLLER_COUNT should be set to 2 and port 0 and port 1 are initialized, but port 0 is not used. If only port 0 is populated, the value of CONFIG_USB_MAX_CONTROLLER_COUNT should be set to 1 and port 0 is the only USB port initialized. Matthew Starr (1): usb: imx: Allow multiple USB ports to be used at the same time on mx5 drivers/usb/host/ehci-mx5.c | 8 ++++---- include/configs/m53evk.h | 2 +- include/configs/mx51_efikamx.h | 1 + include/configs/mx51evk.h | 2 +- include/configs/mx53loco.h | 2 +- include/configs/usbarmory.h | 2 +- 6 files changed, 9 insertions(+), 8 deletions(-) -- 2.1.4

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[U-Boot] [PATCH] wandboard: Add board revision detection support
by Fabio Estevam 21 May '15

21 May '15

From: Fabio Estevam <fabio.estevam(a)freescale.com> There are two revisions of wandboard: version B1 and C1. Add the revision detection support, so that the correct dtb file can be correctly loaded. Based on the patch from Richard Hu <hakahu(a)gmail.com>. Signed-off-by: Fabio Estevam <fabio.estevam(a)freescale.com> --- board/wandboard/wandboard.c | 26 +++++++++++++++++++++++++- include/configs/wandboard.h | 8 ++++++-- 2 files changed, 31 insertions(+), 3 deletions(-) diff --git a/board/wandboard/wandboard.c b/board/wandboard/wandboard.c index 90625ab..0af63d2 100644 --- a/board/wandboard/wandboard.c +++ b/board/wandboard/wandboard.c @@ -50,6 +50,7 @@ DECLARE_GLOBAL_DATA_PTR; #define USDHC1_CD_GPIO IMX_GPIO_NR(1, 2) #define USDHC3_CD_GPIO IMX_GPIO_NR(3, 9) #define ETH_PHY_RESET IMX_GPIO_NR(3, 29) +#define REV_DETECTION IMX_GPIO_NR(2, 28) int dram_init(void) { @@ -105,6 +106,10 @@ static iomux_v3_cfg_t const enet_pads[] = { IOMUX_PADS(PAD_EIM_D29__GPIO3_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL)), }; +static iomux_v3_cfg_t const rev_detection_pad[] = { + IOMUX_PADS(PAD_EIM_EB0__GPIO2_IO28 | MUX_PAD_CTRL(NO_PAD_CTRL)), +}; + static void setup_iomux_uart(void) { SETUP_IOMUX_PADS(uart1_pads); @@ -393,6 +398,17 @@ static const struct boot_mode board_boot_modes[] = { }; #endif +static bool is_revc1(void) +{ + SETUP_IOMUX_PADS(rev_detection_pad); + gpio_direction_input(REV_DETECTION); + + if (gpio_get_value(REV_DETECTION)) + return true; + else + return false; +} + int board_late_init(void) { #ifdef CONFIG_CMD_BMODE @@ -404,6 +420,11 @@ int board_late_init(void) setenv("board_rev", "MX6Q"); else setenv("board_rev", "MX6DL"); + + if (is_revc1()) + setenv("board_name", "C1"); + else + setenv("board_name", "B1"); #endif return 0; } @@ -424,7 +445,10 @@ int board_init(void) int checkboard(void) { - puts("Board: Wandboard\n"); + if (is_revc1()) + puts("Board: Wandboard rev C1\n"); + else + puts("Board: Wandboard rev B1\n"); return 0; } diff --git a/include/configs/wandboard.h b/include/configs/wandboard.h index 7ce861e..e87ab90 100644 --- a/include/configs/wandboard.h +++ b/include/configs/wandboard.h @@ -232,10 +232,14 @@ "bootz; " \ "fi;\0" \ "findfdt="\ - "if test $board_rev = MX6Q ; then " \ + "if test $board_name = C1 && test $board_rev = MX6Q ; then " \ "setenv fdtfile imx6q-wandboard.dtb; fi; " \ - "if test $board_rev = MX6DL ; then " \ + "if test $board_name = C1 && test $board_rev = MX6DL ; then " \ "setenv fdtfile imx6dl-wandboard.dtb; fi; " \ + "if test $board_name = B1 && test $board_rev = MX6Q ; then " \ + "setenv fdtfile imx6q-wandboard-revb1.dtb; fi; " \ + "if test $board_name = B1 && test $board_rev = MX6DL ; then " \ + "setenv fdtfile imx6dl-wandboard-revb1.dtb; fi; " \ "if test $fdtfile = undefined; then " \ "echo WARNING: Could not determine dtb to use; fi; \0" \ -- 1.9.1

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[U-Boot] [PATCH V2 RESEND] nand: fix buffer alignment in new verification feature
by Stephen Warren 21 May '15

21 May '15

From: Stephen Warren <swarren(a)nvidia.com> On systems with caches enabled, NAND I/O may need to flush/invalidate the cache during read/write operations. For this to work correctly, all buffers must be cache-aligned. Fix nand_verify*() to allocate aligned buffers. This prevents cache alignment warnings from being spewed when using U-Boot to write an updated version of itself to flash on NVIDIA Tegra Seaboard (after perturbation of stack/data layout in current u-boot-dm/next branch). I have validatd (executed) nand_verify(), but I don't think I've executed nand_verify_page_oob(); testing of that would be useful. Cc: Peter Tyser <ptyser(a)xes-inc.com> Cc: Heiko Schocher <hs(a)denx.de> Cc: Scott Wood <scottwood(a)freescale.com> Fixes: 59b5a2ad83df ("nand: Add verification functions") Signed-off-by: Stephen Warren <swarren(a)nvidia.com> Reviewed-by: Simon Glass <sjg(a)chromium.org> Acked-by: Scott Wood <scottwood(a)freescale.com> --- Resending to Tom for direct application, including reviewed-/acked-by tags from others. As an aside, I think this patch demonstrates why new features shouldn't be merged just a couple weeks before the release; there's not enough time to detect regressions and patch them. The merge window is for new features. v2: Use memalign() rather than ALLOC_CACHE_ALIGN_BUFFER() so that the buffer is allocated from the heap not on the stack, to reduce stack usage. drivers/mtd/nand/nand_util.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/nand/nand_util.c b/drivers/mtd/nand/nand_util.c index 12dd26a33fac..ee2c24df3b85 100644 --- a/drivers/mtd/nand/nand_util.c +++ b/drivers/mtd/nand/nand_util.c @@ -483,7 +483,7 @@ int nand_verify_page_oob(nand_info_t *nand, struct mtd_oob_ops *ops, loff_t ofs) memcpy(&vops, ops, sizeof(vops)); - vops.datbuf = malloc(verlen); + vops.datbuf = memalign(ARCH_DMA_MINALIGN, verlen); if (!vops.datbuf) return -ENOMEM; @@ -520,7 +520,7 @@ int nand_verify(nand_info_t *nand, loff_t ofs, size_t len, u_char *buf) int rval = 0; size_t verofs; size_t verlen = nand->writesize; - uint8_t *verbuf = malloc(verlen); + uint8_t *verbuf = memalign(ARCH_DMA_MINALIGN, verlen); if (!verbuf) return -ENOMEM; -- 1.9.1

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[U-Boot] [PATCH 00/19] imx: ventana: misc updates
by Tim Harvey 21 May '15

21 May '15

This collection of patches comprises a set of various updates I've been on for Ventana. In summary: - enable driver model - enable gpio command - enable dm-serial - enable thermal support - fixup for GW522x PCI enumeration - split out common code shared between SPL an U-Boot - pull down various init code to the SPL for use in Falcon mode - enable Falcon mode (based on env var) The enabling of Falcon mode is dependent on a patch I submitted earlier allowing nand env in spl [1]. Currently Falcon mode is configured for NAND boot. I plan on re-working a pending patchset I have that allows dynamic env support (use mmc or nand env depending on boot device) but I still need to re-work that using driver-model so it will come later. I will send a followup patch with README updates explaining our use of Falcon mode if everything here looks good. Tim [1] https://patchwork.ozlabs.org/patch/470191/ Tim Harvey (19): imx: ventana: set dtype env var to boot media imx: ventana: display SPL boot device imx: ventana: config: enable gpio command imx: ventana: config: enable driver model imx: ventana: register gpio's with gpio_request imx: ventana: enable DM_SERIAL imx: ventana: config: enable Thermal support imx: ventana: config: use MMC SPL RAW support imx: ventana: (cosmetic) clean up size defines for improved readability imx: ventana: fix pcie reset for GW522x imx: ventana: default msata/pci mux to pci before PCI enumeration imx: ventana: split out common functions between SPL and uboot imx: ventana: move GSC boot watchdog disable function to gsc.c imx: ventana: detect pmic using i2c probe instead of board model imx: ventana: use common uart and i2c setup functions in SPL imx: ventana: add gpio setup to SPL imx: ventana: add pmic_setup to SPL imx: ventana: add GSC boot watchdog disable to SPL imx: ventana: config: enable Falcon mode board/gateworks/gw_ventana/Makefile | 2 +- board/gateworks/gw_ventana/common.c | 827 +++++++++++++++++++++++++ board/gateworks/gw_ventana/common.h | 98 +++ board/gateworks/gw_ventana/gsc.c | 27 + board/gateworks/gw_ventana/gsc.h | 1 + board/gateworks/gw_ventana/gw_ventana.c | 911 ++-------------------------- board/gateworks/gw_ventana/gw_ventana_spl.c | 103 ++-- include/configs/gw_ventana.h | 67 +- 8 files changed, 1102 insertions(+), 934 deletions(-) create mode 100644 board/gateworks/gw_ventana/common.c create mode 100644 board/gateworks/gw_ventana/common.h -- 1.9.1

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[U-Boot] [PATCH] imx: ventana: update MMC env configuration
by Tim Harvey 21 May '15

21 May '15

We will use the same env size and redundancy used for NAND env for MMC. Signed-off-by: Tim Harvey <tharvey(a)gateworks.com> --- include/configs/gw_ventana.h | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index 533cbc3..b424f48 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -311,9 +311,10 @@ #define CONFIG_ENV_IS_IN_NAND #endif #if defined(CONFIG_ENV_IS_IN_MMC) - #define CONFIG_ENV_OFFSET (384 * SZ_1K) - #define CONFIG_ENV_SIZE (8 * SZ_1K) #define CONFIG_SYS_MMC_ENV_DEV 0 + #define CONFIG_ENV_OFFSET (709 * SZ_1K) + #define CONFIG_ENV_SIZE (128 * SZ_1K) + #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + (128 * SZ_1K)) #elif defined(CONFIG_ENV_IS_IN_NAND) #define CONFIG_ENV_OFFSET (16 * SZ_1M) #define CONFIG_ENV_SECT_SIZE (128 * SZ_1K) -- 1.9.1

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[U-Boot] [PATCH] wandboard: Switch to SPL support
by Fabio Estevam 21 May '15

21 May '15

From: Fabio Estevam <fabio.estevam(a)freescale.com> Currently we need to build one U-boot image for each of the wandboard variants: quad, dual-lite and solo. By switching to SPL we can support all these variants with a single binary, which is very convenient. Based on the work from Richard Hu. Tested kernel booting on the three boards. Signed-off-by: Richard Hu <hakahu(a)gmail.com> Signed-off-by: Fabio Estevam <fabio.estevam(a)freescale.com> --- arch/arm/Kconfig | 1 + board/wandboard/MAINTAINERS | 4 +- board/wandboard/Makefile | 2 +- board/wandboard/README | 22 +-- board/wandboard/spl.c | 317 +++++++++++++++++++++++++++++++++++++++ board/wandboard/wandboard.c | 176 ++++++++++++---------- configs/wandboard_defconfig | 6 + configs/wandboard_dl_defconfig | 3 - configs/wandboard_quad_defconfig | 3 - configs/wandboard_solo_defconfig | 3 - include/configs/wandboard.h | 27 ++-- 11 files changed, 448 insertions(+), 116 deletions(-) create mode 100644 board/wandboard/spl.c create mode 100644 configs/wandboard_defconfig delete mode 100644 configs/wandboard_dl_defconfig delete mode 100644 configs/wandboard_quad_defconfig delete mode 100644 configs/wandboard_solo_defconfig diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 00be305..ca7448e 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -493,6 +493,7 @@ config TARGET_UDOO config TARGET_WANDBOARD bool "Support wandboard" select CPU_V7 + select SUPPORT_SPL config TARGET_WARP bool "Support WaRP" diff --git a/board/wandboard/MAINTAINERS b/board/wandboard/MAINTAINERS index b986980..0680517 100644 --- a/board/wandboard/MAINTAINERS +++ b/board/wandboard/MAINTAINERS @@ -3,6 +3,4 @@ M: Fabio Estevam <fabio.estevam(a)freescale.com> S: Maintained F: board/wandboard/ F: include/configs/wandboard.h -F: configs/wandboard_dl_defconfig -F: configs/wandboard_quad_defconfig -F: configs/wandboard_solo_defconfig +F: configs/wandboard_defconfig diff --git a/board/wandboard/Makefile b/board/wandboard/Makefile index 5b50eca..db9f4a6 100644 --- a/board/wandboard/Makefile +++ b/board/wandboard/Makefile @@ -4,4 +4,4 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-y := wandboard.o +obj-y := wandboard.o spl.o diff --git a/board/wandboard/README b/board/wandboard/README index 1f678e1..c6c0132 100644 --- a/board/wandboard/README +++ b/board/wandboard/README @@ -12,31 +12,25 @@ http://www.wandboard.org/ Building U-boot for Wandboard ----------------------------- -To build U-Boot for the Wandboard Dual Lite version: +To build U-Boot for the Wandboard: -$ make wandboard_dl_config -$ make - -To build U-Boot for the Wandboard Solo version: - -$ make wandboard_solo_config -$ make - -To build U-Boot for the Wandboard Quad version: - -$ make wandboard_quad_config +$ make wandboard_config $ make Flashing U-boot into the SD card -------------------------------- -- After the 'make' command completes, the generated 'u-boot.imx' binary must be +- After the 'make' command completes, the generated 'SPL' binary must be flashed into the SD card; -$ sudo dd if=u-boot.imx of=/dev/mmcblk0 bs=512 seek=2; sync +$ sudo dd if=SPL of=/dev/mmcblk0 bs=1k seek=1; sync (Note - the SD card node may vary, so adjust this as needed). +- Flash the u-boot.img image into the SD card: + +sudo dd if=u-boot.img of=/dev/mmcblk0 bs=1k seek=69; sync + - Insert the SD card into the slot located in the bottom of the board (same side as the mx6 processor) diff --git a/board/wandboard/spl.c b/board/wandboard/spl.c new file mode 100644 index 0000000..77afae7 --- /dev/null +++ b/board/wandboard/spl.c @@ -0,0 +1,317 @@ +/* + * Copyright (C) 2014 Wandboard + * Author: Tungyi Lin <tungyilin1127(a)gmail.com> + * Richard Hu <hakahu(a)gmail.com> + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <asm/arch/clock.h> +#include <asm/arch/imx-regs.h> +#include <asm/arch/iomux.h> +#include <asm/arch/mx6-pins.h> +#include <asm/errno.h> +#include <asm/gpio.h> +#include <asm/imx-common/iomux-v3.h> +#include <asm/imx-common/video.h> +#include <mmc.h> +#include <fsl_esdhc.h> +#include <asm/arch/crm_regs.h> +#include <asm/io.h> +#include <asm/arch/sys_proto.h> +#include <spl.h> + +DECLARE_GLOBAL_DATA_PTR; + +#if defined(CONFIG_SPL_BUILD) +#include <asm/arch/mx6-ddr.h> +/* + * Driving strength: + * 0x30 == 40 Ohm + * 0x28 == 48 Ohm + */ + +#define IMX6DQ_DRIVE_STRENGTH 0x30 +#define IMX6SDL_DRIVE_STRENGTH 0x28 + +/* configure MX6Q/DUAL mmdc DDR io registers */ +static struct mx6dq_iomux_ddr_regs mx6dq_ddr_ioregs = { + .dram_sdclk_0 = IMX6DQ_DRIVE_STRENGTH, + .dram_sdclk_1 = IMX6DQ_DRIVE_STRENGTH, + .dram_cas = IMX6DQ_DRIVE_STRENGTH, + .dram_ras = IMX6DQ_DRIVE_STRENGTH, + .dram_reset = IMX6DQ_DRIVE_STRENGTH, + .dram_sdcke0 = IMX6DQ_DRIVE_STRENGTH, + .dram_sdcke1 = IMX6DQ_DRIVE_STRENGTH, + .dram_sdba2 = 0x00000000, + .dram_sdodt0 = IMX6DQ_DRIVE_STRENGTH, + .dram_sdodt1 = IMX6DQ_DRIVE_STRENGTH, + .dram_sdqs0 = IMX6DQ_DRIVE_STRENGTH, + .dram_sdqs1 = IMX6DQ_DRIVE_STRENGTH, + .dram_sdqs2 = IMX6DQ_DRIVE_STRENGTH, + .dram_sdqs3 = IMX6DQ_DRIVE_STRENGTH, + .dram_sdqs4 = IMX6DQ_DRIVE_STRENGTH, + .dram_sdqs5 = IMX6DQ_DRIVE_STRENGTH, + .dram_sdqs6 = IMX6DQ_DRIVE_STRENGTH, + .dram_sdqs7 = IMX6DQ_DRIVE_STRENGTH, + .dram_dqm0 = IMX6DQ_DRIVE_STRENGTH, + .dram_dqm1 = IMX6DQ_DRIVE_STRENGTH, + .dram_dqm2 = IMX6DQ_DRIVE_STRENGTH, + .dram_dqm3 = IMX6DQ_DRIVE_STRENGTH, + .dram_dqm4 = IMX6DQ_DRIVE_STRENGTH, + .dram_dqm5 = IMX6DQ_DRIVE_STRENGTH, + .dram_dqm6 = IMX6DQ_DRIVE_STRENGTH, + .dram_dqm7 = IMX6DQ_DRIVE_STRENGTH, +}; + +/* configure MX6Q/DUAL mmdc GRP io registers */ +static struct mx6dq_iomux_grp_regs mx6dq_grp_ioregs = { + .grp_ddr_type = 0x000c0000, + .grp_ddrmode_ctl = 0x00020000, + .grp_ddrpke = 0x00000000, + .grp_addds = IMX6DQ_DRIVE_STRENGTH, + .grp_ctlds = IMX6DQ_DRIVE_STRENGTH, + .grp_ddrmode = 0x00020000, + .grp_b0ds = IMX6DQ_DRIVE_STRENGTH, + .grp_b1ds = IMX6DQ_DRIVE_STRENGTH, + .grp_b2ds = IMX6DQ_DRIVE_STRENGTH, + .grp_b3ds = IMX6DQ_DRIVE_STRENGTH, + .grp_b4ds = IMX6DQ_DRIVE_STRENGTH, + .grp_b5ds = IMX6DQ_DRIVE_STRENGTH, + .grp_b6ds = IMX6DQ_DRIVE_STRENGTH, + .grp_b7ds = IMX6DQ_DRIVE_STRENGTH, +}; + +/* configure MX6SOLO/DUALLITE mmdc DDR io registers */ +struct mx6sdl_iomux_ddr_regs mx6sdl_ddr_ioregs = { + .dram_sdclk_0 = IMX6SDL_DRIVE_STRENGTH, + .dram_sdclk_1 = IMX6SDL_DRIVE_STRENGTH, + .dram_cas = IMX6SDL_DRIVE_STRENGTH, + .dram_ras = IMX6SDL_DRIVE_STRENGTH, + .dram_reset = IMX6SDL_DRIVE_STRENGTH, + .dram_sdcke0 = IMX6SDL_DRIVE_STRENGTH, + .dram_sdcke1 = IMX6SDL_DRIVE_STRENGTH, + .dram_sdba2 = 0x00000000, + .dram_sdodt0 = IMX6SDL_DRIVE_STRENGTH, + .dram_sdodt1 = IMX6SDL_DRIVE_STRENGTH, + .dram_sdqs0 = IMX6SDL_DRIVE_STRENGTH, + .dram_sdqs1 = IMX6SDL_DRIVE_STRENGTH, + .dram_sdqs2 = IMX6SDL_DRIVE_STRENGTH, + .dram_sdqs3 = IMX6SDL_DRIVE_STRENGTH, + .dram_sdqs4 = IMX6SDL_DRIVE_STRENGTH, + .dram_sdqs5 = IMX6SDL_DRIVE_STRENGTH, + .dram_sdqs6 = IMX6SDL_DRIVE_STRENGTH, + .dram_sdqs7 = IMX6SDL_DRIVE_STRENGTH, + .dram_dqm0 = IMX6SDL_DRIVE_STRENGTH, + .dram_dqm1 = IMX6SDL_DRIVE_STRENGTH, + .dram_dqm2 = IMX6SDL_DRIVE_STRENGTH, + .dram_dqm3 = IMX6SDL_DRIVE_STRENGTH, + .dram_dqm4 = IMX6SDL_DRIVE_STRENGTH, + .dram_dqm5 = IMX6SDL_DRIVE_STRENGTH, + .dram_dqm6 = IMX6SDL_DRIVE_STRENGTH, + .dram_dqm7 = IMX6SDL_DRIVE_STRENGTH, +}; + +/* configure MX6SOLO/DUALLITE mmdc GRP io registers */ +struct mx6sdl_iomux_grp_regs mx6sdl_grp_ioregs = { + .grp_ddr_type = 0x000c0000, + .grp_ddrmode_ctl = 0x00020000, + .grp_ddrpke = 0x00000000, + .grp_addds = IMX6SDL_DRIVE_STRENGTH, + .grp_ctlds = IMX6SDL_DRIVE_STRENGTH, + .grp_ddrmode = 0x00020000, + .grp_b0ds = IMX6SDL_DRIVE_STRENGTH, + .grp_b1ds = IMX6SDL_DRIVE_STRENGTH, + .grp_b2ds = IMX6SDL_DRIVE_STRENGTH, + .grp_b3ds = IMX6SDL_DRIVE_STRENGTH, + .grp_b4ds = IMX6SDL_DRIVE_STRENGTH, + .grp_b5ds = IMX6SDL_DRIVE_STRENGTH, + .grp_b6ds = IMX6SDL_DRIVE_STRENGTH, + .grp_b7ds = IMX6SDL_DRIVE_STRENGTH, +}; + +/* H5T04G63AFR-PB */ +static struct mx6_ddr3_cfg h5t04g63afr = { + .mem_speed = 1600, + .density = 4, + .width = 16, + .banks = 8, + .rowaddr = 15, + .coladdr = 10, + .pagesz = 2, + .trcd = 1375, + .trcmin = 4875, + .trasmin = 3500, +}; + +/* H5TQ2G63DFR-H9 */ +static struct mx6_ddr3_cfg h5tq2g63dfr = { + .mem_speed = 1333, + .density = 2, + .width = 16, + .banks = 8, + .rowaddr = 14, + .coladdr = 10, + .pagesz = 2, + .trcd = 1350, + .trcmin = 4950, + .trasmin = 3600, +}; + +static struct mx6_mmdc_calibration mx6q_2g_mmdc_calib = { + .p0_mpwldectrl0 = 0x001f001f, + .p0_mpwldectrl1 = 0x001f001f, + .p1_mpwldectrl0 = 0x001f001f, + .p1_mpwldectrl1 = 0x001f001f, + .p0_mpdgctrl0 = 0x4301030d, + .p0_mpdgctrl1 = 0x03020277, + .p1_mpdgctrl0 = 0x4300030a, + .p1_mpdgctrl1 = 0x02780248, + .p0_mprddlctl = 0x4536393b, + .p1_mprddlctl = 0x36353441, + .p0_mpwrdlctl = 0x41414743, + .p1_mpwrdlctl = 0x462f453f, +}; + +/* DDR 64bit 2GB */ +static struct mx6_ddr_sysinfo mem_q = { + .dsize = 2, + .cs1_mirror = 0, + /* config for full 4GB range so that get_mem_size() works */ + .cs_density = 32, + .ncs = 1, + .bi_on = 1, + .rtt_nom = 1, + .rtt_wr = 0, + .ralat = 5, + .walat = 0, + .mif3_mode = 3, + .rst_to_cke = 0x23, + .sde_to_rst = 0x10, +}; + +static struct mx6_mmdc_calibration mx6dl_1g_mmdc_calib = { + .p0_mpwldectrl0 = 0x001f001f, + .p0_mpwldectrl1 = 0x001f001f, + .p1_mpwldectrl0 = 0x001f001f, + .p1_mpwldectrl1 = 0x001f001f, + .p0_mpdgctrl0 = 0x420e020e, + .p0_mpdgctrl1 = 0x02000200, + .p1_mpdgctrl0 = 0x42020202, + .p1_mpdgctrl1 = 0x01720172, + .p0_mprddlctl = 0x494c4f4c, + .p1_mprddlctl = 0x4a4c4c49, + .p0_mpwrdlctl = 0x3f3f3133, + .p1_mpwrdlctl = 0x39373f2e, +}; + +static struct mx6_mmdc_calibration mx6s_512m_mmdc_calib = { + .p0_mpwldectrl0 = 0x0040003c, + .p0_mpwldectrl1 = 0x0032003e, + .p0_mpdgctrl0 = 0x42350231, + .p0_mpdgctrl1 = 0x021a0218, + .p0_mprddlctl = 0x4b4b4e49, + .p0_mpwrdlctl = 0x3f3f3035, +}; + +/* DDR 64bit 1GB */ +static struct mx6_ddr_sysinfo mem_dl = { + .dsize = 2, + .cs1_mirror = 0, + /* config for full 4GB range so that get_mem_size() works */ + .cs_density = 32, + .ncs = 1, + .bi_on = 1, + .rtt_nom = 1, + .rtt_wr = 0, + .ralat = 5, + .walat = 0, + .mif3_mode = 3, + .rst_to_cke = 0x23, + .sde_to_rst = 0x10, +}; + +/* DDR 32bit 512MB */ +static struct mx6_ddr_sysinfo mem_s = { + .dsize = 1, + .cs1_mirror = 0, + /* config for full 4GB range so that get_mem_size() works */ + .cs_density = 32, + .ncs = 1, + .bi_on = 1, + .rtt_nom = 1, + .rtt_wr = 0, + .ralat = 5, + .walat = 0, + .mif3_mode = 3, + .rst_to_cke = 0x23, + .sde_to_rst = 0x10, +}; + +static void ccgr_init(void) +{ + struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; + + writel(0x00C03F3F, &ccm->CCGR0); + writel(0x0030FC03, &ccm->CCGR1); + writel(0x0FFFC000, &ccm->CCGR2); + writel(0x3FF00000, &ccm->CCGR3); + writel(0x00FFF300, &ccm->CCGR4); + writel(0x0F0000C3, &ccm->CCGR5); + writel(0x000003FF, &ccm->CCGR6); +} + +static void gpr_init(void) +{ + struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR; + + /* enable AXI cache for VDOA/VPU/IPU */ + writel(0xF00000CF, &iomux->gpr[4]); + /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */ + writel(0x007F007F, &iomux->gpr[6]); + writel(0x007F007F, &iomux->gpr[7]); +} + +static void spl_dram_init(void) +{ + if (is_cpu_type(MXC_CPU_MX6SOLO)) { + mx6sdl_dram_iocfg(32, &mx6sdl_ddr_ioregs, &mx6sdl_grp_ioregs); + mx6_dram_cfg(&mem_s, &mx6s_512m_mmdc_calib, &h5tq2g63dfr); + } else if (is_cpu_type(MXC_CPU_MX6DL)) { + mx6sdl_dram_iocfg(64, &mx6sdl_ddr_ioregs, &mx6sdl_grp_ioregs); + mx6_dram_cfg(&mem_dl, &mx6dl_1g_mmdc_calib, &h5tq2g63dfr); + } else if (is_cpu_type(MXC_CPU_MX6Q)) { + mx6dq_dram_iocfg(64, &mx6dq_ddr_ioregs, &mx6dq_grp_ioregs); + mx6_dram_cfg(&mem_q, &mx6q_2g_mmdc_calib, &h5t04g63afr); + } + + udelay(100); +} + +void board_init_f(ulong dummy) +{ + ccgr_init(); + + /* setup AIPS and disable watchdog */ + arch_cpu_init(); + + gpr_init(); + + /* iomux */ + board_early_init_f(); + + /* setup GP timer */ + timer_init(); + + /* UART clocks enabled and gd valid - init serial console */ + preloader_console_init(); + + /* DDR initialization */ + spl_dram_init(); + + /* Clear the BSS. */ + memset(__bss_start, 0, __bss_end - __bss_start); + + /* load/boot image from boot device */ + board_init_r(NULL, 0); +} +#endif diff --git a/board/wandboard/wandboard.c b/board/wandboard/wandboard.c index 1075c65..90625ab 100644 --- a/board/wandboard/wandboard.c +++ b/board/wandboard/wandboard.c @@ -53,66 +53,66 @@ DECLARE_GLOBAL_DATA_PTR; int dram_init(void) { - gd->ram_size = (phys_size_t)CONFIG_DDR_MB * 1024 * 1024; + gd->ram_size = imx_ddr_size(); return 0; } static iomux_v3_cfg_t const uart1_pads[] = { - MX6_PAD_CSI0_DAT10__UART1_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), - MX6_PAD_CSI0_DAT11__UART1_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), + IOMUX_PADS(PAD_CSI0_DAT10__UART1_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)), + IOMUX_PADS(PAD_CSI0_DAT11__UART1_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)), }; static iomux_v3_cfg_t const usdhc1_pads[] = { - MX6_PAD_SD1_CLK__SD1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD1_CMD__SD1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD1_DAT0__SD1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD1_DAT1__SD1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD1_DAT2__SD1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD1_DAT3__SD1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + IOMUX_PADS(PAD_SD1_CLK__SD1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD1_CMD__SD1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD1_DAT0__SD1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD1_DAT1__SD1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD1_DAT2__SD1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD1_DAT3__SD1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), /* Carrier MicroSD Card Detect */ - MX6_PAD_GPIO_2__GPIO1_IO02 | MUX_PAD_CTRL(NO_PAD_CTRL), + IOMUX_PADS(PAD_GPIO_2__GPIO1_IO02 | MUX_PAD_CTRL(NO_PAD_CTRL)), }; static iomux_v3_cfg_t const usdhc3_pads[] = { - MX6_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + IOMUX_PADS(PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), /* SOM MicroSD Card Detect */ - MX6_PAD_EIM_DA9__GPIO3_IO09 | MUX_PAD_CTRL(NO_PAD_CTRL), + IOMUX_PADS(PAD_EIM_DA9__GPIO3_IO09 | MUX_PAD_CTRL(NO_PAD_CTRL)), }; static iomux_v3_cfg_t const enet_pads[] = { - MX6_PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_TX_CTL__RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), + IOMUX_PADS(PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_TX_CTL__RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL)), /* AR8031 PHY Reset */ - MX6_PAD_EIM_D29__GPIO3_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL), + IOMUX_PADS(PAD_EIM_D29__GPIO3_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL)), }; static void setup_iomux_uart(void) { - imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); + SETUP_IOMUX_PADS(uart1_pads); } static void setup_iomux_enet(void) { - imx_iomux_v3_setup_multiple_pads(enet_pads, ARRAY_SIZE(enet_pads)); + SETUP_IOMUX_PADS(enet_pads); /* Reset AR8031 PHY */ gpio_direction_output(ETH_PHY_RESET, 0); @@ -156,15 +156,13 @@ int board_mmc_init(bd_t *bis) for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) { switch (index) { case 0: - imx_iomux_v3_setup_multiple_pads( - usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); + SETUP_IOMUX_PADS(usdhc3_pads); usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); usdhc_cfg[0].max_bus_width = 4; gpio_direction_input(USDHC3_CD_GPIO); break; case 1: - imx_iomux_v3_setup_multiple_pads( - usdhc1_pads, ARRAY_SIZE(usdhc1_pads)); + SETUP_IOMUX_PADS(usdhc1_pads); usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); usdhc_cfg[1].max_bus_width = 4; gpio_direction_input(USDHC1_CD_GPIO); @@ -218,54 +216,66 @@ int board_phy_config(struct phy_device *phydev) } #if defined(CONFIG_VIDEO_IPUV3) -struct i2c_pads_info i2c2_pad_info = { +struct i2c_pads_info mx6q_i2c2_pad_info = { .scl = { - .i2c_mode = MX6_PAD_KEY_COL3__I2C2_SCL + .i2c_mode = MX6Q_PAD_KEY_COL3__I2C2_SCL | MUX_PAD_CTRL(I2C_PAD_CTRL), - .gpio_mode = MX6_PAD_KEY_COL3__GPIO4_IO12 + .gpio_mode = MX6Q_PAD_KEY_COL3__GPIO4_IO12 | MUX_PAD_CTRL(I2C_PAD_CTRL), .gp = IMX_GPIO_NR(4, 12) }, .sda = { - .i2c_mode = MX6_PAD_KEY_ROW3__I2C2_SDA + .i2c_mode = MX6Q_PAD_KEY_ROW3__I2C2_SDA | MUX_PAD_CTRL(I2C_PAD_CTRL), - .gpio_mode = MX6_PAD_KEY_ROW3__GPIO4_IO13 + .gpio_mode = MX6Q_PAD_KEY_ROW3__GPIO4_IO13 + | MUX_PAD_CTRL(I2C_PAD_CTRL), + .gp = IMX_GPIO_NR(4, 13) + } +}; + +struct i2c_pads_info mx6dl_i2c2_pad_info = { + .scl = { + .i2c_mode = MX6DL_PAD_KEY_COL3__I2C2_SCL + | MUX_PAD_CTRL(I2C_PAD_CTRL), + .gpio_mode = MX6DL_PAD_KEY_COL3__GPIO4_IO12 + | MUX_PAD_CTRL(I2C_PAD_CTRL), + .gp = IMX_GPIO_NR(4, 12) + }, + .sda = { + .i2c_mode = MX6DL_PAD_KEY_ROW3__I2C2_SDA + | MUX_PAD_CTRL(I2C_PAD_CTRL), + .gpio_mode = MX6DL_PAD_KEY_ROW3__GPIO4_IO13 | MUX_PAD_CTRL(I2C_PAD_CTRL), .gp = IMX_GPIO_NR(4, 13) } }; static iomux_v3_cfg_t const fwadapt_7wvga_pads[] = { - MX6_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK, - MX6_PAD_DI0_PIN2__IPU1_DI0_PIN02, /* HSync */ - MX6_PAD_DI0_PIN3__IPU1_DI0_PIN03, /* VSync */ - MX6_PAD_DI0_PIN4__IPU1_DI0_PIN04 - | MUX_PAD_CTRL(PAD_CTL_DSE_120ohm), /* Contrast */ - MX6_PAD_DI0_PIN15__IPU1_DI0_PIN15, /* DISP0_DRDY */ - - MX6_PAD_DISP0_DAT0__IPU1_DISP0_DATA00, - MX6_PAD_DISP0_DAT1__IPU1_DISP0_DATA01, - MX6_PAD_DISP0_DAT2__IPU1_DISP0_DATA02, - MX6_PAD_DISP0_DAT3__IPU1_DISP0_DATA03, - MX6_PAD_DISP0_DAT4__IPU1_DISP0_DATA04, - MX6_PAD_DISP0_DAT5__IPU1_DISP0_DATA05, - MX6_PAD_DISP0_DAT6__IPU1_DISP0_DATA06, - MX6_PAD_DISP0_DAT7__IPU1_DISP0_DATA07, - MX6_PAD_DISP0_DAT8__IPU1_DISP0_DATA08, - MX6_PAD_DISP0_DAT9__IPU1_DISP0_DATA09, - MX6_PAD_DISP0_DAT10__IPU1_DISP0_DATA10, - MX6_PAD_DISP0_DAT11__IPU1_DISP0_DATA11, - MX6_PAD_DISP0_DAT12__IPU1_DISP0_DATA12, - MX6_PAD_DISP0_DAT13__IPU1_DISP0_DATA13, - MX6_PAD_DISP0_DAT14__IPU1_DISP0_DATA14, - MX6_PAD_DISP0_DAT15__IPU1_DISP0_DATA15, - MX6_PAD_DISP0_DAT16__IPU1_DISP0_DATA16, - MX6_PAD_DISP0_DAT17__IPU1_DISP0_DATA17, - - MX6_PAD_SD4_DAT2__GPIO2_IO10 - | MUX_PAD_CTRL(NO_PAD_CTRL), /* DISP0_BKLEN */ - MX6_PAD_SD4_DAT3__GPIO2_IO11 - | MUX_PAD_CTRL(NO_PAD_CTRL), /* DISP0_VDDEN */ + IOMUX_PADS(PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK), + IOMUX_PADS(PAD_DI0_PIN2__IPU1_DI0_PIN02), /* HSync */ + IOMUX_PADS(PAD_DI0_PIN3__IPU1_DI0_PIN03), /* VSync */ + IOMUX_PADS(PAD_DI0_PIN4__IPU1_DI0_PIN04 | MUX_PAD_CTRL(PAD_CTL_DSE_120ohm)), /* Contrast */ + IOMUX_PADS(PAD_DI0_PIN15__IPU1_DI0_PIN15), /* DISP0_DRDY */ + IOMUX_PADS(PAD_DISP0_DAT0__IPU1_DISP0_DATA00), + IOMUX_PADS(PAD_DISP0_DAT1__IPU1_DISP0_DATA01), + IOMUX_PADS(PAD_DISP0_DAT2__IPU1_DISP0_DATA02), + IOMUX_PADS(PAD_DISP0_DAT3__IPU1_DISP0_DATA03), + IOMUX_PADS(PAD_DISP0_DAT4__IPU1_DISP0_DATA04), + IOMUX_PADS(PAD_DISP0_DAT5__IPU1_DISP0_DATA05), + IOMUX_PADS(PAD_DISP0_DAT6__IPU1_DISP0_DATA06), + IOMUX_PADS(PAD_DISP0_DAT7__IPU1_DISP0_DATA07), + IOMUX_PADS(PAD_DISP0_DAT8__IPU1_DISP0_DATA08), + IOMUX_PADS(PAD_DISP0_DAT9__IPU1_DISP0_DATA09), + IOMUX_PADS(PAD_DISP0_DAT10__IPU1_DISP0_DATA10), + IOMUX_PADS(PAD_DISP0_DAT11__IPU1_DISP0_DATA11), + IOMUX_PADS(PAD_DISP0_DAT12__IPU1_DISP0_DATA12), + IOMUX_PADS(PAD_DISP0_DAT13__IPU1_DISP0_DATA13), + IOMUX_PADS(PAD_DISP0_DAT14__IPU1_DISP0_DATA14), + IOMUX_PADS(PAD_DISP0_DAT15__IPU1_DISP0_DATA15), + IOMUX_PADS(PAD_DISP0_DAT16__IPU1_DISP0_DATA16), + IOMUX_PADS(PAD_DISP0_DAT17__IPU1_DISP0_DATA17), + IOMUX_PADS(PAD_SD4_DAT2__GPIO2_IO10 | MUX_PAD_CTRL(NO_PAD_CTRL)), /* DISP0_BKLEN */ + IOMUX_PADS(PAD_SD4_DAT3__GPIO2_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL)), /* DISP0_VDDEN */ }; static void do_enable_hdmi(struct display_info_t const *dev) @@ -281,9 +291,7 @@ static int detect_i2c(struct display_info_t const *dev) static void enable_fwadapt_7wvga(struct display_info_t const *dev) { - imx_iomux_v3_setup_multiple_pads( - fwadapt_7wvga_pads, - ARRAY_SIZE(fwadapt_7wvga_pads)); + SETUP_IOMUX_PADS(fwadapt_7wvga_pads); gpio_direction_output(IMX_GPIO_NR(2, 10), 1); gpio_direction_output(IMX_GPIO_NR(2, 11), 1); @@ -346,7 +354,7 @@ static void setup_display(void) writel(reg, &mxc_ccm->chsccdr); /* Disable LCD backlight */ - imx_iomux_v3_setup_pad(MX6_PAD_DI0_PIN4__GPIO4_IO20); + SETUP_IOMUX_PAD(PAD_DI0_PIN4__GPIO4_IO20); gpio_direction_input(IMX_GPIO_NR(4, 20)); } #endif /* CONFIG_VIDEO_IPUV3 */ @@ -391,6 +399,12 @@ int board_late_init(void) add_board_boot_modes(board_boot_modes); #endif +#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG + if (is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D)) + setenv("board_rev", "MX6Q"); + else + setenv("board_rev", "MX6DL"); +#endif return 0; } @@ -399,7 +413,11 @@ int board_init(void) /* address of boot parameters */ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; - setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c2_pad_info); + setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &mx6dl_i2c2_pad_info); + if (is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D)) + setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &mx6q_i2c2_pad_info); + else + setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &mx6dl_i2c2_pad_info); return 0; } diff --git a/configs/wandboard_defconfig b/configs/wandboard_defconfig new file mode 100644 index 0000000..1ccac5a --- /dev/null +++ b/configs/wandboard_defconfig @@ -0,0 +1,6 @@ +CONFIG_SPL=y +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6QDL" +CONFIG_ARM=y +CONFIG_TARGET_WANDBOARD=y +CONFIG_DM=y +CONFIG_DM_THERMAL=y diff --git a/configs/wandboard_dl_defconfig b/configs/wandboard_dl_defconfig deleted file mode 100644 index 5a1f7f5..0000000 --- a/configs/wandboard_dl_defconfig +++ /dev/null @@ -1,3 +0,0 @@ -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl.cfg,MX6DL,DDR_MB=1024" -CONFIG_ARM=y -CONFIG_TARGET_WANDBOARD=y diff --git a/configs/wandboard_quad_defconfig b/configs/wandboard_quad_defconfig deleted file mode 100644 index d940848..0000000 --- a/configs/wandboard_quad_defconfig +++ /dev/null @@ -1,3 +0,0 @@ -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q2g.cfg,MX6Q,DDR_MB=2048" -CONFIG_ARM=y -CONFIG_TARGET_WANDBOARD=y diff --git a/configs/wandboard_solo_defconfig b/configs/wandboard_solo_defconfig deleted file mode 100644 index 66aa5d3..0000000 --- a/configs/wandboard_solo_defconfig +++ /dev/null @@ -1,3 +0,0 @@ -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s.cfg,MX6S,DDR_MB=512" -CONFIG_ARM=y -CONFIG_TARGET_WANDBOARD=y diff --git a/include/configs/wandboard.h b/include/configs/wandboard.h index b2c3614..7ce861e 100644 --- a/include/configs/wandboard.h +++ b/include/configs/wandboard.h @@ -14,6 +14,10 @@ #include <asm/imx-common/gpio.h> #include <linux/sizes.h> +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_MMC_SUPPORT +#include "imx6_spl.h" + #define CONFIG_MX6 #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO @@ -125,20 +129,15 @@ #define CONFIG_MXC_OCOTP #endif -#if defined(CONFIG_MX6DL) || defined(CONFIG_MX6S) -#define CONFIG_DEFAULT_FDT_FILE "imx6dl-wandboard.dtb" -#elif defined(CONFIG_MX6Q) -#define CONFIG_DEFAULT_FDT_FILE "imx6q-wandboard.dtb" -#endif - +#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG #define CONFIG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ "image=zImage\0" \ "console=ttymxc0\0" \ "splashpos=m,m\0" \ + "fdtfile=undefined\0" \ "fdt_high=0xffffffff\0" \ "initrd_high=0xffffffff\0" \ - "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ "fdt_addr=0x18000000\0" \ "boot_fdt=try\0" \ "ip_dyn=yes\0" \ @@ -192,7 +191,7 @@ "bootscript=echo Running bootscript from mmc ...; " \ "source\0" \ "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ - "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ + "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdtfile}\0" \ "mmcboot=echo Booting from mmc ...; " \ "run mmcargs; " \ "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ @@ -220,7 +219,7 @@ "fi; " \ "${get_cmd} ${image}; " \ "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ - "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ + "if ${get_cmd} ${fdt_addr} ${fdtfile}; then " \ "bootz ${loadaddr} - ${fdt_addr}; " \ "else " \ "if test ${boot_fdt} = try; then " \ @@ -231,9 +230,17 @@ "fi; " \ "else " \ "bootz; " \ - "fi;\0" + "fi;\0" \ + "findfdt="\ + "if test $board_rev = MX6Q ; then " \ + "setenv fdtfile imx6q-wandboard.dtb; fi; " \ + "if test $board_rev = MX6DL ; then " \ + "setenv fdtfile imx6dl-wandboard.dtb; fi; " \ + "if test $fdtfile = undefined; then " \ + "echo WARNING: Could not determine dtb to use; fi; \0" \ #define CONFIG_BOOTCOMMAND \ + "run findfdt; " \ "mmc dev ${mmcdev}; if mmc rescan; then " \ "if run loadbootscript; then " \ "run bootscript; " \ -- 1.9.1

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[U-Boot] Pull request: u-boot-net.git master
by Joe Hershberger 21 May '15

21 May '15

2 4

[U-Boot] Please pull u-boot-sunxi master
by Hans de Goede 21 May '15

21 May '15

Hi Tom, Please pull u-boot-sunxi/master into master for various small bugfixes, improvements and one new board. The following changes since commit 0e6b7a28243175ae0874d53b6e6e4eff8548d71f: Merge git://git.denx.de/u-boot-samsung (2015-05-18 09:15:15 -0400) are available in the git repository at: http://git.denx.de/u-boot-sunxi.git for you to fetch changes up to 8a65f69c9cef09aebc20aca98a4ddbf2b4829995: sunxi: Cache line size definition (2015-05-19 18:46:44 +0200) ---------------------------------------------------------------- Hans de Goede (6): sunxi: Set SYS_MALLOC_CLEAR_ON_INIT to n console: Fix pre-console flushing via cfb_console being very slow sunxi: Fix dram initialization not working on some a33 devices sunxi: Make DRAM_ODT_EN Kconfig setting a bool sunxi: video: Fix lvds panel support for sun6i+ sunxi: Add ga10h v1.1 defconfig Laurent Itti (1): sunxi: add support for UART2 on A23/A33 Paul Kocialkowski (3): sunxi: Pass serial number through ATAG sunxi: VBUS detection function fixup in g_dnl_board_usb_cable_connected sunxi: Cache line size definition README | 3 ++ arch/arm/cpu/armv7/sunxi/board.c | 4 +++ arch/arm/cpu/armv7/sunxi/dram_sun4i.c | 4 +-- arch/arm/cpu/armv7/sunxi/dram_sun8i_a23.c | 19 ++++++----- arch/arm/cpu/armv7/sunxi/dram_sun8i_a33.c | 6 ++-- arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 3 ++ arch/arm/include/asm/arch-sunxi/display.h | 12 +++++++ arch/arm/include/asm/arch-sunxi/dram_sun4i.h | 3 +- arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h | 1 + arch/arm/include/asm/arch-sunxi/gpio.h | 1 + board/sunxi/Kconfig | 28 ++++++++++++----- board/sunxi/MAINTAINERS | 1 + board/sunxi/board.c | 22 ++++++++++++- board/sunxi/dram_sun4i_auto.c | 3 +- board/sunxi/dram_sun5i_auto.c | 3 +- common/console.c | 40 +++++++++++++----------- configs/ga10h_v1_1_defconfig | 29 +++++++++++++++++ drivers/video/sunxi_display.c | 18 ++++++++++- include/configs/sunxi-common.h | 8 ++++- 19 files changed, 161 insertions(+), 47 deletions(-) create mode 100644 configs/ga10h_v1_1_defconfig Regards, Hans

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[U-Boot] [PATCH v2] README.scrapyard: add entries for dead board, T4240EMU and sc3
by Masahiro Yamada 21 May '15

21 May '15

Follow-up commit 7fc63cca611b (mpc85xx/T4240EMU: Remove T4240EMU board), and commit 27e721564591 (ppc4xx: Remove sc3 board), filling the blank fields. Signed-off-by: Masahiro Yamada <yamada.masahiro(a)socionext.com> --- Changes in v2: - rebased on commit 4588d61a284 doc/README.scrapyard | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/doc/README.scrapyard b/doc/README.scrapyard index aa2b07b..a62bd0b 100644 --- a/doc/README.scrapyard +++ b/doc/README.scrapyard @@ -12,9 +12,11 @@ The list should be sorted in reverse chronological order. Board Arch CPU Commit Removed Last known maintainer/contact ================================================================================================= -afeb9260 arm arm926ejs - - Sergey Lapin <slapin(a)ossfans.org> -tny_a9260 arm arm926ejs - - Albin Tonnerre <albin.tonnerre(a)free-electrons.com> -sbc35_a9g20 arm arm926ejs - - Albin Tonnerre <albin.tonnerre(a)free-electrons.com> +afeb9260 arm arm926ejs f6b42c14 2015-05-13 Sergey Lapin <slapin(a)ossfans.org> +tny_a9260 arm arm926ejs f6b42c14 2015-05-13 Albin Tonnerre <albin.tonnerre(a)free-electrons.com> +sbc35_a9g20 arm arm926ejs f6b42c14 2015-05-13 Albin Tonnerre <albin.tonnerre(a)free-electrons.com> +sc3 powerpc ppc4xx 27e72156 2015-05-10 Heiko Schocher <hs(a)denx.de> +T4240EMU powerpc mpc85xx 7fc63cca 2015-05-05 York Sun <yorksun(a)freescale.com> korat powerpc ppc4xx 5043045d 2015-03-17 Larry Johnson <lrj(a)acm.org> galaxy5200 powerpc mpc5xxx 41eb4e5c 2015-03-17 Eric Millbrandt <emillbrandt(a)dekaresearch.com> W7OLMC powerpc ppc4xx 6beecd5d 2015-03-17 Erik Theisen <etheisen(a)mindspring.com> -- 1.9.1

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[U-Boot] Problem with saveenv and uboot-envtools on eMMC
by Tuan Nguyen 21 May '15

21 May '15

Hi all, I tried to use uboot-envtools but I got some problems: 1) Couldn't change partitions for save uboot environment. I want to save uboot environment in to my partition ( Fat32 ) by change value of CONFIG_SYS_MMC_ENV_PART in file : include/configs/am335x_evm.h to 3 4 but it didn't work. Because I dont use sdcard then rootfs saw eMMC became mmcblk0. I think: 0=mmcblk0 1=mmcblk0boot0 2=mmcblk0boot1 3=mmcblk0p1 (boot) 4=mmcblk0p2 (place I want to save uboot environment) 5=mmcblk0p3 (rootfs) Uboot just only work with CONFIG_SYS_MMC_ENV_PART = 1 or 2. 2) Couldn't get environment with fw_printenv on /dev/mmcblk0boot1 or /dev/mmcblk0boot0 Hex Dump: # hexdump -C /dev/mmcblk0boot0 00000000 b8 fd 66 da 02 61 72 63 68 3d 61 72 6d 00 62 61 |..f..arch= arm.ba| 00000010 75 64 72 61 74 65 3d 31 31 35 32 30 30 00 62 6f |udrate= 115200.bo| 00000020 61 72 64 3d 61 6d 33 33 35 78 00 62 6f 61 72 64 |ard=am335x.board| 00000030 5f 6e 61 6d 65 3d 41 33 33 35 42 4e 4c 54 00 62 |_name=A335BNLT.b| ....... 00000ea0 65 6e 64 6f 72 3d 61 62 63 00 76 65 72 3d 55 2d |endor=abc.ver=U-| 00000eb0 42 6f 6f 74 20 32 30 31 35 2e 30 37 2d 72 63 31 |Boot 2015.07-rc1| 00000ec0 2d 30 30 32 35 35 2d 67 30 65 36 62 37 61 32 2d |-00255-g0e6b7a2-| 00000ed0 64 69 72 74 79 20 28 4d 61 79 20 32 31 20 32 30 |dirty (May 21 20| 00000ee0 31 35 20 2d 20 31 36 3a 34 31 3a 30 33 29 00 00 |15 - 16:41:03)..| 00000ef0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |................| * 00020000 06 a6 e0 be 01 61 72 63 68 3d 61 72 6d 00 62 61 |.....arch= arm.ba| 00020010 75 64 72 61 74 65 3d 31 31 35 32 30 30 00 62 6f |udrate= 115200.bo| 00020020 61 72 64 3d 61 6d 33 33 35 78 00 62 6f 61 72 64 |ard=am335x.board| ....... 00020ed0 69 72 74 79 20 28 4d 61 79 20 32 31 20 32 30 31 |irty (May 21 201| 00020ee0 35 20 2d 20 31 36 3a 34 31 3a 30 33 29 00 00 00 |5 - 16:41:03)...| 00020ef0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |................| My config: # cat /etc/fw_env.config /dev/mmcblk0boot0 0x0000 0x20000 0x20000 Environment size: 3957/131067 bytes Get env: # fw_printenv Warning: Bad CRC, using default environment bootcmd=bootp; setenv bootargs root=/dev/nfs nfsroot=${serverip}:${rootpath} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off; bootm bootdelay=5 baudrate=115200 I tried to change many configurations but its always fail. Did I get wrong config? Thanks Tuan Nguyen

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