April 2015 - U-Boot

[U-Boot] [PATCH v2] net/phy: refactor RTL8211F initialization
by Shengzhou Liu 05 May '15

05 May '15

RTL8211F needs to enalbe TXDLY for RGMII during phy initialization, so move it to rtl8211f_config for early initialization. Signed-off-by: Shengzhou Liu <Shengzhou.Liu(a)freescale.com> cc: Joe Hershberger <joe.hershberger(a)gmail.com> --- v2: add default page and use macro instead of magic number. drivers/net/phy/realtek.c | 33 +++++++++++++++++++++++++-------- 1 file changed, 25 insertions(+), 8 deletions(-) diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c index 3917c82..7e1c316 100644 --- a/drivers/net/phy/realtek.c +++ b/drivers/net/phy/realtek.c @@ -32,6 +32,7 @@ #define MIIM_RTL8211F_PHYSTAT_LINK 0x0004 #define MIIM_RTL8211F_PAGE_SELECT 0x1f +#define MIIM_RTL8211F_TX_DELAY 0x100 /* RealTek RTL8211x */ static int rtl8211x_config(struct phy_device *phydev) @@ -43,6 +44,29 @@ static int rtl8211x_config(struct phy_device *phydev) return 0; } +static int rtl8211f_config(struct phy_device *phydev) +{ + u16 reg; + + phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, BMCR_RESET); + + if (phydev->interface == PHY_INTERFACE_MODE_RGMII) { + /* enable TXDLY */ + phy_write(phydev, MDIO_DEVAD_NONE, + MIIM_RTL8211F_PAGE_SELECT, 0xd08); + reg = phy_read(phydev, MDIO_DEVAD_NONE, 0x11); + reg |= MIIM_RTL8211F_TX_DELAY; + phy_write(phydev, MDIO_DEVAD_NONE, 0x11, reg); + /* restore to default page 0 */ + phy_write(phydev, MDIO_DEVAD_NONE, + MIIM_RTL8211F_PAGE_SELECT, 0x0); + } + + genphy_config_aneg(phydev); + + return 0; +} + static int rtl8211x_parse_status(struct phy_device *phydev) { unsigned int speed; @@ -142,13 +166,6 @@ static int rtl8211f_parse_status(struct phy_device *phydev) phydev->speed = SPEED_10; } - if (phydev->interface == PHY_INTERFACE_MODE_RGMII) { - /* enable TXDLY */ - phy_write(phydev, MDIO_DEVAD_NONE, - MIIM_RTL8211F_PAGE_SELECT, 0xd08); - phy_write(phydev, MDIO_DEVAD_NONE, 0x11, 0x109); - } - return 0; } @@ -209,7 +226,7 @@ static struct phy_driver RTL8211F_driver = { .uid = 0x1cc916, .mask = 0xffffff, .features = PHY_GBIT_FEATURES, - .config = &rtl8211x_config, + .config = &rtl8211f_config, .startup = &rtl8211f_startup, .shutdown = &genphy_shutdown, }; -- 2.1.0.27.g96db324

2 2

[U-Boot] AM335x configurations - console output at early stages lost
by Vasili Galka 04 May '15

04 May '15

Hi Tom, I’m working on rebasing an old U-Boot branch for our company’s AM335x based board upon the current U-Boot release (v2015.04). Our branch was initially based on the v2013.10 release (the ti/am335x/ board was taken as reference). After making all the code compile, I discovered there was a change in the U-Boot initialization sequence, introduced by commit a6b541b09022acb6f7c2754100ae26bd44eed1d9, that prevents our code from working: Prior to the above mentioned commit, the console serial port was initialized at a very early stage in the armv7/am335x/board.c:s_init() function (calling preloader_console_init()). Roughly saying, it was the first thing done by the SPL code. This made quite much sense, as it enabled all the code afterwards to output status/debugging info to the console. Moving the preloader_console_init() call to spl_board_init() caused it to be run at a very "late" stage (as part of the board_init_r() function). AFAIU, now all the code that runs till then has no ability for any console output. For example, in our particular case, the DDR configuration code (in sdram_init()) reads the DDR type from an I2C EEPROM. Obviously, if something goes wrong in this process, we would like to report it to the console. I understand there was a good reason for the mentioned commit (the GD), however, as you see, we have also lost some important functionality with it. I would appreciate your advice on how to solve it. Best regards, Vasili Galka

2 6

[U-Boot] [PATCH 01/10] sunxi: Also set Auxiliary Ctl SMP bit in SPL
by Hans de Goede 04 May '15

04 May '15

There is no reason not to and this make the #ifdef-ery easier to read. Signed-off-by: Hans de Goede <hdegoede(a)redhat.com> --- arch/arm/cpu/armv7/sunxi/board.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c index c1b4cf5..6471c6b 100644 --- a/arch/arm/cpu/armv7/sunxi/board.c +++ b/arch/arm/cpu/armv7/sunxi/board.c @@ -94,8 +94,9 @@ void s_init(void) * access gets messed up (seems cache related) */ setbits_le32(SUNXI_SRAMC_BASE + 0x44, 0x1800); #endif -#if !defined CONFIG_SPL_BUILD && (defined CONFIG_MACH_SUN7I || \ - defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I) +#if defined CONFIG_MACH_SUN6I || \ + defined CONFIG_MACH_SUN7I || \ + defined CONFIG_MACH_SUN8I /* Enable SMP mode for CPU0, by setting bit 6 of Auxiliary Ctl reg */ asm volatile( "mrc p15, 0, r0, c1, c0, 1\n" -- 2.3.4

5 43

[U-Boot] [PATCH 1/2] hummingboard: Remove mx6solo specific support
by Fabio Estevam 04 May '15

04 May '15

Hummingboard dual, dual-lite and solo are now supported via SPL mechanism. Remove the previous hummingboard support, which does not use SPL and supported only the solo variant. Signed-off-by: Fabio Estevam <fabio.estevam(a)freescale.com> --- arch/arm/Kconfig | 5 - board/solidrun/hummingboard/Kconfig | 15 -- board/solidrun/hummingboard/MAINTAINERS | 6 - board/solidrun/hummingboard/Makefile | 9 -- board/solidrun/hummingboard/README | 40 ------ board/solidrun/hummingboard/hummingboard.c | 182 ----------------------- board/solidrun/hummingboard/solo.cfg | 25 ---- configs/hummingboard_solo_defconfig | 3 - include/configs/hummingboard.h | 224 ----------------------------- 9 files changed, 509 deletions(-) delete mode 100644 board/solidrun/hummingboard/Kconfig delete mode 100644 board/solidrun/hummingboard/MAINTAINERS delete mode 100644 board/solidrun/hummingboard/Makefile delete mode 100644 board/solidrun/hummingboard/README delete mode 100644 board/solidrun/hummingboard/hummingboard.c delete mode 100644 board/solidrun/hummingboard/solo.cfg delete mode 100644 configs/hummingboard_solo_defconfig delete mode 100644 include/configs/hummingboard.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 7c383cb..b97f72b 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -542,10 +542,6 @@ config TARGET_GW_VENTANA select CPU_V7 select SUPPORT_SPL -config TARGET_HUMMINGBOARD - bool "Support hummingboard" - select CPU_V7 - config TARGET_KOSAGI_NOVENA bool "Support Kosagi Novena" select CPU_V7 @@ -862,7 +858,6 @@ source "board/siemens/pxm2/Kconfig" source "board/siemens/rut/Kconfig" source "board/silica/pengwyn/Kconfig" source "board/solidrun/mx6cuboxi/Kconfig" -source "board/solidrun/hummingboard/Kconfig" source "board/spear/spear300/Kconfig" source "board/spear/spear310/Kconfig" source "board/spear/spear320/Kconfig" diff --git a/board/solidrun/hummingboard/Kconfig b/board/solidrun/hummingboard/Kconfig deleted file mode 100644 index 36b7904..0000000 --- a/board/solidrun/hummingboard/Kconfig +++ /dev/null @@ -1,15 +0,0 @@ -if TARGET_HUMMINGBOARD - -config SYS_BOARD - default "hummingboard" - -config SYS_VENDOR - default "solidrun" - -config SYS_SOC - default "mx6" - -config SYS_CONFIG_NAME - default "hummingboard" - -endif diff --git a/board/solidrun/hummingboard/MAINTAINERS b/board/solidrun/hummingboard/MAINTAINERS deleted file mode 100644 index c0c062a..0000000 --- a/board/solidrun/hummingboard/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -HUMMINGBOARD BOARD -M: Jon Nettleton <jon.nettleton(a)gmail.com> -S: Maintained -F: board/solidrun/hummingboard/ -F: include/configs/hummingboard.h -F: configs/hummingboard_solo_defconfig diff --git a/board/solidrun/hummingboard/Makefile b/board/solidrun/hummingboard/Makefile deleted file mode 100644 index 042a2f0..0000000 --- a/board/solidrun/hummingboard/Makefile +++ /dev/null @@ -1,9 +0,0 @@ -# -# (C) Copyright 2013 Freescale Semiconductor, Inc. -# Copyright (C) 2013, Boundary Devices <info(a)boundarydevices.com> -# Copyright (C) 2013, Jon Nettleton <jon.nettleton(a)gmail.com> -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := hummingboard.o diff --git a/board/solidrun/hummingboard/README b/board/solidrun/hummingboard/README deleted file mode 100644 index cfd62d4..0000000 --- a/board/solidrun/hummingboard/README +++ /dev/null @@ -1,40 +0,0 @@ -U-Boot for SolidRun Hummingboard --------------------------------- - -This file contains information for the port of U-Boot to the Hummingboard. - -For more details about Hummingboard, please refer to: -http://imx.solid-run.com/wiki/index.php?title=Carrier-One_Hardware - -(Carrier-One was the previous name of Hummingboard). - -Building U-boot for Hummingboard --------------------------------- - -To build U-Boot for the Hummingboard Solo version: - -$ make hummingboard_solo_config -$ make - -Flashing U-boot into the SD card --------------------------------- - -- After the 'make' command completes, the generated 'u-boot.imx' binary must be -flashed into the SD card: - -$ sudo dd if=u-boot.imx of=/dev/mmcblk0 bs=1k seek=1; sync - -(Note - the SD card node may vary, so adjust this as needed). - -Also, a more detailed explanation on how to format the SD card is available -at doc/README.imximage. - -- Insert the micro SD card into the slot located in the bottom of the board - -- Connect a 3.3V USB to serial converter cable to the host PC. The MX6 UART -signals are available in the 26 pin connector as shown at: -http://imx.solid-run.com/wiki/index.php?title=Carrier-One_Hardware -(Check for "26 pin header layout"). - -- Power up the board via USB cable (CON201) and U-boot messages will appear in -the serial console. diff --git a/board/solidrun/hummingboard/hummingboard.c b/board/solidrun/hummingboard/hummingboard.c deleted file mode 100644 index 52c384b..0000000 --- a/board/solidrun/hummingboard/hummingboard.c +++ /dev/null @@ -1,182 +0,0 @@ -/* - * Copyright (C) 2013 Freescale Semiconductor, Inc. - * Copyright (C) 2013 SolidRun ltd. - * Copyright (C) 2013 Jon Nettleton <jon.nettleton(a)gmail.com>. - * - * Authors: Fabio Estevam <fabio.estevam(a)freescale.com> - Jon Nettleton <jon.nettleton(a)gmail.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <asm/arch/clock.h> -#include <asm/arch/crm_regs.h> -#include <asm/arch/imx-regs.h> -#include <asm/arch/iomux.h> -#include <asm/arch/mx6-pins.h> -#include <asm/arch/sys_proto.h> -#include <asm/errno.h> -#include <asm/gpio.h> -#include <asm/imx-common/iomux-v3.h> -#include <asm/io.h> -#include <mmc.h> -#include <fsl_esdhc.h> -#include <miiphy.h> -#include <netdev.h> - -DECLARE_GLOBAL_DATA_PTR; - -#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ - PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ - PAD_CTL_SRE_FAST | PAD_CTL_HYS) - -#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \ - PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \ - PAD_CTL_SRE_FAST | PAD_CTL_HYS) - -#define USDHC_PAD_CLK_CTRL (PAD_CTL_SPEED_LOW | \ - PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | \ - PAD_CTL_HYS) - -#define USDHC_PAD_GPIO_CTRL (PAD_CTL_PUS_22K_UP | \ - PAD_CTL_SPEED_LOW | PAD_CTL_DSE_40ohm | \ - PAD_CTL_SRE_FAST | PAD_CTL_HYS) - -#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ - PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) - -#define ENET_PAD_CTRL_PD (PAD_CTL_PUS_100K_DOWN | \ - PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) - -#define ENET_PAD_CTRL_CLK ((PAD_CTL_PUS_100K_UP & ~PAD_CTL_PKE) | \ - PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) - -#define ETH_PHY_RESET IMX_GPIO_NR(4, 15) - -int dram_init(void) -{ - gd->ram_size = ((phys_size_t)CONFIG_DDR_MB * 1024 * 1024); - - return 0; -} - -static iomux_v3_cfg_t const uart1_pads[] = { - MX6_PAD_CSI0_DAT10__UART1_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), - MX6_PAD_CSI0_DAT11__UART1_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), -}; - -static void setup_iomux_uart(void) -{ - imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); -} - -static iomux_v3_cfg_t const usdhc2_pads[] = { - MX6_PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CLK_CTRL), - MX6_PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_GPIO_4__SD2_CD_B | MUX_PAD_CTRL(USDHC_PAD_GPIO_CTRL), -}; - -#ifdef CONFIG_FSL_ESDHC -static struct fsl_esdhc_cfg usdhc_cfg[1] = { - { USDHC2_BASE_ADDR }, -}; - -int board_mmc_getcd(struct mmc *mmc) -{ - return 1; /* SD card is the boot medium, so always present */ -} - -int board_mmc_init(bd_t *bis) -{ - imx_iomux_v3_setup_multiple_pads(usdhc2_pads, ARRAY_SIZE(usdhc2_pads)); - usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); - - return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); -} -#endif - -#ifdef CONFIG_FEC_MXC -static iomux_v3_cfg_t const enet_pads[] = { - MX6_PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL), - /* AR8035 reset */ - MX6_PAD_KEY_ROW4__GPIO4_IO15 | MUX_PAD_CTRL(ENET_PAD_CTRL_PD), - /* AR8035 interrupt */ - MX6_PAD_DI0_PIN2__GPIO4_IO18 | MUX_PAD_CTRL(NO_PAD_CTRL), - /* GPIO16 -> AR8035 25MHz */ - MX6_PAD_GPIO_16__ENET_REF_CLK | MUX_PAD_CTRL(NO_PAD_CTRL), - MX6_PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(NO_PAD_CTRL), - MX6_PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_TX_CTL__RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), - /* AR8035 CLK_25M --> ENET_REF_CLK (V22) */ - MX6_PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL_CLK), - MX6_PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL_PD), - MX6_PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL_PD), - MX6_PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL_PD), -}; - -static void setup_iomux_enet(void) -{ - imx_iomux_v3_setup_multiple_pads(enet_pads, ARRAY_SIZE(enet_pads)); - - gpio_direction_output(ETH_PHY_RESET, 0); - mdelay(2); - gpio_set_value(ETH_PHY_RESET, 1); -} - -int board_phy_config(struct phy_device *phydev) -{ - if (phydev->drv->config) - phydev->drv->config(phydev); - - return 0; -} - -int board_eth_init(bd_t *bis) -{ - struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR; - - int ret = enable_fec_anatop_clock(ENET_25MHZ); - if (ret) - return ret; - - /* set gpr1[ENET_CLK_SEL] */ - setbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_ENET_CLK_SEL_MASK); - - setup_iomux_enet(); - - return cpu_eth_init(bis); -} -#endif - -int board_early_init_f(void) -{ - setup_iomux_uart(); - - return 0; -} - -int board_init(void) -{ - /* address of boot parameters */ - gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; - - return 0; -} - -int checkboard(void) -{ - puts("Board: Hummingboard\n"); - - return 0; -} diff --git a/board/solidrun/hummingboard/solo.cfg b/board/solidrun/hummingboard/solo.cfg deleted file mode 100644 index 28dd750..0000000 --- a/board/solidrun/hummingboard/solo.cfg +++ /dev/null @@ -1,25 +0,0 @@ -/* - * Copyright (C) 2013 Boundary Devices - * Copyright (C) 2013 Jon Nettleton <jon.nettleton(a)gmail.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -/* image version */ -IMAGE_VERSION 2 - -/* - * Boot Device : one of - * spi, sd (the board has no nand neither onenand) - */ -BOOT_FROM sd - -#define __ASSEMBLY__ -#include <config.h> -#include "asm/arch/mx6-ddr.h" -#include "asm/arch/iomux.h" -#include "asm/arch/crm_regs.h" - -#include "../mx6-microsom/ddr-800mhz-32bit-setup.cfg" -#include "../mx6-microsom/800mhz_2x128mx16.cfg" -#include "../mx6-microsom/clocks.cfg" diff --git a/configs/hummingboard_solo_defconfig b/configs/hummingboard_solo_defconfig deleted file mode 100644 index 600fa00..0000000 --- a/configs/hummingboard_solo_defconfig +++ /dev/null @@ -1,3 +0,0 @@ -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/solidrun/hummingboard/solo.cfg,MX6S,DDR_MB=512" -CONFIG_ARM=y -CONFIG_TARGET_HUMMINGBOARD=y diff --git a/include/configs/hummingboard.h b/include/configs/hummingboard.h deleted file mode 100644 index 973f2c5..0000000 --- a/include/configs/hummingboard.h +++ /dev/null @@ -1,224 +0,0 @@ -/* - * Copyright (C) 2013 Freescale Semiconductor, Inc. - * Copyright (C) 2013 SolidRun ltd. - * Copyright (C) 2013 Jon Nettleton <jon.nettleton(a)gmail.com> - * - * Configuration settings for the SolidRun Hummingboard. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#include "mx6_common.h" -#include <asm/arch/imx-regs.h> -#include <asm/imx-common/gpio.h> -#include <linux/sizes.h> - -#define CONFIG_MX6 -#define CONFIG_DISPLAY_CPUINFO -#define CONFIG_DISPLAY_BOARDINFO - -#define CONFIG_MACH_TYPE 4773 - -#define CONFIG_CMDLINE_TAG -#define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_INITRD_TAG -#define CONFIG_REVISION_TAG - -#define CONFIG_SYS_GENERIC_BOARD - -/* Size of malloc() pool */ -#define CONFIG_SYS_MALLOC_LEN (2 * SZ_1M) - -#define CONFIG_BOARD_EARLY_INIT_F -#define CONFIG_MXC_GPIO - -#define CONFIG_MXC_UART -#define CONFIG_MXC_UART_BASE UART1_BASE - -/* allow to overwrite serial and ethaddr */ -#define CONFIG_ENV_OVERWRITE -#define CONFIG_CONS_INDEX 1 -#define CONFIG_BAUDRATE 115200 - -/* Command definition */ -#include <config_cmd_default.h> - -#undef CONFIG_CMD_IMLS -#undef CONFIG_CMD_I2C - -#define CONFIG_CMD_BMODE -#define CONFIG_CMD_SETEXPR -#define CONFIG_CMD_MEMTEST -#define CONFIG_BOOTDELAY 3 - -#define CONFIG_SYS_MEMTEST_START 0x10000000 -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 500 * SZ_1M) -#define CONFIG_LOADADDR 0x12000000 -#define CONFIG_SYS_TEXT_BASE 0x17800000 - -/* MMC Configuration */ -#define CONFIG_FSL_ESDHC -#define CONFIG_FSL_USDHC -#define CONFIG_SYS_FSL_USDHC_NUM 1 -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 - -#define CONFIG_MMC -#define CONFIG_CMD_MMC -#define CONFIG_GENERIC_MMC -#define CONFIG_BOUNCE_BUFFER -#define CONFIG_CMD_EXT2 -#define CONFIG_CMD_FAT -#define CONFIG_DOS_PARTITION - -/* Ethernet Configuration */ -#define CONFIG_FEC_MXC -#ifdef CONFIG_FEC_MXC -#define CONFIG_CMD_PING -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_MII -#define CONFIG_CMD_NET -#define CONFIG_MII -#define IMX_FEC_BASE ENET_BASE_ADDR -#define CONFIG_FEC_XCV_TYPE RGMII -#define CONFIG_FEC_MXC_PHYADDR 0 -#define CONFIG_PHYLIB -#define CONFIG_PHY_ATHEROS -#endif - -#if defined(CONFIG_MX6S) -#define CONFIG_DEFAULT_FDT_FILE "imx6dl-hummingboard.dtb" -#endif - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "script=boot.scr\0" \ - "image=zImage\0" \ - "console=ttymxc0\0" \ - "splashpos=m,m\0" \ - "fdt_high=0xffffffff\0" \ - "initrd_high=0xffffffff\0" \ - "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ - "fdt_addr=0x18000000\0" \ - "boot_fdt=try\0" \ - "ip_dyn=yes\0" \ - "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ - "mmcpart=1\0" \ - "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \ - "update_sd_firmware_filename=u-boot.imx\0" \ - "update_sd_firmware=" \ - "if test ${ip_dyn} = yes; then " \ - "setenv get_cmd dhcp; " \ - "else " \ - "setenv get_cmd tftp; " \ - "fi; " \ - "if mmc dev ${mmcdev}; then " \ - "if ${get_cmd} ${update_sd_firmware_filename}; then " \ - "setexpr fw_sz ${filesize} / 0x200; " \ - "setexpr fw_sz ${fw_sz} + 1; " \ - "mmc write ${loadaddr} 0x2 ${fw_sz}; " \ - "fi; " \ - "fi\0" \ - "mmcargs=setenv bootargs console=${console},${baudrate} " \ - "root=${mmcroot}\0" \ - "loadbootscript=" \ - "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ - "bootscript=echo Running bootscript from mmc ...; " \ - "source\0" \ - "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ - "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ - "mmcboot=echo Booting from mmc ...; " \ - "run mmcargs; " \ - "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ - "if run loadfdt; then " \ - "bootz ${loadaddr} - ${fdt_addr}; " \ - "else " \ - "if test ${boot_fdt} = try; then " \ - "bootz; " \ - "else " \ - "echo WARN: Cannot load the DT; " \ - "fi; " \ - "fi; " \ - "else " \ - "bootz; " \ - "fi;\0" \ - "netargs=setenv bootargs console=${console},${baudrate} " \ - "root=/dev/nfs " \ - "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ - "netboot=echo Booting from net ...; " \ - "run netargs; " \ - "if test ${ip_dyn} = yes; then " \ - "setenv get_cmd dhcp; " \ - "else " \ - "setenv get_cmd tftp; " \ - "fi; " \ - "${get_cmd} ${image}; " \ - "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ - "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ - "bootz ${loadaddr} - ${fdt_addr}; " \ - "else " \ - "if test ${boot_fdt} = try; then " \ - "bootz; " \ - "else " \ - "echo WARN: Cannot load the DT; " \ - "fi; " \ - "fi; " \ - "else " \ - "bootz; " \ - "fi;\0" - -#define CONFIG_BOOTCOMMAND \ - "mmc dev ${mmcdev}; if mmc rescan; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loadimage; then " \ - "run mmcboot; " \ - "else run netboot; " \ - "fi; " \ - "fi; " \ - "else run netboot; fi" - -/* Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP -#define CONFIG_SYS_HUSH_PARSER -#define CONFIG_AUTO_COMPLETE -#define CONFIG_SYS_CBSIZE 1024 -#define CONFIG_SYS_MAXARGS 16 -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - -#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR - -#define CONFIG_CMDLINE_EDITING - -/* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 -#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR - -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE - -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - -/* FLASH and environment organization */ -#define CONFIG_SYS_NO_FLASH - -#define CONFIG_ENV_SIZE (8 * 1024) - -#define CONFIG_ENV_IS_IN_MMC -#define CONFIG_ENV_OFFSET (6 * 64 * 1024) -#define CONFIG_SYS_MMC_ENV_DEV 0 - -#define CONFIG_OF_LIBFDT -#define CONFIG_CMD_BOOTZ - -#ifndef CONFIG_SYS_DCACHE_OFF -#define CONFIG_CMD_CACHE -#endif - -#endif /* __CONFIG_H * */ -- 1.9.1

3 3

[U-Boot] [PATCH 00/20] dm: rtc: Add driver model support for real-time clocks
by Simon Glass 04 May '15

04 May '15

When driver model is used for I2C, the real-time clock functionality does not work (e.g. the 'date' command gives build errors when CONFIG_DM_I2C is defined). It is possible to work around this by using driver model I2C functions. But what is really needed is an RTC uclass. This series: - renames some RTC functions to have an rtc_ prefix - adds sandbox support for RTC and an emulated I2C RTC device - adds a driver model RTC uclass and associated tests - corrects various minor driver model I2C issues that were discovered With this it should be fairly easy to convert an existing RTC driver to driver model, but this series does not include that as I'm not sure if any of the boards I have include an RTC. Simon Glass (20): dm: spi: Correct the comment on spi_get_ops() dm: i2c: sandbox: Add debugging to the speed limit dm: i2c: Add functions to read and write a register dm: i2c: Add an explicit test mode to the sandbox I2C driver fdt: Correct warning in fdt_setup_simplefb_node() dm: rtc: Rename gregorian day function dm: rtc: Rename to_tm() to rtc_to_tm() and add error code dm: rtc: Rename mktime() and reduce the number of parameters dm: Remove unnecessary types in bcd.h dm: rtc: Split structure definition into its own file dm: sandbox: Add os_localtime() to obtain the system time dm: rtc: Add a uclass for real-time clocks dm: rtc: sandbox: Add an emulated I2C RTC device dm: rtc: sandbox: Add a driver for the sandbox I2C RTC dm: rtc: Convert 'date' command to support driver model dm: net: rtc: Support using driver model for rtc in sntp dm: sandbox: dts: Add a real-time clock attached to I2C dm: rtc: sandbox: Enable real-time clock support dm: test: dts: Sort the aliases in the test device tree file dm: rtc: Add tests for real-time clocks arch/sandbox/cpu/os.c | 18 +++ arch/sandbox/dts/sandbox.dts | 12 +- arch/sandbox/include/asm/rtc.h | 28 +++++ arch/sandbox/include/asm/test.h | 31 ++++++ common/cmd_date.c | 55 +++++++--- common/fdt_support.c | 2 +- common/image.c | 2 +- configs/sandbox_defconfig | 1 + drivers/i2c/i2c-uclass.c | 19 ++++ drivers/i2c/sandbox_i2c.c | 34 ++++-- drivers/rtc/Kconfig | 8 ++ drivers/rtc/Makefile | 4 + drivers/rtc/at91sam9_rtt.c | 5 +- drivers/rtc/bfin_rtc.c | 5 +- drivers/rtc/date.c | 38 ++++--- drivers/rtc/ds1306.c | 5 +- drivers/rtc/ds1374.c | 6 +- drivers/rtc/ftrtc010.c | 5 +- drivers/rtc/i2c_rtc_emul.c | 236 ++++++++++++++++++++++++++++++++++++++++ drivers/rtc/imxdi.c | 5 +- drivers/rtc/mc13xxx-rtc.c | 5 +- drivers/rtc/mcfrtc.c | 2 +- drivers/rtc/mpc8xx.c | 5 +- drivers/rtc/mx27rtc.c | 5 +- drivers/rtc/mxsrtc.c | 5 +- drivers/rtc/pl031.c | 5 +- drivers/rtc/rtc-uclass.c | 96 ++++++++++++++++ drivers/rtc/sandbox_rtc.c | 106 ++++++++++++++++++ include/bcd.h | 8 +- include/configs/sandbox.h | 1 + include/dm/uclass-id.h | 1 + include/i2c.h | 22 ++++ include/os.h | 11 ++ include/rtc.h | 197 ++++++++++++++++++++++++++++----- include/rtc_def.h | 36 ++++++ include/spi.h | 2 +- net/sntp.c | 14 ++- post/drivers/rtc.c | 28 +++-- test/dm/Makefile | 1 + test/dm/i2c.c | 8 ++ test/dm/rtc.c | 175 +++++++++++++++++++++++++++++ test/dm/test.dts | 26 ++++- 42 files changed, 1155 insertions(+), 123 deletions(-) create mode 100644 arch/sandbox/include/asm/rtc.h create mode 100644 drivers/rtc/i2c_rtc_emul.c create mode 100644 drivers/rtc/rtc-uclass.c create mode 100644 drivers/rtc/sandbox_rtc.c create mode 100644 include/rtc_def.h create mode 100644 test/dm/rtc.c -- 2.2.0.rc0.207.ga3a616c

5 53

[U-Boot] [PATCH 0/8] usb: driver-model fixes and dm support sunxi-ehci.c
by Hans de Goede 04 May '15

04 May '15

Hi Simon and Marek, This series completes my work on converting the sunxi usb/ehci code to the driver model. With this series everything works as it did before, and all the issues I've been seeing when switching to the driver model are resolved. Please review / merge. I think it would be best to merge this through the dm tree. Regards, Hans

3 29

[U-Boot] [PATCH 00/21] sunxi: Move ALL boards to the device-model
by Hans de Goede 04 May '15

04 May '15

Hi Simon, Ian, As promised here is my patch-set to move all sunxi boards to the device-model, it was slightly more work then I expected, and as such the patch-set is also somewhat larger then expected, but it is done :) Please review, since this all only touches sunxi specific files the intention is to merge this through the sunxi tree as soon as all the patches are acked. Regards, Hans

4 66

[U-Boot] [PATCH v2 03/10] sunxi: Introduce a hidden SUNXI_GEN_SUNxI Kconfig bool
by Hans de Goede 04 May '15

04 May '15

sun6i and newer (derived) SoCs such as the sun8i-a23, sun8i-a33 and sun9i have a various things in common, like having separate ahb reset control registers, the SID living inside the pmic, custom pmic busses, new style watchdog, etc. This commit introduces a new hidden SUNXI_GEN_SUN6I Kconfig bool which can be used to check for these features avoiding the need for an ever growing list of "#if defined CONFIG_MACH_SUN?I" conditionals as we add support for more "new style" sunxi SoCs. For completeness this also adds a SUNXI_GEN_SUN4I bool for A10/A13/A20. Signed-off-by: Hans de Goede <hdegoede(a)redhat.com> --- Changes in v2: -Use SUNXI_GEN_SUN?I instead of ARCH_SUN6I --- arch/arm/cpu/armv7/sunxi/board.c | 18 +++++++++--------- arch/arm/cpu/armv7/sunxi/usbc.c | 4 ++-- arch/arm/include/asm/arch-sunxi/cpu_sun4i.h | 12 ++++++------ arch/arm/include/asm/arch-sunxi/mmc.h | 3 +-- arch/arm/include/asm/arch-sunxi/timer.h | 8 ++++---- board/sunxi/Kconfig | 21 +++++++++++++++++++++ board/sunxi/gmac.c | 6 +++--- drivers/mmc/sunxi_mmc.c | 3 +-- drivers/video/sunxi_display.c | 10 +++++----- 9 files changed, 52 insertions(+), 33 deletions(-) diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c index 6471c6b..cc6c68b 100644 --- a/arch/arm/cpu/armv7/sunxi/board.c +++ b/arch/arm/cpu/armv7/sunxi/board.c @@ -173,7 +173,15 @@ void board_init_f(ulong dummy) void reset_cpu(ulong addr) { -#if defined(CONFIG_MACH_SUN4I) || defined(CONFIG_MACH_SUN5I) || defined(CONFIG_MACH_SUN7I) +#ifdef CONFIG_SUNXI_GEN_SUN6I + static const struct sunxi_wdog *wdog = + ((struct sunxi_timer_reg *)SUNXI_TIMER_BASE)->wdog; + + /* Set the watchdog for its shortest interval (.5s) and wait */ + writel(WDT_CFG_RESET, &wdog->cfg); + writel(WDT_MODE_EN, &wdog->mode); + writel(WDT_CTRL_KEY | WDT_CTRL_RESTART, &wdog->ctl); +#else static const struct sunxi_wdog *wdog = &((struct sunxi_timer_reg *)SUNXI_TIMER_BASE)->wdog; @@ -185,14 +193,6 @@ void reset_cpu(ulong addr) /* sun5i sometimes gets stuck without this */ writel(WDT_MODE_RESET_EN | WDT_MODE_EN, &wdog->mode); } -#else /* CONFIG_MACH_SUN6I || CONFIG_MACH_SUN8I || .. */ - static const struct sunxi_wdog *wdog = - ((struct sunxi_timer_reg *)SUNXI_TIMER_BASE)->wdog; - - /* Set the watchdog for its shortest interval (.5s) and wait */ - writel(WDT_CFG_RESET, &wdog->cfg); - writel(WDT_MODE_EN, &wdog->mode); - writel(WDT_CTRL_KEY | WDT_CTRL_RESTART, &wdog->ctl); #endif } diff --git a/arch/arm/cpu/armv7/sunxi/usbc.c b/arch/arm/cpu/armv7/sunxi/usbc.c index 80e4fc9..7d55e41 100644 --- a/arch/arm/cpu/armv7/sunxi/usbc.c +++ b/arch/arm/cpu/armv7/sunxi/usbc.c @@ -218,7 +218,7 @@ void sunxi_usbc_enable(int index) setbits_le32(&ccm->usb_clk_cfg, sunxi_usbc->usb_rst_mask); setbits_le32(&ccm->ahb_gate0, sunxi_usbc->ahb_clk_mask); -#if defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I +#ifdef CONFIG_SUNXI_GEN_SUN6I setbits_le32(&ccm->ahb_reset0_cfg, sunxi_usbc->ahb_clk_mask); #endif @@ -238,7 +238,7 @@ void sunxi_usbc_disable(int index) if (sunxi_usbc->id != 0) sunxi_usb_passby(sunxi_usbc, !SUNXI_USB_PASSBY_EN); -#if defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I +#ifdef CONFIG_SUNXI_GEN_SUN6I clrbits_le32(&ccm->ahb_reset0_cfg, sunxi_usbc->ahb_clk_mask); #endif clrbits_le32(&ccm->ahb_gate0, sunxi_usbc->ahb_clk_mask); diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h index f403742..afa55d6 100644 --- a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h +++ b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h @@ -37,7 +37,7 @@ #define SUNXI_MMC1_BASE 0x01c10000 #define SUNXI_MMC2_BASE 0x01c11000 #define SUNXI_MMC3_BASE 0x01c12000 -#if !defined CONFIG_MACH_SUN6I && !defined CONFIG_MACH_SUN8I +#ifndef CONFIG_SUNXI_GEN_SUN6I #define SUNXI_USB0_BASE 0x01c13000 #define SUNXI_USB1_BASE 0x01c14000 #endif @@ -45,15 +45,15 @@ #define SUNXI_HDMI_BASE 0x01c16000 #define SUNXI_SPI2_BASE 0x01c17000 #define SUNXI_SATA_BASE 0x01c18000 -#if !defined CONFIG_MACH_SUN6I && !defined CONFIG_MACH_SUN8I +#ifdef CONFIG_SUNXI_GEN_SUN6I +#define SUNXI_USB0_BASE 0x01c19000 +#define SUNXI_USB1_BASE 0x01c1a000 +#define SUNXI_USB2_BASE 0x01c1b000 +#else #define SUNXI_PATA_BASE 0x01c19000 #define SUNXI_ACE_BASE 0x01c1a000 #define SUNXI_TVE1_BASE 0x01c1b000 #define SUNXI_USB2_BASE 0x01c1c000 -#else -#define SUNXI_USB0_BASE 0x01c19000 -#define SUNXI_USB1_BASE 0x01c1a000 -#define SUNXI_USB2_BASE 0x01c1b000 #endif #define SUNXI_CSI1_BASE 0x01c1d000 #define SUNXI_TZASC_BASE 0x01c1e000 diff --git a/arch/arm/include/asm/arch-sunxi/mmc.h b/arch/arm/include/asm/arch-sunxi/mmc.h index 74833b5..cb52e64 100644 --- a/arch/arm/include/asm/arch-sunxi/mmc.h +++ b/arch/arm/include/asm/arch-sunxi/mmc.h @@ -43,8 +43,7 @@ struct sunxi_mmc { u32 chda; /* 0x90 */ u32 cbda; /* 0x94 */ u32 res1[26]; -#if defined(CONFIG_MACH_SUN6I) || defined(CONFIG_MACH_SUN8I) || \ - defined(CONFIG_MACH_SUN9I) +#ifdef CONFIG_SUNXI_GEN_SUN6I u32 res2[64]; #endif u32 fifo; /* 0x100 / 0x200 FIFO access address */ diff --git a/arch/arm/include/asm/arch-sunxi/timer.h b/arch/arm/include/asm/arch-sunxi/timer.h index 9a5e488..aa0c14b 100644 --- a/arch/arm/include/asm/arch-sunxi/timer.h +++ b/arch/arm/include/asm/arch-sunxi/timer.h @@ -67,7 +67,10 @@ struct sunxi_timer_reg { struct sunxi_timer timer[6]; /* We have 6 timers */ u8 res2[16]; struct sunxi_avs avs; -#if defined(CONFIG_MACH_SUN4I) || defined(CONFIG_MACH_SUN5I) || defined(CONFIG_MACH_SUN7I) +#ifdef CONFIG_SUNXI_GEN_SUN6I + u8 res3[16]; + struct sunxi_wdog wdog[5]; /* We have 5 watchdogs */ +#else struct sunxi_wdog wdog; /* 0x90 */ /* XXX the following is not accurate for sun5i/sun7i */ struct sunxi_64cnt cnt64; /* 0xa0 */ @@ -77,9 +80,6 @@ struct sunxi_timer_reg { struct sunxi_tgp tgp[4]; u8 res5[8]; u32 cpu_cfg; -#else /* CONFIG_MACH_SUN6I || CONFIG_MACH_SUN8I || ... */ - u8 res3[16]; - struct sunxi_wdog wdog[5]; /* We have 5 watchdogs */ #endif }; diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig index 88e3358..b716a8b 100644 --- a/board/sunxi/Kconfig +++ b/board/sunxi/Kconfig @@ -1,21 +1,40 @@ if ARCH_SUNXI +# Note only one of these may be selected at a time! But hidden choices are +# not supported by Kconfig +config SUNXI_GEN_SUN4I + bool + ---help--- + Select this for sunxi SoCs which have resets and clocks set up + as the original A10 (mach-sun4i). + +config SUNXI_GEN_SUN6I + bool + ---help--- + Select this for sunxi SoCs which have sun6i like periphery, like + separate ahb reset control registers, custom pmic bus, new style + watchdog, etc. + + choice prompt "Sunxi SoC Variant" config MACH_SUN4I bool "sun4i (Allwinner A10)" select CPU_V7 + select SUNXI_GEN_SUN4I select SUPPORT_SPL config MACH_SUN5I bool "sun5i (Allwinner A13)" select CPU_V7 + select SUNXI_GEN_SUN4I select SUPPORT_SPL config MACH_SUN6I bool "sun6i (Allwinner A31)" select CPU_V7 + select SUNXI_GEN_SUN6I select SUPPORT_SPL config MACH_SUN7I @@ -23,12 +42,14 @@ config MACH_SUN7I select CPU_V7 select CPU_V7_HAS_NONSEC select CPU_V7_HAS_VIRT + select SUNXI_GEN_SUN4I select SUPPORT_SPL select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT config MACH_SUN8I bool "sun8i (Allwinner A23)" select CPU_V7 + select SUNXI_GEN_SUN6I select SUPPORT_SPL endchoice diff --git a/board/sunxi/gmac.c b/board/sunxi/gmac.c index d90eed4..4e222d8 100644 --- a/board/sunxi/gmac.c +++ b/board/sunxi/gmac.c @@ -13,11 +13,11 @@ int sunxi_gmac_initialize(bd_t *bis) (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; /* Set up clock gating */ -#ifndef CONFIG_MACH_SUN6I - setbits_le32(&ccm->ahb_gate1, 0x1 << AHB_GATE_OFFSET_GMAC); -#else +#ifdef CONFIG_SUNXI_GEN_SUN6I setbits_le32(&ccm->ahb_reset0_cfg, 0x1 << AHB_RESET_OFFSET_GMAC); setbits_le32(&ccm->ahb_gate0, 0x1 << AHB_GATE_OFFSET_GMAC); +#else + setbits_le32(&ccm->ahb_gate1, 0x1 << AHB_GATE_OFFSET_GMAC); #endif /* Set MII clock */ diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c index 2233545..1c234e2 100644 --- a/drivers/mmc/sunxi_mmc.c +++ b/drivers/mmc/sunxi_mmc.c @@ -151,8 +151,7 @@ static int mmc_clk_io_on(int sdc_no) /* config ahb clock */ setbits_le32(&ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_MMC(sdc_no)); -#if defined(CONFIG_MACH_SUN6I) || defined(CONFIG_MACH_SUN8I) || \ - defined(CONFIG_MACH_SUN9I) +#ifdef CONFIG_SUNXI_GEN_SUN6I /* unassert reset */ setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_RESET_OFFSET_MMC(sdc_no)); #endif diff --git a/drivers/video/sunxi_display.c b/drivers/video/sunxi_display.c index bff7afe..5073329 100644 --- a/drivers/video/sunxi_display.c +++ b/drivers/video/sunxi_display.c @@ -84,7 +84,7 @@ static int sunxi_hdmi_hpd_detect(int hpd_delay) CCM_HDMI_CTRL_PLL3); /* Set ahb gating to pass */ -#ifdef CONFIG_MACH_SUN6I +#ifdef CONFIG_SUNXI_GEN_SUN6I setbits_le32(&ccm->ahb_reset1_cfg, 1 << AHB_RESET_OFFSET_HDMI); #endif setbits_le32(&ccm->ahb_gate1, 1 << AHB_GATE_OFFSET_HDMI); @@ -113,7 +113,7 @@ static void sunxi_hdmi_shutdown(void) clrbits_le32(&hdmi->ctrl, SUNXI_HDMI_CTRL_ENABLE); clrbits_le32(&ccm->hdmi_clk_cfg, CCM_HDMI_CTRL_GATE); clrbits_le32(&ccm->ahb_gate1, 1 << AHB_GATE_OFFSET_HDMI); -#ifdef CONFIG_MACH_SUN6I +#ifdef CONFIG_SUNXI_GEN_SUN6I clrbits_le32(&ccm->ahb_reset1_cfg, 1 << AHB_RESET_OFFSET_HDMI); #endif clock_set_pll3(0); @@ -404,7 +404,7 @@ static void sunxi_composer_init(void) sunxi_frontend_init(); -#if defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I +#ifdef CONFIG_SUNXI_GEN_SUN6I /* Reset off */ setbits_le32(&ccm->ahb_reset1_cfg, 1 << AHB_RESET_OFFSET_DE_BE0); #endif @@ -549,7 +549,7 @@ static void sunxi_lcdc_init(void) (struct sunxi_lcdc_reg *)SUNXI_LCD0_BASE; /* Reset off */ -#if defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I +#ifdef CONFIG_SUNXI_GEN_SUN6I setbits_le32(&ccm->ahb_reset1_cfg, 1 << AHB_RESET_OFFSET_LCD0); #else setbits_le32(&ccm->lcd0_ch0_clk_cfg, CCM_LCD_CH0_CTRL_RST); @@ -942,7 +942,7 @@ static void sunxi_vga_enable(void) static void sunxi_drc_init(void) { -#if defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I +#ifdef CONFIG_SUNXI_GEN_SUN6I struct sunxi_ccm_reg * const ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; -- 2.3.6

2 4

[U-Boot] [PATCH v2 08/10] sunxi: Add basic A33 basic support
by Hans de Goede 04 May '15

04 May '15

From: Vishnu Patekar <vishnupatekar0510(a)gmail.com> Enable full support for the A33 SoC including display, otg-usb, etc. Signed-off-by: Vishnu Patekar <vishnupatekar0510(a)gmail.com> Signed-off-by: Hans de Goede <hdegoede(a)redhat.com> --- Changes in v2: -Add a comment to explain the 0 write to the usb CSR register on A33 --- arch/arm/cpu/armv7/sunxi/Makefile | 4 ++++ arch/arm/cpu/armv7/sunxi/board.c | 8 +++++--- arch/arm/cpu/armv7/sunxi/cpu_info.c | 2 ++ arch/arm/cpu/armv7/sunxi/rsb.c | 2 +- arch/arm/cpu/armv7/sunxi/usbc.c | 9 +++++++++ board/sunxi/Kconfig | 19 ++++++++++++++----- board/sunxi/board.c | 4 ++-- drivers/power/Kconfig | 4 ++-- drivers/usb/musb-new/musb_regs.h | 5 +++++ drivers/video/sunxi_display.c | 3 +++ include/configs/sunxi-common.h | 3 ++- 11 files changed, 49 insertions(+), 14 deletions(-) diff --git a/arch/arm/cpu/armv7/sunxi/Makefile b/arch/arm/cpu/armv7/sunxi/Makefile index b2e5e5d..b299635 100644 --- a/arch/arm/cpu/armv7/sunxi/Makefile +++ b/arch/arm/cpu/armv7/sunxi/Makefile @@ -16,15 +16,18 @@ obj-y += pinmux.o obj-y += usbc.o obj-$(CONFIG_MACH_SUN6I) += prcm.o obj-$(CONFIG_MACH_SUN8I_A23) += prcm.o +obj-$(CONFIG_MACH_SUN8I_A33) += prcm.o obj-$(CONFIG_MACH_SUN9I) += prcm.o obj-$(CONFIG_MACH_SUN6I) += p2wi.o obj-$(CONFIG_MACH_SUN8I_A23) += rsb.o +obj-$(CONFIG_MACH_SUN8I_A33) += rsb.o obj-$(CONFIG_MACH_SUN9I) += rsb.o obj-$(CONFIG_MACH_SUN4I) += clock_sun4i.o obj-$(CONFIG_MACH_SUN5I) += clock_sun4i.o obj-$(CONFIG_MACH_SUN6I) += clock_sun6i.o obj-$(CONFIG_MACH_SUN7I) += clock_sun4i.o obj-$(CONFIG_MACH_SUN8I_A23) += clock_sun6i.o +obj-$(CONFIG_MACH_SUN8I_A33) += clock_sun6i.o obj-$(CONFIG_MACH_SUN9I) += clock_sun9i.o ifndef CONFIG_SPL_BUILD @@ -39,5 +42,6 @@ obj-$(CONFIG_MACH_SUN5I) += dram_sun4i.o obj-$(CONFIG_MACH_SUN6I) += dram_sun6i.o obj-$(CONFIG_MACH_SUN7I) += dram_sun4i.o obj-$(CONFIG_MACH_SUN8I_A23) += dram_sun8i_a23.o +obj-$(CONFIG_MACH_SUN8I_A33) += dram_sun8i_a33.o obj-y += fel_utils.o endif diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c index 610d889..7e8f6ef 100644 --- a/arch/arm/cpu/armv7/sunxi/board.c +++ b/arch/arm/cpu/armv7/sunxi/board.c @@ -46,7 +46,7 @@ static int gpio_init(void) sunxi_gpio_set_cfgpin(SUNXI_GPB(22), SUNXI_GPIO_INPUT); sunxi_gpio_set_cfgpin(SUNXI_GPB(23), SUNXI_GPIO_INPUT); #endif -#if defined(CONFIG_MACH_SUN8I_A23) +#if defined(CONFIG_MACH_SUN8I_A23) || defined(CONFIG_MACH_SUN8I_A33) sunxi_gpio_set_cfgpin(SUNXI_GPF(2), SUN8I_GPF_UART0_TX); sunxi_gpio_set_cfgpin(SUNXI_GPF(4), SUN8I_GPF_UART0_RX); #else @@ -70,7 +70,8 @@ static int gpio_init(void) sunxi_gpio_set_cfgpin(SUNXI_GPG(3), SUN5I_GPG_UART1); sunxi_gpio_set_cfgpin(SUNXI_GPG(4), SUN5I_GPG_UART1); sunxi_gpio_set_pull(SUNXI_GPG(4), SUNXI_GPIO_PULL_UP); -#elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I_A23) +#elif CONFIG_CONS_INDEX == 5 && \ + (defined(CONFIG_MACH_SUN8I_A23) || defined(CONFIG_MACH_SUN8I_A33)) sunxi_gpio_set_cfgpin(SUNXI_GPL(2), SUN8I_GPL_R_UART); sunxi_gpio_set_cfgpin(SUNXI_GPL(3), SUN8I_GPL_R_UART); sunxi_gpio_set_pull(SUNXI_GPL(3), SUNXI_GPIO_PULL_UP); @@ -96,7 +97,8 @@ void s_init(void) #endif #if defined CONFIG_MACH_SUN6I || \ defined CONFIG_MACH_SUN7I || \ - defined CONFIG_MACH_SUN8I_A23 + defined CONFIG_MACH_SUN8I_A23 || \ + defined CONFIG_MACH_SUN8I_A33 /* Enable SMP mode for CPU0, by setting bit 6 of Auxiliary Ctl reg */ asm volatile( "mrc p15, 0, r0, c1, c0, 1\n" diff --git a/arch/arm/cpu/armv7/sunxi/cpu_info.c b/arch/arm/cpu/armv7/sunxi/cpu_info.c index 77435f3..30ec4ac 100644 --- a/arch/arm/cpu/armv7/sunxi/cpu_info.c +++ b/arch/arm/cpu/armv7/sunxi/cpu_info.c @@ -66,6 +66,8 @@ int print_cpuinfo(void) puts("CPU: Allwinner A20 (SUN7I)\n"); #elif defined CONFIG_MACH_SUN8I_A23 puts("CPU: Allwinner A23 (SUN8I)\n"); +#elif defined CONFIG_MACH_SUN8I_A33 + puts("CPU: Allwinner A33 (SUN8I)\n"); #else #warning Please update cpu_info.c with correct CPU information puts("CPU: SUNXI Family\n"); diff --git a/arch/arm/cpu/armv7/sunxi/rsb.c b/arch/arm/cpu/armv7/sunxi/rsb.c index d8d4957..076592b 100644 --- a/arch/arm/cpu/armv7/sunxi/rsb.c +++ b/arch/arm/cpu/armv7/sunxi/rsb.c @@ -20,7 +20,7 @@ static int rsb_set_device_mode(void); static void rsb_cfg_io(void) { -#if defined CONFIG_MACH_SUN8I_A23 +#if defined CONFIG_MACH_SUN8I_A23 || defined CONFIG_MACH_SUN8I_A33 sunxi_gpio_set_cfgpin(SUNXI_GPL(0), SUN8I_GPL_R_RSB); sunxi_gpio_set_cfgpin(SUNXI_GPL(1), SUN8I_GPL_R_RSB); sunxi_gpio_set_pull(SUNXI_GPL(0), 1); diff --git a/arch/arm/cpu/armv7/sunxi/usbc.c b/arch/arm/cpu/armv7/sunxi/usbc.c index 7d55e41..7b883fb 100644 --- a/arch/arm/cpu/armv7/sunxi/usbc.c +++ b/arch/arm/cpu/armv7/sunxi/usbc.c @@ -28,7 +28,11 @@ #endif #define SUNXI_USB_PMU_IRQ_ENABLE 0x800 +#ifdef CONFIG_MACH_SUN8I_A33 +#define SUNXI_USB_CSR 0x410 +#else #define SUNXI_USB_CSR 0x404 +#endif #define SUNXI_USB_PASSBY_EN 1 #define SUNXI_EHCI_AHB_ICHR8_EN (1 << 10) @@ -103,6 +107,11 @@ static void usb_phy_write(struct sunxi_usbc_hcd *sunxi_usbc, int addr, int j = 0, usbc_bit = 0; void *dest = sunxi_usbc_get_io_base(0) + SUNXI_USB_CSR; +#ifdef CONFIG_MACH_SUN8I_A33 + /* CSR needs to be explicitly initialized to 0 on A33 */ + writel(0, dest); +#endif + usbc_bit = 1 << (sunxi_usbc->id * 2); for (j = 0; j < len; j++) { /* set the bit address to be written */ diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig index 5024733..8dd3c37 100644 --- a/board/sunxi/Kconfig +++ b/board/sunxi/Kconfig @@ -52,11 +52,17 @@ config MACH_SUN8I_A23 select SUNXI_GEN_SUN6I select SUPPORT_SPL +config MACH_SUN8I_A33 + bool "sun8i (Allwinner A33)" + select CPU_V7 + select SUNXI_GEN_SUN6I + select SUPPORT_SPL + endchoice config DRAM_CLK int "sunxi dram clock speed" - default 312 if MACH_SUN6I || MACH_SUN8I_A23 + default 312 if MACH_SUN6I || MACH_SUN8I_A23 || MACH_SUN8I_A33 default 360 if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I ---help--- Set the dram clock speed, valid range 240 - 480, must be a multiple @@ -73,7 +79,8 @@ endif config DRAM_ZQ int "sunxi dram zq value" - default 123 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN8I_A23 + default 123 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I + default 123 if MACH_SUN8I_A23 || MACH_SUN8I_A33 default 127 if MACH_SUN7I ---help--- Set the dram zq value. @@ -156,7 +163,7 @@ endif config SYS_CLK_FREQ default 912000000 if MACH_SUN7I default 1008000000 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I - default 1008000000 if MACH_SUN8I_A23 + default 1008000000 if MACH_SUN8I_A23 || MACH_SUN8I_A33 config SYS_CONFIG_NAME default "sun4i" if MACH_SUN4I @@ -164,6 +171,7 @@ config SYS_CONFIG_NAME default "sun6i" if MACH_SUN6I default "sun7i" if MACH_SUN7I default "sun8i" if MACH_SUN8I_A23 + default "sun8i" if MACH_SUN8I_A33 config SYS_BOARD default "sunxi" @@ -339,7 +347,7 @@ config VIDEO config VIDEO_HDMI boolean "HDMI output support" - depends on VIDEO && !MACH_SUN8I_A23 + depends on VIDEO && !MACH_SUN8I_A23 && !MACH_SUN8I_A33 default y ---help--- Say Y here to add support for outputting video over HDMI. @@ -353,7 +361,8 @@ config VIDEO_VGA config VIDEO_VGA_VIA_LCD boolean "VGA via LCD controller support" - depends on VIDEO && (MACH_SUN5I || MACH_SUN6I || MACH_SUN8I_A23) + depends on VIDEO + depends on MACH_SUN5I || MACH_SUN6I || MACH_SUN8I_A23 || MACH_SUN8I_A33 default n ---help--- Say Y here to add support for external DACs connected to the parallel diff --git a/board/sunxi/board.c b/board/sunxi/board.c index dee2621..e0fec57 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -116,7 +116,7 @@ static void mmc_pinmux_setup(int sdc) sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); sunxi_gpio_set_drv(pin, 2); } -#elif defined(CONFIG_MACH_SUN8I_A23) +#elif defined(CONFIG_MACH_SUN8I_A23) || defined(CONFIG_MACH_SUN8I_A33) if (pins == SUNXI_GPIO_D) { /* SDC1: PD2-PD7 */ for (pin = SUNXI_GPD(2); pin <= SUNXI_GPD(7); pin++) { @@ -181,7 +181,7 @@ static void mmc_pinmux_setup(int sdc) sunxi_gpio_set_pull(SUNXI_GPC(24), SUNXI_GPIO_PULL_UP); sunxi_gpio_set_drv(SUNXI_GPC(24), 2); } -#elif defined(CONFIG_MACH_SUN8I_A23) +#elif defined(CONFIG_MACH_SUN8I_A23) || defined(CONFIG_MACH_SUN8I_A33) /* SDC2: PC5-PC6, PC8-PC16 */ for (pin = SUNXI_GPC(5); pin <= SUNXI_GPC(6); pin++) { sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SDC2); diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig index 39051e4..02ea6c1 100644 --- a/drivers/power/Kconfig +++ b/drivers/power/Kconfig @@ -1,6 +1,6 @@ config AXP221_POWER boolean "axp221 / axp223 pmic support" - depends on MACH_SUN6I || MACH_SUN8I_A23 + depends on MACH_SUN6I || MACH_SUN8I_A23 || MACH_SUN8I_A33 default y ---help--- Say y here to enable support for the axp221 / axp223 pmic found on most @@ -47,7 +47,7 @@ config AXP221_ALDO2_VOLT int "axp221 aldo2 voltage" depends on AXP221_POWER default 0 if MACH_SUN6I - default 2500 if MACH_SUN8I_A23 + default 2500 if MACH_SUN8I_A23 || MACH_SUN8I_A33 ---help--- Set the voltage (mV) to program the axp221 aldo2 at, set to 0 to disable aldo2. On sun6i (A31) boards this is typically unused and diff --git a/drivers/usb/musb-new/musb_regs.h b/drivers/usb/musb-new/musb_regs.h index 27e4ed4..90288c4 100644 --- a/drivers/usb/musb-new/musb_regs.h +++ b/drivers/usb/musb-new/musb_regs.h @@ -458,8 +458,13 @@ static inline u8 musb_read_ulpi_buscontrol(void __iomem *mbase) static inline u8 musb_read_configdata(void __iomem *mbase) { +#ifdef CONFIG_MACH_SUN8I_A33 + /* <Sigh> allwinner saves a reg, and we need to hardcode this */ + return 0xde; +#else musb_writeb(mbase, MUSB_INDEX, 0); return musb_readb(mbase, 0x10 + MUSB_CONFIGDATA); +#endif } static inline u16 musb_read_hwvers(void __iomem *mbase) diff --git a/drivers/video/sunxi_display.c b/drivers/video/sunxi_display.c index 5073329..0fca057 100644 --- a/drivers/video/sunxi_display.c +++ b/drivers/video/sunxi_display.c @@ -947,6 +947,9 @@ static void sunxi_drc_init(void) (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; /* On sun6i the drc must be clocked even when in pass-through mode */ +#ifdef CONFIG_MACH_SUN8I_A33 + setbits_le32(&ccm->ahb_reset1_cfg, 1 << AHB_RESET_OFFSET_SAT); +#endif setbits_le32(&ccm->ahb_reset1_cfg, 1 << AHB_RESET_OFFSET_DRC0); clock_set_de_mod_clock(&ccm->iep_drc0_clk_cfg, 300000000); #endif diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 4a8c452..9f10e76 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -241,7 +241,8 @@ extern int soft_i2c_gpio_scl; #endif #elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I) #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28400:115200" -#elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I_A23) +#elif CONFIG_CONS_INDEX == 5 && \ + (defined(CONFIG_MACH_SUN8I_A23) || defined(CONFIG_MACH_SUN8I_A33)) #define OF_STDOUT_PATH "/soc@01c00000/serial@01f02800:115200" #else #error Unsupported console port nr. Please fix stdout-path in sunxi-common.h. -- 2.3.6

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[U-Boot] [PATCH v2 1/4] mx6cuboxi: Add HDMI output support
by Fabio Estevam 04 May '15

04 May '15

From: Fabio Estevam <fabio.estevam(a)freescale.com> Add HDMI output using PLL5 as the source for the IPU clocks, and accurate VESA timings. These settings are based on the patch from Soeren Moch <smoch(a)web.de> submitted for the tbs2910 mx6 based board. It allows the display to work properly at 1024x768@60. This should make the hdmi output signal compatible with most if not all modern displays. Signed-off-by: Jon Nettleton <jon.nettleton(a)gmail.com> Signed-off-by: Fabio Estevam <fabio.estevam(a)freescale.com> Reviewed-by: Tom Rini <trini(a)konsulko.com> Tested-by: Tom Rini <trini(a)konsulko.com> --- Changes since v1: - None board/solidrun/mx6cuboxi/mx6cuboxi.c | 101 ++++++++++++++++++++++++++++++++++- include/configs/mx6cuboxi.h | 18 ++++++- 2 files changed, 117 insertions(+), 2 deletions(-) diff --git a/board/solidrun/mx6cuboxi/mx6cuboxi.c b/board/solidrun/mx6cuboxi/mx6cuboxi.c index d3a32c1..eab92f1 100644 --- a/board/solidrun/mx6cuboxi/mx6cuboxi.c +++ b/board/solidrun/mx6cuboxi/mx6cuboxi.c @@ -18,9 +18,11 @@ #include <asm/arch/imx-regs.h> #include <asm/arch/iomux.h> #include <asm/arch/mx6-pins.h> +#include <asm/arch/mxc_hdmi.h> #include <asm/errno.h> #include <asm/gpio.h> #include <asm/imx-common/iomux-v3.h> +#include <asm/imx-common/video.h> #include <mmc.h> #include <fsl_esdhc.h> #include <miiphy.h> @@ -159,10 +161,107 @@ int board_eth_init(bd_t *bis) return cpu_eth_init(bis); } +#ifdef CONFIG_VIDEO_IPUV3 +static void do_enable_hdmi(struct display_info_t const *dev) +{ + imx_enable_hdmi_phy(); +} + +struct display_info_t const displays[] = { + { + .bus = -1, + .addr = 0, + .pixfmt = IPU_PIX_FMT_RGB24, + .detect = detect_hdmi, + .enable = do_enable_hdmi, + .mode = { + .name = "HDMI", + /* 1024x768@60Hz (VESA)*/ + .refresh = 60, + .xres = 1024, + .yres = 768, + .pixclock = 15384, + .left_margin = 160, + .right_margin = 24, + .upper_margin = 29, + .lower_margin = 3, + .hsync_len = 136, + .vsync_len = 6, + .sync = FB_SYNC_EXT, + .vmode = FB_VMODE_NONINTERLACED + } + } +}; + +size_t display_count = ARRAY_SIZE(displays); + +static int setup_display(void) +{ + struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; + int reg; + int timeout = 100000; + + enable_ipu_clock(); + imx_setup_hdmi(); + + /* set video pll to 455MHz (24MHz * (37+11/12) / 2) */ + setbits_le32(&ccm->analog_pll_video, BM_ANADIG_PLL_VIDEO_POWERDOWN); + + reg = readl(&ccm->analog_pll_video); + reg &= ~BM_ANADIG_PLL_VIDEO_DIV_SELECT; + reg |= BF_ANADIG_PLL_VIDEO_DIV_SELECT(37); + reg &= ~BM_ANADIG_PLL_VIDEO_POST_DIV_SELECT; + reg |= BF_ANADIG_PLL_VIDEO_POST_DIV_SELECT(1); + writel(reg, &ccm->analog_pll_video); + + writel(BF_ANADIG_PLL_VIDEO_NUM_A(11), &ccm->analog_pll_video_num); + writel(BF_ANADIG_PLL_VIDEO_DENOM_B(12), &ccm->analog_pll_video_denom); + + reg &= ~BM_ANADIG_PLL_VIDEO_POWERDOWN; + writel(reg, &ccm->analog_pll_video); + + while (timeout--) + if (readl(&ccm->analog_pll_video) & BM_ANADIG_PLL_VIDEO_LOCK) + break; + if (timeout < 0) { + printf("Warning: video pll lock timeout!\n"); + return -ETIMEDOUT; + } + + reg = readl(&ccm->analog_pll_video); + reg |= BM_ANADIG_PLL_VIDEO_ENABLE; + reg &= ~BM_ANADIG_PLL_VIDEO_BYPASS; + writel(reg, &ccm->analog_pll_video); + + /* gate ipu1_di0_clk */ + clrbits_le32(&ccm->CCGR3, MXC_CCM_CCGR3_LDB_DI0_MASK); + + /* select video_pll clock / 7 for ipu1_di0_clk -> 65MHz pixclock */ + reg = readl(&ccm->chsccdr); + reg &= ~(MXC_CCM_CHSCCDR_IPU1_DI0_PRE_CLK_SEL_MASK | + MXC_CCM_CHSCCDR_IPU1_DI0_PODF_MASK | + MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_MASK); + reg |= (2 << MXC_CCM_CHSCCDR_IPU1_DI0_PRE_CLK_SEL_OFFSET) | + (6 << MXC_CCM_CHSCCDR_IPU1_DI0_PODF_OFFSET) | + (0 << MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_OFFSET); + writel(reg, &ccm->chsccdr); + + /* enable ipu1_di0_clk */ + setbits_le32(&ccm->CCGR3, MXC_CCM_CCGR3_LDB_DI0_MASK); + + return 0; +} +#endif /* CONFIG_VIDEO_IPUV3 */ + int board_early_init_f(void) { + int ret = 0; setup_iomux_uart(); - return 0; + +#ifdef CONFIG_VIDEO_IPUV3 + ret = setup_display(); +#endif + return ret; } int board_init(void) diff --git a/include/configs/mx6cuboxi.h b/include/configs/mx6cuboxi.h index b569f34..207a2a6 100644 --- a/include/configs/mx6cuboxi.h +++ b/include/configs/mx6cuboxi.h @@ -27,7 +27,7 @@ #define CONFIG_IMX6_THERMAL #define CONFIG_SYS_GENERIC_BOARD -#define CONFIG_SYS_MALLOC_LEN (2 * SZ_1M) +#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M) #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_BOARD_LATE_INIT #define CONFIG_MXC_GPIO @@ -66,6 +66,22 @@ #define CONFIG_CONS_INDEX 1 #define CONFIG_BAUDRATE 115200 +/* Framebuffer */ +#define CONFIG_VIDEO +#define CONFIG_VIDEO_IPUV3 +#define CONFIG_IPUV3_CLK 260000000 +#define CONFIG_CFB_CONSOLE +#define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_VIDEO_BMP_RLE8 +#define CONFIG_SPLASH_SCREEN +#define CONFIG_SPLASH_SCREEN_ALIGN +#define CONFIG_BMP_16BPP +#define CONFIG_VIDEO_LOGO +#define CONFIG_VIDEO_BMP_LOGO +#define CONFIG_IMX_HDMI +#define CONFIG_IMX_VIDEO_SKIP + #define CONFIG_SYS_NO_FLASH /* Command definition */ -- 1.9.1

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