March 2015 - U-Boot

[U-Boot] [PATCH 0/7] Some improvements related to build system
by Masahiro Yamada 17 Mar '15

17 Mar '15

- Move GENERIC_BOARD CONFIGs - Remove arch/m68k/lib/board.c - Clean ups CONFIG_SYS_MALLOC_F and CONFIG_SYS_MALLOC_F_LEN - Move BCM283x code into arch/arm/mach-bcm283x Masahiro Yamada (7): generic-board: move __HAVE_ARCH_GENERIC_BOARD to Kconfig generic-board: select SYS_GENERIC_BOARD for some architectures m68k: remove arch board.c malloc_f: remove redundant defalut values of CONFIG_SYS_MALLOC_F_LEN malloc_f: enable SYS_MALLOC_F by default if DM is on ARM: bcm283x: merge BCM2835/BCM2836 directories into mach-bcm283x ARM: bcm283x: move SoC headers to mach-bcm283x/include/mach Kconfig | 2 +- Makefile | 2 +- README | 6 +- arch/Kconfig | 26 + arch/arc/config.mk | 3 - arch/arc/include/asm/config.h | 1 - arch/arm/Kconfig | 15 +- arch/arm/Makefile | 1 + arch/arm/config.mk | 3 - arch/arm/cpu/arm1176/Makefile | 2 - arch/arm/cpu/arm1176/bcm2835/Kconfig | 12 - arch/arm/cpu/armv7/Makefile | 1 - arch/arm/cpu/armv7/bcm2835/Makefile | 13 - arch/arm/cpu/armv7/exynos/Kconfig | 6 - arch/arm/cpu/armv7/omap3/Kconfig | 6 - arch/arm/mach-bcm283x/Kconfig | 40 ++ .../{cpu/arm1176/bcm2835 => mach-bcm283x}/Makefile | 2 +- .../include/mach}/gpio.h | 0 .../include/mach}/mbox.h | 0 .../include/mach}/sdhci.h | 0 .../include/mach}/timer.h | 0 .../include/mach}/wdog.h | 0 .../{cpu/arm1176/bcm2835 => mach-bcm283x}/init.c | 0 .../bcm2835 => mach-bcm283x}/lowlevel_init.S | 0 .../{cpu/arm1176/bcm2835 => mach-bcm283x}/mbox.c | 0 .../{cpu/arm1176/bcm2835 => mach-bcm283x}/reset.c | 0 .../{cpu/arm1176/bcm2835 => mach-bcm283x}/timer.c | 0 arch/arm/mach-tegra/Kconfig | 3 - arch/arm/mach-uniphier/Kconfig | 6 - arch/avr32/config.mk | 3 - arch/blackfin/config.mk | 3 - arch/blackfin/include/asm/config.h | 1 - arch/m68k/config.mk | 3 - arch/m68k/include/asm/config.h | 1 - arch/m68k/lib/Makefile | 3 - arch/m68k/lib/board.c | 642 --------------------- arch/microblaze/config.mk | 1 - arch/microblaze/include/asm/config.h | 1 - arch/mips/config.mk | 2 - arch/nios2/config.mk | 2 - arch/nios2/include/asm/config.h | 1 - arch/powerpc/config.mk | 3 - arch/sandbox/config.mk | 5 +- arch/x86/Kconfig | 3 - arch/x86/config.mk | 3 - arch/x86/include/asm/config.h | 1 - board/amcc/canyonlands/Kconfig | 8 - board/raspberrypi/rpi/Kconfig | 15 - board/raspberrypi/rpi_2/Kconfig | 15 - board/ti/am335x/Kconfig | 6 - configs/Linksprite_pcDuino3_fdt_defconfig | 2 - configs/am335x_igep0033_defconfig | 2 - configs/cm_fx6_defconfig | 2 - configs/cm_t335_defconfig | 2 - configs/gwventana_defconfig | 1 - configs/mx6dlsabreauto_defconfig | 2 - configs/mx6qsabreauto_defconfig | 2 - configs/mx6qsabresd_defconfig | 2 - configs/mx6sxsabresd_defconfig | 2 - configs/nokia_rx51_defconfig | 2 - configs/pcm051_rev1_defconfig | 2 - configs/pcm051_rev3_defconfig | 2 - configs/pengwyn_defconfig | 2 - configs/pepper_defconfig | 2 - configs/rpi_2_defconfig | 3 +- configs/rpi_defconfig | 3 +- configs/s5p_goni_defconfig | 2 - configs/sandbox_defconfig | 2 - configs/smdkc100_defconfig | 2 - configs/snapper9260_defconfig | 2 - configs/snapper9g20_defconfig | 2 - configs/stv0991_defconfig | 1 - doc/README.generic-board | 12 +- drivers/mmc/bcm2835_sdhci.c | 4 +- include/configs/amcore.h | 2 - include/configs/dbau1x00.h | 1 - include/configs/malta.h | 1 - include/configs/pb1x00.h | 1 - include/configs/qemu-mips.h | 1 - include/configs/qemu-mips64.h | 1 - include/configs/rcar-gen2-common.h | 2 - include/configs/vct.h | 1 - 82 files changed, 89 insertions(+), 853 deletions(-) delete mode 100644 arch/arm/cpu/arm1176/bcm2835/Kconfig delete mode 100644 arch/arm/cpu/armv7/bcm2835/Makefile create mode 100644 arch/arm/mach-bcm283x/Kconfig rename arch/arm/{cpu/arm1176/bcm2835 => mach-bcm283x}/Makefile (72%) rename arch/arm/{include/asm/arch-bcm2835 => mach-bcm283x/include/mach}/gpio.h (100%) rename arch/arm/{include/asm/arch-bcm2835 => mach-bcm283x/include/mach}/mbox.h (100%) rename arch/arm/{include/asm/arch-bcm2835 => mach-bcm283x/include/mach}/sdhci.h (100%) rename arch/arm/{include/asm/arch-bcm2835 => mach-bcm283x/include/mach}/timer.h (100%) rename arch/arm/{include/asm/arch-bcm2835 => mach-bcm283x/include/mach}/wdog.h (100%) rename arch/arm/{cpu/arm1176/bcm2835 => mach-bcm283x}/init.c (100%) rename arch/arm/{cpu/arm1176/bcm2835 => mach-bcm283x}/lowlevel_init.S (100%) rename arch/arm/{cpu/arm1176/bcm2835 => mach-bcm283x}/mbox.c (100%) rename arch/arm/{cpu/arm1176/bcm2835 => mach-bcm283x}/reset.c (100%) rename arch/arm/{cpu/arm1176/bcm2835 => mach-bcm283x}/timer.c (100%) delete mode 100644 arch/m68k/lib/board.c delete mode 100644 board/raspberrypi/rpi/Kconfig delete mode 100644 board/raspberrypi/rpi_2/Kconfig -- 1.9.1

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[U-Boot] Question about board-specific Makefile actions
by James Chargin 17 Mar '15

17 Mar '15

I have a custom board in a git workspace for U-Boot 2014.07. I've copied most of this from the .../board/ti/beagle. My board directory Makefile looks like 8<--- obj-y := board.o 8<--- I'd like to add a few files to this directory that are processed during "make all" and have any newly derived files deleted during "make clean". I've experimented with various Makefile contents but I can't get the new files processed or any newly derived files deleted. U-Boot's makefile system is quite large for my experience level and it seems I don't have enough understanding. A new file might contain some hush commands that are to be executed from the U-Boot command line. I'd like to use "source" to process these commands. The "source" command requires that its argument be an image (I get this into memory via TFTP), so I'd like "make all" to transform the text file containing the hush commands into the image file. I'd also like "make clean" to delete the derived image file. So, if my hush commands are in a text file called test.txt, I'd like "make all" to apply mkimage so that a test.img is generated. I'd also like "make clean" to delete test.img. I tried various changes to my Makefile, but the most likely seeming changes are 8<--- IMG = test.img obj-y := board.o board.o : $(IMG) %.img : %.txt $(srctree)/tools/mkimage -T script -n $* -C none -d $< $@ CLEAN_FILES += $(IMG) CLEAN_DIRS += . 8<--- This doesn't work, nor has any other approach I've taken. mkimage is never run for "make all" and test.img doesn't get deleted if I create a fake one and run "make clean" Could someone offer a solution, either directly, or by pointing at an existing board that does something similar? Thanks Jim -- Jim Chargin AJA Video Systems jimc(a)aja.com (530) 271-3334 http://www.aja.com

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Re: [U-Boot] Removing "+S:" magic from defconfig files ?
by Masahiro Yamada 17 Mar '15

17 Mar '15

Hi Hans, Sorry, I missed this message. 2015-03-07 22:54 GMT+09:00 Hans de Goede <hdegoede(a)redhat.com>: > Hi All, > > I was wondering, now that we've a single .config for both the SPL and non > SPL builds, can we drop the "+S:" magic from defconfig files ? Yes. In u-boot/master, all the magic prefixes have gone. commit 252ed8729d8a2571faacb6fdb3463df2361a733d Author: Masahiro Yamada <yamada.masahiro(a)socionext.com> Date: Thu Mar 12 13:24:39 2015 +0900 kconfig: remove meaningless prefixes in defconfig files -- Best Regards Masahiro Yamada

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[U-Boot] [PATCH] sbc8548: document how to write main flash from alternate flash
by Paul Gortmaker 16 Mar '15

16 Mar '15

If you are running on the alternate flash in order to fix a corrupted main flash image, it might be good to have the steps for that documented as well. Signed-off-by: Paul Gortmaker <paul.gortmaker(a)windriver.com> --- board/sbc8548/README | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/board/sbc8548/README b/board/sbc8548/README index feac5e3e63e5..493ea837ba3b 100644 --- a/board/sbc8548/README +++ b/board/sbc8548/README @@ -138,6 +138,18 @@ image in the SODIMM that is built with CONFIG_SYS_ALT_BOOT enabled, md eff00000 10 protect on all +If you are running the alternate 64MB /CS0 settings and want to update +the "normal" default 8MB u-boot image, then (built with CONFIG_SYS_ALT_BOOT +disabled) the steps will become: + + tftp u-boot.bin + md 200000 10 + protect off all + erase effa0000 efffffff + cp.b 200000 effa0000 60000 + md effa0000 10 + protect on all + Finally, if you are running the alternate 64MB /CS0 settings and want to update the in-use u-boot image, then (again with CONFIG_SYS_ALT_BOOT enabled) the steps will become: -- 2.2.1

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[U-Boot] [PATCH] board/BuR/common: fix compiler warning
by Hannes Petermaier 16 Mar '15

16 Mar '15

From: Hannes Petermaier <hannes.petermaier(a)br-automation.com> Signed-off-by: Hannes Petermaier <hannes.petermaier(a)br-automation.com> Signed-off-by: Hannes Petermaier <oe5hpm(a)oevsv.at> --- include/configs/bur_am335x_common.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/bur_am335x_common.h b/include/configs/bur_am335x_common.h index a558e42..377e6cf 100644 --- a/include/configs/bur_am335x_common.h +++ b/include/configs/bur_am335x_common.h @@ -25,7 +25,7 @@ "fi;" \ "setenv netdisplay0 '" \ "setcurs 1 9; puts myip; setcurs 10 9; puts ${ipaddr};" \ -"setcurs 1 10;puts serverip; setcurs 10 10; puts ${serverip}\;'" \ +"setcurs 1 10;puts serverip; setcurs 10 10; puts ${serverip};" \ "run netdisplay0; " \ "setenv stdout nc;setenv stdin nc;setenv stderr nc\0" -- 1.7.9.5

2 1

[U-Boot] [PATCH 0/4] Introduce lcd_console rotation.
by Hannes Petermaier 16 Mar '15

16 Mar '15

Sometimes, for example if the display is mounted in portrait mode or even if it mounted landscape but rotated by 180 degree, we need to rotate our content of the display respectively the framebuffer, so that user can read the messages who are printed out. For this we introduce the feature called "CONFIG_LCD_ROTATION", this may be defined in the board-configuration if needed. After this the lcd_console will be initialized with a given rotation from "vl_rot" out of "vidinfo_t" which is provided by the board specific code. If CONFIG_LCD_ROTATION is not defined, the console will be initialized with 0 degrees rotation - the screen behaves like the days before. Patch 1-3 make preparations to the code. Patch 4 implements the new feature Hannes Petermaier (4): common/lcd_console: cleanup lcd_drawchars/lcd_putc_xy common/lcd_console: ask only one-time for bg/fg-color per call common/lcd_console: move single static variables into common (static) structure common/lcd_console: introduce display/framebuffer rotation README | 17 +++ common/lcd.c | 22 +-- common/lcd_console.c | 395 +++++++++++++++++++++++++++++++++++++------------ include/lcd.h | 1 + include/lcd_console.h | 9 +- 5 files changed, 334 insertions(+), 110 deletions(-) -- 1.7.9.5

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[U-Boot] MIPS UHI spec
by Matthew Fortune 16 Mar '15

16 Mar '15

Hi Daniel, The spec for MIPS Unified Hosting Interface is available here: http://prplfoundation.org/wiki/MIPS_documentation As we have previously discussed, this is an ideal place to define the handover of device tree data from bootloader to kernel. Using a0 == -2 and defining which register(s) you need for the actual data will fit nicely. I'll happily include whatever is decided into the next version of the spec. This is also the spec I would like to use to implement a syscall interface. Previous post on the topic: http://lists.denx.de/pipermail/u-boot/2014-December/198007.html Only a subset of the operations would be implemented for u-boot and would be strictly limited to sit on top of the functionality that is already exposed to standalone applications with GPL exceptions. Some of the operations need a bit of wrapper code around the API functions i.e. The write operation would only be handled for FD 1 and 2 and would be implemented as a loop sending each byte of the buffer via putc. UHI also provides a semi-hosting solution for u-boot itself which it could use to obtain files over the EJTAG interface. Initial implementation of the syscall interface will be posted relatively soon. Thanks, Matthew

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[U-Boot] No console output once kernel starts loading.
by DaveKucharczyk 16 Mar '15

16 Mar '15

I'm currently working on the kernel dtb for our MX53 board. U-boot loads the dtb and kernel and then gets stuck at "starting kernel...". I've triple checked the uart pad setup in imx53.dtsi Here is my entire dts (everything else is stripped for testing)... ----------------------------- /dts-v1/; #include "imx53.dtsi" / { model = "Freescale i.MX53 test Board"; compatible = "fsl,imx53-qsb", "fsl,imx53"; memory { reg = <0x70000000 0x80000000>; }; &uart2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart2_3>; status = "okay"; }; &esdhc2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_esdhc2_1>; //cd-gpios = <&gpio4 1 0>; //wp-gpios = <&gpio2 9 0>; //lctl-gpios = <&gpio6 9 0>; status = "okay"; }; -------------------------------- Should I see console output with just the above dts? Basically I just want to see some life, so all I have setup is the uart. The sd card setup doesn't even matter this early. What am I missing? -- View this message in context: http://u-boot.10912.n7.nabble.com/No-console-output-once-kernel-starts-load… Sent from the U-Boot mailing list archive at Nabble.com.

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[U-Boot] [PATCH v2] powerpc/t1023rdb: Add T1023 RDB board support
by Shengzhou Liu 16 Mar '15

16 Mar '15

T1023RDB is a Freescale Reference Design Board that hosts the T1023 SoC. T1023RDB board Overview ----------------------- - T1023 SoC integrating two 64-bit e5500 cores up to 1.4GHz - CoreNet fabric supporting coherent and noncoherent transactions with prioritization and bandwidth allocation - SDRAM memory: 2GB Micron MT40A512M8HX unbuffered 32-bit DDR4 without ECC - Accelerator: DPAA components consist of FMan, BMan, QMan, DCE and SEC - Ethernet interfaces: - one 1G RGMII port on-board(RTL8211F PHY) - one 1G SGMII port on-board(RTL8211F PHY) - one 2.5G SGMII port on-board(AQR105 PHY) - PCIe: Two Mini-PCIe connectors on-board. - SerDes: 4 lanes up to 10.3125GHz - NOR: 128MB S29GL01GS110TFIV10 Spansion NOR Flash - NAND: 512MB S34MS04G200BFI000 Spansion NAND Flash - eSPI: 64MB S25FL512SAGMFI010 Spansion SPI flash. - USB: one Type-A USB 2.0 port with internal PHY - eSDHC: support SD/MMC card and eMMC on-board - 256Kbit M24256 I2C EEPROM - RTC: Real-time clock DS1339 on I2C bus - UART: one serial port on-board with RJ45 connector - Debugging: JTAG/COP for T1023 debugging As well updated T1024RDB to add T1023RDB. Signed-off-by: Shengzhou Liu <Shengzhou.Liu(a)freescale.com> --- v2: updated the printout of serdes refclk. board/freescale/t102xrdb/Makefile | 2 +- board/freescale/t102xrdb/README | 89 +++++++++++++++++++++++++------ board/freescale/t102xrdb/eth_t102xrdb.c | 23 ++++++-- board/freescale/t102xrdb/t1023_rcw.cfg | 8 +++ board/freescale/t102xrdb/t102xrdb.c | 94 +++++++++++++++++++++++++++++++-- board/freescale/t102xrdb/t102xrdb.h | 4 +- include/configs/T102xRDB.h | 73 +++++++++++++++++++++---- 7 files changed, 260 insertions(+), 33 deletions(-) create mode 100644 board/freescale/t102xrdb/t1023_rcw.cfg diff --git a/board/freescale/t102xrdb/Makefile b/board/freescale/t102xrdb/Makefile index a0cf8f6..0520066 100644 --- a/board/freescale/t102xrdb/Makefile +++ b/board/freescale/t102xrdb/Makefile @@ -8,7 +8,7 @@ ifdef CONFIG_SPL_BUILD obj-y += spl.o else obj-y += t102xrdb.o -obj-y += cpld.o +obj-$(CONFIG_T1024RDB) += cpld.o obj-y += eth_t102xrdb.o obj-$(CONFIG_PCI) += pci.o endif diff --git a/board/freescale/t102xrdb/README b/board/freescale/t102xrdb/README index 2b17f50..775de06 100644 --- a/board/freescale/t102xrdb/README +++ b/board/freescale/t102xrdb/README @@ -98,6 +98,29 @@ T1024RDB board Overview - Four I2C ports +T1023RDB board Overview +----------------------- +- T1023 SoC integrating two 64-bit e5500 cores up to 1.4GHz +- CoreNet fabric supporting coherent and noncoherent transactions with + prioritization and bandwidth allocation +- SDRAM memory: 2GB Micron MT40A512M8HX unbuffered 32-bit DDR4 w/o ECC +- Accelerator: DPAA components consist of FMan, BMan, QMan, DCE and SEC +- Ethernet interfaces: + - one 1G RGMII port on-board(RTL8211FS PHY) + - one 1G SGMII port on-board(RTL8211FS PHY) + - one 2.5G SGMII port on-board(AQR105 PHY) +- PCIe: Two Mini-PCIe connectors on-board. +- SerDes: 4 lanes up to 10.3125GHz +- NOR: 128MB S29GL01GS110TFIV10 Spansion NOR Flash +- NAND: 512MB S34MS04G200BFI000 Spansion NAND Flash +- eSPI: 64MB S25FL512SAGMFI010 Spansion SPI flash. +- USB: one Type-A USB 2.0 port with internal PHY +- eSDHC: support SD/MMC and eMMC card +- 256Kbit M24256 I2C EEPROM +- RTC: Real-time clock DS1339U on I2C bus +- UART: one serial port on-board with RJ45 connector +- Debugging: JTAG/COP for T1023 debugging + Memory map on T1024RDB ---------------------- Start Address End Address Description Size @@ -124,22 +147,32 @@ Start Address End Address Definition Max size 0xEFF20000 0xEFF3FFFF u-boot env (current bank) 128KB 0xEFF00000 0xEFF1FFFF FMAN Ucode (current bank) 128KB 0xEFE00000 0xEFE3FFFF QE firmware (current bank) 256KB -0xED300000 0xEFEFFFFF rootfs (alt bank) 44MB +0xED300000 0xEFDFFFFF rootfs (alt bank) 44MB +0xED000000 0xED2FFFFF Guest image #3 (alternate bank) 3MB +0xECD00000 0xECFFFFFF Guest image #2 (alternate bank) 3MB +0xECA00000 0xECCFFFFF Guest image #1 (alternate bank) 3MB +0xEC900000 0xEC9FFFFF HV config device tree(alt bank) 1MB 0xEC800000 0xEC8FFFFF Hardware device tree (alt bank) 1MB -0xEC020000 0xEC7FFFFF Linux.uImage (alt bank) 7MB + 875KB +0xEC700000 0xEC7FFFFF HV.uImage (alternate bank) 1MB +0xEC020000 0xEC6FFFFF Linux.uImage (alt bank) ~7MB 0xEC000000 0xEC01FFFF RCW (alt bank) 128KB 0xEBF40000 0xEBFFFFFF u-boot (alt bank) 768KB 0xEBF20000 0xEBF3FFFF u-boot env (alt bank) 128KB 0xEBF00000 0xEBF1FFFF FMAN ucode (alt bank) 128KB 0xEBE00000 0xEBE3FFFF QE firmware (alt bank) 256KB -0xE9300000 0xEBEFFFFF rootfs (current bank) 44MB +0xE9300000 0xEBDFFFFF rootfs (current bank) 44MB +0xE9000000 0xE92FFFFF Guest image #3 (current bank) 3MB +0xE8D00000 0xE8FFFFFF Guest image #2 (current bank) 3MB +0xE8A00000 0xE8CFFFFF Guest image #1 (current bank) 3MB +0xE8900000 0xE89FFFFF HV config device tree(cur bank) 1MB 0xE8800000 0xE88FFFFF Hardware device tree (cur bank) 1MB -0xE8020000 0xE86FFFFF Linux.uImage (current bank) 7MB + 875KB +0xE8700000 0xE87FFFFF HV.uImage (current bank) 1MB +0xE8020000 0xE86FFFFF Linux.uImage (current bank) ~7MB 0xE8000000 0xE801FFFF RCW (current bank) 128KB -T1024 Clock frequency ---------------------- +T1024/T1023 Clock frequency +--------------------------- BIN Core DDR Platform FMan Bin1: 1400MHz 1600MT/s 400MHz 700MHz Bin2: 1200MHz 1600MT/s 400MHz 600MHz @@ -155,16 +188,27 @@ Software configurations and board settings b. program u-boot.bin image to NOR flash => tftp 1000000 u-boot.bin => pro off all;era eff40000 efffffff;cp.b 1000000 eff40000 $filesize - set SW1[1:8] = '00010011', SW2[1] = '1', SW3[4] = '0' for NOR boot + on T1024RDB: + set SW1[1:8] = '00010011', SW2[1] = '1', SW3[4] = '0' for NOR boot + on T1023RDB: + set SW1[1:8] = '00010110', SW2[1] = '0', SW3[4] = '0' for NOR boot Switching between default bank0 and alternate bank4 on NOR flash To change boot source to vbank4: - via software: run command 'cpld reset altbank' in u-boot. - via DIP-switch: set SW3[5:7] = '100' + on T1024RDB: + via software: run command 'cpld reset altbank' in u-boot. + via DIP-switch: set SW3[5:7] = '100' + on T1023RDB: + via software: run command 'gpio vbank4' in u-boot. + via DIP-switch: set SW3[5:7] = '100' To change boot source to vbank0: - via software: run command 'cpld reset' in u-boot. - via DIP-Switch: set SW3[5:7] = '000' + on T1024RDB: + via software: run command 'cpld reset' in u-boot. + via DIP-Switch: set SW3[5:7] = '000' + on T1023RDB: + via software: run command 'gpio vbank0' in u-boot. + via DIP-switch: set SW3[5:7] = '000' 2. NAND Boot: a. build PBL image for NAND boot @@ -183,8 +227,11 @@ Software configurations and board settings b. program u-boot-with-spl-pbl.bin to SPI flash => tftp 1000000 u-boot-with-spl-pbl.bin => sf probe 0 - => sf erase 0 f0000 + => sf erase 0 100000 => sf write 1000000 0 $filesize + => tftp 1000000 fsl_fman_ucode_t1024_xx.bin + => sf erase 100000 100000 + => sf write 1000000 110000 20000 set SW1[1:8] = '00100010', SW2[1] ='1' for SPI boot 4. SD Boot: @@ -236,6 +283,15 @@ Start End Definition Size 0x200000 0x27FFFF QE Firmware 512KB(1 block) +NAND Flash memory Map on T1023RDB +------------------------------------------------------------- +Start End Definition Size +0x000000 0x0FFFFF u-boot 1MB +0x100000 0x15FFFF u-boot env 8KB +0x160000 0x17FFFF FMAN Ucode 128KB +0x180000 0x19FFFF QE Firmware 128KB + + SD Card memory Map on T1024RDB ---------------------------------------------------- Block #blocks Definition Size @@ -245,14 +301,17 @@ Block #blocks Definition Size 0x920 0256 QE Firmware 128KB -SPI Flash memory Map on T1024RDB +64MB SPI Flash memory Map on T1024RDB/T1023RDB ---------------------------------------------------- Start End Definition Size 0x000000 0x0FFFFF u-boot img 1MB 0x100000 0x101FFF u-boot env 8KB 0x110000 0x12FFFF FMAN Ucode 128KB 0x130000 0x14FFFF QE Firmware 128KB +0x300000 0x3FFFFF device tree 128KB +0x400000 0x9FFFFF Linux kernel 6MB +0xa00000 0x3FFFFFF rootfs 54MB -For more details, please refer to T1024RDB Reference Manual and access -website www.freescale.com and Freescale QorIQ SDK Infocenter document. +For more details, please refer to T1024RDB Reference Manual +and Freescale QorIQ SDK Infocenter document. diff --git a/board/freescale/t102xrdb/eth_t102xrdb.c b/board/freescale/t102xrdb/eth_t102xrdb.c index f611ff0..f091d75 100644 --- a/board/freescale/t102xrdb/eth_t102xrdb.c +++ b/board/freescale/t102xrdb/eth_t102xrdb.c @@ -56,6 +56,7 @@ int board_eth_init(bd_t *bis) fm_info_set_phy_address(FM1_DTSEC4, RGMII_PHY1_ADDR); switch (srds_s1) { +#ifdef CONFIG_T1024RDB case 0x95: /* set the on-board RGMII2 PHY */ fm_info_set_phy_address(FM1_DTSEC3, RGMII_PHY2_ADDR); @@ -63,10 +64,17 @@ int board_eth_init(bd_t *bis) /* set 10G XFI with Aquantia AQR105 PHY */ fm_info_set_phy_address(FM1_10GEC1, FM1_10GEC1_PHY_ADDR); break; +#endif + case 0x6a: + case 0x6b: case 0x77: case 0x135: /* set the on-board 2.5G SGMII AQR105 PHY */ - fm_info_set_phy_address(FM1_DTSEC3, SGMII_PHY1_ADDR); + fm_info_set_phy_address(FM1_DTSEC3, SGMII_AQR_PHY_ADDR); +#ifdef CONFIG_T1023RDB + /* set the on-board 1G SGMII RTL8211F PHY */ + fm_info_set_phy_address(FM1_DTSEC1, SGMII_RTK_PHY_ADDR); +#endif break; default: printf("SerDes protocol 0x%x is not supported on T102xRDB\n", @@ -81,6 +89,14 @@ int board_eth_init(bd_t *bis) dev = miiphy_get_dev_by_name(DEFAULT_FM_MDIO_NAME); fm_info_set_mdio(i, dev); break; + case PHY_INTERFACE_MODE_SGMII: +#if defined(CONFIG_T1023RDB) + dev = miiphy_get_dev_by_name(DEFAULT_FM_MDIO_NAME); +#elif defined(CONFIG_T1024RDB) + dev = miiphy_get_dev_by_name(DEFAULT_FM_TGEC_MDIO_NAME); +#endif + fm_info_set_mdio(i, dev); + break; case PHY_INTERFACE_MODE_SGMII_2500: dev = miiphy_get_dev_by_name(DEFAULT_FM_TGEC_MDIO_NAME); fm_info_set_mdio(i, dev); @@ -110,8 +126,9 @@ int board_eth_init(bd_t *bis) void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr, enum fm_port port, int offset) { - if ((fm_info_get_enet_if(port) == PHY_INTERFACE_MODE_SGMII_2500) && - (port == FM1_DTSEC3)) { + if (((fm_info_get_enet_if(port) == PHY_INTERFACE_MODE_SGMII_2500) || + (fm_info_get_enet_if(port) == PHY_INTERFACE_MODE_SGMII)) && + (port == FM1_DTSEC3)) { fdt_set_phy_handle(fdt, compat, addr, "sg_2500_aqr105_phy4"); fdt_setprop(fdt, offset, "phy-connection-type", "sgmii-2500", 10); diff --git a/board/freescale/t102xrdb/t1023_rcw.cfg b/board/freescale/t102xrdb/t1023_rcw.cfg new file mode 100644 index 0000000..fa781d6 --- /dev/null +++ b/board/freescale/t102xrdb/t1023_rcw.cfg @@ -0,0 +1,8 @@ +#PBL preamble and RCW header for T1023RDB +aa55aa55 010e0100 +#SerDes Protocol: 0x77 +#Core/DDR: 1400Mhz/1600MT/s with single source clock +0810000e 00000000 00000000 00000000 +3b800003 00000012 e8104000 21000000 +00000000 00000000 00000000 00020800 +00000130 04020200 00000000 00000006 diff --git a/board/freescale/t102xrdb/t102xrdb.c b/board/freescale/t102xrdb/t102xrdb.c index e196f12..f899ef9 100644 --- a/board/freescale/t102xrdb/t102xrdb.c +++ b/board/freescale/t102xrdb/t102xrdb.c @@ -18,11 +18,25 @@ #include <asm/fsl_liodn.h> #include <fm_eth.h> #include "t102xrdb.h" +#ifdef CONFIG_T1024RDB #include "cpld.h" +#endif #include "../common/sleep.h" DECLARE_GLOBAL_DATA_PTR; +#ifdef CONFIG_T1023RDB +enum { + GPIO1_SD_SEL = 0x00020000, /* GPIO1_14, 0: EMMC, 1:SD/MMC */ + GPIO1_EMMC_SEL, + GPIO1_VBANK0, + GPIO1_VBANK4 = 0x00008000, /* GPIO1_16/20/22, 100:vBank4 */ + GPIO1_VBANK_MASK = 0x00008a00, + GPIO1_DIR_OUTPUT = 0x00028a00, + GPIO1_GET_VAL, +}; +#endif + int checkboard(void) { struct cpu_type *cpu = gd->arch.cpu; @@ -34,14 +48,17 @@ int checkboard(void) srds_s1 >>= FSL_CORENET2_RCWSR4_SRDS1_PRTCL_SHIFT; printf("Board: %sRDB, ", cpu->name); - printf("Board rev: 0x%02x CPLD ver: 0x%02x, boot from ", +#ifdef CONFIG_T1024RDB + printf("Board rev: 0x%02x CPLD ver: 0x%02x, ", CPLD_READ(hw_ver), CPLD_READ(sw_ver)); +#endif + printf("boot from "); #ifdef CONFIG_SDCARD puts("SD/MMC\n"); #elif CONFIG_SPIFLASH puts("SPI\n"); -#else +#elif defined(CONFIG_T1024RDB) u8 reg; reg = CPLD_READ(flash_csr); @@ -52,17 +69,26 @@ int checkboard(void) reg = ((reg & CPLD_LBMAP_MASK) >> CPLD_LBMAP_SHIFT); printf("NOR vBank%d\n", reg); } +#elif defined(CONFIG_T1023RDB) +#ifdef CONFIG_NAND + puts("NAND\n"); +#else + printf("NOR vBank%d\n", (t1023rdb_gpio_ctrl(GPIO1_GET_VAL) & + GPIO1_VBANK4) >> 15 ? 4 : 0); +#endif #endif puts("SERDES Reference Clocks:\n"); +#if defined(CONFIG_T1024RDB) if (srds_s1 == 0x95) printf("SD1_CLK1=%s, SD1_CLK2=%s\n", freq[2], freq[0]); else - printf("SD1_CLK1=%s, SD1_CLK2=%s\n", freq[0], freq[0]); + printf("SD1_CLK1=%s, SD1_CLK2=%s\n", freq[0], freq[1]); return 0; } +#ifdef CONFIG_T1024RDB static void board_mux_lane(void) { ccsr_gur_t __iomem *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); @@ -82,6 +108,7 @@ static void board_mux_lane(void) } CPLD_WRITE(boot_override, CPLD_OVERRIDE_MUX_EN); } +#endif int board_early_init_f(void) { @@ -124,7 +151,9 @@ int board_early_init_r(void) #ifdef CONFIG_SYS_DPAA_QBMAN setup_portals(); #endif +#ifdef CONFIG_T1024RDB board_mux_lane(); +#endif return 0; } @@ -170,3 +199,62 @@ int ft_board_setup(void *blob, bd_t *bd) return 0; } + + +#ifdef CONFIG_T1023RDB +static u32 t1023rdb_gpio_ctrl(u32 ctrl_type) +{ + ccsr_gpio_t *pgpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR); + u32 gpioval; + + setbits_be32(&pgpio->gpdir, GPIO1_DIR_OUTPUT); + gpioval = in_be32(&pgpio->gpdat); + + switch (ctrl_type) { + case GPIO1_SD_SEL: + gpioval |= GPIO1_SD_SEL; + break; + case GPIO1_EMMC_SEL: + gpioval &= ~GPIO1_SD_SEL; + break; + case GPIO1_VBANK0: + gpioval &= ~GPIO1_VBANK_MASK; + break; + case GPIO1_VBANK4: + gpioval &= ~GPIO1_VBANK_MASK; + gpioval |= GPIO1_VBANK4; + break; + case GPIO1_GET_VAL: + return gpioval; + default: + break; + } + out_be32(&pgpio->gpdat, gpioval); + + return 0; +} + +static int gpio_cmd(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) +{ + if (argc < 2) + return CMD_RET_USAGE; + if (!strcmp(argv[1], "vbank0")) + t1023rdb_gpio_ctrl(GPIO1_VBANK0); + else if (!strcmp(argv[1], "vbank4")) + t1023rdb_gpio_ctrl(GPIO1_VBANK4); + else if (!strcmp(argv[1], "sd")) + t1023rdb_gpio_ctrl(GPIO1_SD_SEL); + else if (!strcmp(argv[1], "EMMC")) + t1023rdb_gpio_ctrl(GPIO1_EMMC_SEL); + else + return CMD_RET_USAGE; + return 0; +} + +U_BOOT_CMD( + gpio, 2, 0, gpio_cmd, + "for vbank0/vbank4/SD/eMMC switch control in runtime", + "command (e.g. gpio vbank4)" +); +#endif diff --git a/board/freescale/t102xrdb/t102xrdb.h b/board/freescale/t102xrdb/t102xrdb.h index 2f23579..3f5d85a 100644 --- a/board/freescale/t102xrdb/t102xrdb.h +++ b/board/freescale/t102xrdb/t102xrdb.h @@ -9,5 +9,7 @@ void fdt_fixup_board_enet(void *blob); void pci_of_setup(void *blob, bd_t *bd); - +#ifdef CONFIG_T1023RDB +static u32 t1023rdb_gpio_ctrl(u32 ctrl_type); +#endif #endif diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index bd40d6a..af10163 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -11,6 +11,13 @@ #ifndef __T1024RDB_H #define __T1024RDB_H +#if defined(CONFIG_PPC_T1024) +#define CONFIG_T1024RDB +#elif defined(CONFIG_PPC_T1023) +#define CONFIG_T1023RDB +#define CONFIG_SYS_NO_FLASH +#endif + /* High Level Configuration Options */ #define CONFIG_SYS_GENERIC_BOARD #define CONFIG_DISPLAY_BOARDINFO @@ -35,7 +42,9 @@ #define CONFIG_ENV_OVERWRITE /* support deep sleep */ +#ifdef CONFIG_PPC_T1024 #define CONFIG_DEEP_SLEEP +#endif #if defined(CONFIG_DEEP_SLEEP) #define CONFIG_SILENT_CONSOLE #define CONFIG_BOARD_EARLY_INIT_F @@ -43,7 +52,11 @@ #ifdef CONFIG_RAMBOOT_PBL #define CONFIG_SYS_FSL_PBL_PBI board/freescale/t102xrdb/t1024_pbi.cfg +#if defined(CONFIG_PPC_T1024) #define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xrdb/t1024_rcw.cfg +#elif defined(CONFIG_PPC_T1023) +#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xrdb/t1023_rcw.cfg +#endif #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT #define CONFIG_SPL_ENV_SUPPORT #define CONFIG_SPL_SERIAL_SUPPORT @@ -177,7 +190,11 @@ #define CONFIG_ENV_SPI_MODE 0 #define CONFIG_ENV_SIZE 0x2000 /* 8KB */ #define CONFIG_ENV_OFFSET 0x100000 /* 1MB */ +#if defined(CONFIG_T1024RDB) #define CONFIG_ENV_SECT_SIZE 0x10000 +#elif defined(CONFIG_T1023RDB) +#define CONFIG_ENV_SECT_SIZE 0x40000 +#endif #elif defined(CONFIG_SDCARD) #define CONFIG_SYS_EXTRA_ENV_RELOC #define CONFIG_ENV_IS_IN_MMC @@ -188,7 +205,11 @@ #define CONFIG_SYS_EXTRA_ENV_RELOC #define CONFIG_ENV_IS_IN_NAND #define CONFIG_ENV_SIZE 0x2000 +#if defined(CONFIG_T1024RDB) #define CONFIG_ENV_OFFSET (2 * CONFIG_SYS_NAND_BLOCK_SIZE) +#elif defined(CONFIG_T1023RDB) +#define CONFIG_ENV_OFFSET (10 * CONFIG_SYS_NAND_BLOCK_SIZE) +#endif #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE) #define CONFIG_ENV_IS_IN_REMOTE #define CONFIG_ENV_ADDR 0xffe20000 @@ -209,7 +230,7 @@ unsigned long get_board_ddr_clk(void); #endif #define CONFIG_SYS_CLK_FREQ 100000000 -#define CONFIG_DDR_CLK_FREQ 66660000 +#define CONFIG_DDR_CLK_FREQ 100000000 /* * These can be toggled for performance analysis, otherwise use default. @@ -224,6 +245,7 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #endif +#define CONFIG_CMD_MEMTEST #define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x00400000 #define CONFIG_SYS_ALT_MEMTEST @@ -265,13 +287,18 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR) +#define CONFIG_FSL_DDR_INTERACTIVE +#if defined(CONFIG_T1024RDB) #define CONFIG_DDR_SPD #define CONFIG_SYS_FSL_DDR3 - #define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x51 - #define CONFIG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */ +#elif defined(CONFIG_T1023RDB) +#define CONFIG_SYS_FSL_DDR4 +#define CONFIG_SYS_DDR_RAW_TIMING +#define CONFIG_SYS_SDRAM_SIZE 2048 +#endif /* * IFC Definitions @@ -291,7 +318,12 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_NOR_AMASK IFC_AMASK(128*1024*1024) /* NOR Flash Timing Params */ +#if defined(CONFIG_T1024RDB) #define CONFIG_SYS_NOR_CSOR CSOR_NAND_TRHZ_80 +#elif defined(CONFIG_T1023RDB) +#define CONFIG_SYS_NOR_CSOR (CSOR_NOR_ADM_SHIFT(4) | \ + CSOR_NAND_TRHZ_80 | CSOR_NOR_ADM_SHFT_MODE_EN) +#endif #define CONFIG_SYS_NOR_FTIM0 (FTIM0_NOR_TACSE(0x4) | \ FTIM0_NOR_TEADC(0x5) | \ FTIM0_NOR_TEAHC(0x5)) @@ -315,6 +347,7 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_FLASH_EMPTY_INFO #define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE_PHYS} +#ifdef CONFIG_T1024RDB /* CPLD on IFC */ #define CONFIG_SYS_CPLD_BASE 0xffdf0000 #define CONFIG_SYS_CPLD_BASE_PHYS (0xf00000000ull | CONFIG_SYS_CPLD_BASE) @@ -336,6 +369,7 @@ unsigned long get_board_ddr_clk(void); FTIM2_GPCM_TCH(0x8) | \ FTIM2_GPCM_TWP(0x1f)) #define CONFIG_SYS_CS2_FTIM3 0x0 +#endif /* NAND Flash on IFC */ #define CONFIG_NAND_FSL_IFC @@ -352,6 +386,7 @@ unsigned long get_board_ddr_clk(void); | CSPR_V) #define CONFIG_SYS_NAND_AMASK IFC_AMASK(64*1024) +#if defined(CONFIG_T1024RDB) #define CONFIG_SYS_NAND_CSOR (CSOR_NAND_ECC_ENC_EN /* ECC on encode */ \ | CSOR_NAND_ECC_DEC_EN /* ECC on decode */ \ | CSOR_NAND_ECC_MODE_4 /* 4-bit ECC */ \ @@ -359,9 +394,17 @@ unsigned long get_board_ddr_clk(void); | CSOR_NAND_PGS_4K /* Page Size = 4K */ \ | CSOR_NAND_SPRZ_224 /* Spare size = 224 */ \ | CSOR_NAND_PB(64)) /*Pages Per Block = 64*/ +#define CONFIG_SYS_NAND_BLOCK_SIZE (512 * 1024) +#elif defined(CONFIG_T1023RDB) +#define CONFIG_SYS_NAND_CSOR (CSOR_NAND_RAL_3 /* RAL 3Bytes */ \ + | CSOR_NAND_RAL_3 /* RAL 3Bytes */ \ + | CSOR_NAND_PGS_2K /* Page Size = 2K */ \ + | CSOR_NAND_SPRZ_128 /* Spare size = 128 */ \ + | CSOR_NAND_PB(64)) /*Pages Per Block = 64*/ +#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) +#endif #define CONFIG_SYS_NAND_ONFI_DETECTION - /* ONFI NAND Flash mode0 Timing Params */ #define CONFIG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x07) | \ FTIM0_NAND_TWP(0x18) | \ @@ -382,8 +425,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_MTD_NAND_VERIFY_WRITE #define CONFIG_CMD_NAND -#define CONFIG_SYS_NAND_BLOCK_SIZE (512 * 1024) - #if defined(CONFIG_NAND) #define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NAND_CSPR_EXT #define CONFIG_SYS_CSPR0 CONFIG_SYS_NAND_CSPR @@ -538,6 +579,7 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_FSL_ESPI #define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_STMICRO +#define CONFIG_SPI_FLASH_SPANSION #define CONFIG_CMD_SF #define CONFIG_SPI_FLASH_BAR #define CONFIG_SF_DEFAULT_SPEED 10000000 @@ -737,8 +779,13 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_QE_FW_ADDR (512 * 0x920) #elif defined(CONFIG_NAND) #define CONFIG_SYS_QE_FMAN_FW_IN_NAND +#if defined(CONFIG_T1024RDB) #define CONFIG_SYS_FMAN_FW_ADDR (3 * CONFIG_SYS_NAND_BLOCK_SIZE) #define CONFIG_SYS_QE_FW_ADDR (4 * CONFIG_SYS_NAND_BLOCK_SIZE) +#elif defined(CONFIG_T1023RDB) +#define CONFIG_SYS_FMAN_FW_ADDR (11 * CONFIG_SYS_NAND_BLOCK_SIZE) +#define CONFIG_SYS_QE_FW_ADDR (12 * CONFIG_SYS_NAND_BLOCK_SIZE) +#endif #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE) /* * Slave has no ucode locally, it can fetch this from remote. When implementing @@ -763,10 +810,16 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_PHYLIB_10G #define CONFIG_PHY_REALTEK #define CONFIG_PHY_AQUANTIA +#if defined(CONFIG_T1024RDB) #define RGMII_PHY1_ADDR 0x2 #define RGMII_PHY2_ADDR 0x6 -#define SGMII_PHY1_ADDR 0x2 +#define SGMII_AQR_PHY_ADDR 0x2 #define FM1_10GEC1_PHY_ADDR 0x1 +#elif defined(CONFIG_T1023RDB) +#define RGMII_PHY1_ADDR 0x1 +#define SGMII_RTK_PHY_ADDR 0x3 +#define SGMII_AQR_PHY_ADDR 0x2 +#endif #endif #ifdef CONFIG_FMAN_ENET @@ -856,16 +909,16 @@ unsigned long get_board_ddr_clk(void); */ #define CONFIG_ROOTPATH "/opt/nfsroot" #define CONFIG_BOOTFILE "uImage" -#define CONFIG_UBOOTPATH "u-boot.bin" /* U-Boot image on TFTP server */ +#define CONFIG_UBOOTPATH u-boot.bin /* U-Boot image on TFTP server */ #define CONFIG_LOADADDR 1000000 /* default location for tftp, bootm */ #define CONFIG_BOOTDELAY 10 /* -1 disables auto-boot */ #define CONFIG_BAUDRATE 115200 #define __USB_PHY_TYPE utmi #ifdef CONFIG_PPC_T1024 -#define CONFIG_BOARDNAME "t1024rdb" +#define CONFIG_BOARDNAME t1024rdb #else -#define CONFIG_BOARDNAME "t1023rdb" +#define CONFIG_BOARDNAME t1023rdb #endif #define CONFIG_EXTRA_ENV_SETTINGS \ -- 2.1.0.27.g96db324

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[U-Boot] [PATCH] serial/serial_arc: set registers address during compilation
by Alexey Brodkin 16 Mar '15

16 Mar '15

Being global variable with 0 value it falls into .bss area which we may only use after relocation to RAM. And right after relocation we zero .bss - effectively cleaing register address set for early console. Now with pre-set value "regs" variable is no longer in .bss and this way safely survives relocation. Signed-off-by: Alexey Brodkin <abrodkin(a)synopsys.com> --- drivers/serial/serial_arc.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/serial/serial_arc.c b/drivers/serial/serial_arc.c index 2ddbf32..0ee8ce5 100644 --- a/drivers/serial/serial_arc.c +++ b/drivers/serial/serial_arc.c @@ -28,7 +28,7 @@ struct arc_serial_regs { #define UART_OVERFLOW_ERR (1 << 1) #define UART_TXEMPTY (1 << 7) -struct arc_serial_regs *regs; +struct arc_serial_regs *regs = (struct arc_serial_regs *)CONFIG_ARC_UART_BASE; static void arc_serial_setbrg(void) { @@ -60,7 +60,6 @@ static void arc_serial_setbrg(void) static int arc_serial_init(void) { - regs = (struct arc_serial_regs *)CONFIG_ARC_UART_BASE; serial_setbrg(); return 0; } -- 2.1.0

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