March 2015 - U-Boot

[U-Boot] Kernel to U-boot messaging and vice versa.
by Dev 17 Mar '15

17 Mar '15

Hello, I am new to U-boot development. We are using U-Boot 1.1.4 on a MIPS 74Kc QCA 9557 processor, which is running Linux Kernel 2.6.32.27. We have a situation were our firmware keeps hanging due to some issues. We are looking into a solution where U-boot and Kernel keep communicating with each other every some minutes. If U-boot finds that there is no communication, it will reset the board. I understand that once the Linux Kernel is booted, the bootloader is not there anymore. BUT, is there any way by modifying the Linux Kernel, we can achieve periodic U-boot to Kernel communication. Thanks, -Dev

3 2

[U-Boot] [RFC PATCH] usb: dwc2: handle bcm2835 phys->virt address translations
by Stephen Warren 17 Mar '15

17 Mar '15

BCM2835 bus addresses use the top 2 bits to determine whether peripherals use or bypass the GPU L1 and L2 cache. BCM2835-ARM-Peripherals.pdf states that: 0: L1 & L2 cached 4: L2 cache coherent (non allocaing) 8: L2 cached only c: Direct uncached. That document also states that "Software accessing RAM using the DMA engines must use bus addresses (base at 0xc0000000). However, this appears to be incorrect since it does not work in practice on the bcm2835 (although it does on bcm2836). "usb start" causes some EABI function to call raise(8), presumably due to corrupted USB IN data (the converse is true on bcm2836; a value of 4 causes signals). However, I haven't investigated the cause. A value of 4 matches what the RPI Foundation's kernel; see the definition of _REAL_BUS_OFFSET in arch/arm/mach-bcm2708/include/mach/memory.h. With the code updated to implement a phys->bus translation by setting the top two bits of DWC2 DMA addresses to 4, USB keyboard support appears stable. A similar change is made for bcm2836 (RPi 2). I can't justify this value since it doesn't match the RPi Foundation kernel. However, it does appear to work for the built-in USB Ethernet at least. Ideally, the bcm2835 SoC support would provide some common function for any DMA-capable driver to call to perform the phys->bus translation, rather than placing ifdefs in each driver file. However, I can't find such a standard function in U-Boot. I'm not sure if e.g. SDHCI needs this change too? It appears to work fine without... Cc: Eric Anholt <eric(a)anholt.net> Cc: Gordon Hollingworth <gordon(a)holliweb.co.uk> Signed-off-by: Stephen Warren <swarren(a)wwwdotorg.org> --- (For those CC'd: note that this is a patch for U-Boot) drivers/usb/host/dwc2.c | 22 +++++++++++++++++++++- 1 file changed, 21 insertions(+), 1 deletion(-) diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c index e370d29ffc8e..f647461eabbb 100644 --- a/drivers/usb/host/dwc2.c +++ b/drivers/usb/host/dwc2.c @@ -752,6 +752,7 @@ int chunk_msg(struct usb_device *dev, unsigned long pipe, int *pid, int in, uint32_t xfer_len; uint32_t num_packets; int stop_transfer = 0; + uint32_t dma_addr; debug("%s: msg: pipe %lx pid %d in %d len %d\n", __func__, pipe, *pid, in, len); @@ -792,7 +793,26 @@ int chunk_msg(struct usb_device *dev, unsigned long pipe, int *pid, int in, if (!in) memcpy(aligned_buffer, (char *)buffer + done, len); - writel((uint32_t)aligned_buffer, &hc_regs->hcdma); + dma_addr = (uint32_t)aligned_buffer; +#if defined(CONFIG_BCM2836) + /* + * BCM2836 bus addresses use the top 2 bits to determine + * whether peripherals use or bypass the GPU L1 and L2 cache. + * While this doesn't match the value the RPi Foundation + * kernel uses, it does work in practice for U-Boot. + */ + dma_addr |= 0xc0000000; +#elif defined(CONFIG_BCM2835) + /* + * BCM2835 bus addresses use the top 2 bits to determine + * whether peripherals use or bypass the GPU L1 and L2 cache. + * This phys->virt mapping matches what the RPI Foundation's + * kernel does; see the definition of _REAL_BUS_OFFSET in + * arch/arm/mach-bcm2708/include/mach/memory.h. + */ + dma_addr |= 0x40000000; +#endif + writel(dma_addr, &hc_regs->hcdma); /* Set host channel enable after all other setup is complete. */ clrsetbits_le32(&hc_regs->hcchar, DWC2_HCCHAR_MULTICNT_MASK | -- 1.9.1

4 14

[U-Boot] [PATCH v3] mpc85xx/T104xD4RDB: Add T104xD4RDB boards support
by Vijay Rai 17 Mar '15

17 Mar '15

T1040D4RDB is a Freescale reference board that hosts the T1040 SoC. T1040D4RDB is re-designed T1040RDB board with following changes : - Support of DDR4 memory - Support of 0x66 serdes protocol which can support following interfaces - 2 RGMII's on DTSEC4, DTSEC5 - 1 SGMII on DTSEC3 - Support of QE-TDM Similarily T1042D4RDB is a Freescale reference board that hosts the T1040 SoC. T1042D4RDB is re-designed T1042RDB board with following changes : - Support of DDR4 memory - Support for 0x86 serdes protocol which can support following interfaces - 2 RGMII's on DTSEC4, DTSEC5 - 3 SGMII on DTSEC1, DTSEC2 & DTSEC3 - Support of DIU Signed-off-by: Vijay Rai <vijay.rai(a)freescale.com> Signed-off-by: Priyanka Jain <Priyanka.Jain(a)freescale.com> --- changes from v2 : - removes checkpatch error board/freescale/t104xrdb/MAINTAINERS | 8 ++++++ board/freescale/t104xrdb/ddr.c | 6 ++++ board/freescale/t104xrdb/ddr.h | 13 ++++++++- board/freescale/t104xrdb/eth.c | 20 +++++++++++-- board/freescale/t104xrdb/t1040d4_rcw.cfg | 7 +++++ board/freescale/t104xrdb/t1042d4_rcw.cfg | 7 +++++ board/freescale/t104xrdb/t104xrdb.c | 17 +++++++++-- configs/T1040D4RDB_NAND_defconfig | 5 ++++ configs/T1040D4RDB_SDCARD_defconfig | 5 ++++ configs/T1040D4RDB_SPIFLASH_defconfig | 5 ++++ configs/T1040D4RDB_defconfig | 4 +++ configs/T1042D4RDB_NAND_defconfig | 5 ++++ configs/T1042D4RDB_SDCARD_defconfig | 5 ++++ configs/T1042D4RDB_SPIFLASH_defconfig | 5 ++++ configs/T1042D4RDB_defconfig | 4 +++ include/configs/T104xRDB.h | 46 ++++++++++++++++++++++++------ 16 files changed, 148 insertions(+), 14 deletions(-) create mode 100644 board/freescale/t104xrdb/t1040d4_rcw.cfg create mode 100644 board/freescale/t104xrdb/t1042d4_rcw.cfg create mode 100644 configs/T1040D4RDB_NAND_defconfig create mode 100644 configs/T1040D4RDB_SDCARD_defconfig create mode 100644 configs/T1040D4RDB_SPIFLASH_defconfig create mode 100644 configs/T1040D4RDB_defconfig create mode 100644 configs/T1042D4RDB_NAND_defconfig create mode 100644 configs/T1042D4RDB_SDCARD_defconfig create mode 100644 configs/T1042D4RDB_SPIFLASH_defconfig create mode 100644 configs/T1042D4RDB_defconfig diff --git a/board/freescale/t104xrdb/MAINTAINERS b/board/freescale/t104xrdb/MAINTAINERS index 13d9be9..32e044f 100644 --- a/board/freescale/t104xrdb/MAINTAINERS +++ b/board/freescale/t104xrdb/MAINTAINERS @@ -6,7 +6,13 @@ F: include/configs/T104xRDB.h F: configs/T1040RDB_defconfig F: configs/T1040RDB_NAND_defconfig F: configs/T1040RDB_SPIFLASH_defconfig +F: configs/T1040D4RDB_defconfig +F: configs/T1040D4RDB_NAND_defconfig +F: configs/T1040D4RDB_SPIFLASH_defconfig F: configs/T1042RDB_defconfig +F: configs/T1042D4RDB_defconfig +F: configs/T1042D4RDB_NAND_defconfig +F: configs/T1042D4RDB_SPIFLASH_defconfig F: configs/T1042RDB_PI_defconfig F: configs/T1042RDB_PI_NAND_defconfig F: configs/T1042RDB_PI_SPIFLASH_defconfig @@ -15,6 +21,8 @@ T1040RDB_SDCARD BOARD #M: - S: Maintained F: configs/T1040RDB_SDCARD_defconfig +F: configs/T1040D4RDB_SDCARD_defconfig +F: configs/T1042D4RDB_SDCARD_defconfig F: configs/T1042RDB_PI_SDCARD_defconfig T1040RDB_SECURE_BOOT BOARD diff --git a/board/freescale/t104xrdb/ddr.c b/board/freescale/t104xrdb/ddr.c index e1148e5..3c4eabf 100644 --- a/board/freescale/t104xrdb/ddr.c +++ b/board/freescale/t104xrdb/ddr.c @@ -91,8 +91,14 @@ found: popts->zq_en = 1; /* DHC_EN =1, ODT = 75 Ohm */ +#ifdef CONFIG_SYS_FSL_DDR4 + popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_80ohm); + popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_80ohm) | + DDR_CDR2_VREF_OVRD(70); /* Vref = 70% */ +#else popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_75ohm); popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_75ohm); +#endif } #if defined(CONFIG_DEEP_SLEEP) diff --git a/board/freescale/t104xrdb/ddr.h b/board/freescale/t104xrdb/ddr.h index ab1c32d..eb6ec70 100644 --- a/board/freescale/t104xrdb/ddr.h +++ b/board/freescale/t104xrdb/ddr.h @@ -28,6 +28,13 @@ static const struct board_specific_parameters udimm0[] = { * num| hi| rank| clk| wrlvl | wrlvl * ranks| mhz| GB |adjst| start | ctl2 */ +#ifdef CONFIG_SYS_FSL_DDR4 + {2, 1666, 0, 4, 7, 0x0808090B, 0x0C0D0E0A}, + {2, 1900, 0, 4, 6, 0x08080A0C, 0x0D0E0F0A}, + {1, 1666, 0, 4, 6, 0x0708090B, 0x0C0D0E09}, + {1, 1900, 0, 4, 6, 0x08080A0C, 0x0D0E0F0A}, + {1, 2200, 0, 4, 7, 0x08090A0D, 0x0F0F100C}, +#elif defined(CONFIG_SYS_FSL_DDR3) {2, 833, 4, 4, 6, 0x06060607, 0x08080807}, {2, 833, 0, 4, 6, 0x06060607, 0x08080807}, {2, 1350, 4, 4, 7, 0x0708080A, 0x0A0B0C09}, @@ -40,10 +47,14 @@ static const struct board_specific_parameters udimm0[] = { {1, 1350, 0, 4, 7, 0x0708080A, 0x0A0B0C09}, {1, 1666, 4, 4, 7, 0x0808090B, 0x0C0D0E0A}, {1, 1666, 0, 4, 7, 0x0808090B, 0x0C0D0E0A}, +#else +#error DDR type not defined +#endif {} }; +#endif + static const struct board_specific_parameters *udimms[] = { udimm0, }; -#endif diff --git a/board/freescale/t104xrdb/eth.c b/board/freescale/t104xrdb/eth.c index 7581a4cd..9c4e922 100644 --- a/board/freescale/t104xrdb/eth.c +++ b/board/freescale/t104xrdb/eth.c @@ -43,9 +43,11 @@ int board_eth_init(bd_t *bis) int idx = i - FM1_DTSEC1; switch (fm_info_get_enet_if(i)) { -#ifdef CONFIG_T1040RDB +#if defined(CONFIG_T1040RDB) || (CONFIG_T1040D4RDB) case PHY_INTERFACE_MODE_SGMII: - /* T1040RDB only supports SGMII on DTSEC3 */ + /* T1040RDB & T1040D4RDB only supports SGMII on + * DTSEC3 + */ fm_info_set_phy_address(FM1_DTSEC3, CONFIG_SYS_SGMII1_PHY_ADDR); break; @@ -60,6 +62,20 @@ int board_eth_init(bd_t *bis) CONFIG_SYS_SGMII1_PHY_ADDR); break; #endif +#ifdef CONFIG_T1042D4RDB + case PHY_INTERFACE_MODE_SGMII: + /* T1042D4RDB supports SGMII on DTSEC1, DTSEC2 + * & DTSEC3 + */ + if (FM1_DTSEC1 == i) + phy_addr = CONFIG_SYS_SGMII1_PHY_ADDR; + if (FM1_DTSEC2 == i) + phy_addr = CONFIG_SYS_SGMII2_PHY_ADDR; + if (FM1_DTSEC3 == i) + phy_addr = CONFIG_SYS_SGMII3_PHY_ADDR; + fm_info_set_phy_address(i, phy_addr); + break; +#endif case PHY_INTERFACE_MODE_RGMII: if (FM1_DTSEC4 == i) phy_addr = CONFIG_SYS_RGMII1_PHY_ADDR; diff --git a/board/freescale/t104xrdb/t1040d4_rcw.cfg b/board/freescale/t104xrdb/t1040d4_rcw.cfg new file mode 100644 index 0000000..3300c18 --- /dev/null +++ b/board/freescale/t104xrdb/t1040d4_rcw.cfg @@ -0,0 +1,7 @@ +#PBL preamble and RCW header +aa55aa55 010e0100 +# serdes protocol 0x66 +0c18000e 0e000000 00000000 00000000 +66000002 80000002 e8106000 01000000 +00000000 00000000 00000000 00032810 +00000000 0342500f 00000000 00000000 diff --git a/board/freescale/t104xrdb/t1042d4_rcw.cfg b/board/freescale/t104xrdb/t1042d4_rcw.cfg new file mode 100644 index 0000000..db4d52f --- /dev/null +++ b/board/freescale/t104xrdb/t1042d4_rcw.cfg @@ -0,0 +1,7 @@ +#PBL preamble and RCW header +aa55aa55 010e0100 +# serdes protocol 0x86 +0c18000e 0e000000 00000000 00000000 +86000002 80000002 ec027000 01000000 +00000000 00000000 00000000 00032810 +00000000 0342500f 00000000 00000000 diff --git a/board/freescale/t104xrdb/t104xrdb.c b/board/freescale/t104xrdb/t104xrdb.c index 9cd5e15..9d12942 100644 --- a/board/freescale/t104xrdb/t104xrdb.c +++ b/board/freescale/t104xrdb/t104xrdb.c @@ -27,6 +27,10 @@ int checkboard(void) { struct cpu_type *cpu = gd->arch.cpu; u8 sw; + ccsr_gur_t __iomem *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); + u32 srds_s1; + + srds_s1 = in_be32(&gur->rcwsr[4]) >> 24; printf("Board: %sRDB\n", cpu->name); printf("Board rev: 0x%02x CPLD ver: 0x%02x, ", @@ -40,6 +44,16 @@ int checkboard(void) else printf("Unsupported Bank=%x\n", sw); + printf("SERDES Reference : 0x%X\n", srds_s1); + + if (srds_s1 == 0x86) + /* choose SGMII */ + CPLD_WRITE(misc_ctl_status, CPLD_READ(misc_ctl_status) | 0x80); + + if (srds_s1 == 0x8E) + /* choose SGMII & Aurora */ + CPLD_WRITE(misc_ctl_status, CPLD_READ(misc_ctl_status) | 0x82); + return 0; } @@ -49,8 +63,7 @@ int board_early_init_f(void) if (is_warm_boot()) fsl_dp_disable_console(); #endif - - return 0; +return 0; } int board_early_init_r(void) diff --git a/configs/T1040D4RDB_NAND_defconfig b/configs/T1040D4RDB_NAND_defconfig new file mode 100644 index 0000000..72b046b --- /dev/null +++ b/configs/T1040D4RDB_NAND_defconfig @@ -0,0 +1,5 @@ +CONFIG_SPL=y +CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,NAND,T104XD4RDB" ++S:CONFIG_PPC=y ++S:CONFIG_MPC85xx=y ++S:CONFIG_TARGET_T104XRDB=y diff --git a/configs/T1040D4RDB_SDCARD_defconfig b/configs/T1040D4RDB_SDCARD_defconfig new file mode 100644 index 0000000..9e63214 --- /dev/null +++ b/configs/T1040D4RDB_SDCARD_defconfig @@ -0,0 +1,5 @@ +CONFIG_SPL=y +CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD,T104XD4RDB" ++S:CONFIG_PPC=y ++S:CONFIG_MPC85xx=y ++S:CONFIG_TARGET_T104XRDB=y diff --git a/configs/T1040D4RDB_SPIFLASH_defconfig b/configs/T1040D4RDB_SPIFLASH_defconfig new file mode 100644 index 0000000..e0ab015 --- /dev/null +++ b/configs/T1040D4RDB_SPIFLASH_defconfig @@ -0,0 +1,5 @@ +CONFIG_SPL=y +CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH,T104XD4RDB" ++S:CONFIG_PPC=y ++S:CONFIG_MPC85xx=y ++S:CONFIG_TARGET_T104XRDB=y diff --git a/configs/T1040D4RDB_defconfig b/configs/T1040D4RDB_defconfig new file mode 100644 index 0000000..d650ab6 --- /dev/null +++ b/configs/T1040D4RDB_defconfig @@ -0,0 +1,4 @@ +CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040D4RDB,T104XD4RDB" +CONFIG_PPC=y +CONFIG_MPC85xx=y +CONFIG_TARGET_T104XRDB=y diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig new file mode 100644 index 0000000..5e33654 --- /dev/null +++ b/configs/T1042D4RDB_NAND_defconfig @@ -0,0 +1,5 @@ +CONFIG_SPL=y +CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,NAND,T104XD4RDB" ++S:CONFIG_PPC=y ++S:CONFIG_MPC85xx=y ++S:CONFIG_TARGET_T104XRDB=y diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig new file mode 100644 index 0000000..7851a8b --- /dev/null +++ b/configs/T1042D4RDB_SDCARD_defconfig @@ -0,0 +1,5 @@ +CONFIG_SPL=y +CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD,T104XD4RDB" ++S:CONFIG_PPC=y ++S:CONFIG_MPC85xx=y ++S:CONFIG_TARGET_T104XRDB=y diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig new file mode 100644 index 0000000..536ea79 --- /dev/null +++ b/configs/T1042D4RDB_SPIFLASH_defconfig @@ -0,0 +1,5 @@ +CONFIG_SPL=y +CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH,T104XD4RDB" ++S:CONFIG_PPC=y ++S:CONFIG_MPC85xx=y ++S:CONFIG_TARGET_T104XRDB=y diff --git a/configs/T1042D4RDB_defconfig b/configs/T1042D4RDB_defconfig new file mode 100644 index 0000000..715697f --- /dev/null +++ b/configs/T1042D4RDB_defconfig @@ -0,0 +1,4 @@ +CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042D4RDB,T104XD4RDB" +CONFIG_PPC=y +CONFIG_MPC85xx=y +CONFIG_TARGET_T104XRDB=y diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 5263318..111bbfb 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -29,6 +29,14 @@ #ifdef CONFIG_T1042RDB #define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t104xrdb/t1042_rcw.cfg #endif +#ifdef CONFIG_T1040D4RDB +#define CONFIG_SYS_FSL_PBL_RCW \ +$(SRCTREE)/board/freescale/t104xrdb/t1040d4_rcw.cfg +#endif +#ifdef CONFIG_T1042D4RDB +#define CONFIG_SYS_FSL_PBL_RCW \ +$(SRCTREE)/board/freescale/t104xrdb/t1042d4_rcw.cfg +#endif #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT #define CONFIG_SPL_ENV_SUPPORT @@ -219,8 +227,14 @@ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) +#ifdef CONFIG_T104XD4RDB +#define CONFIG_SYS_FSL_DDR4 +#endif + #define CONFIG_DDR_SPD +#ifndef CONFIG_SYS_FSL_DDR4 #define CONFIG_SYS_FSL_DDR3 +#endif #define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x51 @@ -278,7 +292,7 @@ #define CPLD_LBMAP_DFLTBANK 0x40 /* BANK OR | BANK0 */ #define CPLD_LBMAP_RESET 0xFF #define CPLD_LBMAP_SHIFT 0x03 -#ifdef CONFIG_T1042RDB_PI +#if defined(CONFIG_T1042RDB_PI) || defined(CONFIG_T104XD4RDB) #define CPLD_DIU_SEL_DFP 0x80 #endif @@ -448,7 +462,7 @@ #define CONFIG_SYS_HUSH_PARSER #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " -#ifdef CONFIG_T1042RDB_PI +#if defined(CONFIG_T1042RDB_PI) || defined(CONFIG_T104XD4RDB) /* Video */ #define CONFIG_FSL_DIU_FB @@ -493,11 +507,11 @@ /* I2C bus multiplexer */ #define I2C_MUX_PCA_ADDR 0x70 -#if defined(CONFIG_T1040RDB) || defined(CONFIG_T1042RDB) +#if defined(CONFIG_T104xRDB) || defined(CONFIG_T104XD4RDB) #define I2C_MUX_CH_DEFAULT 0x8 #endif -#ifdef CONFIG_T1042RDB_PI +#if defined(CONFIG_T1042RDB_PI) || defined(CONFIG_T104XD4RDB) /* LDI/DVI Encoder for display */ #define CONFIG_SYS_I2C_LDI_ADDR 0x38 #define CONFIG_SYS_I2C_DVI_ADDR 0x75 @@ -666,7 +680,7 @@ #define CONFIG_SYS_DPAA_FMAN #define CONFIG_SYS_DPAA_PME -#if defined(CONFIG_T1040RDB) || defined(CONFIG_T1042RDB) +#if defined(CONFIG_T104xRDB) || defined(CONFIG_T104XD4RDB) #define CONFIG_QE #define CONFIG_U_QE #endif @@ -695,7 +709,7 @@ #define CONFIG_SYS_FMAN_FW_ADDR 0xEFF00000 #endif -#if defined(CONFIG_T1040RDB) || defined(CONFIG_T1042RDB) +#if defined(CONFIG_T104xRDB) || defined(CONFIG_T104XD4RDB) #if defined(CONFIG_SPIFLASH) #define CONFIG_SYS_QE_FW_ADDR 0x130000 #elif defined(CONFIG_SDCARD) @@ -720,10 +734,20 @@ #ifdef CONFIG_FMAN_ENET #if defined(CONFIG_T1040RDB) || defined(CONFIG_T1042RDB) -#define CONFIG_SYS_SGMII1_PHY_ADDR 0x03 +#define CONFIG_SYS_SGMII1_PHY_ADDR 0x03 +#elif defined(CONFIG_T1040D4RDB) || defined(CONFIG_T1042D4RDB) +#define CONFIG_SYS_SGMII1_PHY_ADDR 0x02 +#define CONFIG_SYS_SGMII2_PHY_ADDR 0x03 +#define CONFIG_SYS_SGMII3_PHY_ADDR 0x01 +#endif + +#ifdef CONFIG_T104XD4RDB +#define CONFIG_SYS_RGMII1_PHY_ADDR 0x04 +#define CONFIG_SYS_RGMII2_PHY_ADDR 0x05 +#else +#define CONFIG_SYS_RGMII1_PHY_ADDR 0x01 +#define CONFIG_SYS_RGMII2_PHY_ADDR 0x02 #endif -#define CONFIG_SYS_RGMII1_PHY_ADDR 0x01 -#define CONFIG_SYS_RGMII2_PHY_ADDR 0x02 /* Enable VSC9953 L2 Switch driver on T1040 SoC */ #ifdef CONFIG_T1040RDB @@ -842,6 +866,10 @@ #define FDTFILE "t1042rdb_pi/t1042rdb_pi.dtb" #elif defined(CONFIG_T1042RDB) #define FDTFILE "t1042rdb/t1042rdb.dtb" +#elif defined(CONFIG_T1040D4RDB) +#define FDTFILE "t1042rdb/t1040d4rdb.dtb" +#elif defined(CONFIG_T1042D4RDB) +#define FDTFILE "t1042rdb/t1042d4rdb.dtb" #endif #ifdef CONFIG_FSL_DIU_FB -- 1.7.9.5

2 1

[U-Boot] [PATCH] mmc: fsl_esdhc fix register offset
by Peng Fan 17 Mar '15

17 Mar '15

Commit f022d36e8a4517b2a9d25ff2d75bd2459d0c68b1 introduces error register offset. Change the "char reserved3[59]" to "char reserved3[56]". Signed-off-by: Peng Fan <Peng.Fan(a)freescale.com> --- drivers/mmc/fsl_esdhc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index c5e270d..db4d251 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -56,7 +56,7 @@ struct fsl_esdhc { uint adsaddr; /* ADMA system address register */ char reserved2[100]; /* reserved */ uint vendorspec; /* Vendor Specific register */ - char reserved3[59]; /* reserved */ + char reserved3[56]; /* reserved */ uint hostver; /* Host controller version register */ char reserved4[4]; /* reserved */ uint dmaerraddr; /* DMA error address register */ -- 1.8.4

6 14

[U-Boot] [PATCH] odroid: defconfig: fix build break caused by missing dts
by Przemyslaw Marczak 17 Mar '15

17 Mar '15

The build break was caused by one of my previous commit: 'odroid: defconfig: disable memset at malloc init' It removes the dts from odroid defconfig - rebase mistake. Signed-off-by: Przemyslaw Marczak <p.marczak(a)samsung.com> Cc: Minkyu Kang <mk7.kang(a)samsung.com> --- configs/odroid_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/odroid_defconfig b/configs/odroid_defconfig index cfb29e0..d32b5b5 100644 --- a/configs/odroid_defconfig +++ b/configs/odroid_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_EXYNOS=y CONFIG_TARGET_ODROID=y CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="exynos4412-odroid" CONFIG_DM_I2C=y CONFIG_DM_I2C_COMPAT=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -- 1.9.1

4 4

[U-Boot] DRAM initialization hangs on MX28EVK rev. D
by Adrien Decostre 17 Mar '15

17 Mar '15

Dear all, I am quite new to uboot and I am experimenting it on a iMX28 EVK board (rev. D). I am building the uboot (2014.07 version) by means of buildroot (version 2014.08) and I am using the standard mxs-bootlet package provided by buildroot. When trying to boot the EVK, it hangs after DRAM initialization as shown below. The EVK itself seems ok since barebox (also built with buildroot) can successfully starts up. I have read that such problem has been seem on iMX28 EVK rev A but I am not aware of any DDR related issue on the iMX28 EVK rev D board. Would anyone have already seen such issue and know if some patches are required in uboot? Thanks in advance for any help or suggestion Best regards Adrien Uboot log: PowerPrep start initialize power... Battery Voltage = 2.21V No battery or bad battery detected!!!.Disabling battery voltage measurements./r/nMar 13 201515:40:12 FRAC 0x92925552 memory type is DDR2 Wait for ddr ready 1power 0x00820616 Frac 0x92925552 start change cpu freq hbus 0x00000003 cpu 0x00010001 start test memory accress ddr2 0x40000000 finish simple test U-Boot 2014.07 (Mar 13 2015 - 15:40:15) CPU: Freescale i.MX28 rev1.2 at 454 MHz BOOT: NAND 8GiB 3,3V 8-bit SPI: ready DRAM:

3 4

[U-Boot] [PATCH: V3] mpc85xx/T104xD4RDB: Add T104xD4RDB boards support
by Vijay Rai 17 Mar '15

17 Mar '15

T1040D4RDB is a Freescale reference board that hosts the T1040 SoC. T1040D4RDB is re-designed T1040RDB board with following changes : - Support of DDR4 memory - Support of 0x66 serdes protocol which can support following interfaces - 2 RGMII's on DTSEC4, DTSEC5 - 1 SGMII on DTSEC3 - Support of QE-TDM Similarily T1042D4RDB is a Freescale reference board that hosts the T1040 SoC. T1042D4RDB is re-designed T1042RDB board with following changes : - Support of DDR4 memory - Support for 0x86 serdes protocol which can support following interfaces - 2 RGMII's on DTSEC4, DTSEC5 - 3 SGMII on DTSEC1, DTSEC2 & DTSEC3 - Support of DIU Signed-off-by: Vijay Rai <vijay.rai(a)freescale.com> Signed-off-by: Priyanka Jain <Priyanka.Jain(a)freescale.com> --- Changes from V2: - adds SGMII suport using CPLD - removes extra endif board/freescale/t104xrdb/MAINTAINERS | 8 ++++++ board/freescale/t104xrdb/ddr.c | 6 ++++ board/freescale/t104xrdb/ddr.h | 13 ++++++++- board/freescale/t104xrdb/eth.c | 20 +++++++++++-- board/freescale/t104xrdb/t1040d4_rcw.cfg | 7 +++++ board/freescale/t104xrdb/t1042d4_rcw.cfg | 7 +++++ board/freescale/t104xrdb/t104xrdb.c | 19 +++++++++--- configs/T1040D4RDB_NAND_defconfig | 5 ++++ configs/T1040D4RDB_SDCARD_defconfig | 5 ++++ configs/T1040D4RDB_SPIFLASH_defconfig | 5 ++++ configs/T1040D4RDB_defconfig | 4 +++ configs/T1042D4RDB_NAND_defconfig | 5 ++++ configs/T1042D4RDB_SDCARD_defconfig | 5 ++++ configs/T1042D4RDB_SPIFLASH_defconfig | 5 ++++ configs/T1042D4RDB_defconfig | 4 +++ include/configs/T104xRDB.h | 46 ++++++++++++++++++++++++------ 16 files changed, 148 insertions(+), 16 deletions(-) create mode 100644 board/freescale/t104xrdb/t1040d4_rcw.cfg create mode 100644 board/freescale/t104xrdb/t1042d4_rcw.cfg create mode 100644 configs/T1040D4RDB_NAND_defconfig create mode 100644 configs/T1040D4RDB_SDCARD_defconfig create mode 100644 configs/T1040D4RDB_SPIFLASH_defconfig create mode 100644 configs/T1040D4RDB_defconfig create mode 100644 configs/T1042D4RDB_NAND_defconfig create mode 100644 configs/T1042D4RDB_SDCARD_defconfig create mode 100644 configs/T1042D4RDB_SPIFLASH_defconfig create mode 100644 configs/T1042D4RDB_defconfig diff --git a/board/freescale/t104xrdb/MAINTAINERS b/board/freescale/t104xrdb/MAINTAINERS index 13d9be9..32e044f 100644 --- a/board/freescale/t104xrdb/MAINTAINERS +++ b/board/freescale/t104xrdb/MAINTAINERS @@ -6,7 +6,13 @@ F: include/configs/T104xRDB.h F: configs/T1040RDB_defconfig F: configs/T1040RDB_NAND_defconfig F: configs/T1040RDB_SPIFLASH_defconfig +F: configs/T1040D4RDB_defconfig +F: configs/T1040D4RDB_NAND_defconfig +F: configs/T1040D4RDB_SPIFLASH_defconfig F: configs/T1042RDB_defconfig +F: configs/T1042D4RDB_defconfig +F: configs/T1042D4RDB_NAND_defconfig +F: configs/T1042D4RDB_SPIFLASH_defconfig F: configs/T1042RDB_PI_defconfig F: configs/T1042RDB_PI_NAND_defconfig F: configs/T1042RDB_PI_SPIFLASH_defconfig @@ -15,6 +21,8 @@ T1040RDB_SDCARD BOARD #M: - S: Maintained F: configs/T1040RDB_SDCARD_defconfig +F: configs/T1040D4RDB_SDCARD_defconfig +F: configs/T1042D4RDB_SDCARD_defconfig F: configs/T1042RDB_PI_SDCARD_defconfig T1040RDB_SECURE_BOOT BOARD diff --git a/board/freescale/t104xrdb/ddr.c b/board/freescale/t104xrdb/ddr.c index e1148e5..3c4eabf 100644 --- a/board/freescale/t104xrdb/ddr.c +++ b/board/freescale/t104xrdb/ddr.c @@ -91,8 +91,14 @@ found: popts->zq_en = 1; /* DHC_EN =1, ODT = 75 Ohm */ +#ifdef CONFIG_SYS_FSL_DDR4 + popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_80ohm); + popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_80ohm) | + DDR_CDR2_VREF_OVRD(70); /* Vref = 70% */ +#else popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_75ohm); popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_75ohm); +#endif } #if defined(CONFIG_DEEP_SLEEP) diff --git a/board/freescale/t104xrdb/ddr.h b/board/freescale/t104xrdb/ddr.h index ab1c32d..eb6ec70 100644 --- a/board/freescale/t104xrdb/ddr.h +++ b/board/freescale/t104xrdb/ddr.h @@ -28,6 +28,13 @@ static const struct board_specific_parameters udimm0[] = { * num| hi| rank| clk| wrlvl | wrlvl * ranks| mhz| GB |adjst| start | ctl2 */ +#ifdef CONFIG_SYS_FSL_DDR4 + {2, 1666, 0, 4, 7, 0x0808090B, 0x0C0D0E0A}, + {2, 1900, 0, 4, 6, 0x08080A0C, 0x0D0E0F0A}, + {1, 1666, 0, 4, 6, 0x0708090B, 0x0C0D0E09}, + {1, 1900, 0, 4, 6, 0x08080A0C, 0x0D0E0F0A}, + {1, 2200, 0, 4, 7, 0x08090A0D, 0x0F0F100C}, +#elif defined(CONFIG_SYS_FSL_DDR3) {2, 833, 4, 4, 6, 0x06060607, 0x08080807}, {2, 833, 0, 4, 6, 0x06060607, 0x08080807}, {2, 1350, 4, 4, 7, 0x0708080A, 0x0A0B0C09}, @@ -40,10 +47,14 @@ static const struct board_specific_parameters udimm0[] = { {1, 1350, 0, 4, 7, 0x0708080A, 0x0A0B0C09}, {1, 1666, 4, 4, 7, 0x0808090B, 0x0C0D0E0A}, {1, 1666, 0, 4, 7, 0x0808090B, 0x0C0D0E0A}, +#else +#error DDR type not defined +#endif {} }; +#endif + static const struct board_specific_parameters *udimms[] = { udimm0, }; -#endif diff --git a/board/freescale/t104xrdb/eth.c b/board/freescale/t104xrdb/eth.c index 7581a4cd..9c4e922 100644 --- a/board/freescale/t104xrdb/eth.c +++ b/board/freescale/t104xrdb/eth.c @@ -43,9 +43,11 @@ int board_eth_init(bd_t *bis) int idx = i - FM1_DTSEC1; switch (fm_info_get_enet_if(i)) { -#ifdef CONFIG_T1040RDB +#if defined(CONFIG_T1040RDB) || (CONFIG_T1040D4RDB) case PHY_INTERFACE_MODE_SGMII: - /* T1040RDB only supports SGMII on DTSEC3 */ + /* T1040RDB & T1040D4RDB only supports SGMII on + * DTSEC3 + */ fm_info_set_phy_address(FM1_DTSEC3, CONFIG_SYS_SGMII1_PHY_ADDR); break; @@ -60,6 +62,20 @@ int board_eth_init(bd_t *bis) CONFIG_SYS_SGMII1_PHY_ADDR); break; #endif +#ifdef CONFIG_T1042D4RDB + case PHY_INTERFACE_MODE_SGMII: + /* T1042D4RDB supports SGMII on DTSEC1, DTSEC2 + * & DTSEC3 + */ + if (FM1_DTSEC1 == i) + phy_addr = CONFIG_SYS_SGMII1_PHY_ADDR; + if (FM1_DTSEC2 == i) + phy_addr = CONFIG_SYS_SGMII2_PHY_ADDR; + if (FM1_DTSEC3 == i) + phy_addr = CONFIG_SYS_SGMII3_PHY_ADDR; + fm_info_set_phy_address(i, phy_addr); + break; +#endif case PHY_INTERFACE_MODE_RGMII: if (FM1_DTSEC4 == i) phy_addr = CONFIG_SYS_RGMII1_PHY_ADDR; diff --git a/board/freescale/t104xrdb/t1040d4_rcw.cfg b/board/freescale/t104xrdb/t1040d4_rcw.cfg new file mode 100644 index 0000000..3300c18 --- /dev/null +++ b/board/freescale/t104xrdb/t1040d4_rcw.cfg @@ -0,0 +1,7 @@ +#PBL preamble and RCW header +aa55aa55 010e0100 +# serdes protocol 0x66 +0c18000e 0e000000 00000000 00000000 +66000002 80000002 e8106000 01000000 +00000000 00000000 00000000 00032810 +00000000 0342500f 00000000 00000000 diff --git a/board/freescale/t104xrdb/t1042d4_rcw.cfg b/board/freescale/t104xrdb/t1042d4_rcw.cfg new file mode 100644 index 0000000..db4d52f --- /dev/null +++ b/board/freescale/t104xrdb/t1042d4_rcw.cfg @@ -0,0 +1,7 @@ +#PBL preamble and RCW header +aa55aa55 010e0100 +# serdes protocol 0x86 +0c18000e 0e000000 00000000 00000000 +86000002 80000002 ec027000 01000000 +00000000 00000000 00000000 00032810 +00000000 0342500f 00000000 00000000 diff --git a/board/freescale/t104xrdb/t104xrdb.c b/board/freescale/t104xrdb/t104xrdb.c index 9cd5e15..4d61dba 100644 --- a/board/freescale/t104xrdb/t104xrdb.c +++ b/board/freescale/t104xrdb/t104xrdb.c @@ -27,6 +27,10 @@ int checkboard(void) { struct cpu_type *cpu = gd->arch.cpu; u8 sw; + ccsr_gur_t __iomem *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); + u32 srds_s1; + + srds_s1 = in_be32(&gur->rcwsr[4]) >> 24; printf("Board: %sRDB\n", cpu->name); printf("Board rev: 0x%02x CPLD ver: 0x%02x, ", @@ -40,17 +44,24 @@ int checkboard(void) else printf("Unsupported Bank=%x\n", sw); + printf("SERDES Reference : 0x%X\n", srds_s1); + + if(srds_s1 == 0x86) + CPLD_WRITE(misc_ctl_status, CPLD_READ(misc_ctl_status) | 0x80); // choose SGMII + + if(srds_s1 == 0x8E) + CPLD_WRITE(misc_ctl_status, CPLD_READ(misc_ctl_status) | 0x82); // choose SGMII & Aurora + return 0; } int board_early_init_f(void) { #if defined(CONFIG_DEEP_SLEEP) - if (is_warm_boot()) - fsl_dp_disable_console(); + if (is_warm_boot()) + fsl_dp_disable_console(); #endif - - return 0; +return 0; } int board_early_init_r(void) diff --git a/configs/T1040D4RDB_NAND_defconfig b/configs/T1040D4RDB_NAND_defconfig new file mode 100644 index 0000000..72b046b --- /dev/null +++ b/configs/T1040D4RDB_NAND_defconfig @@ -0,0 +1,5 @@ +CONFIG_SPL=y +CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,NAND,T104XD4RDB" ++S:CONFIG_PPC=y ++S:CONFIG_MPC85xx=y ++S:CONFIG_TARGET_T104XRDB=y diff --git a/configs/T1040D4RDB_SDCARD_defconfig b/configs/T1040D4RDB_SDCARD_defconfig new file mode 100644 index 0000000..9e63214 --- /dev/null +++ b/configs/T1040D4RDB_SDCARD_defconfig @@ -0,0 +1,5 @@ +CONFIG_SPL=y +CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD,T104XD4RDB" ++S:CONFIG_PPC=y ++S:CONFIG_MPC85xx=y ++S:CONFIG_TARGET_T104XRDB=y diff --git a/configs/T1040D4RDB_SPIFLASH_defconfig b/configs/T1040D4RDB_SPIFLASH_defconfig new file mode 100644 index 0000000..e0ab015 --- /dev/null +++ b/configs/T1040D4RDB_SPIFLASH_defconfig @@ -0,0 +1,5 @@ +CONFIG_SPL=y +CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH,T104XD4RDB" ++S:CONFIG_PPC=y ++S:CONFIG_MPC85xx=y ++S:CONFIG_TARGET_T104XRDB=y diff --git a/configs/T1040D4RDB_defconfig b/configs/T1040D4RDB_defconfig new file mode 100644 index 0000000..d650ab6 --- /dev/null +++ b/configs/T1040D4RDB_defconfig @@ -0,0 +1,4 @@ +CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040D4RDB,T104XD4RDB" +CONFIG_PPC=y +CONFIG_MPC85xx=y +CONFIG_TARGET_T104XRDB=y diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig new file mode 100644 index 0000000..5e33654 --- /dev/null +++ b/configs/T1042D4RDB_NAND_defconfig @@ -0,0 +1,5 @@ +CONFIG_SPL=y +CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,NAND,T104XD4RDB" ++S:CONFIG_PPC=y ++S:CONFIG_MPC85xx=y ++S:CONFIG_TARGET_T104XRDB=y diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig new file mode 100644 index 0000000..7851a8b --- /dev/null +++ b/configs/T1042D4RDB_SDCARD_defconfig @@ -0,0 +1,5 @@ +CONFIG_SPL=y +CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD,T104XD4RDB" ++S:CONFIG_PPC=y ++S:CONFIG_MPC85xx=y ++S:CONFIG_TARGET_T104XRDB=y diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig new file mode 100644 index 0000000..536ea79 --- /dev/null +++ b/configs/T1042D4RDB_SPIFLASH_defconfig @@ -0,0 +1,5 @@ +CONFIG_SPL=y +CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH,T104XD4RDB" ++S:CONFIG_PPC=y ++S:CONFIG_MPC85xx=y ++S:CONFIG_TARGET_T104XRDB=y diff --git a/configs/T1042D4RDB_defconfig b/configs/T1042D4RDB_defconfig new file mode 100644 index 0000000..715697f --- /dev/null +++ b/configs/T1042D4RDB_defconfig @@ -0,0 +1,4 @@ +CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042D4RDB,T104XD4RDB" +CONFIG_PPC=y +CONFIG_MPC85xx=y +CONFIG_TARGET_T104XRDB=y diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 5263318..111bbfb 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -29,6 +29,14 @@ #ifdef CONFIG_T1042RDB #define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t104xrdb/t1042_rcw.cfg #endif +#ifdef CONFIG_T1040D4RDB +#define CONFIG_SYS_FSL_PBL_RCW \ +$(SRCTREE)/board/freescale/t104xrdb/t1040d4_rcw.cfg +#endif +#ifdef CONFIG_T1042D4RDB +#define CONFIG_SYS_FSL_PBL_RCW \ +$(SRCTREE)/board/freescale/t104xrdb/t1042d4_rcw.cfg +#endif #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT #define CONFIG_SPL_ENV_SUPPORT @@ -219,8 +227,14 @@ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) +#ifdef CONFIG_T104XD4RDB +#define CONFIG_SYS_FSL_DDR4 +#endif + #define CONFIG_DDR_SPD +#ifndef CONFIG_SYS_FSL_DDR4 #define CONFIG_SYS_FSL_DDR3 +#endif #define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x51 @@ -278,7 +292,7 @@ #define CPLD_LBMAP_DFLTBANK 0x40 /* BANK OR | BANK0 */ #define CPLD_LBMAP_RESET 0xFF #define CPLD_LBMAP_SHIFT 0x03 -#ifdef CONFIG_T1042RDB_PI +#if defined(CONFIG_T1042RDB_PI) || defined(CONFIG_T104XD4RDB) #define CPLD_DIU_SEL_DFP 0x80 #endif @@ -448,7 +462,7 @@ #define CONFIG_SYS_HUSH_PARSER #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " -#ifdef CONFIG_T1042RDB_PI +#if defined(CONFIG_T1042RDB_PI) || defined(CONFIG_T104XD4RDB) /* Video */ #define CONFIG_FSL_DIU_FB @@ -493,11 +507,11 @@ /* I2C bus multiplexer */ #define I2C_MUX_PCA_ADDR 0x70 -#if defined(CONFIG_T1040RDB) || defined(CONFIG_T1042RDB) +#if defined(CONFIG_T104xRDB) || defined(CONFIG_T104XD4RDB) #define I2C_MUX_CH_DEFAULT 0x8 #endif -#ifdef CONFIG_T1042RDB_PI +#if defined(CONFIG_T1042RDB_PI) || defined(CONFIG_T104XD4RDB) /* LDI/DVI Encoder for display */ #define CONFIG_SYS_I2C_LDI_ADDR 0x38 #define CONFIG_SYS_I2C_DVI_ADDR 0x75 @@ -666,7 +680,7 @@ #define CONFIG_SYS_DPAA_FMAN #define CONFIG_SYS_DPAA_PME -#if defined(CONFIG_T1040RDB) || defined(CONFIG_T1042RDB) +#if defined(CONFIG_T104xRDB) || defined(CONFIG_T104XD4RDB) #define CONFIG_QE #define CONFIG_U_QE #endif @@ -695,7 +709,7 @@ #define CONFIG_SYS_FMAN_FW_ADDR 0xEFF00000 #endif -#if defined(CONFIG_T1040RDB) || defined(CONFIG_T1042RDB) +#if defined(CONFIG_T104xRDB) || defined(CONFIG_T104XD4RDB) #if defined(CONFIG_SPIFLASH) #define CONFIG_SYS_QE_FW_ADDR 0x130000 #elif defined(CONFIG_SDCARD) @@ -720,10 +734,20 @@ #ifdef CONFIG_FMAN_ENET #if defined(CONFIG_T1040RDB) || defined(CONFIG_T1042RDB) -#define CONFIG_SYS_SGMII1_PHY_ADDR 0x03 +#define CONFIG_SYS_SGMII1_PHY_ADDR 0x03 +#elif defined(CONFIG_T1040D4RDB) || defined(CONFIG_T1042D4RDB) +#define CONFIG_SYS_SGMII1_PHY_ADDR 0x02 +#define CONFIG_SYS_SGMII2_PHY_ADDR 0x03 +#define CONFIG_SYS_SGMII3_PHY_ADDR 0x01 +#endif + +#ifdef CONFIG_T104XD4RDB +#define CONFIG_SYS_RGMII1_PHY_ADDR 0x04 +#define CONFIG_SYS_RGMII2_PHY_ADDR 0x05 +#else +#define CONFIG_SYS_RGMII1_PHY_ADDR 0x01 +#define CONFIG_SYS_RGMII2_PHY_ADDR 0x02 #endif -#define CONFIG_SYS_RGMII1_PHY_ADDR 0x01 -#define CONFIG_SYS_RGMII2_PHY_ADDR 0x02 /* Enable VSC9953 L2 Switch driver on T1040 SoC */ #ifdef CONFIG_T1040RDB @@ -842,6 +866,10 @@ #define FDTFILE "t1042rdb_pi/t1042rdb_pi.dtb" #elif defined(CONFIG_T1042RDB) #define FDTFILE "t1042rdb/t1042rdb.dtb" +#elif defined(CONFIG_T1040D4RDB) +#define FDTFILE "t1042rdb/t1040d4rdb.dtb" +#elif defined(CONFIG_T1042D4RDB) +#define FDTFILE "t1042rdb/t1042d4rdb.dtb" #endif #ifdef CONFIG_FSL_DIU_FB -- 1.7.9.5

1 0

[U-Boot] How do I use AM335x eth1 rather than eth0 ?
by Mark Jackson 17 Mar '15

17 Mar '15

We have a dual Ethernet board (based on the BeagelBone) but with both Ethernet ports connected. I'm wanting to use eth1 (rather than eth0), so in my board.c file, I changed:- static struct cpsw_slave_data cpsw_slaves[] = { { .slave_reg_ofs = 0x208, .sliver_reg_ofs = 0xd80, .phy_id = 0, }, { .slave_reg_ofs = 0x308, .sliver_reg_ofs = 0xdc0, .phy_id = 1, }, }; ... to ... static struct cpsw_slave_data cpsw_slaves[] = { { .slave_reg_ofs = 0x308, .sliver_reg_ofs = 0xdc0, .phy_id = 1, }, { .slave_reg_ofs = 0x208, .sliver_reg_ofs = 0xd80, .phy_id = 0, }, }; ... assuming that eth0 would now be ignored (as only 1 slave is configured). But (eg) dhcp still only responds on eth0 !?! What else do I have to change ? Cheers Mark J.

4 5

[U-Boot] bav335x support broken
by Gilles 17 Mar '15

17 Mar '15

Folks, I posted a patch to add support for bav335x boards (a322aad99de4). The patch was tested against v2015.04-rc1 and worked perfectly but somehow, something was introduced since then which breaks the board support. There are two main errors I need to fix before posting another patch but need help with the second error. The first error is easy. Compilation throws: #error "Please define NS16550 registers size." which I can simply fix by defining CONFIG_SYS_NS16550_REG_SIZE in include/configs/bav335x.h ((( Altough I am stil puzzled as to why this was defined as -4 (where?) on v2015.04-rc1 ))) After adding the define, everything compiles up to failing on the final link with: drivers/serial/built-in.o: In function `get_current': /home/gilles/bbdev/u-boot/drivers/serial/serial.c:389: undefined reference to `default_serial_console' drivers/serial/built-in.o: In function `serial_initialize': Can anyone please explain what changed between 2015.04-rc1 and 2015.04-rc2 which could cause such a behavior? I have spent the last couple hours re-basing a branch to see where it breaks as to maybe get a clue on what changed but no luck so far. Any tips would be appreciated. Thanks, Gilles .

3 6

[U-Boot] [PATCH 0/4] ARM: atmel: boards: enable SPL support
by Bo Shen 17 Mar '15

17 Mar '15

This patch series enable SPL support for following boards: - at91sam9m10g45ek - NAND flash boot support - SD card boot support - at91sam9n12ek - NAND flash boot support - SPI flash boot support - at91sam9x5ek - NAND flash boot support - SPI flash boot support Bo Shen (4): ARM: atmel: arm926ejs: fix clock configuration ARM: atmel: at91sam9m10g45ek: enable spl support ARM: atmel: at91sam9x5ek: enable spl support ARM: atmel: at91sam9n12ek: enable spl support arch/arm/mach-at91/Kconfig | 3 + arch/arm/mach-at91/Makefile | 2 + arch/arm/mach-at91/arm926ejs/clock.c | 54 +++++++++-------- arch/arm/mach-at91/arm926ejs/u-boot-spl.lds | 48 +++++++++++++++ arch/arm/mach-at91/include/mach/at91_pmc.h | 6 +- arch/arm/mach-at91/include/mach/at91sam9x5.h | 10 ++++ arch/arm/mach-at91/mpddrc.c | 3 +- arch/arm/mach-at91/spl.c | 2 +- arch/arm/mach-at91/spl_at91.c | 11 +++- board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c | 80 +++++++++++++++++++++++++ board/atmel/at91sam9n12ek/at91sam9n12ek.c | 73 ++++++++++++++++++++++ board/atmel/at91sam9x5ek/at91sam9x5ek.c | 74 +++++++++++++++++++++++ configs/at91sam9m10g45ek_mmc_defconfig | 7 ++- configs/at91sam9m10g45ek_nandflash_defconfig | 7 ++- configs/at91sam9n12ek_nandflash_defconfig | 7 ++- configs/at91sam9n12ek_spiflash_defconfig | 7 ++- configs/at91sam9x5ek_nandflash_defconfig | 7 ++- configs/at91sam9x5ek_spiflash_defconfig | 7 ++- include/configs/at91sam9m10g45ek.h | 58 ++++++++++++++++++ include/configs/at91sam9n12ek.h | 58 +++++++++++++++++- include/configs/at91sam9x5ek.h | 57 ++++++++++++++++++ 21 files changed, 531 insertions(+), 50 deletions(-) create mode 100644 arch/arm/mach-at91/arm926ejs/u-boot-spl.lds -- 2.3.0

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