February 2015 - U-Boot

[U-Boot] [PATCH 0/2] ARM: at91: at91sam9rlek: add mmc config for at91sam9rlek
by Josh Wu 18 Mar '15

18 Mar '15

This patch series will enable mmc support on at91sam9rlek board. And also add a MMC config for it. Josh Wu (2): ARM: at91: at91sam9rlek: add mci support ARM: at91: at91sam9rlek: add mmc environment configuration arch/arm/cpu/arm926ejs/at91/at91sam9rl_devices.c | 17 ++++++++++++++ board/atmel/at91sam9rlek/at91sam9rlek.c | 10 ++++++++ configs/at91sam9rlek_mmc_defconfig | 3 +++ include/configs/at91sam9rlek.h | 29 +++++++++++++++++++++++- 4 files changed, 58 insertions(+), 1 deletion(-) create mode 100644 configs/at91sam9rlek_mmc_defconfig -- 1.9.1

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[U-Boot] [PATCH v2] ARM: at91: at91sam9rlek: update the default nand flash configs
by Josh Wu 18 Mar '15

18 Mar '15

Update the nand flash offset mapping, default nand bootcmand and bootargs to align with linux4sam.org. Signed-off-by: Josh Wu <josh.wu(a)atmel.com> Acked-by: Bo Shen <voice.shen(a)atmel.com> --- Changes in v2: - modify the BOOTCMD to load both kernel and dtb. include/configs/at91sam9rlek.h | 18 +++++++++++------- 1 file changed, 11 insertions(+), 7 deletions(-) diff --git a/include/configs/at91sam9rlek.h b/include/configs/at91sam9rlek.h index d5f0197..f435d71 100644 --- a/include/configs/at91sam9rlek.h +++ b/include/configs/at91sam9rlek.h @@ -151,14 +151,18 @@ /* bootstrap + u-boot + env + linux in nandflash */ #define CONFIG_ENV_IS_IN_NAND 1 -#define CONFIG_ENV_OFFSET 0x60000 -#define CONFIG_ENV_OFFSET_REDUND 0x80000 +#define CONFIG_ENV_OFFSET 0xc0000 +#define CONFIG_ENV_OFFSET_REDUND 0x100000 #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ -#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm" -#define CONFIG_BOOTARGS "console=ttyS0,115200 " \ - "root=/dev/mtdblock5 " \ - "mtdparts=atmel_nand:128k(bootstrap)ro,256k(uboot)ro,128k(env1)ro,128k(env2)ro,2M(linux),-(root) " \ - "rw rootfstype=jffs2" +#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x600000; " \ + "nand read 0x21000000 0x180000 0x80000; " \ + "bootz 0x22000000 - 0x21000000" +#define CONFIG_BOOTARGS \ + "console=ttyS0,115200 earlyprintk " \ + "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \ + "256K(env),256k(evn_redundent),256k(spare)," \ + "512k(dtb),6M(kernel)ro,-(rootfs) " \ + "rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs" #endif -- 1.9.1

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[U-Boot] Possible bug in sdhci.c
by Matt Reimer 18 Mar '15

18 Mar '15

In sdhci_init() a writel() is used on a byte-sized register, which would clobber the adjacent registers. Below is my suggested fix. If it looks correct, I can submit a proper patch. Matt diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c index 82d7984..1f8917b 100644 --- a/drivers/mmc/sdhci.c +++ b/drivers/mmc/sdhci.c @@ -412,7 +412,7 @@ static int sdhci_init(struct mmc *mmc) if (host->quirks & SDHCI_QUIRK_NO_CD) { unsigned int status; - sdhci_writel(host, SDHCI_CTRL_CD_TEST_INS | SDHCI_CTRL_CD_TEST, + sdhci_writeb(host, SDHCI_CTRL_CD_TEST_INS | SDHCI_CTRL_CD_TEST, SDHCI_HOST_CONTROL); status = sdhci_readl(host, SDHCI_PRESENT_STATE);

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[U-Boot] Possible bug in s5p_sdhci.c
by Matt Reimer 18 Mar '15

18 Mar '15

The use of SDHCI_CTRL2_SELBASECLK_SHIFT in s5p_sdhci_set_control_reg() seems wrong, because a shifting offset is being used as a mask, not to generate a mask. It's unclear what the original intent was. Below is my suggested fix. What think ye? Matt diff --git a/drivers/mmc/s5p_sdhci.c b/drivers/mmc/s5p_sdhci.c index 3899372..0eec731 100644 --- a/drivers/mmc/s5p_sdhci.c +++ b/drivers/mmc/s5p_sdhci.c @@ -30,7 +30,7 @@ static void s5p_sdhci_set_control_reg(struct sdhci_host *host) sdhci_writel(host, SDHCI_CTRL4_DRIVE_MASK(0x3), SDHCI_CONTROL4); val = sdhci_readl(host, SDHCI_CONTROL2); - val &= SDHCI_CTRL2_SELBASECLK_SHIFT; + val &= SDHCI_CTRL2_SELBASECLK_MASK(3); val |= SDHCI_CTRL2_ENSTAASYNCCLR | SDHCI_CTRL2_ENCMDCNFMSK |

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[U-Boot] How do I use AM335x eth1 rather than eth0 ?
by Mark Jackson 17 Mar '15

17 Mar '15

We have a dual Ethernet board (based on the BeagelBone) but with both Ethernet ports connected. I'm wanting to use eth1 (rather than eth0), so in my board.c file, I changed:- static struct cpsw_slave_data cpsw_slaves[] = { { .slave_reg_ofs = 0x208, .sliver_reg_ofs = 0xd80, .phy_id = 0, }, { .slave_reg_ofs = 0x308, .sliver_reg_ofs = 0xdc0, .phy_id = 1, }, }; ... to ... static struct cpsw_slave_data cpsw_slaves[] = { { .slave_reg_ofs = 0x308, .sliver_reg_ofs = 0xdc0, .phy_id = 1, }, { .slave_reg_ofs = 0x208, .sliver_reg_ofs = 0xd80, .phy_id = 0, }, }; ... assuming that eth0 would now be ignored (as only 1 slave is configured). But (eg) dhcp still only responds on eth0 !?! What else do I have to change ? Cheers Mark J.

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[U-Boot] MIPS UHI spec
by Matthew Fortune 16 Mar '15

16 Mar '15

Hi Daniel, The spec for MIPS Unified Hosting Interface is available here: http://prplfoundation.org/wiki/MIPS_documentation As we have previously discussed, this is an ideal place to define the handover of device tree data from bootloader to kernel. Using a0 == -2 and defining which register(s) you need for the actual data will fit nicely. I'll happily include whatever is decided into the next version of the spec. This is also the spec I would like to use to implement a syscall interface. Previous post on the topic: http://lists.denx.de/pipermail/u-boot/2014-December/198007.html Only a subset of the operations would be implemented for u-boot and would be strictly limited to sit on top of the functionality that is already exposed to standalone applications with GPL exceptions. Some of the operations need a bit of wrapper code around the API functions i.e. The write operation would only be handled for FD 1 and 2 and would be implemented as a loop sending each byte of the buffer via putc. UHI also provides a semi-hosting solution for u-boot itself which it could use to obtain files over the EJTAG interface. Initial implementation of the syscall interface will be posted relatively soon. Thanks, Matthew

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[U-Boot] [PATCH v2 01/24] drivers/video/am335x-fb: Add possibility to wait for stable power/picture
by Hannes Petermaier 16 Mar '15

16 Mar '15

Often on boards exists a circuit which switches power on/off to LCD display. Due to the need of limiting the in-rush current the output voltage from this circuit rises "slowly", so it is necessary to wait a bit (VCC ramp up time) before starting output on LCD-pins. This time is specified in <n> ms within the panel-settings, called "pup_delay" Further some LCDs need a couple of frames to stabilize the image on it. We have now the possibility to wait some time after starting output on LCD. This time is also specified in <n> ms within panel-settings, called "pon_delay" Signed-off-by: Hannes Petermaier <oe5hpm(a)oevsv.at> --- Changes for V2: None --- drivers/video/am335x-fb.c | 13 ++++++++----- drivers/video/am335x-fb.h | 9 +++++++-- 2 files changed, 15 insertions(+), 7 deletions(-) diff --git a/drivers/video/am335x-fb.c b/drivers/video/am335x-fb.c index ab98941..6f95649 100644 --- a/drivers/video/am335x-fb.c +++ b/drivers/video/am335x-fb.c @@ -127,6 +127,12 @@ int am335xfb_init(struct am335x_lcdpanel *panel) memset((void *)gd->fb_base, 0, 0x20); *(unsigned int *)gd->fb_base = 0x4000; + /* turn ON display through powercontrol function if accessible */ + if (0 != panel->panel_power_ctrl) + panel->panel_power_ctrl(1); + + debug("am335x-fb: wait for stable power ...\n"); + mdelay(panel->pup_delay); lcdhw->clkc_enable = LCD_CORECLKEN | LCD_LIDDCLKEN | LCD_DMACLKEN; lcdhw->raster_ctrl = 0; lcdhw->ctrl = LCD_CLK_DIVISOR(panel->pxl_clk_div) | LCD_RASTER_MODE; @@ -159,11 +165,8 @@ int am335xfb_init(struct am335x_lcdpanel *panel) gd->fb_base += 0x20; /* point fb behind palette */ - /* turn ON display through powercontrol function if accessible */ - if (0 != panel->panel_power_ctrl) { - mdelay(panel->pon_delay); - panel->panel_power_ctrl(1); - } + debug("am335x-fb: waiting picture to be stable.\n."); + mdelay(panel->pon_delay); return 0; } diff --git a/drivers/video/am335x-fb.h b/drivers/video/am335x-fb.h index 8a0b131..7f799d1 100644 --- a/drivers/video/am335x-fb.h +++ b/drivers/video/am335x-fb.h @@ -55,9 +55,14 @@ struct am335x_lcdpanel { unsigned int vsw; /* Vertical Sync Pulse Width */ unsigned int pxl_clk_div; /* Pixel clock divider*/ unsigned int pol; /* polarity of sync, clock signals */ + unsigned int pup_delay; /* + * time in ms after power on to + * initialization of lcd-controller + * (VCC ramp up time) + */ unsigned int pon_delay; /* - * time in ms for turning on lcd after - * initializing lcd-controller + * time in ms after initialization of + * lcd-controller (pic stabilization) */ void (*panel_power_ctrl)(int); /* fp for power on/off display */ }; -- 1.7.10.4

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[U-Boot] [PATCH v1 1/1] fastboot: Add support for flashing zImage
by Dileep Katta 12 Mar '15

12 Mar '15

This patch adds support to flash zImage to the boot partition on eMMC. Usage: fastboot flash zImage <path_to_zImage> Signed-off-by: Angela Stegmaier <angelabaker(a)ti.com> Signed-off-by: Dileep Katta <dileep.katta(a)linaro.org> --- drivers/usb/gadget/f_fastboot.c | 152 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 152 insertions(+) diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c index 310175a..d3d16c0 100644 --- a/drivers/usb/gadget/f_fastboot.c +++ b/drivers/usb/gadget/f_fastboot.c @@ -23,6 +23,7 @@ #ifdef CONFIG_FASTBOOT_FLASH_MMC_DEV #include <fb_mmc.h> #endif +#include <android_image.h> #define FASTBOOT_VERSION "0.4" @@ -492,6 +493,152 @@ static void cb_continue(struct usb_ep *ep, struct usb_request *req) } #ifdef CONFIG_FASTBOOT_FLASH +static int fastboot_update_zimage(void); + +static u32 fastboot_get_boot_ptn(struct andr_img_hdr *hdr, char *response, + block_dev_desc_t *dev_desc) +{ + u32 hdr_sectors = 0; + u32 sector_size; + int status = 0; + strcpy(response, "OKAY"); + disk_partition_t info; + + status = get_partition_info_efi_by_name(dev_desc, "boot", &info); + if (status) { + strcpy(response, "FAILCannot find boot partition"); + goto out; + } + + /* Read the boot image header */ + sector_size = info.blksz; + hdr_sectors = (sizeof(struct andr_img_hdr)/sector_size) + 1; + status = dev_desc->block_read(dev_desc->dev, info.start, + hdr_sectors, (void *)hdr); + + if (status < 0) { + strcpy(response, "FAILCannot read hdr from boot partition"); + goto out; + } + if (android_image_check_header(hdr) != 0) { + printf("bad boot image magic\n"); + strcpy(response, "FAILBoot partition not initialized"); + goto out; + } + + return hdr_sectors; + +out: + strcpy(response, "INFO"); + fastboot_tx_write_str(response); + + return -1; +} + +#define CEIL(a, b) (((a) / (b)) + ((a % b) > 0 ? 1 : 0)) + +static int fastboot_update_zimage(void) +{ + struct andr_img_hdr *hdr = NULL; + u8 *ramdisk_buffer; + u32 ramdisk_sector_start, ramdisk_sectors; + u32 kernel_sector_start, kernel_sectors; + u32 hdr_sectors = 0; + u32 sectors_per_page = 0; + int ret = 0; + block_dev_desc_t *dev_desc; + disk_partition_t info; + char response[RESPONSE_LEN]; + u32 addr = CONFIG_USB_FASTBOOT_BUF_ADDR; + + strcpy(response, "OKAY"); + printf("Flashing zImage...%d bytes\n", download_bytes); + + dev_desc = get_dev("mmc", CONFIG_FASTBOOT_FLASH_MMC_DEV); + if (!dev_desc || dev_desc->type == DEV_TYPE_UNKNOWN) { + sprintf(response + strlen(response), + "FAILInvalid mmc device"); + ret = -1; + goto out; + } + + addr += CEIL(download_bytes, 0x1000) * 0x1000; + hdr = (struct andr_img_hdr *)addr; + + hdr_sectors = fastboot_get_boot_ptn(hdr, response, dev_desc); + if (hdr_sectors <= 0) { + sprintf(response + strlen(response), + "FAILInvalid number of boot sectors %d", hdr_sectors); + ret = -1; + goto out; + } + ret = get_partition_info_efi_by_name(dev_desc, "boot", &info); + if (ret) { + strcpy(response, "FAILCannot find boot partition"); + ret = -1; + goto out; + } + + /* Extract ramdisk location and read it into local buffer */ + sectors_per_page = hdr->page_size / info.blksz; + ramdisk_sector_start = info.start + sectors_per_page; + ramdisk_sector_start += CEIL(hdr->kernel_size, hdr->page_size)* + sectors_per_page; + ramdisk_sectors = CEIL(hdr->ramdisk_size, hdr->page_size)* + sectors_per_page; + + ramdisk_buffer = (u8 *)hdr; + ramdisk_buffer += (hdr_sectors * info.blksz); + ret = dev_desc->block_read(dev_desc->dev, ramdisk_sector_start, + ramdisk_sectors, ramdisk_buffer); + if (ret < 0) { + sprintf(response, "FAILCannot read ramdisk from 'boot'"); + ret = -1; + goto out; + } + + /* Change the boot img hdr */ + hdr->kernel_size = download_bytes; + ret = dev_desc->block_write(dev_desc->dev, info.start, + hdr_sectors, (void *)hdr); + if (ret < 0) { + sprintf(response, "FAILCannot writeback boot img hdr"); + ret = -1; + goto out; + } + + /* Write the new downloaded kernel*/ + kernel_sector_start = info.start + sectors_per_page; + kernel_sectors = CEIL(hdr->kernel_size, hdr->page_size)* + sectors_per_page; + ret = dev_desc->block_write(dev_desc->dev, kernel_sector_start, + kernel_sectors, + (const void *)CONFIG_USB_FASTBOOT_BUF_ADDR); + if (ret < 0) { + sprintf(response, "FAILCannot write new kernel"); + ret = -1; + goto out; + } + + /* Write the saved Ramdisk back */ + ramdisk_sector_start = info.start + sectors_per_page; + ramdisk_sector_start += CEIL(hdr->kernel_size, hdr->page_size)* + sectors_per_page; + ret = dev_desc->block_write(dev_desc->dev, ramdisk_sector_start, + ramdisk_sectors, ramdisk_buffer); + if (ret < 0) { + sprintf(response, "FAILCannot write back original ramdisk"); + ret = -1; + goto out; + } + fastboot_tx_write_str(response); + return 0; + +out: + fastboot_tx_write_str(response); + return ret; +} + static void cb_flash(struct usb_ep *ep, struct usb_request *req) { char *cmd = req->buf; @@ -505,6 +652,11 @@ static void cb_flash(struct usb_ep *ep, struct usb_request *req) } strcpy(response, "FAILno flash device defined"); + + if (!strcmp(cmd, "zImage") || !strcmp(cmd, "zimage")) { + fastboot_update_zimage(); + return; + } #ifdef CONFIG_FASTBOOT_FLASH_MMC_DEV fb_mmc_flash_write(cmd, (void *)CONFIG_USB_FASTBOOT_BUF_ADDR, download_bytes, response); -- 1.8.3.2

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[U-Boot] [PATCH v2] mmc: fsl_esdhc: Add support for DDR mode
by Volodymyr Riazantsev 12 Mar '15

12 Mar '15

Add support of the DDR mode for eSDHC driver. Enable it for i.MX6 SoC family only. Change-Id: Ie27a945c9fe79d044cc886e269b60747f1744116 Signed-off-by: Volodymyr Riazantsev <volodymyr.riazantsev(a)globallogic.com> --- drivers/mmc/fsl_esdhc.c | 8 ++++++-- include/configs/mx6_common.h | 2 ++ include/fsl_esdhc.h | 1 + 3 files changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index c55eb28..f5d2ccb 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -319,7 +319,8 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) esdhc_write32(&regs->cmdarg, cmd->cmdarg); #if defined(CONFIG_FSL_USDHC) esdhc_write32(&regs->mixctrl, - (esdhc_read32(&regs->mixctrl) & 0xFFFFFF80) | (xfertyp & 0x7F)); + (esdhc_read32(&regs->mixctrl) & 0xFFFFFF80) | (xfertyp & 0x7F) + | (mmc->ddr_mode ? XFERTYP_DDREN : 0)); esdhc_write32(&regs->xfertyp, xfertyp & 0xFFFF0000); #else esdhc_write32(&regs->xfertyp, xfertyp); @@ -442,7 +443,7 @@ static void set_sysctl(struct mmc *mmc, uint clock) if ((sdhc_clk / (div * pre_div)) <= clock) break; - pre_div >>= 1; + pre_div >>= mmc->ddr_mode ? 2 : 1; div -= 1; clk = (pre_div << 8) | (div << 4); @@ -601,6 +602,9 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg) } cfg->cfg.host_caps = MMC_MODE_4BIT | MMC_MODE_8BIT | MMC_MODE_HC; +#ifdef CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE + cfg->cfg.host_caps |= MMC_MODE_DDR_52MHz; +#endif if (cfg->max_bus_width > 0) { if (cfg->max_bus_width < 8) diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h index e0528ce..29b72b2 100644 --- a/include/configs/mx6_common.h +++ b/include/configs/mx6_common.h @@ -28,6 +28,8 @@ #define CONFIG_SYS_PL310_BASE L2_PL310_BASE #endif +#define CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE + #define CONFIG_MP #define CONFIG_MXC_GPT_HCLK diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h index c1b6648..313fa1e 100644 --- a/include/fsl_esdhc.h +++ b/include/fsl_esdhc.h @@ -108,6 +108,7 @@ #define XFERTYP_RSPTYP_48_BUSY 0x00030000 #define XFERTYP_MSBSEL 0x00000020 #define XFERTYP_DTDSEL 0x00000010 +#define XFERTYP_DDREN 0x00000008 #define XFERTYP_AC12EN 0x00000004 #define XFERTYP_BCEN 0x00000002 #define XFERTYP_DMAEN 0x00000001 -- 2.2.0

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[U-Boot] "Writing to MMC(%d)... failed"
by Nathan Royce 10 Mar '15

10 Mar '15

"saveenv" won't write the environment out to disk. $ sudo dd if=/dev/zero of=/dev/sde seek=1 bs=512 count=3999 //wiping out area just to make sure no garbage is picked up.$ sudo dd if=bl1.HardKernel of=/dev/sde seek=1 iflag=dsync oflag=dsync$ sudo dd if=bl2.HardKernel of=/dev/sde seek=31 iflag=dsync oflag=dsync$ sudo dd if=u-boot-dtb.bin of=/dev/sde seek=63 iflag=dsync oflag=dsync$ sudo dd if=tzsw.HardKernel of=/dev/sde seek=2111 iflag=dsync oflag=dsync Fail: git://git.denx.de/u-boot.gitcommit 47d8ae4069b47ce966c0c5e0d8dd041e69ee1f86*****U-Boot 2015.04-rc2-00081-g47d8ae4 (Feb 25 2015 - 12:12:40) CPU: Exynos4412@1000MHzModel: Odroid based on Exynos4412DRAM: 2 GiBBoard PMIC initMMC: SAMSUNG SDHCI: 0, EXYNOS DWMMC: 1*** Warning - bad CRC, using default environment DFU alt info setting: doneNet: No ethernet found.Hit any key to stop autoboot: 0** Unrecognized filesystem type **** Unrecognized filesystem type **** Unrecognized filesystem type **Bad Linux ARM zImage magic!Odroid # saveenvSaving Environment to MMC...Writing to MMC(0)... failedOdroid # mmc infoDevice: SAMSUNG SDHCIManufacturer ID: 3OEM: 5344Name: SU08GTran Speed: 50000000Rd Block Len: 512SD version 3.0High Capacity: YesCapacity: 7.4 GiBBus Width: 4-bitErase Group Size: 512 BytesOdroid # mmc listSAMSUNG SDHCI: 0 (SD)EXYNOS DWMMC: 1Odroid # mmc part Partition Map for MMC device 0 -- Partition Type: DOS Part Start Sector Num Sectors UUID Type** Can't read partition table on 0:0 **Odroid # mmc hwpartition checkPartition configuration: No enhanced user data area No GP1 partition No GP2 partition No GP3 partition No GP4 partitioneMMC >= 4.4 required for enhanced user data areaFailed!Odroid # version U-Boot 2015.04-rc2-00081-g47d8ae4 (Feb 25 2015 - 12:12:40)armv7l-unknown-linux-gnueabihf-gcc (GCC) 5.0.0 20150221 (experimental)GNU ld (GNU Binutils) 2.25.51.20150221Odroid # fstype mmc 0:0 ** ext4fs_devread read error - blockFailed to mount ext2 filesystem...** Unrecognized filesystem type **Odroid # bdinfoarch_number = 0x000010C1boot_params = 0x40000100DRAM bank = 0x00000000-> start = 0x40000000-> size = 0x10000000DRAM bank = 0x00000001-> start = 0x50000000-> size = 0x10000000DRAM bank = 0x00000002-> start = 0x60000000-> size = 0x10000000DRAM bank = 0x00000003-> start = 0x70000000-> size = 0x10000000DRAM bank = 0x00000004-> start = 0x80000000-> size = 0x10000000DRAM bank = 0x00000005-> start = 0x90000000-> size = 0x10000000DRAM bank = 0x00000006-> start = 0xA0000000-> size = 0x10000000DRAM bank = 0x00000007-> start = 0xB0000000-> size = 0x0FF00000current eth = unknownip_addr = <NULL>baudrate = 115200 bpsTLB addr = 0xBFEF0000relocaddr = 0xBDE43000reloc off = 0x7A043000irq_sp = 0xB8E3D860sp start = 0xB8E3D850*****Ignore the "unrecognized filesystem type" stuff. I'm using ext4.mmc hwpartition only used for eMMC? Success:https://github.com/hardkernel/u-boot.gitcommit 33e05ffb159141b640571e91470172d83a2a1273*****U-Boot 2010.12-svn (May 12 2014 - 15:05:46) for Exynox4412 CPU: S5PC220 [Samsung SOC on SMP Platform Base on ARM CortexA9]APLL = 1000MHz, MPLL = 880MHzDRAM: 2 GiB PMIC VERSION : 0x00, CHIP REV : 3TrustZone Enabled BSPBL1 version: 20121128 Checking Boot Mode ... SDMMCMMC Device 0: 7580 MBMMC Device 1 not found*** Warning - using default environmentUSB3503 NINT = OUTPUT LOW!ModeKey Check... run normal_bootNo ethernet found.Hit any key to stop autoboot: 0Exynos4412 # wipeenv 0spot on!0: wipeenv1:0MMC Device 1 not foundWiping u-boot env at MMC: 0Exynos4412 # mmcinfoDevice: S3C_HSMMC2Manufacturer ID: 3OEM: 5344Name: SU08G Tran Speed: 0Rd Block Len: 512SD version 2.0High Capacity: YesSize: 0MB (block: 7580)Bus Width: 4-bitBoot Partition Size: 0 KBExynos4412 # saveenvSaving Environment to SMDK bootable device...done*****

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