February 2015 - U-Boot

[U-Boot] [PATCH] arch/x86/cpu/quark/mrc.c: Switch to U_BOOT_DATE / U_BOOT_TIME
by Tom Rini 25 Mar '15

25 Mar '15

Using __DATE__ and __TIME__ results in an error due to -Werror=date-time with gcc-4.9 (__DATE__ / __TIME__ might prevent reproducible builds) so switch these over to U_BOOT_DATE / U_BOOT_TIME Cc: Bin Meng <bmeng.cn(a)gmail.com> Cc: Simon Glass <sjg(a)chromium.org> Signed-off-by: Tom Rini <trini(a)ti.com> --- arch/x86/cpu/quark/mrc.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/x86/cpu/quark/mrc.c b/arch/x86/cpu/quark/mrc.c index 7eb34c5..2efb94d 100644 --- a/arch/x86/cpu/quark/mrc.c +++ b/arch/x86/cpu/quark/mrc.c @@ -34,6 +34,7 @@ */ #include <common.h> +#include <version.h> #include <asm/arch/mrc.h> #include <asm/arch/msg_port.h> #include "mrc_util.h" @@ -192,7 +193,7 @@ void mrc_init(struct mrc_params *mrc_params) ENTERFN(); DPF(D_INFO, "MRC Version %04x %s %s\n", MRC_VERSION, - __DATE__, __TIME__); + U_BOOT_DATE, U_BOOT_TIME); /* Set up the data structures used by mrc_mem_init() */ mrc_adjust_params(mrc_params); -- 1.7.9.5

2 2

[U-Boot] [PATCH v2 0/3] Boot from the bootable paritions
by Sjoerd Simons 25 Mar '15

25 Mar '15

In the discussion after the submission of the "Let the distro boot command scan all partitions" patchset it became clear the general consensus was that u-boot should not simply scan all partitions but instead only partitions with the bootable flag set, falling back to parition 1 as was previously done. This set of patches implements that Changes since v1: * Make updated part list command more precise about what arguments ordering it accepts. Sjoerd Simons (3): part: Add support for list filtering on bootable partitions config_cmd_default.h: Add 'env exists' command config_distro_bootcmd.h: Prefer booting from bootable paritions common/cmd_part.c | 53 +++++++++++++++++++++++++++++++---------- include/config_cmd_default.h | 1 + include/config_distro_bootcmd.h | 3 ++- 3 files changed, 44 insertions(+), 13 deletions(-) -- 2.1.4

3 9

[U-Boot] [PATCH] mii: add read-modify-write option to mii command
by Tim James 25 Mar '15

25 Mar '15

When accessing PHY registers it is often desirable to only update selected bits, so it is necessary to first read the current value before writing back an modified value with the relevant bits updated. To simplify this and to allow such operations to be incorporated into simple shell scripts propose adding a 'modify' option to the existing mii command, which takes a mask indicating the bits to be updated in addition to a data value containing the new bits, ie, <updated> = (<data> & <mask>) | (<current> & ~<mask>). Signed-off-by: Tim James <tim.james(a)macltd.com> Cc: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> --- --- a/common/cmd_mii.c +++ b/common/cmd_mii.c @@ -249,6 +249,7 @@ static uint last_addr_hi; static uint last_reg_lo; static uint last_reg_hi; +static uint last_mask; static void extract_range( char * input, @@ -272,7 +273,7 @@ char op[2]; unsigned char addrlo, addrhi, reglo, reghi; unsigned char addr, reg; - unsigned short data; + unsigned short data, mask; int rcode = 0; const char *devname; @@ -294,6 +295,7 @@ reglo = last_reg_lo; reghi = last_reg_hi; data = last_data; + mask = last_mask; if ((flag & CMD_FLAG_REPEAT) == 0) { op[0] = argv[1][0]; @@ -308,6 +310,8 @@ extract_range(argv[3], &reglo, &reghi); if (argc >= 5) data = simple_strtoul (argv[4], NULL, 16); + if (argc >= 6) + mask = simple_strtoul (argv[5], NULL, 16); } /* use current device */ @@ -375,6 +379,24 @@ } } } + } else if (op[0] == 'm') { + for (addr = addrlo; addr <= addrhi; addr++) { + for (reg = reglo; reg <= reghi; reg++) { + unsigned short current = 0; + if (miiphy_read (devname, addr, reg, &current) != 0) { + printf("Error reading from the PHY addr=%02x reg=%02x\n", + addr, reg); + rcode = 1; + } else { + unsigned short updated = (data & mask) | (current & ~mask); + if (miiphy_write (devname, addr, reg, 0xFFFF & updated) != 0) { + printf("Error writing to the PHY addr=%02x reg=%02x\n", + addr, reg); + rcode = 1; + } + } + } + } } else if (strncmp(op, "du", 2) == 0) { ushort regs[6]; int ok = 1; @@ -417,6 +439,7 @@ last_reg_lo = reglo; last_reg_hi = reghi; last_data = data; + last_mask = mask; return rcode; } @@ -424,13 +447,15 @@ /***************************************************/ U_BOOT_CMD( - mii, 5, 1, do_mii, + mii, 6, 1, do_mii, "MII utility commands", - "device - list available devices\n" - "mii device <devname> - set current device\n" - "mii info <addr> - display MII PHY info\n" - "mii read <addr> <reg> - read MII PHY <addr> register <reg>\n" - "mii write <addr> <reg> <data> - write MII PHY <addr> register <reg>\n" - "mii dump <addr> <reg> - pretty-print <addr> <reg> (0-5 only)\n" + "device - list available devices\n" + "mii device <devname> - set current device\n" + "mii info <addr> - display MII PHY info\n" + "mii read <addr> <reg> - read MII PHY <addr> register <reg>\n" + "mii write <addr> <reg> <data> - write MII PHY <addr> register <reg>\n" + "mii modify <addr> <reg> <data> <mask> - modify MII PHY <addr> register <reg>\n" + " updating bits identified in <mask>\n" + "mii dump <addr> <reg> - pretty-print <addr> <reg> (0-5 only)\n" "Addr and/or reg may be ranges, e.g. 2-7." ); -- Scanned by iCritical.

2 1

[U-Boot] [PATCH V3 1/3] bcm2835/rpi: add SPDX license tags for some files
by Stephen Warren 24 Mar '15

24 Mar '15

Signed-off-by: Stephen Warren <swarren(a)wwwdotorg.org> --- arch/arm/cpu/arm1176/bcm2835/Makefile | 12 ++---------- arch/arm/include/asm/arch-bcm2835/sdhci.h | 12 +----------- arch/arm/include/asm/arch-bcm2835/timer.h | 12 +----------- arch/arm/include/asm/arch-bcm2835/wdog.h | 12 +----------- board/raspberrypi/rpi/Makefile | 12 ++---------- board/raspberrypi/rpi/rpi.c | 12 +----------- include/configs/rpi.h | 12 +----------- 7 files changed, 9 insertions(+), 75 deletions(-) diff --git a/arch/arm/cpu/arm1176/bcm2835/Makefile b/arch/arm/cpu/arm1176/bcm2835/Makefile index 0ad36906dfc5..7e5dbe1fdeaf 100644 --- a/arch/arm/cpu/arm1176/bcm2835/Makefile +++ b/arch/arm/cpu/arm1176/bcm2835/Makefile @@ -1,15 +1,7 @@ # -# See file CREDITS for list of people who contributed to this -# project. +# (C) Copyright 2012 Stephen Warren # -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License -# version 2 as published by the Free Software Foundation. -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. +# SPDX-License-Identifier: GPL-2.0 # obj-y := lowlevel_init.o diff --git a/arch/arm/include/asm/arch-bcm2835/sdhci.h b/arch/arm/include/asm/arch-bcm2835/sdhci.h index a4f867b2e9a4..da4d5cd5a88f 100644 --- a/arch/arm/include/asm/arch-bcm2835/sdhci.h +++ b/arch/arm/include/asm/arch-bcm2835/sdhci.h @@ -1,17 +1,7 @@ /* * (C) Copyright 2012 Stephen Warren * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. + * SPDX-License-Identifier: GPL-2.0 */ #ifndef _BCM2835_SDHCI_H_ diff --git a/arch/arm/include/asm/arch-bcm2835/timer.h b/arch/arm/include/asm/arch-bcm2835/timer.h index c2001b6f932a..2d7cfe5c56f8 100644 --- a/arch/arm/include/asm/arch-bcm2835/timer.h +++ b/arch/arm/include/asm/arch-bcm2835/timer.h @@ -1,17 +1,7 @@ /* * (C) Copyright 2012 Stephen Warren * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. + * SPDX-License-Identifier: GPL-2.0 */ #ifndef _BCM2835_TIMER_H diff --git a/arch/arm/include/asm/arch-bcm2835/wdog.h b/arch/arm/include/asm/arch-bcm2835/wdog.h index 303a65f32e08..f369ab589c9a 100644 --- a/arch/arm/include/asm/arch-bcm2835/wdog.h +++ b/arch/arm/include/asm/arch-bcm2835/wdog.h @@ -1,17 +1,7 @@ /* * (C) Copyright 2012 Stephen Warren * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. + * SPDX-License-Identifier: GPL-2.0 */ #ifndef _BCM2835_TIMER_H diff --git a/board/raspberrypi/rpi/Makefile b/board/raspberrypi/rpi/Makefile index c53c92b1ddb7..4ce2c983b382 100644 --- a/board/raspberrypi/rpi/Makefile +++ b/board/raspberrypi/rpi/Makefile @@ -1,15 +1,7 @@ # -# See file CREDITS for list of people who contributed to this -# project. +# (C) Copyright 2012 Stephen Warren # -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License -# version 2 as published by the Free Software Foundation. -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. +# SPDX-License-Identifier: GPL-2.0 # obj-y := rpi.o diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c index 948078b958f7..fdbf87d6fa79 100644 --- a/board/raspberrypi/rpi/rpi.c +++ b/board/raspberrypi/rpi/rpi.c @@ -1,17 +1,7 @@ /* * (C) Copyright 2012-2013 Stephen Warren * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. + * SPDX-License-Identifier: GPL-2.0 */ #include <common.h> diff --git a/include/configs/rpi.h b/include/configs/rpi.h index 7ad8d080215d..9b32149b0ea3 100644 --- a/include/configs/rpi.h +++ b/include/configs/rpi.h @@ -1,17 +1,7 @@ /* * (C) Copyright 2012 Stephen Warren * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. + * SPDX-License-Identifier: GPL-2.0 */ #ifndef __CONFIG_H -- 1.9.1

5 16

[U-Boot] [PATCH] arm: mx5: Add support for USB armory board
by andrej＠inversepath.com 24 Mar '15

24 Mar '15

From: Andrej Rosano <andrej(a)inversepath.com> Add support for Inverse Path USB armory board, an open source flash-drive sized computer based on Freescale i.MX53 SoC. http://inversepath.com/usbarmory Signed-off-by: Andrej Rosano <andrej(a)inversepath.com> --- arch/arm/Kconfig | 5 + board/inversepath/usbarmory/Kconfig | 15 + board/inversepath/usbarmory/MAINTAINERS | 6 + board/inversepath/usbarmory/Makefile | 10 + board/inversepath/usbarmory/imximage.cfg | 82 ++++++ board/inversepath/usbarmory/usbarmory.c | 440 ++++++++++++++++++++++++++++++ configs/usbarmory_defconfig | 3 + include/configs/usbarmory.h | 115 ++++++++ 8 files changed, 676 insertions(+) create mode 100644 board/inversepath/usbarmory/Kconfig create mode 100644 board/inversepath/usbarmory/MAINTAINERS create mode 100644 board/inversepath/usbarmory/Makefile create mode 100644 board/inversepath/usbarmory/imximage.cfg create mode 100644 board/inversepath/usbarmory/usbarmory.c create mode 100644 configs/usbarmory_defconfig create mode 100644 include/configs/usbarmory.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 820ba1c..11f0e8b 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -473,6 +473,10 @@ config TARGET_MX53SMD bool "Support mx53smd" select CPU_V7 +config TARGET_USBARMORY + bool "Support USB armory" + select CPU_V7 + config TARGET_MX51_EFIKAMX bool "Support mx51_efikamx" select CPU_V7 @@ -818,6 +822,7 @@ source "board/h2200/Kconfig" source "board/hale/tt01/Kconfig" source "board/icpdas/lp8x4x/Kconfig" source "board/imx31_phycore/Kconfig" +source "board/inversepath/usbarmory/Kconfig" source "board/isee/igep0033/Kconfig" source "board/jornada/Kconfig" source "board/karo/tx25/Kconfig" diff --git a/board/inversepath/usbarmory/Kconfig b/board/inversepath/usbarmory/Kconfig new file mode 100644 index 0000000..254b6c9 --- /dev/null +++ b/board/inversepath/usbarmory/Kconfig @@ -0,0 +1,15 @@ +if TARGET_USBARMORY + +config SYS_BOARD + default "usbarmory" + +config SYS_VENDOR + default "inversepath" + +config SYS_SOC + default "mx5" + +config SYS_CONFIG_NAME + default "usbarmory" + +endif diff --git a/board/inversepath/usbarmory/MAINTAINERS b/board/inversepath/usbarmory/MAINTAINERS new file mode 100644 index 0000000..71a3dd4 --- /dev/null +++ b/board/inversepath/usbarmory/MAINTAINERS @@ -0,0 +1,6 @@ +USBARMORY BOARD +M: Andrej Rosano <andrej(a)inversepath.com> +S: Maintained +F: board/inversepath/usbarmory/ +F: include/configs/usbarmory.h +F: configs/usbarmory_defconfig diff --git a/board/inversepath/usbarmory/Makefile b/board/inversepath/usbarmory/Makefile new file mode 100644 index 0000000..9b8bd80 --- /dev/null +++ b/board/inversepath/usbarmory/Makefile @@ -0,0 +1,10 @@ +# +# USB armory MkI board Makefile +# http://inversepath.com/usbarmory +# +# Copyright (C) 2015, Inverse Path +# Andrej Rosano <andrej(a)inversepath.com> +# +# SPDX-License-Identifier:|____GPL-2.0+ + +obj-y := usbarmory.o diff --git a/board/inversepath/usbarmory/imximage.cfg b/board/inversepath/usbarmory/imximage.cfg new file mode 100644 index 0000000..392d2f9 --- /dev/null +++ b/board/inversepath/usbarmory/imximage.cfg @@ -0,0 +1,82 @@ +/* + * USB armory MkI board imximage configuration + * http://inversepath.com/usbarmory + * + * Copyright (C) 2015, Inverse Path + * Andrej Rosano <andrej(a)inversepath.com> + * + * SPDX-License-Identifier:|____GPL-2.0+ + */ + +IMAGE_VERSION 2 +BOOT_FROM sd + + +/* IOMUX */ + +DATA 4 0x53fa86f4 0x00000000 /* GRP_DDRMODE_CTL */ +DATA 4 0x53fa8714 0x00000000 /* GRP_DDRMODE */ +DATA 4 0x53fa86fc 0x00000000 /* GRP_DDRPKE */ +DATA 4 0x53fa8724 0x04000000 /* GRP_DDR_TYPE */ + +DATA 4 0x53fa872c 0x00300000 /* GRP_B3DS */ +DATA 4 0x53fa8554 0x00300000 /* DRAM_DQM3 */ +DATA 4 0x53fa8558 0x00300040 /* DRAM_SDQS3 */ + +DATA 4 0x53fa8728 0x00300000 /* GRP_B2DS */ +DATA 4 0x53fa8560 0x00300000 /* DRAM_DQM2 */ +DATA 4 0x53fa8568 0x00300040 /* DRAM_SDQS2 */ + +DATA 4 0x53fa871c 0x00300000 /* GRP_B1DS */ +DATA 4 0x53fa8594 0x00300000 /* DRAM_DQM1 */ +DATA 4 0x53fa8590 0x00300040 /* DRAM_SDQS1 */ + +DATA 4 0x53fa8718 0x00300000 /* GRP_B0DS */ +DATA 4 0x53fa8584 0x00300000 /* DRAM_DQM0 */ +DATA 4 0x53fa857c 0x00300040 /* DRAM_SDQS0 */ + +DATA 4 0x53fa8578 0x00300000 /* DRAM_SDCLK0 */ +DATA 4 0x53fa8570 0x00300000 /* DRAM_SDCLK1 */ + +DATA 4 0x53fa8574 0x00300000 /* DRAM_CAS */ +DATA 4 0x53fa8588 0x00300000 /* DRAM_RAS */ +DATA 4 0x53fa86f0 0x00300000 /* GRP_ADDS */ +DATA 4 0x53fa8720 0x00300000 /* GRP_CTLDS */ + +DATA 4 0x53fa8564 0x00300040 /* DRAM_SDODT1 */ +DATA 4 0x53fa8580 0x00300040 /* DRAM_SDODT0 */ + + +/* ESDCTL */ + +DATA 4 0x63fd9000 0x84180000 /* ESDCTL_ESDCTL */ + +DATA 4 0x63fd9004 0x0002002d /* ESDCTL_ESDPTC */ +DATA 4 0x63fd9008 0x12273030 /* ESDCTL_ESDOTC */ +DATA 4 0x63fd900c 0x9f5152e3 /* ESDCTL_ESDCFG0 */ +DATA 4 0x63fd9010 0xb68e8a63 /* ESDCTL_ESDCFG1 */ +DATA 4 0x63fd9014 0x01ff00db /* ESDCTL_ESDCFG2 */ +DATA 4 0x63fd9018 0x00011740 /* ESDCTL_ESDMISC */ + +DATA 4 0x63fd901c 0x00008032 /* ESDCTL_ESDSCR */ +DATA 4 0x63fd901c 0x00008033 +DATA 4 0x63fd901c 0x00028031 +DATA 4 0x63fd901c 0x052080b0 +DATA 4 0x63fd901c 0x04008040 +DATA 4 0x63fd901c 0x0000803a +DATA 4 0x63fd901c 0x0000803b +DATA 4 0x63fd901c 0x00028039 +DATA 4 0x63fd901c 0x05208138 +DATA 4 0x63fd901c 0x04008048 +DATA 4 0x63fd901c 0x00000000 + +DATA 4 0x63fd9020 0x00005800 /* ESDCTL_ESDREF */ +DATA 4 0x63fd902c 0x000026d2 /* ESDCTL_ESDEWD */ +DATA 4 0x63fd9030 0x009f0e21 /* ESDCTL_ESDOR */ +DATA 4 0x63fd9040 0x05380003 /* ESDCTL_ZQHWCTRL */ +DATA 4 0x63fd9058 0x00022227 /* ESDCTL_ODTCTRL */ + +DATA 4 0x63fd907c 0x01370138 /* ESDCTL_DGCTRL0 */ +DATA 4 0x63fd9080 0x013b013c /* ESDCTL_DGCTRL1 */ +DATA 4 0x63fd9088 0x35343535 /* ESDCTL_RDDLCTL */ +DATA 4 0x63fd9090 0x4d444c44 /* ESDCTL_WRDLCTL */ diff --git a/board/inversepath/usbarmory/usbarmory.c b/board/inversepath/usbarmory/usbarmory.c new file mode 100644 index 0000000..2ebd697 --- /dev/null +++ b/board/inversepath/usbarmory/usbarmory.c @@ -0,0 +1,440 @@ +/* + * USB armory MkI board initialization + * http://inversepath.com/usbarmory + * + * Copyright (C) 2015, Inverse Path + * Andrej Rosano <andrej(a)inversepath.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/imx-regs.h> +#include <asm/arch/sys_proto.h> +#include <asm/arch/crm_regs.h> +#include <asm/arch/clock.h> +#include <asm/arch/iomux-mx53.h> +#include <asm/errno.h> +#include <i2c.h> +#include <mmc.h> +#include <fsl_esdhc.h> +#include <asm/gpio.h> + +DECLARE_GLOBAL_DATA_PTR; + +u32 get_board_rev(void) +{ + struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE; + struct fuse_bank *bank = &iim->bank[0]; + struct fuse_bank0_regs *fuse = + (struct fuse_bank0_regs *)bank->fuse_regs; + + int rev = readl(&fuse->gp[6]); + + return (get_cpu_rev() & ~(0xF << 8)) | (rev & 0xF) << 8; +} + +#ifdef CONFIG_FSL_ESDHC +struct fsl_esdhc_cfg esdhc_cfg[1] = { + {MMC_SDHC1_BASE_ADDR} +}; + +int board_mmc_getcd(struct mmc *mmc) +{ + /* CD not present */ + return 1; +} + +int board_mmc_init(bd_t *bis) +{ + int ret = 0; + + esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); + ret = fsl_esdhc_initialize(bis, &esdhc_cfg[0]); + + return ret; +} +#endif + +#define SD_CMD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_DSE_HIGH | \ + PAD_CTL_PUS_100K_UP) +#define I2C_PAD_CTRL (PAD_CTL_SRE_FAST | PAD_CTL_DSE_HIGH | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_ODE) +#define PAD_CTRL_UP PAD_CTL_PUS_100K_UP +#define PAD_CTRL_GND PAD_CTL_PUS_100K_DOWN + +static void setup_iomux_sd(void) +{ + static const iomux_v3_cfg_t pads[] = { + NEW_PAD_CTRL(MX53_PAD_SD1_CMD__ESDHC1_CMD, SD_CMD_PAD_CTRL), + NEW_PAD_CTRL(MX53_PAD_SD1_CLK__ESDHC1_CLK, MX53_SDHC_PAD_CTRL), + NEW_PAD_CTRL(MX53_PAD_SD1_DATA0__ESDHC1_DAT0, + MX53_SDHC_PAD_CTRL), + NEW_PAD_CTRL(MX53_PAD_SD1_DATA1__ESDHC1_DAT1, + MX53_SDHC_PAD_CTRL), + NEW_PAD_CTRL(MX53_PAD_SD1_DATA2__ESDHC1_DAT2, + MX53_SDHC_PAD_CTRL), + NEW_PAD_CTRL(MX53_PAD_SD1_DATA3__ESDHC1_DAT3, + MX53_SDHC_PAD_CTRL), + MX53_PAD_EIM_DA13__GPIO3_13, + }; + + imx_iomux_v3_setup_multiple_pads(pads, ARRAY_SIZE(pads)); +} + +static void setup_iomux_led(void) +{ + static const iomux_v3_cfg_t pads[] = { + NEW_PAD_CTRL(MX53_PAD_DISP0_DAT6__GPIO4_27, + PAD_CTL_PUS_100K_DOWN), + }; + + imx_iomux_v3_setup_multiple_pads(pads, ARRAY_SIZE(pads)); +} + +static void setup_iomux_i2c(void) +{ + static const iomux_v3_cfg_t pads[] = { + NEW_PAD_CTRL(MX53_PAD_EIM_D28__I2C1_SDA, I2C_PAD_CTRL), + NEW_PAD_CTRL(MX53_PAD_EIM_D21__I2C1_SCL, I2C_PAD_CTRL), + }; + + imx_iomux_v3_setup_multiple_pads(pads, ARRAY_SIZE(pads)); +} + +static void setup_iomux_pinheader(void) +{ + static const iomux_v3_cfg_t pads[] = { + NEW_PAD_CTRL(MX53_PAD_CSI0_DAT8__GPIO5_26, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_CSI0_DAT9__GPIO5_27, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_CSI0_DAT10__UART1_TXD_MUX, + MX53_UART_PAD_CTRL), + NEW_PAD_CTRL(MX53_PAD_CSI0_DAT11__UART1_RXD_MUX, + MX53_UART_PAD_CTRL), + NEW_PAD_CTRL(MX53_PAD_CSI0_DAT12__GPIO5_30, PAD_CTRL_UP), + }; + + imx_iomux_v3_setup_multiple_pads(pads, ARRAY_SIZE(pads)); +} + +static void setup_iomux_unused_boot(void) +{ + static const iomux_v3_cfg_t pads[] = { + + /* Pulled-up pads */ + NEW_PAD_CTRL(MX53_PAD_EIM_A21__GPIO2_17, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_EIM_DA0__GPIO3_0, PAD_CTRL_UP), + + /* Grounded pads */ + NEW_PAD_CTRL(MX53_PAD_EIM_LBA__GPIO2_27, PAD_CTRL_GND), + NEW_PAD_CTRL(MX53_PAD_EIM_EB0__GPIO2_28, PAD_CTRL_GND), + NEW_PAD_CTRL(MX53_PAD_EIM_EB1__GPIO2_29, PAD_CTRL_GND), + NEW_PAD_CTRL(MX53_PAD_EIM_A16__GPIO2_22, PAD_CTRL_GND), + NEW_PAD_CTRL(MX53_PAD_EIM_A17__GPIO2_21, PAD_CTRL_GND), + NEW_PAD_CTRL(MX53_PAD_EIM_A18__GPIO2_20, PAD_CTRL_GND), + NEW_PAD_CTRL(MX53_PAD_EIM_A19__GPIO2_19, PAD_CTRL_GND), + NEW_PAD_CTRL(MX53_PAD_EIM_A20__GPIO2_18, PAD_CTRL_GND), + NEW_PAD_CTRL(MX53_PAD_EIM_A22__GPIO2_16, PAD_CTRL_GND), + NEW_PAD_CTRL(MX53_PAD_EIM_DA1__GPIO3_1, PAD_CTRL_GND), + NEW_PAD_CTRL(MX53_PAD_EIM_DA2__GPIO3_2, PAD_CTRL_GND), + NEW_PAD_CTRL(MX53_PAD_EIM_DA3__GPIO3_3, PAD_CTRL_GND), + NEW_PAD_CTRL(MX53_PAD_EIM_DA4__GPIO3_4, PAD_CTRL_GND), + NEW_PAD_CTRL(MX53_PAD_EIM_DA5__GPIO3_5, PAD_CTRL_GND), + NEW_PAD_CTRL(MX53_PAD_EIM_DA6__GPIO3_6, PAD_CTRL_GND), + NEW_PAD_CTRL(MX53_PAD_EIM_DA7__GPIO3_7, PAD_CTRL_GND), + NEW_PAD_CTRL(MX53_PAD_EIM_DA8__GPIO3_8, PAD_CTRL_GND), + NEW_PAD_CTRL(MX53_PAD_EIM_DA9__GPIO3_9, PAD_CTRL_GND), + NEW_PAD_CTRL(MX53_PAD_EIM_DA10__GPIO3_10, PAD_CTRL_GND), + }; + + imx_iomux_v3_setup_multiple_pads(pads, ARRAY_SIZE(pads)); +} + +static void setup_iomux_unused_nc(void) +{ + /* Out of reset values define the pin values before the + ROM is executed so we force all the not connected pins + to a known state */ + static const iomux_v3_cfg_t pads[] = { + + /* CONTROL PINS block */ + NEW_PAD_CTRL(MX53_PAD_GPIO_0__GPIO1_0, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_GPIO_1__GPIO1_1, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_GPIO_2__GPIO1_2, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_GPIO_3__GPIO1_3, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_GPIO_4__GPIO1_4, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_GPIO_5__GPIO1_5, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_GPIO_6__GPIO1_6, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_GPIO_7__GPIO1_7, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_GPIO_8__GPIO1_8, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_GPIO_9__GPIO1_9, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_GPIO_10__GPIO4_0, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_GPIO_11__GPIO4_1, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_GPIO_12__GPIO4_2, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_GPIO_13__GPIO4_3, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_GPIO_14__GPIO4_4, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_GPIO_16__GPIO7_11, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_GPIO_17__GPIO7_12, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_GPIO_18__GPIO7_13, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_GPIO_19__GPIO4_5, PAD_CTRL_UP), + + /* EIM block */ + NEW_PAD_CTRL(MX53_PAD_EIM_OE__GPIO2_25, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_EIM_WAIT__GPIO5_0, PAD_CTRL_UP), + /* EIM_LBA: setup_iomux_unused_boot() */ + NEW_PAD_CTRL(MX53_PAD_EIM_RW__GPIO2_26, PAD_CTRL_UP), + /* EIM_EB0: setup_iomux_unused_boot() */ + /* EIM_EB1: setup_iomux_unused_boot() */ + NEW_PAD_CTRL(MX53_PAD_EIM_EB2__GPIO2_30, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_EIM_EB3__GPIO2_31, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_EIM_CS0__GPIO2_23, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_EIM_CS1__GPIO2_24, PAD_CTRL_UP), + /* EIM_A16: setup_iomux_unused_boot() */ + /* EIM_A17: setup_iomux_unused_boot() */ + /* EIM_A18: setup_iomux_unused_boot() */ + /* EIM_A19: setup_iomux_unused_boot() */ + /* EIM_A20: setup_iomux_unused_boot() */ + /* EIM_A21: setup_iomux_unused_boot() */ + /* EIM_A22: setup_iomux_unused_boot() */ + NEW_PAD_CTRL(MX53_PAD_EIM_A23__GPIO6_6, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_EIM_A24__GPIO5_4, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_EIM_A25__GPIO5_2, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_EIM_D16__GPIO3_16, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_EIM_D17__GPIO3_17, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_EIM_D18__GPIO3_18, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_EIM_D19__GPIO3_19, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_EIM_D20__GPIO3_20, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_EIM_D21__GPIO3_21, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_EIM_D22__GPIO3_22, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_EIM_D23__GPIO3_23, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_EIM_D24__GPIO3_24, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_EIM_D25__GPIO3_25, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_EIM_D26__GPIO3_26, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_EIM_D27__GPIO3_27, PAD_CTRL_UP), + /* EIM_D28: setup_iomux_unused_boot() */ + /* EIM_D29: setup_iomux_unused_boot() */ + NEW_PAD_CTRL(MX53_PAD_EIM_D30__GPIO3_30, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_EIM_D31__GPIO3_31, PAD_CTRL_UP), + /* EIM_DA0: setup_iomux_unused_boot() */ + /* EIM_DA1: setup_iomux_unused_boot() */ + /* EIM_DA2: setup_iomux_unused_boot() */ + /* EIM_DA3: setup_iomux_unused_boot() */ + /* EIM_DA4: setup_iomux_unused_boot() */ + /* EIM_DA5: setup_iomux_unused_boot() */ + /* EIM_DA6: setup_iomux_unused_boot() */ + /* EIM_DA7: setup_iomux_unused_boot() */ + /* EIM_DA8: setup_iomux_unused_boot() */ + /* EIM_DA9: setup_iomux_unused_boot() */ + /* EIM_DA10: setup_iomux_unused_boot() */ + NEW_PAD_CTRL(MX53_PAD_EIM_DA11__GPIO3_11, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_EIM_DA12__GPIO3_12, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_EIM_DA13__GPIO3_13, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_EIM_DA14__GPIO3_14, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_EIM_DA15__GPIO3_15, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_NANDF_WE_B__GPIO6_12, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_NANDF_RE_B__GPIO6_13, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_NANDF_ALE__GPIO6_8, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_NANDF_CLE__GPIO6_7, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_NANDF_WP_B__GPIO6_9, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_NANDF_RB0__GPIO6_10, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_NANDF_CS0__GPIO6_11, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_NANDF_CS1__GPIO6_14, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_NANDF_CS2__GPIO6_15, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_NANDF_CS3__GPIO6_16, PAD_CTRL_UP), + + /* MISC block */ + NEW_PAD_CTRL(MX53_PAD_FEC_MDC__GPIO1_31, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_FEC_MDIO__GPIO1_22, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_FEC_CRS_DV__GPIO1_25, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_FEC_REF_CLK__GPIO1_23, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_FEC_RX_ER__GPIO1_24, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_FEC_TX_EN__GPIO1_28, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_FEC_RXD0__GPIO1_27, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_FEC_RXD1__GPIO1_26, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_FEC_TXD0__GPIO1_30, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_FEC_TXD1__GPIO1_29, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_KEY_COL0__GPIO4_6, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_KEY_ROW0__GPIO4_7, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_KEY_COL1__GPIO4_8, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_KEY_ROW1__GPIO4_9, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_KEY_COL2__GPIO4_10, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_KEY_ROW2__GPIO4_11, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_KEY_COL3__GPIO4_12, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_KEY_ROW3__GPIO4_13, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_KEY_COL4__GPIO4_14, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_KEY_ROW4__GPIO4_15, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_SD2_CMD__GPIO1_11, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_SD2_CLK__GPIO1_10, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_SD2_DATA0__GPIO1_15, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_SD2_DATA1__GPIO1_14, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_SD2_DATA2__GPIO1_13, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_SD2_DATA3__GPIO1_12, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_PATA_BUFFER_EN__GPIO7_1, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_PATA_CS_0__GPIO7_9, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_PATA_CS_1__GPIO7_10, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_PATA_DA_0__GPIO7_6, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_PATA_DA_1__GPIO7_7, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_PATA_DA_2__GPIO7_8, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_PATA_DATA0__GPIO2_0, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_PATA_DATA1__GPIO2_1, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_PATA_DATA2__GPIO2_2, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_PATA_DATA3__GPIO2_3, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_PATA_DATA4__GPIO2_4, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_PATA_DATA5__GPIO2_5, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_PATA_DATA6__GPIO2_6, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_PATA_DATA7__GPIO2_7, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_PATA_DATA8__GPIO2_8, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_PATA_DATA9__GPIO2_9, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_PATA_DATA10__GPIO2_10, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_PATA_DATA11__GPIO2_11, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_PATA_DATA12__GPIO2_12, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_PATA_DATA13__GPIO2_13, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_PATA_DATA14__GPIO2_14, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_PATA_DATA15__GPIO2_15, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_PATA_DIOR__GPIO7_3, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_PATA_DIOW__GPIO6_17, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_PATA_DMACK__GPIO6_18, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_PATA_DMARQ__GPIO7_0, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_PATA_INTRQ__GPIO7_2, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_PATA_IORDY__GPIO7_5, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_PATA_RESET_B__GPIO7_4, PAD_CTRL_UP), + + /* IPU block */ + NEW_PAD_CTRL(MX53_PAD_CSI0_DAT4__GPIO5_22, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_CSI0_DAT5__GPIO5_23, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_CSI0_DAT6__GPIO5_24, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_CSI0_DAT7__GPIO5_25, PAD_CTRL_UP), + /* CSI0_DAT8: setup_iomux_pinheader() */ + /* CSI0_DAT9: setup_iomux_pinheader() */ + /* CSI0_DAT10: setup_iomux_pinheader() */ + /* CSI0_DAT11: setup_iomux_pinheader() */ + /* CSI0_DAT12: setup_iomux_pinheader() */ + NEW_PAD_CTRL(MX53_PAD_CSI0_DAT13__GPIO5_31, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_CSI0_DAT14__GPIO6_0, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_CSI0_DAT15__GPIO6_1, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_CSI0_DAT16__GPIO6_2, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_CSI0_DAT17__GPIO6_3, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_CSI0_DAT18__GPIO6_4, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_CSI0_DAT19__GPIO6_5, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_CSI0_VSYNC__GPIO5_21, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_CSI0_PIXCLK__GPIO5_18, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_CSI0_MCLK__GPIO5_19, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_CSI0_DATA_EN__GPIO5_20, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_DI0_PIN2__GPIO4_18, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_DI0_PIN3__GPIO4_19, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_DI0_PIN4__GPIO4_20, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_DI0_PIN15__GPIO4_17, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_DISP0_DAT0__GPIO4_21, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_DISP0_DAT1__GPIO4_22, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_DISP0_DAT2__GPIO4_23, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_DISP0_DAT3__GPIO4_24, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_DISP0_DAT4__GPIO4_25, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_DISP0_DAT5__GPIO4_26, PAD_CTRL_UP), + /* DISP0_DAT6: setup_iomux_led() */ + NEW_PAD_CTRL(MX53_PAD_DISP0_DAT7__GPIO4_28, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_DISP0_DAT8__GPIO4_29, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_DISP0_DAT9__GPIO4_30, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_DISP0_DAT10__GPIO4_31, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_DISP0_DAT11__GPIO5_5, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_DISP0_DAT12__GPIO5_6, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_DISP0_DAT13__GPIO5_7, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_DISP0_DAT14__GPIO5_8, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_DISP0_DAT15__GPIO5_9, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_DISP0_DAT16__GPIO5_10, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_DISP0_DAT17__GPIO5_11, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_DISP0_DAT18__GPIO5_12, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_DISP0_DAT19__GPIO5_13, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_DISP0_DAT20__GPIO5_14, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_DISP0_DAT21__GPIO5_15, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_DISP0_DAT22__GPIO5_16, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_DISP0_DAT23__GPIO5_17, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_DI0_DISP_CLK__GPIO4_16, PAD_CTRL_UP), + + /* LVDS block */ + NEW_PAD_CTRL(MX53_PAD_LVDS0_TX0_P__GPIO7_30, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_LVDS0_TX1_P__GPIO7_28, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_LVDS0_TX2_P__GPIO7_26, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_LVDS0_TX3_P__GPIO7_22, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_LVDS1_TX0_P__GPIO6_30, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_LVDS1_TX1_P__GPIO6_28, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_LVDS1_TX2_P__GPIO6_24, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_LVDS1_TX3_P__GPIO6_22, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_LVDS0_CLK_P__GPIO7_24, PAD_CTRL_UP), + NEW_PAD_CTRL(MX53_PAD_LVDS1_CLK_P__GPIO6_26, PAD_CTRL_UP), + }; + + imx_iomux_v3_setup_multiple_pads(pads, ARRAY_SIZE(pads)); +} + +static void setup_gpio(void) +{ + int i, j; + + /* set all GPIO ports as input */ + for (i = 0; i < 8; i++) { + for (j = 0; j < 32; j++) + gpio_direction_input(IMX_GPIO_NR(i, j)); + } +} + +#define CPU_CLOCK 800 + +static void set_clock(void) +{ + u32 ref_clk = MXC_HCLK; + const uint32_t cpuclk = CPU_CLOCK; + const uint32_t dramclk = 400; + int ret; + + ret = mxc_set_clock(ref_clk, cpuclk, MXC_ARM_CLK); + if (ret) + printf("CPU: Switch CPU clock to %dMHZ failed\n", cpuclk); + + ret = mxc_set_clock(ref_clk, dramclk, MXC_PERIPH_CLK); + if (ret) + printf("CPU: Switch peripheral clock to %dMHz failed\n", + dramclk); + + ret = mxc_set_clock(ref_clk, dramclk, MXC_DDR_CLK); + if (ret) + printf("CPU: Switch DDR clock to %dMHz failed\n", dramclk); +} + +int board_early_init_f(void) +{ + setup_iomux_unused_nc(); + setup_iomux_unused_boot(); + setup_iomux_sd(); + setup_iomux_led(); + setup_iomux_pinheader(); + setup_gpio(); + + set_clock(); + return 0; +} + +int board_init(void) +{ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + setup_iomux_i2c(); + return 0; +} + +int board_late_init(void) +{ + print_cpuinfo(); + return 0; +} + +int dram_init(void) +{ + gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE, 1 << 30); + return 0; +} + +int checkboard(void) +{ + puts("Board: Inverse Path USB armory MkI\n"); + return 0; +} diff --git a/configs/usbarmory_defconfig b/configs/usbarmory_defconfig new file mode 100644 index 0000000..994d2c7 --- /dev/null +++ b/configs/usbarmory_defconfig @@ -0,0 +1,3 @@ +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/inversepath/usbarmory/imximage.cfg" +CONFIG_ARM=y +CONFIG_TARGET_USBARMORY=y diff --git a/include/configs/usbarmory.h b/include/configs/usbarmory.h new file mode 100644 index 0000000..e00ec7b --- /dev/null +++ b/include/configs/usbarmory.h @@ -0,0 +1,115 @@ +/* + * USB armory MkI board configuration settings + * http://inversepath.com/usbarmory + * + * Copyright (C) 2015, Inverse Path + * Andrej Rosano <andrej(a)inversepath.com> + * + * SPDX-License-Identifier:|____GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#define CONFIG_MX53 +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_BOARD_LATE_INIT +#define CONFIG_OF_LIBFDT +#define CONFIG_SYS_GENERIC_BOARD +#define CONFIG_MXC_GPIO + +#include <asm/arch/imx-regs.h> +#include <config_cmd_default.h> + +/* U-Boot commands */ +#define CONFIG_CMD_BOOTZ +#define CONFIG_CMD_FAT +#define CONFIG_CMD_MEMTEST +#define CONFIG_CMD_EXT2 +#undef CONFIG_CMD_IMLS + +/* U-Boot environment */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_SYS_NO_FLASH +#define CONFIG_ENV_OFFSET (6 * 64 * 1024) +#define CONFIG_ENV_SIZE (8 * 1024) +#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_SYS_MMC_ENV_DEV 0 + +/* U-Boot general configurations */ +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_CBSIZE 512 +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE +#define CONFIG_CMDLINE_EDITING + +/* UART */ +#define CONFIG_MXC_UART +#define CONFIG_MXC_UART_BASE UART1_BASE +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200 + +/* SD/MMC */ +#define CONFIG_CMD_MMC +#define CONFIG_FSL_ESDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_FSL_ESDHC_NUM 2 +#define CONFIG_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_DOS_PARTITION + +/* USB */ +#define CONFIG_CMD_USB +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_MX5 +#define CONFIG_USB_STORAGE +#define CONFIG_MXC_USB_PORT 1 +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 + +/* I2C */ +#define CONFIG_CMD_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC + +/* Fuse */ +#define CONFIG_CMD_FUSE +#define CONFIG_FSL_IIM + +/* Linux boot */ +#define CONFIG_BOOTDELAY 1 +#define CONFIG_LOADADDR 0x72000000 +#define CONFIG_SYS_TEXT_BASE 0x77800000 +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR +#define CONFIG_HOSTNAME usbarmory +#define CONFIG_BOOTARGS \ + "console=ttymxc0,115200 root=/dev/mmcblk0p1 rootwait rw" +#define CONFIG_BOOTCOMMAND \ + "ext2load mmc 0:1 0x70800000 /boot/uImage; ext2load mmc 0:1" \ + "0x71000000 /boot/imx53-usbarmory.dtb; bootm 0x70800000 - 0x71000000" + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM CSD0_BASE_ADDR +#define PHYS_SDRAM_SIZE (gd->ram_size) + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +#define CONFIG_SYS_MEMTEST_START 0x70000000 +#define CONFIG_SYS_MEMTEST_END 0x90000000 + +#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) + +#endif /* __CONFIG_H */ -- 1.7.10.4

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[U-Boot] [RFC PATCH 0/7] Add Driver Model support to network stack
by Joe Hershberger 23 Mar '15

23 Mar '15

For now this simply addresses the MAC part of the network hardware. The next part to implement is the PHY children. I wanted to get early feedback on what I have so far to make sure I'm going in the direction that Simon envisioned. Joe Hershberger (7): net: Provide a function to get the current MAC address net: Rename helper function to be more clear net: Remove unneeded "extern" in net.h net: Refactor in preparation for driver model net: Add basic driver model support to Ethernet stack net: Add network support to sandbox net: Add ARP and PING response to sandbox driver arch/mips/cpu/mips32/au1x00/au1x00_eth.c | 2 +- arch/powerpc/cpu/mpc8260/ether_fcc.c | 2 +- arch/powerpc/cpu/mpc85xx/ether_fcc.c | 2 +- arch/powerpc/cpu/mpc8xx/scc.c | 2 +- arch/sandbox/dts/sandbox.dts | 4 + common/board_r.c | 4 +- common/cmd_bdinfo.c | 2 + drivers/net/Makefile | 2 + drivers/net/sandbox.c | 166 +++++++++++++ include/configs/sandbox.h | 14 +- include/dm/uclass-id.h | 1 + include/net.h | 158 +++++++----- net/eth.c | 408 +++++++++++++++++++++++++++---- net/net.c | 2 +- 14 files changed, 649 insertions(+), 120 deletions(-) create mode 100644 drivers/net/sandbox.c -- 1.7.11.5

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[U-Boot] [PATCH v3] fastboot: add support for reboot-bootloader command
by Alexey Firago 23 Mar '15

23 Mar '15

The "fastboot reboot-bootloader" command is defined to re-enter into fastboot mode after rebooting into bootloader. This command is usually used after updating bootloader via fastboot. This commit implements only a generic side of the command - setting of the reset flag and then resetting. Setting of the reset flag is implemented using __weak fb_set_reboot_flag() function. The actual setting and checking of the reset flag should be implemented by a boot script and/or board/SoC specific code. Signed-off-by: Alexey Firago <alexey_firago(a)mentor.com> --- Changes in v3: - return -ENOSYS from default fb_set_reboot_flag() Changes in v2: - return error in default fb_set_reboot_flag() drivers/usb/gadget/f_fastboot.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c index 310175a..a000c25 100644 --- a/drivers/usb/gadget/f_fastboot.c +++ b/drivers/usb/gadget/f_fastboot.c @@ -122,6 +122,7 @@ static struct usb_gadget_strings *fastboot_strings[] = { }; static void rx_handler_command(struct usb_ep *ep, struct usb_request *req); +static int strcmp_l1(const char *s1, const char *s2); static void fastboot_complete(struct usb_ep *ep, struct usb_request *req) { @@ -317,8 +318,20 @@ static void compl_do_reset(struct usb_ep *ep, struct usb_request *req) do_reset(NULL, 0, 0, NULL); } +int __weak fb_set_reboot_flag(void) +{ + return -ENOSYS; +} + static void cb_reboot(struct usb_ep *ep, struct usb_request *req) { + char *cmd = req->buf; + if (!strcmp_l1("reboot-bootloader", cmd)) { + if (fb_set_reboot_flag()) { + fastboot_tx_write_str("FAILCannot set reboot flag"); + return; + } + } fastboot_func->in_req->complete = compl_do_reset; fastboot_tx_write_str("OKAY"); } -- 1.9.1

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[U-Boot] [PATCH] net/phy/realtek: Disable interrupt on Realtek Ethernet PHY drivers
by Codrin Ciubotariu 20 Mar '15

20 Mar '15

Some Realtek Ethernet PHYs, like RTL8211D(G/N) and RTL8211E(G), have interrupts enabled by default. If the interrupt is not treated later by the OS and the PHY's interrupt line is enabled and shared with other interrupts, the system will get an interrupt storm. This patch disables the interrupt for PHY devices that use one of the current Realtek Ethernet PHY drivers. Some of Realtek Ethernet PHYs, such as RTL8211B(L) have the interrupt masked. In this case, the functionality of the PHY should not be afected since this patch brings INER and INSR registers to their default values. Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu(a)freescale.com> Change-Id: Ic5e353da24f8fec335e446098ed863991a655554 --- drivers/net/phy/realtek.c | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c index a3ace68..ee97079 100644 --- a/drivers/net/phy/realtek.c +++ b/drivers/net/phy/realtek.c @@ -3,7 +3,7 @@ * * SPDX-License-Identifier: GPL-2.0+ * - * Copyright 2010-2011 Freescale Semiconductor, Inc. + * Copyright 2010-2011, 2015 Freescale Semiconductor, Inc. * author Andy Fleming */ #include <config.h> @@ -21,12 +21,28 @@ #define MIIM_RTL8211x_PHYSTAT_SPDDONE 0x0800 #define MIIM_RTL8211x_PHYSTAT_LINK 0x0400 +/* RTL8211x PHY Interrupt Enable Register */ +#define MIIM_RTL8211x_PHY_INER 0x12 +#define MIIM_RTL8211x_PHY_INTR_ENA 0x9f01 +#define MIIM_RTL8211x_PHY_INTR_DIS 0x0000 + +/* RTL8211x PHY Interrupt Status Register */ +#define MIIM_RTL8211x_PHY_INSR 0x13 /* RealTek RTL8211x */ static int rtl8211x_config(struct phy_device *phydev) { phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, BMCR_RESET); + /* mask interrupt at init; if the interrupt is + * needed indeed, it should be explicitly enabled + */ + phy_write(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211x_PHY_INER, + MIIM_RTL8211x_PHY_INTR_DIS); + + /* read interrupt status just to clear it */ + phy_read(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211x_PHY_INER); + genphy_config_aneg(phydev); return 0; -- 1.7.11.7

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[U-Boot] [PATCH] ARM: atmel: sama5d4 xplained: enable mmc power
by Bo Shen 18 Mar '15

18 Mar '15

Enable the power for MMC/SD port. Signed-off-by: Bo Shen <voice.shen(a)atmel.com> --- board/atmel/sama5d4_xplained/sama5d4_xplained.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/board/atmel/sama5d4_xplained/sama5d4_xplained.c b/board/atmel/sama5d4_xplained/sama5d4_xplained.c index bc2aa38..e7f225a 100644 --- a/board/atmel/sama5d4_xplained/sama5d4_xplained.c +++ b/board/atmel/sama5d4_xplained/sama5d4_xplained.c @@ -228,6 +228,9 @@ void sama5d4_xplained_mci1_hw_init(void) int board_mmc_init(bd_t *bis) { + /* Enable the power supply */ + at91_set_pio_output(AT91_PIO_PORTE, 4, 0); + return atmel_mci_init((void *)ATMEL_BASE_MCI1); } #endif /* CONFIG_GENERIC_ATMEL_MCI */ -- 2.3.0

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[U-Boot] [PATCH] ARM: at91: at91sam9rlek: add hush parser to defconfig
by Josh Wu 18 Mar '15

18 Mar '15

HUSH parser will handle the variable easier. That will be helpful for write a complicated U-Boot commands or varaibles. Signed-off-by: Josh Wu <josh.wu(a)atmel.com> --- configs/at91sam9rlek_dataflash_defconfig | 1 + configs/at91sam9rlek_mmc_defconfig | 1 + configs/at91sam9rlek_nandflash_defconfig | 1 + 3 files changed, 3 insertions(+) diff --git a/configs/at91sam9rlek_dataflash_defconfig b/configs/at91sam9rlek_dataflash_defconfig index 90516e0..c811ad5 100644 --- a/configs/at91sam9rlek_dataflash_defconfig +++ b/configs/at91sam9rlek_dataflash_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9RL,SYS_USE_DATAFLASH" CONFIG_ARM=y CONFIG_TARGET_AT91SAM9RLEK=y +CONFIG_HUSH_PARSER=y diff --git a/configs/at91sam9rlek_mmc_defconfig b/configs/at91sam9rlek_mmc_defconfig index b93c881..8704140 100644 --- a/configs/at91sam9rlek_mmc_defconfig +++ b/configs/at91sam9rlek_mmc_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9RL,SYS_USE_MMC" CONFIG_ARM=y CONFIG_TARGET_AT91SAM9RLEK=y +CONFIG_HUSH_PARSER=y diff --git a/configs/at91sam9rlek_nandflash_defconfig b/configs/at91sam9rlek_nandflash_defconfig index 0e2edfd..e3de043 100644 --- a/configs/at91sam9rlek_nandflash_defconfig +++ b/configs/at91sam9rlek_nandflash_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9RL,SYS_USE_NANDFLASH" CONFIG_ARM=y CONFIG_TARGET_AT91SAM9RLEK=y +CONFIG_HUSH_PARSER=y -- 1.9.1

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