December 2015 - U-Boot

[U-Boot] [PATCH 1/2] rockchip: add CONFIG_SPL_ROCKCHIP_SERIAL
by Lin Huang 01 Dec '15

01 Dec '15

we can use this config to disable rockchip serial driver in SPL stage, since some rockchip soc sram size is small(rk3036 etc), so we don't want rockchip serial driver build in SPL, but we still want use common debug driver in SPL. Signed-off-by: Lin Huang <hl(a)rock-chips.com> --- arch/arm/mach-rockchip/Kconfig | 3 +++ drivers/serial/Makefile | 2 +- include/configs/rk3288_common.h | 1 + 3 files changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index ccff81a..595263c 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -59,6 +59,9 @@ config DM_GPIO config ROCKCHIP_SERIAL default y +config SPL_ROCKCHIP_SERIAL + default n + source "arch/arm/mach-rockchip/rk3288/Kconfig" source "arch/arm/mach-rockchip/rk3036/Kconfig" endif diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index 1818c7c..73e30c6 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile @@ -41,7 +41,7 @@ obj-$(CONFIG_ZYNQ_SERIAL) += serial_zynq.o obj-$(CONFIG_BFIN_SERIAL) += serial_bfin.o obj-$(CONFIG_FSL_LPUART) += serial_lpuart.o obj-$(CONFIG_MXS_AUART) += mxs_auart.o -obj-$(CONFIG_ROCKCHIP_SERIAL) += serial_rockchip.o +obj-$(CONFIG_$(SPL_)ROCKCHIP_SERIAL) += serial_rockchip.o obj-$(CONFIG_ARC_SERIAL) += serial_arc.o obj-$(CONFIG_TEGRA_SERIAL) += serial_tegra.o obj-$(CONFIG_UNIPHIER_SERIAL) += serial_uniphier.o diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h index 74c7ee1..7f3d1ee 100644 --- a/include/configs/rk3288_common.h +++ b/include/configs/rk3288_common.h @@ -30,6 +30,7 @@ #define CONFIG_SPL_LIBCOMMON_SUPPORT #define CONFIG_SPL_LIBGENERIC_SUPPORT #define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_ROCKCHIP_SERIAL #define CONFIG_SYS_NS16550 #define CONFIG_SYS_NS16550_MEM32 #define CONFIG_SPL_BOARD_INIT -- 1.9.1

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[U-Boot] [PATCH] arm: imx6: novena: Enable extfs support in SPL
by Marek Vasut 01 Dec '15

01 Dec '15

Simple patch to enable support for extfs filesystem in SPL, this is useful to those who want to avoid vfat like plague. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Stefano Babic <sbabic(a)denx.de> --- include/configs/novena.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/configs/novena.h b/include/configs/novena.h index fc953f6..d5f517c 100644 --- a/include/configs/novena.h +++ b/include/configs/novena.h @@ -83,6 +83,7 @@ /* SPL */ #define CONFIG_SPL_FAT_SUPPORT +#define CONFIG_SPL_EXT_SUPPORT #define CONFIG_SPL_MMC_SUPPORT #include "imx6_spl.h" /* common IMX6 SPL configuration */ -- 2.1.4

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[U-Boot] [PATCH] arm: imx6: novena, gw_ventana: Fix use of pfuze100 bit definitions
by Marek Vasut 01 Dec '15

01 Dec '15

The following patch changed the PFUZE100 swbst register bit definitions and broke PMIC configuration on multiple boards, at least on the novena and gw_ventana. This patch fixes it. commit 8fa46350a4c7dca7710362f6c871098557b934ad Author: Peng Fan <Peng.Fan(a)freescale.com> Date: Fri Aug 7 16:43:45 2015 +0800 power: regulator: add pfuze100 support Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Fabio Estevam <fabio.estevam(a)freescale.com> Cc: Peng Fan <Peng.Fan(a)freescale.com> Cc: Przemyslaw Marczak <p.marczak(a)samsung.com> Cc: Stefano Babic <sbabic(a)denx.de> Cc: Tim Harvey <tharvey(a)gateworks.com> Cc: Vagrant Cascadian <vagrant(a)aikidev.net> --- board/gateworks/gw_ventana/common.c | 2 +- board/kosagi/novena/novena.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/board/gateworks/gw_ventana/common.c b/board/gateworks/gw_ventana/common.c index d406c83..a20190e 100644 --- a/board/gateworks/gw_ventana/common.c +++ b/board/gateworks/gw_ventana/common.c @@ -806,7 +806,7 @@ void setup_pmic(void) /* Set SWBST to 5.0V and enable */ pmic_reg_read(p, PFUZE100_SWBSTCON1, &reg); reg &= ~(SWBST_MODE_MASK | SWBST_VOL_MASK); - reg |= (SWBST_5_00V | SWBST_MODE_AUTO); + reg |= (SWBST_5_00V | (SWBST_MODE_AUTO << SWBST_MODE_SHIFT)); pmic_reg_write(p, PFUZE100_SWBSTCON1, reg); } } diff --git a/board/kosagi/novena/novena.c b/board/kosagi/novena/novena.c index babba85..b3159d3 100644 --- a/board/kosagi/novena/novena.c +++ b/board/kosagi/novena/novena.c @@ -216,7 +216,7 @@ int power_init_board(void) /* Set SWBST to 5.0V and enable (for USB) */ pmic_reg_read(p, PFUZE100_SWBSTCON1, &reg); reg &= ~(SWBST_MODE_MASK | SWBST_VOL_MASK); - reg |= (SWBST_5_00V | SWBST_MODE_AUTO); + reg |= (SWBST_5_00V | (SWBST_MODE_AUTO << SWBST_MODE_SHIFT)); pmic_reg_write(p, PFUZE100_SWBSTCON1, reg); return 0; -- 2.1.4

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[U-Boot] [PATCH] ARM: mxs: fix VDDD brownout setting
by Michael Heimpold 01 Dec '15

01 Dec '15

At the moment, the desired brownout is at 1.0V. However, this setting cannot be realized by hardware since we have only 3 bits to represent the voltage difference from the target value. Target value is 1500 mV, brownout target is 1000 mV, voltage steps are 25 mV. Register content calculation: (1500 [mV] - 1000 [mV]) / 25 [mV] = 20 (decimal) = 0x14 Register takes only 3 bits, that is 0x4. But 0x4 * 25 [mV] = 100 [mV], that means that actual brownout level is 1500 [mV] - 100 [mV] = 1.4 V. Minimum possible BO level is 1500 [mV] - 0x7 * 25 [mV] = 1315 [mV]. So lets use this value as desired BO value (which is also the same as FSL bootlets use). Signed-off-by: Michael Heimpold <mhei(a)heimpold.de> Cc: Marek Vasut <marex(a)denx.de> Cc: Otavio Salvador <otavio(a)ossystems.com.br> Cc: Fabio Estevam <fabio.estevam(a)freescale.com> --- arch/arm/cpu/arm926ejs/mxs/spl_power_init.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c index 42f3df2..1972de8 100644 --- a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c +++ b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c @@ -1221,8 +1221,8 @@ void mxs_power_init(void) debug("SPL: Setting VDDIO to 3V3 (brownout @ 3v15)\n"); mxs_power_set_vddx(&mxs_vddio_cfg, 3300, 3150); - debug("SPL: Setting VDDD to 1V5 (brownout @ 1v0)\n"); - mxs_power_set_vddx(&mxs_vddd_cfg, 1500, 1000); + debug("SPL: Setting VDDD to 1V5 (brownout @ 1v315)\n"); + mxs_power_set_vddx(&mxs_vddd_cfg, 1500, 1315); #ifdef CONFIG_MX23 debug("SPL: Setting mx23 VDDMEM to 2V5 (brownout @ 1v7)\n"); mxs_power_set_vddx(&mxs_vddmem_cfg, 2500, 1700); -- 2.5.0

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[U-Boot] [PATCH] arm: mx6: Reduce SPL malloc pool size
by Marek Vasut 01 Dec '15

01 Dec '15

Using 50 MiB malloc pool in SPL is nonsense. Since the caches are not enabled in SPL, it takes 2 seconds to init the pool and has no obvious benefit. Reduce the size to 1 MiB. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Stefano Babic <sbabic(a)denx.de> Cc: Tim Harvey <tharvey(a)gateworks.com> --- include/configs/imx6_spl.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/include/configs/imx6_spl.h b/include/configs/imx6_spl.h index 1744f2c..43ce7fe 100644 --- a/include/configs/imx6_spl.h +++ b/include/configs/imx6_spl.h @@ -63,15 +63,15 @@ #if defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || defined(CONFIG_MX6SL) #define CONFIG_SPL_BSS_START_ADDR 0x88200000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x100000 /* 1 MB */ +#define CONFIG_SPL_BSS_MAX_SIZE 0x100000 /* 1 MB */ #define CONFIG_SYS_SPL_MALLOC_START 0x88300000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x3200000 /* 50 MB */ +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */ #define CONFIG_SYS_TEXT_BASE 0x87800000 #else #define CONFIG_SPL_BSS_START_ADDR 0x18200000 #define CONFIG_SPL_BSS_MAX_SIZE 0x100000 /* 1 MB */ #define CONFIG_SYS_SPL_MALLOC_START 0x18300000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x3200000 /* 50 MB */ +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */ #define CONFIG_SYS_TEXT_BASE 0x17800000 #endif #endif -- 2.1.4

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[U-Boot] fdtgrep exclude nodes
by Michal Simek 01 Dec '15

01 Dec '15

Hi Simon and Stefan, I was checking spl/u-boot-spl.dtb and I see that you are removing interrupt-parent property but I think that also make sense to remove interrupt property as well because it is unused and parent is also removed. Just extend OF_SPL_REMOVE_PROPS by "interrupts" to save some memory. Another thing I was checking was that we are missing rules for removing nodes with status = "disabled" property. I think that will be good to add it. The reason is that I would move all that u-boot,dm-pre-reloc to dtsi at least for now. Or do you also probe drivers for nodes which have status disabled? Thanks, Michal -- Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/ Maintainer of Linux kernel - Xilinx Zynq ARM architecture Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform

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[U-Boot] [PATCH] dm: timer: Avoid using timer before it is ready
by Simon Glass 01 Dec '15

01 Dec '15

At present bootstage will try to read the timer very early after relocation. When driver model it used to provide the timer, we cannot read it until driver model is ready. Correct this by adding a separate stage for the post-relocation bootstage init. This fixes booting on chromebook_link. Signed-off-by: Simon Glass <sjg(a)chromium.org> --- common/board_r.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/common/board_r.c b/common/board_r.c index f7118e8..a41fb54 100644 --- a/common/board_r.c +++ b/common/board_r.c @@ -109,7 +109,6 @@ static int initr_reloc(void) { /* tell others: relocation done */ gd->flags |= GD_FLG_RELOC | GD_FLG_FULL_MALLOC_INIT; - bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_R, "board_init_r"); return 0; } @@ -310,6 +309,14 @@ static int initr_dm(void) } #endif +static int initr_bootstage(void) +{ + /* We cannot do this before initr_dm() */ + bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_R, "board_init_r"); + + return 0; +} + __weak int power_init_board(void) { return 0; @@ -748,6 +755,7 @@ init_fnc_t init_sequence_r[] = { #ifdef CONFIG_DM initr_dm, #endif + initr_bootstage, #if defined(CONFIG_ARM) || defined(CONFIG_NDS32) board_init, /* Setup chipselects */ #endif -- 2.6.0.rc2.230.g3dd15c0

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[U-Boot] [PATCH] sunxi: usb: Rename the sunxi usb driver DM entry
by Marek Vasut 01 Dec '15

01 Dec '15

The DM entry should be unique, otherwise it will collide with other drivers. Fix this by assigning the driver a more unique name than usb_ehci. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Hans de Goede <hdegoede(a)redhat.com> Cc: Ian Campbell <ijc(a)hellion.org.uk> Cc: Simon Glass <sjg(a)chromium.org> --- drivers/usb/host/ehci-sunxi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/usb/host/ehci-sunxi.c b/drivers/usb/host/ehci-sunxi.c index 38d5f92..d494ca1 100644 --- a/drivers/usb/host/ehci-sunxi.c +++ b/drivers/usb/host/ehci-sunxi.c @@ -87,7 +87,7 @@ static const struct udevice_id ehci_usb_ids[] = { { } }; -U_BOOT_DRIVER(usb_ehci) = { +U_BOOT_DRIVER(ehci_sunxi) = { .name = "ehci_sunxi", .id = UCLASS_USB, .of_match = ehci_usb_ids, -- 2.1.4

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[U-Boot] [PATCH] net: gem: Enable CTRL+C in wait_for_bit
by Michal Simek 01 Dec '15

01 Dec '15

Enable to break waiting loop at any time. Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- drivers/net/zynq_gem.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index 858093f0d7e2..ee4169107e5b 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -447,6 +447,11 @@ static int wait_for_bit(const char *func, u32 *reg, const u32 mask, if (get_timer(start) > timeout) break; + if (ctrlc()) { + puts("Abort\n"); + return -1; + } + udelay(1); } -- 1.9.1

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[U-Boot] [PATCH] ARM: zynq: Enable debug console for zc702
by Michal Simek 01 Dec '15

01 Dec '15

Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- configs/zynq_zc702_defconfig | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/configs/zynq_zc702_defconfig b/configs/zynq_zc702_defconfig index 5f7637a26492..8c216c9f8dc4 100644 --- a/configs/zynq_zc702_defconfig +++ b/configs/zynq_zc702_defconfig @@ -17,4 +17,8 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_PHYLIB=y CONFIG_ZYNQ_GEM=y +CONFIG_DEBUG_UART=y +CONFIG_DEBUG_UART_ZYNQ=y +CONFIG_DEBUG_UART_BASE=0xe0001000 +CONFIG_DEBUG_UART_CLOCK=50000000 CONFIG_ZYNQ_QSPI=y -- 1.9.1

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