December 2015 - U-Boot

[U-Boot] [PATCH] mtd: nand: denali: Nuke unbounded loop
by Marek Vasut 21 Dec '15

21 Dec '15

This particular unbounded loop in the Denali NAND reset routine can lead to a system hang in case neither of the Timeout and Completed bits get set. Refactor the code a bit so it's readable and implement timer so the loop is bounded instead. This way the complete hang can be prevented even if the NAND fails to reset. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Masahiro Yamada <yamada.masahiro(a)socionext.com> Cc: Scott Wood <scottwood(a)freescale.com> --- drivers/mtd/nand/denali.c | 26 ++++++++++++++++++++------ 1 file changed, 20 insertions(+), 6 deletions(-) diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c index 192be7d..8a8cca9 100644 --- a/drivers/mtd/nand/denali.c +++ b/drivers/mtd/nand/denali.c @@ -199,6 +199,7 @@ static void reset_bank(struct denali_nand_info *denali) static uint32_t denali_nand_reset(struct denali_nand_info *denali) { int i; + u32 start, reg; for (i = 0; i < denali->max_banks; i++) writel(INTR_STATUS__RST_COMP | INTR_STATUS__TIME_OUT, @@ -206,12 +207,25 @@ static uint32_t denali_nand_reset(struct denali_nand_info *denali) for (i = 0; i < denali->max_banks; i++) { writel(1 << i, denali->flash_reg + DEVICE_RESET); - while (!(readl(denali->flash_reg + INTR_STATUS(i)) & - (INTR_STATUS__RST_COMP | INTR_STATUS__TIME_OUT))) - if (readl(denali->flash_reg + INTR_STATUS(i)) & - INTR_STATUS__TIME_OUT) - debug("NAND Reset operation timed out on bank" - " %d\n", i); + + start = get_timer(0); + while (1) { + reg = readl(denali->flash_reg + INTR_STATUS(i)); + if (reg & INTR_STATUS__TIME_OUT) { + debug("NAND Reset operation timed out on bank %d\n", + i); + break; + } + + /* Reset completed and did not time out, all good. */ + if (reg & INTR_STATUS__RST_COMP) + break; + + if (get_timer(start) > (CONFIG_SYS_HZ / 1000)) { + debug("%s: Reset timed out!\n", __func__); + break; + } + } } for (i = 0; i < denali->max_banks; i++) -- 2.1.4

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[U-Boot] [PATCH] arm: socfpga: Actually enable L2 cache
by Marek Vasut 21 Dec '15

21 Dec '15

The L2 cache was never enabled in the v7_outer_cache_enable(), fix this and enable the L2 cache. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Dinh Nguyen <dinguyen(a)opensource.altera.com> Cc: Chin Liang See <clsee(a)altera.com> --- arch/arm/mach-socfpga/misc.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c index b110f5b..621f5d9 100644 --- a/arch/arm/mach-socfpga/misc.c +++ b/arch/arm/mach-socfpga/misc.c @@ -54,14 +54,17 @@ void enable_caches(void) void v7_outer_cache_enable(void) { - /* disable the L2 cache */ - writel(0, &pl310->pl310_ctrl); + /* Disable the L2 cache */ + clrbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN); /* enable BRESP, instruction and data prefetch, full line of zeroes */ setbits_le32(&pl310->pl310_aux_ctrl, L310_AUX_CTRL_DATA_PREFETCH_MASK | L310_AUX_CTRL_INST_PREFETCH_MASK | L310_SHARED_ATT_OVERRIDE_ENABLE); + + /* Enable the L2 cache */ + setbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN); } /* -- 2.1.4

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[U-Boot] [PATCH] arm: socfpga: Enabling MTD default partitions
by Chin Liang See 21 Dec '15

21 Dec '15

Enabling MTD default partitions if its not defined in board configuration file. The layout as below > u-boot partition for storing SPL image > env partition for storing U-Boot environment > UBI partition for storing kernel image and filesystem > boot partition for backward compatibility / raw binary > rootfs partition for storing filesystem in case boot partition used Signed-off-by: Chin Liang See <clsee(a)altera.com> Cc: Dinh Nguyen <dinguyen(a)opensource.altera.com> Cc: Dinh Nguyen <dinh.linux(a)gmail.com> Cc: Pavel Machek <pavel(a)denx.de> Cc: Marek Vasut <marex(a)denx.de> Cc: Stefan Roese <sr(a)denx.de> --- include/configs/socfpga_common.h | 23 +++++++++++++++++++++++ 1 files changed, 23 insertions(+), 0 deletions(-) diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 699e78a..36fc9f0 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -271,6 +271,29 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #define CONFIG_SYS_CONSOLE_ENV_OVERWRITE #define CONFIG_ENV_SIZE 4096 +/* + * mtd partitioning for serial NOR flash + * + * device nor0 <ff705000.spi>, # parts = 6 + * #: name size offset mask_flags + * 0: u-boot 0x00100000 0x00000000 0 + * 1: env1 0x00040000 0x00100000 0 + * 2: env2 0x00040000 0x00140000 0 + * 3: UBI 0x03e80000 0x00180000 0 + * 4: boot 0x00e80000 0x00180000 0 + * 5: rootfs 0x01000000 0x01000000 0 + * + */ +#if defined(CONFIG_CMD_SF) || !defined(MTDPARTS_DEFAULT) +#define MTDPARTS_DEFAULT "mtdparts=ff705000.spi:"\ + "1m(u-boot)," \ + "256k(env1)," \ + "256k(env2)," \ + "14848k(boot)," \ + "16m(rootfs)," \ + "-@1536k(UBI)\0" +#endif + /* Environment for SDMMC boot */ #if defined(CONFIG_ENV_IS_IN_MMC) && !defined(CONFIG_ENV_OFFSET) #define CONFIG_SYS_MMC_ENV_DEV 0 /* device 0 */ -- 1.7.7.4

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[U-Boot] [PATCH] x86: Remove Graeme Russ from the git alias file
by Simon Glass 21 Dec '15

21 Dec '15

As requested, remove Graeme's email address. Signed-off-by: Simon Glass <sjg(a)chromium.org> --- doc/git-mailrc | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/doc/git-mailrc b/doc/git-mailrc index 85bac75..ced7085 100644 --- a/doc/git-mailrc +++ b/doc/git-mailrc @@ -20,7 +20,6 @@ alias angelo_ts Angelo Dureghello <angelo(a)sysam.it> alias bmeng Bin Meng <bmeng.cn(a)gmail.com> alias danielschwierzeck Daniel Schwierzeck <daniel.schwierzeck(a)gmail.com> alias galak Kumar Gala <galak(a)kernel.crashing.org> -alias gruss Graeme Russ <graeme.russ(a)gmail.com> alias hs Heiko Schocher <hs(a)denx.de> alias ijc Ian Campbell <ijc+uboot(a)hellion.org.uk> alias iwamatsu Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> @@ -112,7 +111,7 @@ alias sparc uboot, Francois Retief <fgretief(a)spaceteq.co.za> alias superh uboot, iwamatsu alias sh superh -alias x86 uboot, sjg, gruss, bmeng +alias x86 uboot, sjg, bmeng # Subsystem aliases alias dm uboot, sjg -- 2.6.0.rc2.230.g3dd15c0

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[U-Boot] [PULL] Please pull u-boot-nios/master
by Thomas Chou 21 Dec '15

21 Dec '15

The following changes since commit 4832e17787acb29734d895751bc7a594908aecc6: Merge branch 'master' of git://www.denx.de/git/u-boot-microblaze (2015-12-18 07:28:24 -0500) are available in the git repository at: git://git.denx.de/u-boot-nios.git master for you to fetch changes up to 1c0e84ca829a09948a61107744402296566aa076: altera_qspi: initialize instr.mtd in flash_erase (2015-12-19 09:51:19 +0800) ---------------------------------------------------------------- Marek Vasut (5): nios2: Calculate the env position from monitor size nios2: Up the monitor size to 512kiB nios2: Preconfigure $loadaddr variable nios2: Enable support for fitImage nios2: Soup up the shell experience Thomas Chou (3): nios2: display altera sysid at startup serial-howto: remove altera_jtag_uart and altera_uart from the list altera_qspi: initialize instr.mtd in flash_erase arch/nios2/cpu/cpu.c | 8 ++++++++ configs/10m50_defconfig | 1 + configs/3c120_defconfig | 1 + doc/driver-model/serial-howto.txt | 2 -- drivers/mtd/altera_qspi.c | 1 + include/configs/10m50_devboard.h | 33 ++++++++++++++++++--------------- include/configs/3c120_devboard.h | 33 ++++++++++++++++++--------------- 7 files changed, 47 insertions(+), 32 deletions(-)

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[U-Boot] [PULL] u-boot-socfpga/master
by Marek Vasut 21 Dec '15

21 Dec '15

The following changes since commit 4832e17787acb29734d895751bc7a594908aecc6: Merge branch 'master' of git://www.denx.de/git/u-boot-microblaze (2015-12-18 07:28:24 -0500) are available in the git repository at: git://git.denx.de/u-boot-socfpga.git master for you to fetch changes up to 48275c96ff4deaeca10d9e18c78f6a1e3653efa2: arm: socfpga: fix trivial header preprocessor for socfpga_common.h (2015-12-20 03:44:56 +0100) ---------------------------------------------------------------- Dinh Nguyen (5): arm: socfpga: remove note to add CONFIG_USB_DWC2_REG_ADDR arm: socfpga: introduce TARGET_SOCFPGA_GEN5 config property arm: socfpga: remove building scan manager arm: socfpga: fix up a questionable macro for SDMMC arm: socfpga: fix trivial header preprocessor for socfpga_common.h Marek Vasut (20): net: phy: micrel: Configure KSZ9021/KSZ9031 skew from OF arm: socfpga: socrates: Add missing PHY skew config arm: socfpga: arria5-socdk: Remove Micrel PHY configuration arm: socfpga: cyclone5-socdk: Remove Micrel PHY configuration arm: socfpga: de0_nano: Remove Micrel PHY configuration arm: socfpga: sockit: Remove Micrel PHY configuration arm: socfpga: socrates: Remove Micrel PHY configuration arm: socfpga: Allow DWC2 UDC probing from OF arm: socfpga: arria5-socdk: Probe DWC2 UDC from OF instead of hard-coded data arm: socfpga: cyclone5-socdk: Probe DWC2 UDC from OF instead of hard-coded data arm: socfpga: de0_nano: Probe DWC2 UDC from OF instead of hard-coded data arm: socfpga: mcvevk: Probe DWC2 UDC from OF instead of hard-coded data arm: socfpga: sockit: Probe DWC2 UDC from OF instead of hard-coded data arm: socfpga: socrates: Probe DWC2 UDC from OF instead of hard-coded data arm: socfpga: de0_nano: Zap VIRTUAL_TARGET arm: socfpga: sockit: Zap VIRTUAL_TARGET arm: socfpga: Switch CONFIG_G_DNL_MANUFACTURER to CONFIG_SYS_VENDOR arm: socfpga: Switch CONFIG_HOSTNAME to CONFIG_SYS_BOARD arm: socfpga: Introduce common board code arm: socfpga: Drop the board boilerplate arch/arm/dts/socfpga_arria5_socdk.dts | 1 + arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts | 5 +++ arch/arm/dts/socfpga_cyclone5_mcvevk.dts | 5 +++ arch/arm/dts/socfpga_cyclone5_socdk.dts | 9 +++--- arch/arm/dts/socfpga_cyclone5_sockit.dts | 9 ++++-- arch/arm/dts/socfpga_cyclone5_socrates.dts | 17 ++++++++++ arch/arm/mach-socfpga/Kconfig | 5 +++ arch/arm/mach-socfpga/Makefile | 5 +-- arch/arm/mach-socfpga/board.c | 64 ++++++++++++++++++++++++++++++++++++++ arch/arm/mach-socfpga/include/mach/system_manager.h | 10 ++++-- board/altera/arria5-socdk/socfpga.c | 79 ---------------------------------------------- board/altera/cyclone5-socdk/socfpga.c | 79 ---------------------------------------------- board/denx/mcvevk/socfpga.c | 39 ----------------------- board/ebv/socrates/socfpga.c | 79 ---------------------------------------------- board/sr1500/socfpga.c | 17 ---------- board/terasic/de0-nano-soc/socfpga.c | 66 --------------------------------------- board/terasic/sockit/socfpga.c | 79 ---------------------------------------------- configs/socfpga_arria5_defconfig | 2 ++ configs/socfpga_cyclone5_defconfig | 2 ++ configs/socfpga_de0_nano_soc_defconfig | 2 ++ configs/socfpga_mcvevk_defconfig | 2 ++ configs/socfpga_sockit_defconfig | 2 ++ configs/socfpga_socrates_defconfig | 2 ++ drivers/mmc/socfpga_dw_mmc.c | 5 +-- drivers/net/phy/micrel.c | 146 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++- include/configs/socfpga_arria5_socdk.h | 15 --------- include/configs/socfpga_common.h | 19 +++++------- include/configs/socfpga_cyclone5_socdk.h | 15 --------- include/configs/socfpga_de0_nano_soc.h | 15 --------- include/configs/socfpga_mcvevk.h | 8 ----- include/configs/socfpga_sockit.h | 19 ------------ include/configs/socfpga_socrates.h | 15 --------- include/configs/socfpga_sr1500.h | 3 -- include/fdtdec.h | 1 + lib/fdtdec.c | 1 + 35 files changed, 289 insertions(+), 553 deletions(-) create mode 100644 arch/arm/mach-socfpga/board.c

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[U-Boot] [PATCH 1/7] arm: socfpga: Consolidate SDMMC environment
by Chin Liang See 21 Dec '15

21 Dec '15

Remove the duplication of SDMMC environment configuration from each boards' configuration header file into socfpga_common.h Signed-off-by: Chin Liang See <clsee(a)altera.com> Cc: Dinh Nguyen <dinguyen(a)opensource.altera.com> Cc: Dinh Nguyen <dinh.linux(a)gmail.com> Cc: Pavel Machek <pavel(a)denx.de> Cc: Marek Vasut <marex(a)denx.de> Cc: Stefan Roese <sr(a)denx.de> --- include/configs/socfpga_common.h | 6 ++++++ 1 files changed, 6 insertions(+), 0 deletions(-) diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 3a4df63..699e78a 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -271,6 +271,12 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #define CONFIG_SYS_CONSOLE_ENV_OVERWRITE #define CONFIG_ENV_SIZE 4096 +/* Environment for SDMMC boot */ +#if defined(CONFIG_ENV_IS_IN_MMC) && !defined(CONFIG_ENV_OFFSET) +#define CONFIG_SYS_MMC_ENV_DEV 0 /* device 0 */ +#define CONFIG_ENV_OFFSET 512 /* just after the MBR */ +#endif + /* * SPL * -- 1.7.7.4

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[U-Boot] [PATCH V2] arm: socfpga: Actually enable L2 cache
by Marek Vasut 21 Dec '15

21 Dec '15

The L2 cache was never enabled in the v7_outer_cache_enable(), fix this and enable the L2 cache. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Dinh Nguyen <dinguyen(a)opensource.altera.com> Cc: Chin Liang See <clsee(a)altera.com> --- arch/arm/mach-socfpga/misc.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) V2: Add v7_outer_cache_disable() as suggested by SR . diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c index b110f5b..a54d2b9 100644 --- a/arch/arm/mach-socfpga/misc.c +++ b/arch/arm/mach-socfpga/misc.c @@ -54,14 +54,23 @@ void enable_caches(void) void v7_outer_cache_enable(void) { - /* disable the L2 cache */ - writel(0, &pl310->pl310_ctrl); + /* Disable the L2 cache */ + clrbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN); /* enable BRESP, instruction and data prefetch, full line of zeroes */ setbits_le32(&pl310->pl310_aux_ctrl, L310_AUX_CTRL_DATA_PREFETCH_MASK | L310_AUX_CTRL_INST_PREFETCH_MASK | L310_SHARED_ATT_OVERRIDE_ENABLE); + + /* Enable the L2 cache */ + setbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN); +} + +void v7_outer_cache_disable(void) +{ + /* Disable the L2 cache */ + clrbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN); } /* -- 2.1.4

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[U-Boot] [PATCH] net: designware: Zap CONFIG_DW_AUTONEG
by Marek Vasut 21 Dec '15

21 Dec '15

This symbol is not used anywhere, so remove it. For spear600, remove it from the board file, since the symbol is not defined for spear600 either. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Dinh Nguyen <dinguyen(a)opensource.altera.com> Cc: Joe Hershberger <joe.hershberger(a)ni.com> --- board/spear/spear600/spear600.c | 3 --- include/configs/axs101.h | 5 ----- include/configs/sunxi-common.h | 1 - 3 files changed, 9 deletions(-) diff --git a/board/spear/spear600/spear600.c b/board/spear/spear600/spear600.c index fc0918f..858a9ca 100644 --- a/board/spear/spear600/spear600.c +++ b/board/spear/spear600/spear600.c @@ -48,9 +48,6 @@ int board_eth_init(bd_t *bis) #if defined(CONFIG_ETH_DESIGNWARE) u32 interface = PHY_INTERFACE_MODE_MII; -#if defined(CONFIG_DW_AUTONEG) - interface = PHY_INTERFACE_MODE_GMII; -#endif if (designware_initialize(CONFIG_SPEAR_ETHBASE, interface) >= 0) ret++; #endif diff --git a/include/configs/axs101.h b/include/configs/axs101.h index 650d97d..3d6e94f 100644 --- a/include/configs/axs101.h +++ b/include/configs/axs101.h @@ -100,11 +100,6 @@ #define CONFIG_PHY_GIGE /* - * Ethernet configuration - */ -#define CONFIG_DW_AUTONEG - -/* * Commands still not supported in Kconfig */ #define CONFIG_CMD_FAT diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index da6ab61..d826a5b 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -309,7 +309,6 @@ extern int soft_i2c_gpio_scl; #endif #ifdef CONFIG_SUNXI_GMAC -#define CONFIG_DW_AUTONEG #define CONFIG_PHY_GIGE /* GMAC can use gigabit PHY */ #define CONFIG_PHY_ADDR 1 #define CONFIG_MII /* MII PHY management */ -- 2.1.4

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[U-Boot] [PATCH] net: designware: Zap trailing backslash
by Marek Vasut 21 Dec '15

21 Dec '15

Trailing backslashes are necessary only in macros, not in the actual code, so remove them. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Dinh Nguyen <dinguyen(a)opensource.altera.com> Cc: Joe Hershberger <joe.hershberger(a)ni.com> --- drivers/net/designware.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/net/designware.c b/drivers/net/designware.c index a6c39c3..2447bc7 100644 --- a/drivers/net/designware.c +++ b/drivers/net/designware.c @@ -107,8 +107,8 @@ static void tx_descs_init(struct dw_eth_dev *priv) #if defined(CONFIG_DW_ALTDESCRIPTOR) desc_p->txrx_status &= ~(DESC_TXSTS_TXINT | DESC_TXSTS_TXLAST | - DESC_TXSTS_TXFIRST | DESC_TXSTS_TXCRCDIS | \ - DESC_TXSTS_TXCHECKINSCTRL | \ + DESC_TXSTS_TXFIRST | DESC_TXSTS_TXCRCDIS | + DESC_TXSTS_TXCHECKINSCTRL | DESC_TXSTS_TXRINGEND | DESC_TXSTS_TXPADDIS); desc_p->txrx_status |= DESC_TXSTS_TXCHAIN; @@ -155,7 +155,7 @@ static void rx_descs_init(struct dw_eth_dev *priv) desc_p->dmamac_next = &desc_table_p[idx + 1]; desc_p->dmamac_cntl = - (MAC_MAX_FRAME_SZ & DESC_RXCTRL_SIZE1MASK) | \ + (MAC_MAX_FRAME_SZ & DESC_RXCTRL_SIZE1MASK) | DESC_RXCTRL_RXCHAIN; desc_p->txrx_status = DESC_RXSTS_OWNBYDMA; @@ -321,14 +321,14 @@ static int _dw_eth_send(struct dw_eth_dev *priv, void *packet, int length) #if defined(CONFIG_DW_ALTDESCRIPTOR) desc_p->txrx_status |= DESC_TXSTS_TXFIRST | DESC_TXSTS_TXLAST; - desc_p->dmamac_cntl |= (length << DESC_TXCTRL_SIZE1SHFT) & \ + desc_p->dmamac_cntl |= (length << DESC_TXCTRL_SIZE1SHFT) & DESC_TXCTRL_SIZE1MASK; desc_p->txrx_status &= ~(DESC_TXSTS_MSK); desc_p->txrx_status |= DESC_TXSTS_OWNBYDMA; #else - desc_p->dmamac_cntl |= ((length << DESC_TXCTRL_SIZE1SHFT) & \ - DESC_TXCTRL_SIZE1MASK) | DESC_TXCTRL_TXLAST | \ + desc_p->dmamac_cntl |= ((length << DESC_TXCTRL_SIZE1SHFT) & + DESC_TXCTRL_SIZE1MASK) | DESC_TXCTRL_TXLAST | DESC_TXCTRL_TXFIRST; desc_p->txrx_status = DESC_TXSTS_OWNBYDMA; @@ -368,7 +368,7 @@ static int _dw_eth_recv(struct dw_eth_dev *priv, uchar **packetp) /* Check if the owner is the CPU */ if (!(status & DESC_RXSTS_OWNBYDMA)) { - length = (status & DESC_RXSTS_FRMLENMSK) >> \ + length = (status & DESC_RXSTS_FRMLENMSK) >> DESC_RXSTS_FRMLENSHFT; /* Invalidate received data */ -- 2.1.4

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