April 2014 - U-Boot

[U-Boot] [RESEND: PATCH] serial: nsl16550: add hw flow control support
by Murali Karicheri 09 Apr '14

09 Apr '14

keystone serial hw support hw flow control. This patch enables hw flow control for keystone EVMs as an optional feature based on CONFIG_HWFLOW Signed-off-by: Murali Karicheri <m-karicheri2(a)ti.com> --- Depends on keystone patch series on the u-boot mailing list drivers/serial/ns16550.c | 6 ++++++ include/ns16550.h | 1 + 2 files changed, 7 insertions(+) diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 8a13454..e49a053 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -33,6 +33,12 @@ #if defined(CONFIG_K2HK_EVM) #define UART_REG_VAL_PWREMU_MGMT_UART_DISABLE 0 #define UART_REG_VAL_PWREMU_MGMT_UART_ENABLE ((1 << 14) | (1 << 13) | (1 << 0)) +#undef UART_MCRVAL +#ifdef CONFIG_HWFLOW +#define UART_MCRVAL (UART_MCR_RTS | UART_MCR_AFE) +#else +#define UART_MCRVAL (UART_MCR_RTS) +#endif #endif #ifndef CONFIG_SYS_NS16550_IER diff --git a/include/ns16550.h b/include/ns16550.h index 51cb5b4..17f829f 100644 --- a/include/ns16550.h +++ b/include/ns16550.h @@ -100,6 +100,7 @@ typedef struct NS16550 *NS16550_t; #define UART_MCR_OUT1 0x04 /* Out 1 */ #define UART_MCR_OUT2 0x08 /* Out 2 */ #define UART_MCR_LOOP 0x10 /* Enable loopback test mode */ +#define UART_MCR_AFE 0x20 /* Enable auto-RTS/CTS */ #define UART_MCR_DMA_EN 0x04 #define UART_MCR_TX_DFR 0x08 -- 1.7.9.5

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Re: [U-Boot] Different Port for TFTP communication
by Nikolay Dimitrov 09 Apr '14

09 Apr '14

Sorry for the duplicate answer, I'm reading this list via daily digest. Kind regards, Nikolay

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[U-Boot] Add support for SPI NOR on the Freescale MCIMX6SLEVK Board
by Sam Catch 09 Apr '14

09 Apr '14

I am trying to add support for the SPI NOR device on the Freescale MCIMX6SLEVK Board. I have created a patch that should enable support but the probe command does not find the device. The process fails during the ECSPI transfer. I have tried the following patch to the latest git master of u-boot: http://pastebin.com/hamK7Ybb U-Boot Output => sf probe SF: Unsupported flash IDs: manuf 00, jedec 0000, ext_jedec 0000 Failed to initialize SPI flash at 0:27392

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[U-Boot] Add support for SPI NOR on the Freescale MCIMX6SLEVK Board
by Sam Catch 09 Apr '14

09 Apr '14

I am trying to add support for the SPI NOR device on the Freescale MCIMX6SLEVK Board. I have created a patch that should enable support

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[U-Boot] How to extract files from U-Boot image file, LZMA-compressed?
by kebjo 09 Apr '14

09 Apr '14

How to extract files from U-Boot image file, LZMA-compressed? -- View this message in context: http://u-boot.10912.n7.nabble.com/How-to-extract-files-from-U-Boot-image-fi… Sent from the U-Boot mailing list archive at Nabble.com.

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[U-Boot] data abort in omap_gpio
by Andreas Bießmann 09 Apr '14

09 Apr '14

Hi all, I've encountered a data abort in tricorder board when switching gpio's. Here is the trace: ---8<--- gpio_direction_output (gpio=<value optimized out>, value=0) at /home/abiessmann/src/u-boot/drivers/gpio/omap_gpio.c:197 197 _set_gpio_dataout(bank, get_gpio_index(gpio), value); (gdb) s _set_gpio_dataout (gpio=<value optimized out>, value=0) at /home/abiessmann/src/u-boot/drivers/gpio/omap_gpio.c:102 102 void *reg = bank->base; (gdb) s 105 switch (bank->method) { (gdb) s 107 if (enable) (gdb) list 102 void *reg = bank->base; 103 u32 l = 0; 104 105 switch (bank->method) { 106 case METHOD_GPIO_24XX: 107 if (enable) 108 reg += OMAP_GPIO_SETDATAOUT; 109 else 110 reg += OMAP_GPIO_CLEARDATAOUT; 111 l = 1 << gpio; (gdb) s 111 l = 1 << gpio; (gdb) s 108 reg += OMAP_GPIO_SETDATAOUT; (gdb) s 110 reg += OMAP_GPIO_CLEARDATAOUT; (gdb) s 111 l = 1 << gpio; (gdb) s 118 __raw_writel(l, reg); (gdb) print/x l $18 = 0x800 (gdb) print/x reg $19 = 0x49050090 (gdb) s ^C Program received signal SIGSTOP, Stopped (signal). _start () at /home/abiessmann/src/u-boot/arch/arm/cpu/armv7/start.S:27 27 ldr pc, _data_abort (gdb) --->8--- Anyone aware of that? I'll dive into that tomorrow. If anyone knows that problem a pointer would be good. Best regards Andreas Bießmann

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[U-Boot] Chain loading an u-boot from an u-boot
by Helmut Raiger 09 Apr '14

09 Apr '14

Hi, to give you some background why we would want to do something (strange) like this: - we have a hardware design bug - we have a few hundred i.MX31 TT-01 devices in the field - the i.MX31 rom boot loader is only capable of using 1bit HW-ECC (loading the first page (2k) from the NAND) - the NAND chip specifies a requirement of 1bit ECC for the first 128kB (PEB) and 4bit ECC for the rest - our current u-boot uses 1-bit HW-ECC, the kernel uses UBIFS and 1bit HW-ECC - we face increasing bit errors in the field in the PEBs used by u-boot. Using UBIFS in the kernel mitigates the requirements of 4bit ECC for the whole NAND because it moves PEBs when bit errors show up. The real problem is the area where u-boot is located (currently approx. 450kB, including UBIFS, USB ethernet support and more ..). So the idea was: - use a small u-boot (<128kB) in the first PEB of the NAND (written with 1bit HW-ECC) that supports 4bit BCH - let it load a second u-boot (<512kB) from the next 4 PEBs (written with 4bit BCH) - jump to the second u-boot and load the kernel from an UBI volume using 1bit HW-ECC again I did all that and it seemed to work just fine, but jumping to the second u-boot almost always crashes the system. In detail we do: - romboot loads the SPL (2kb) - SPL loads the first u-boot stage (which relocates and runs nicely) - the first u-boot 'boots' the second u-boot by loading it from the NAND - the second u-boot is loaded to the link address minus 2kB (for SPL) - this is the same for the first and the second u-boot (link address 0x87e00000 - 0x800 = 0x87dff800) - it jumps to 0x87e00000 omitting the SPL for the second u-boot - the second u-boot should relocated itself again The second u-boot is verified in RAM with crc32 and it is valid. I've tested many configuration and found, that it only works if both u-boots are identical: - different builds of the same code work (different build date, but same code) - different configurations never work - it does not matter if cashes are turned on or off - I skipped the relocation of the second u-boot (actually not necessary) to no avail I also tried u-boot standalone applications which always work (after fixing a bug in u-boot r8<->r9 for gd), again independent of cashes. Using different configuration I never get any serial output of the second u-boot (board info) or debugging stuff. If I set a breakpoint in the second u-boot (after relocation) and continue from there it works until it tries to get the SPI clock (mxc_get_clock() when accessing CCM_CCMR) for the PMIC access. If I throw in a mxc_dump_clocks() earlier it hangs there. I'm pretty much running out of ideas, so any pointers are appreciated. Thx Helmut -- Scanned by MailScanner.

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[U-Boot] [BeagleBone Black] AM335x CPU frequency
by Xuebing Wang 09 Apr '14

09 Apr '14

Hi community, Can someone confirm that in the latest u-boot code, by default BeagleBone Black CPU AM335x is using opp100 (dpll_mpu_opp100), and CPU runs at 1GHz? Thanks. -- Thanks, Xuebing Wang

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[U-Boot] [PATCH] lib: Add CONFIG_FDT_IGNORE_FIXUP_MEMORY_NODE
by Nobuhiro Iwamatsu 09 Apr '14

09 Apr '14

Usually, when CONFIG_OF_LIBFDT is enabled, U-Boot is set to the FDT memory information that is set in the U-Boot. This patch disables this behavior. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj(a)renesas.com> --- README | 8 ++++++++ arch/arm/lib/bootm-fdt.c | 2 ++ 2 files changed, 10 insertions(+) diff --git a/README b/README index d337374..73453fe 100644 --- a/README +++ b/README @@ -650,6 +650,14 @@ The following options need to be configured: in a single configuration file and the machine type is runtime discoverable, do not have to use this setting. + CONFIG_FDT_IGNORE_FIXUP_MEMORY_NODE + + Usually, when CONFIG_OF_LIBFDT is enabled, U-Boot is set to + the FDT memory information that is set in the U-Boot. This will + disable this behavior. + If you do not use the memory configuration of U-Boot, you want + to set the priority of the FDT, please enable this. + - vxWorks boot parameters: bootvx constructs a valid bootline using the following diff --git a/arch/arm/lib/bootm-fdt.c b/arch/arm/lib/bootm-fdt.c index e40691d..8da9dac 100644 --- a/arch/arm/lib/bootm-fdt.c +++ b/arch/arm/lib/bootm-fdt.c @@ -18,6 +18,7 @@ #include <common.h> #include <fdt_support.h> +#ifndef CONFIG_FDT_IGNORE_FIXUP_MEMORY_NODE DECLARE_GLOBAL_DATA_PTR; int arch_fixup_memory_node(void *blob) @@ -34,3 +35,4 @@ int arch_fixup_memory_node(void *blob) return fdt_fixup_memory_banks(blob, start, size, CONFIG_NR_DRAM_BANKS); } +#endif /* CONFIG_FDT_IGNORE_FIXUP_MEMORY_NODE */ -- 1.8.5

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Re: [U-Boot] Bug in buildsystem for SPL LDSCRIPT
by Andreas Bießmann 09 Apr '14

09 Apr '14

and also to the list ... sorry for the noise On 04/07/2014 11:27 AM, Andreas Bießmann wrote: > Hi Masahiro, > > a late bug report ;) changing my board config file will not regenerate > the spl/u-boot-spl.lds for the board though it depends on it. The > LDSCRIPT is patched with some size information for range checking which > is not updated in my case. However regenerating the file by deleting it > first works. Cold you please provide a fix for that in 2014.04? > > Best regards > > Andreas Bießmann >

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