November 2014 - U-Boot

[U-Boot] [PATCH 1/3] 85xx/b4860: Add alternate serdes protocols for B4860/B4420
by Shaveta Leekha 05 Dec '14

05 Dec '14

Addded Alternate options with LC VCO for following protocols: 0x02 --> 0x01 0x08 --> 0x07 0x18 --> 0x17 0x1E --> 0x1D 0x49 --> 0x48 0x6F --> 0x6E 0x9A --> 0x99 0x9E --> 0x9D Signed-off-by: Shaveta Leekha <shaveta(a)freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal(a)freescale.com> Change-Id: Iefe14012ee897095f0198453d50f31096ca020e2 Reviewed-on: http://git.am.freescale.net:8181/23352 Tested-by: Review Code-CDREVIEW <CDREVIEW(a)freescale.com> Reviewed-by: Yusong Sun <yorksun(a)freescale.com> --- arch/powerpc/cpu/mpc85xx/b4860_serdes.c | 19 +++++++++++++++++++ 1 files changed, 19 insertions(+), 0 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/b4860_serdes.c b/arch/powerpc/cpu/mpc85xx/b4860_serdes.c index cf18be5..63172de 100644 --- a/arch/powerpc/cpu/mpc85xx/b4860_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/b4860_serdes.c @@ -18,6 +18,8 @@ struct serdes_config { #ifdef CONFIG_PPC_B4860 static struct serdes_config serdes1_cfg_tbl[] = { /* SerDes 1 */ + {0x01, {AURORA, AURORA, CPRI6, CPRI5, + CPRI4, CPRI3, CPRI2, CPRI1} }, {0x02, {AURORA, AURORA, CPRI6, CPRI5, CPRI4, CPRI3, CPRI2, CPRI1} }, {0x04, {AURORA, AURORA, CPRI6, CPRI5, @@ -26,6 +28,8 @@ static struct serdes_config serdes1_cfg_tbl[] = { CPRI4, CPRI3, CPRI2, CPRI1} }, {0x06, {AURORA, AURORA, CPRI6, CPRI5, CPRI4, CPRI3, CPRI2, CPRI1} }, + {0x07, {AURORA, AURORA, CPRI6, CPRI5, + CPRI4, CPRI3, CPRI2, CPRI1} }, {0x08, {AURORA, AURORA, CPRI6, CPRI5, CPRI4, CPRI3, CPRI2, CPRI1} }, {0x09, {AURORA, AURORA, CPRI6, CPRI5, @@ -184,12 +188,17 @@ static struct serdes_config serdes1_cfg_tbl[] = { CPRI4, CPRI3, NONE, NONE} }, {0x0F, {NONE, NONE, CPRI6, CPRI5, CPRI4, CPRI3, NONE, NONE} }, + {0x17, {NONE, NONE, + SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4, + NONE, NONE, NONE, NONE} }, {0x18, {NONE, NONE, SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4, NONE, NONE, NONE, NONE} }, {0x1B, {NONE, NONE, SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4, NONE, NONE, NONE, NONE} }, + {0x1D, {NONE, NONE, AURORA, AURORA, + NONE, NONE, NONE, NONE} }, {0x1E, {NONE, NONE, AURORA, AURORA, NONE, NONE, NONE, NONE} }, {0x21, {NONE, NONE, AURORA, AURORA, @@ -199,19 +208,29 @@ static struct serdes_config serdes1_cfg_tbl[] = { {} }; static struct serdes_config serdes2_cfg_tbl[] = { + {0x48, {SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, + SGMII_FM1_DTSEC3, AURORA, + NONE, NONE, NONE, NONE} }, {0x49, {SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, SGMII_FM1_DTSEC3, AURORA, NONE, NONE, NONE, NONE} }, {0x4A, {SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, SGMII_FM1_DTSEC3, AURORA, NONE, NONE, NONE, NONE} }, + {0x6E, {SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, + AURORA, AURORA, NONE, NONE, NONE, NONE} }, {0x6F, {SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, AURORA, AURORA, NONE, NONE, NONE, NONE} }, {0x70, {SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, AURORA, AURORA, NONE, NONE, NONE, NONE} }, + {0x99, {PCIE1, PCIE1, + SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4, + NONE, NONE, NONE, NONE} }, {0x9A, {PCIE1, PCIE1, SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4, NONE, NONE, NONE, NONE} }, + {0x9D, {PCIE1, PCIE1, PCIE1, PCIE1, + NONE, NONE, NONE, NONE} }, {0x9E, {PCIE1, PCIE1, PCIE1, PCIE1, NONE, NONE, NONE, NONE} }, {} -- 1.7.6.GIT

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[U-Boot] [PATCH 3/3] B4860: Add alternate LC VCO serdes protocols support in board file
by Shaveta Leekha 05 Dec '14

05 Dec '14

Add the support of newly added LC VCO SerDes protocols for configuration of IDT and VSC crossbar Signed-off-by: Shaveta Leekha <shaveta(a)freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal(a)freescale.com> Change-Id: I16ad23e2cbea3b0a232a153984d5126bc79ddd26 Reviewed-on: http://git.am.freescale.net:8181/23354 Tested-by: Yusong Sun <yorksun(a)freescale.com> Reviewed-by: Yusong Sun <yorksun(a)freescale.com> --- board/freescale/b4860qds/b4860qds.c | 13 +++++++++++++ 1 files changed, 13 insertions(+), 0 deletions(-) diff --git a/board/freescale/b4860qds/b4860qds.c b/board/freescale/b4860qds/b4860qds.c index 975952f..7f2437e 100644 --- a/board/freescale/b4860qds/b4860qds.c +++ b/board/freescale/b4860qds/b4860qds.c @@ -385,15 +385,18 @@ int configure_vsc3316_3308(void) } break; + case 0x01: case 0x02: case 0x04: case 0x05: case 0x06: + case 0x07: case 0x08: case 0x09: case 0x0A: case 0x0B: case 0x0C: + case 0x2F: case 0x30: case 0x32: case 0x33: @@ -494,10 +497,14 @@ int configure_vsc3316_3308(void) case 0x9E: case 0x9A: case 0x98: + case 0xb1: case 0xb2: + case 0x48: case 0x49: case 0x4E: + case 0x8C: case 0x8D: + case 0x79: case 0x7A: num_vsc08_con = NUM_CON_VSC3308; /* Configure VSC3308 crossbar switch */ @@ -730,19 +737,23 @@ int config_serdes1_refclks(void) * to 122.88MHz */ switch (serdes1_prtcl) { + case 0x29: case 0x2A: case 0x2C: case 0x2D: case 0x2E: + case 0x01: case 0x02: case 0x04: case 0x05: case 0x06: + case 0x07: case 0x08: case 0x09: case 0x0A: case 0x0B: case 0x0C: + case 0x2F: case 0x30: case 0x32: case 0x33: @@ -860,6 +871,8 @@ int config_serdes2_refclks(void) #endif case 0x9E: case 0x9A: + /* fallthrough */ + case 0xb1: case 0xb2: debug("Configuring IDT for PCIe SATA for srds_prctl:%x\n", serdes2_prtcl); -- 1.7.6.GIT

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[U-Boot] [PATCH 2/3] B4860QDS: SGMII related updates
by Shaveta Leekha 05 Dec '14

05 Dec '14

- Enable SGMII support for 0x8d Serdes 2 protocol. - Correct Phy address for DTSECx for 0x8d/0xb2 Serdes 2 protocol. - Updated debug statement - Add Alternate LC VCO protocols(0x8d-->0x8c, 0xb2-->0xb1) - Rename onboard PHY address defines for more readability - Add these new Defines in B4860QDS.h file Signed-off-by: Shaveta Leekha <shaveta(a)freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal(a)freescale.com> Signed-off-by: Suresh Gupta <suresh.gupta(a)freescale.com> Change-Id: I4d9a8c602bdaac8404577ab9642f8c5f37ac7cdc Reviewed-on: http://git.am.freescale.net:8181/23353 Tested-by: Review Code-CDREVIEW <CDREVIEW(a)freescale.com> Reviewed-by: Yusong Sun <yorksun(a)freescale.com> --- board/freescale/b4860qds/eth_b4860qds.c | 64 ++++++++++++++++++------------ include/configs/B4860QDS.h | 4 +- 2 files changed, 40 insertions(+), 28 deletions(-) diff --git a/board/freescale/b4860qds/eth_b4860qds.c b/board/freescale/b4860qds/eth_b4860qds.c index 12df9a8..2726cd2 100644 --- a/board/freescale/b4860qds/eth_b4860qds.c +++ b/board/freescale/b4860qds/eth_b4860qds.c @@ -112,7 +112,10 @@ static void initialize_lane_to_slot(void) * Lanes: A,B,C,D: PCI * Lanes: E,F,G,H: XAUI2 */ + case 0xb1: case 0xb2: + case 0x8c: + case 0x8d: /* * Configuration: * SERDES: 2 @@ -195,34 +198,34 @@ int board_eth_init(bd_t *bis) * all SGMII. RGMII is not supported on this board. Setting SGMII 5 and * 6 to on board SGMII phys */ - fm_info_set_phy_address(FM1_DTSEC5, CONFIG_SYS_FM1_DTSEC5_PHY_ADDR); - fm_info_set_phy_address(FM1_DTSEC6, CONFIG_SYS_FM1_DTSEC6_PHY_ADDR); + fm_info_set_phy_address(FM1_DTSEC5, CONFIG_SYS_FM1_ONBOARD_PHY1_ADDR); + fm_info_set_phy_address(FM1_DTSEC6, CONFIG_SYS_FM1_ONBOARD_PHY2_ADDR); switch (serdes1_prtcl) { case 0x29: case 0x2a: /* Serdes 1: A-B SGMII, Configuring DTSEC 5 and 6 */ - debug("Setting phy addresses for FM1_DTSEC5: %x and" - "FM1_DTSEC6: %x\n", CONFIG_SYS_FM1_DTSEC5_PHY_ADDR, - CONFIG_SYS_FM1_DTSEC6_PHY_ADDR); + debug("Set phy addresses for FM1_DTSEC5:%x, FM1_DTSEC6:%x\n", + CONFIG_SYS_FM1_ONBOARD_PHY1_ADDR, + CONFIG_SYS_FM1_ONBOARD_PHY2_ADDR); fm_info_set_phy_address(FM1_DTSEC5, - CONFIG_SYS_FM1_DTSEC5_PHY_ADDR); + CONFIG_SYS_FM1_ONBOARD_PHY1_ADDR); fm_info_set_phy_address(FM1_DTSEC6, - CONFIG_SYS_FM1_DTSEC6_PHY_ADDR); + CONFIG_SYS_FM1_ONBOARD_PHY2_ADDR); break; #ifdef CONFIG_PPC_B4420 case 0x17: case 0x18: /* Serdes 1: A-D SGMII, Configuring on board dual SGMII Phy */ - debug("Setting phy addresses for FM1_DTSEC3: %x and" - "FM1_DTSEC4: %x\n", CONFIG_SYS_FM1_DTSEC5_PHY_ADDR, - CONFIG_SYS_FM1_DTSEC6_PHY_ADDR); + debug("Set phy addresses for FM1_DTSEC3:%x, FM1_DTSEC4:%x\n", + CONFIG_SYS_FM1_ONBOARD_PHY1_ADDR, + CONFIG_SYS_FM1_ONBOARD_PHY2_ADDR); /* Fixing Serdes clock by programming FPGA register */ QIXIS_WRITE(brdcfg[4], QIXIS_SRDS1CLK_125); fm_info_set_phy_address(FM1_DTSEC3, - CONFIG_SYS_FM1_DTSEC5_PHY_ADDR); + CONFIG_SYS_FM1_ONBOARD_PHY1_ADDR); fm_info_set_phy_address(FM1_DTSEC4, - CONFIG_SYS_FM1_DTSEC6_PHY_ADDR); + CONFIG_SYS_FM1_ONBOARD_PHY2_ADDR); break; #endif default: @@ -233,8 +236,8 @@ int board_eth_init(bd_t *bis) switch (serdes2_prtcl) { case 0x17: case 0x18: - debug("Setting phy addresses on SGMII Riser card for" - "FM1_DTSEC ports: \n"); + debug("Set phy address on SGMII Riser for FM1_DTSEC1:%x\n", + CONFIG_SYS_FM1_DTSEC1_RISER_PHY_ADDR); fm_info_set_phy_address(FM1_DTSEC1, CONFIG_SYS_FM1_DTSEC1_RISER_PHY_ADDR); fm_info_set_phy_address(FM1_DTSEC2, @@ -246,8 +249,8 @@ int board_eth_init(bd_t *bis) break; case 0x48: case 0x49: - debug("Setting phy addresses on SGMII Riser card for" - "FM1_DTSEC ports: \n"); + debug("Set phy address on SGMII Riser for FM1_DTSEC1:%x\n", + CONFIG_SYS_FM1_DTSEC1_RISER_PHY_ADDR); fm_info_set_phy_address(FM1_DTSEC1, CONFIG_SYS_FM1_DTSEC1_RISER_PHY_ADDR); fm_info_set_phy_address(FM1_DTSEC2, @@ -255,10 +258,12 @@ int board_eth_init(bd_t *bis) fm_info_set_phy_address(FM1_DTSEC3, CONFIG_SYS_FM1_DTSEC3_RISER_PHY_ADDR); break; - case 0x8d: + case 0xb1: case 0xb2: - debug("Setting phy addresses on SGMII Riser card for" - "FM1_DTSEC ports: \n"); + case 0x8c: + case 0x8d: + debug("Set phy addresses on SGMII Riser for FM1_DTSEC1:%x\n", + CONFIG_SYS_FM1_DTSEC1_RISER_PHY_ADDR); fm_info_set_phy_address(FM1_DTSEC3, CONFIG_SYS_FM1_DTSEC1_RISER_PHY_ADDR); fm_info_set_phy_address(FM1_DTSEC4, @@ -266,18 +271,18 @@ int board_eth_init(bd_t *bis) break; case 0x98: /* XAUI in Slot1 and Slot2 */ - debug("Setting phy addresses on B4860 QDS AMC2PEX-2S for FM1_10GEC1: %x\n", + debug("Set phy address of AMC2PEX-2S for FM1_10GEC1:%x\n", CONFIG_SYS_FM1_10GEC1_PHY_ADDR); fm_info_set_phy_address(FM1_10GEC1, CONFIG_SYS_FM1_10GEC1_PHY_ADDR); - debug("Setting phy addresses on B4860 QDS AMC2PEX-2S for FM1_10GEC2: %x\n", + debug("Set phy address of AMC2PEX-2S for FM1_10GEC2:%x\n", CONFIG_SYS_FM1_10GEC2_PHY_ADDR); fm_info_set_phy_address(FM1_10GEC2, CONFIG_SYS_FM1_10GEC2_PHY_ADDR); break; case 0x9E: /* XAUI in Slot2 */ - debug("Setting phy addresses on B4860 QDS AMC2PEX-2S for FM1_10GEC2: %x\n", + debug("Sett phy address of AMC2PEX-2S for FM1_10GEC2:%x\n", CONFIG_SYS_FM1_10GEC2_PHY_ADDR); fm_info_set_phy_address(FM1_10GEC2, CONFIG_SYS_FM1_10GEC2_PHY_ADDR); @@ -329,17 +334,20 @@ int board_eth_init(bd_t *bis) switch (fm_info_get_enet_if(i)) { case PHY_INTERFACE_MODE_XGMII: fm_info_set_mdio(i, - miiphy_get_dev_by_name(DEFAULT_FM_TGEC_MDIO_NAME)); + miiphy_get_dev_by_name + (DEFAULT_FM_TGEC_MDIO_NAME)); + break; + case PHY_INTERFACE_MODE_NONE: + fm_info_set_phy_address(i, 0); break; default: - printf("Fman1: 10GSEC%u set to unknown interface %i\n", + printf("Fman1: TGEC%u set to unknown interface %i\n", idx + 1, fm_info_get_enet_if(i)); fm_info_set_phy_address(i, 0); break; } } - cpu_eth_init(bis); #endif @@ -357,15 +365,19 @@ void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr, sprintf(alias, "phy_sgmii_%x", phy); fdt_set_phy_handle(fdt, compat, addr, alias); + fdt_status_okay_by_alias(fdt, alias); } } +/* + * Set status to disabled for unused ethernet node + */ void fdt_fixup_board_enet(void *fdt) { int i; char alias[32]; - for (i = FM1_DTSEC1; i < FM1_DTSEC1 + CONFIG_SYS_NUM_FM1_DTSEC; i++) { + for (i = FM1_DTSEC1; i <= FM1_10GEC2; i++) { switch (fm_info_get_enet_if(i)) { case PHY_INTERFACE_MODE_NONE: sprintf(alias, "ethernet%u", i); diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h index dc1a9bc..b47b9de 100644 --- a/include/configs/B4860QDS.h +++ b/include/configs/B4860QDS.h @@ -713,8 +713,8 @@ unsigned long get_board_ddr_clk(void); #endif /* CONFIG_PCI */ #ifdef CONFIG_FMAN_ENET -#define CONFIG_SYS_FM1_DTSEC5_PHY_ADDR 0x10 -#define CONFIG_SYS_FM1_DTSEC6_PHY_ADDR 0x11 +#define CONFIG_SYS_FM1_ONBOARD_PHY1_ADDR 0x10 +#define CONFIG_SYS_FM1_ONBOARD_PHY2_ADDR 0x11 /*B4860 QDS AMC2PEX-2S default PHY_ADDR */ #define CONFIG_SYS_FM1_10GEC1_PHY_ADDR 0x7 /*SLOT 1*/ -- 1.7.6.GIT

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[U-Boot] [PATCH] powerpc/b4860: Enable law creation of MAPLE
by Shaveta Leekha 05 Dec '14

05 Dec '14

B4860, B4440, B4420 and B4220 have MAPLE, so enable law creation for them only Remove static LAW creation for MAPLE Signed-off-by: Shaveta Leekha <shaveta(a)freescale.com> Signed-off-by: Sandeep Singh <Sandeep(a)freescale.com> Change-Id: I1d1d6e414617bb45ade5e5ab9134f0464763c034 Reviewed-on: http://git.am.freescale.net:8181/23351 Tested-by: Review Code-CDREVIEW <CDREVIEW(a)freescale.com> Reviewed-by: Poonam Aggrwal <poonam.aggrwal(a)freescale.com> Reviewed-by: Yusong Sun <yorksun(a)freescale.com> --- board/freescale/b4860qds/b4860qds.c | 8 ++++++++ board/freescale/b4860qds/law.c | 3 --- 2 files changed, 8 insertions(+), 3 deletions(-) diff --git a/board/freescale/b4860qds/b4860qds.c b/board/freescale/b4860qds/b4860qds.c index 34d66d5..975952f 100644 --- a/board/freescale/b4860qds/b4860qds.c +++ b/board/freescale/b4860qds/b4860qds.c @@ -915,6 +915,14 @@ int board_early_init_r(void) const unsigned int flashbase = CONFIG_SYS_FLASH_BASE; int flash_esel = find_tlb_idx((void *)flashbase, 1); int ret; + u32 svr = SVR_SOC_VER(get_svr()); + + /* Create law for MAPLE only for personalities having MAPLE */ + if ((svr == SVR_B4860) || (svr == SVR_B4440) || + (svr == SVR_B4420) || (svr == SVR_B4220)) { + set_next_law(CONFIG_SYS_MAPLE_MEM_PHYS, LAW_SIZE_16M, + LAW_TRGT_IF_MAPLE); + } /* * Remap Boot flash + PROMJET region to caching-inhibited diff --git a/board/freescale/b4860qds/law.c b/board/freescale/b4860qds/law.c index 5b327cc..047c3cb 100644 --- a/board/freescale/b4860qds/law.c +++ b/board/freescale/b4860qds/law.c @@ -17,9 +17,6 @@ struct law_entry law_table[] = { SET_LAW(CONFIG_SYS_QMAN_MEM_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_QMAN), #endif SET_LAW(QIXIS_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_IFC), -#ifdef CONFIG_SYS_MAPLE_MEM_PHYS - SET_LAW(CONFIG_SYS_MAPLE_MEM_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_MAPLE), -#endif #ifdef CONFIG_SYS_DCSRBAR_PHYS /* Limit DCSR to 32M to access NPC Trace Buffer */ SET_LAW(CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_DCSR), -- 1.7.6.GIT

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[U-Boot] [PATCH] powerpc/t104x: Convert to use generic board code
by Vijay Rai 05 Dec '14

05 Dec '14

Convert T1040QDS and T1040RDB to use generic board code. Signed-off-by: Vijay Rai <vijay.rai(a)freescale.com> --- Tested for : NOR, NAND, SPI, SD bootloader for T104xRDB boards NOR bootloader for T104xQDS Boards include/configs/T1040QDS.h | 2 ++ include/configs/T104xRDB.h | 2 ++ 2 files changed, 4 insertions(+) diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h index 1d0664d..22932e9 100644 --- a/include/configs/T1040QDS.h +++ b/include/configs/T1040QDS.h @@ -28,6 +28,8 @@ */ #define CONFIG_T1040QDS #define CONFIG_PHYS_64BIT +#define CONFIG_SYS_GENERIC_BOARD +#define CONFIG_DISPLAY_BOARDINFO #ifdef CONFIG_RAMBOOT_PBL #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 2bb86e4..4b12639 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -12,6 +12,8 @@ */ #define CONFIG_T104xRDB #define CONFIG_PHYS_64BIT +#define CONFIG_SYS_GENERIC_BOARD +#define CONFIG_DISPLAY_BOARDINFO #ifdef CONFIG_RAMBOOT_PBL #define CONFIG_SYS_FSL_PBL_PBI $(SRCTREE)/board/freescale/t104xrdb/t104x_pbi.cfg -- 1.7.9.5

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[U-Boot] [PATCH] powerpc/c29xpcie: Enable configs to use generic board code
by Chunhe Lan 05 Dec '14

05 Dec '14

Add configs: o CONFIG_SYS_GENERIC_BOARD o CONFIG_DISPLAY_BOARDINFO in C29XPCIE config header file to use U-boot generic board code. Signed-off-by: Chunhe Lan <Chunhe.Lan(a)freescale.com> --- include/configs/C29XPCIE.h | 2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h index 9e12fac..be91704 100644 --- a/include/configs/C29XPCIE.h +++ b/include/configs/C29XPCIE.h @@ -12,6 +12,8 @@ #define __CONFIG_H #define CONFIG_PHYS_64BIT +#define CONFIG_SYS_GENERIC_BOARD +#define CONFIG_DISPLAY_BOARDINFO #ifdef CONFIG_C29XPCIE #define CONFIG_PPC_C29X -- 1.7.6.5

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[U-Boot] [PATCH] powerpc/p1023rdb: Enable configs to use generic board code
by Chunhe Lan 05 Dec '14

05 Dec '14

Add configs: o CONFIG_SYS_GENERIC_BOARD o CONFIG_DISPLAY_BOARDINFO in P1023RDB config header file to use U-boot generic board code. Signed-off-by: Chunhe Lan <Chunhe.Lan(a)freescale.com> --- include/configs/P1023RDB.h | 3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/include/configs/P1023RDB.h b/include/configs/P1023RDB.h index ba3da06..2631636 100644 --- a/include/configs/P1023RDB.h +++ b/include/configs/P1023RDB.h @@ -10,6 +10,9 @@ #ifndef __CONFIG_H #define __CONFIG_H +#define CONFIG_SYS_GENERIC_BOARD +#define CONFIG_DISPLAY_BOARDINFO + #ifndef CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_TEXT_BASE 0xeff40000 #endif -- 1.7.6.5

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[U-Boot] [PATCH] mpc85xx/p1022ds: convert to generic board
by Yuantian.Tang＠freescale.com 05 Dec '14

05 Dec '14

From: Tang Yuantian <Yuantian.Tang(a)freescale.com> Signed-off-by: Tang Yuantian <Yuantian.Tang(a)freescale.com> --- include/configs/P1022DS.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index 54e2569..de0613f 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -11,6 +11,9 @@ #include "../board/freescale/common/ics307_clk.h" +#define CONFIG_SYS_GENERIC_BOARD +#define CONFIG_DISPLAY_BOARDINFO + #ifdef CONFIG_36BIT #define CONFIG_PHYS_64BIT #endif -- 2.1.0.27.g96db324

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[U-Boot] [PATCH] powerpc, muas3001: remove CONFIG_SYS_RAMBOOT
by Heiko Schocher 05 Dec '14

05 Dec '14

cppcheck reports: [board/muas3001/muas3001.c:270]: (error) Uninitialized variable: psize remove the CONFIG_SYS_RAMBOOT define to prevent this error report. Signed-off-by: Heiko Schocher <hs(a)denx.de> Reported-by: Wolfgang Denk <wd(a)denx.de> --- board/muas3001/muas3001.c | 4 ---- include/configs/muas3001.h | 4 ---- 2 files changed, 8 deletions(-) diff --git a/board/muas3001/muas3001.c b/board/muas3001/muas3001.c index 08eb5e8..812a7f1 100644 --- a/board/muas3001/muas3001.c +++ b/board/muas3001/muas3001.c @@ -243,14 +243,11 @@ phys_size_t initdram (int board_type) volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; volatile memctl8260_t *memctl = &immap->im_memctl; long psize; -#ifndef CONFIG_SYS_RAMBOOT long sizelittle, sizebig; -#endif memctl->memc_psrt = CONFIG_SYS_PSRT; memctl->memc_mptpr = CONFIG_SYS_MPTPR; -#ifndef CONFIG_SYS_RAMBOOT /* 60x SDRAM setup: */ sizelittle = try_init (memctl, CONFIG_SYS_PSDMR_LITTLE, CONFIG_SYS_OR1_LITTLE, @@ -263,7 +260,6 @@ phys_size_t initdram (int board_type) psize = try_init (memctl, CONFIG_SYS_PSDMR_LITTLE, CONFIG_SYS_OR1_LITTLE, (uchar *) CONFIG_SYS_SDRAM_BASE); } -#endif /* CONFIG_SYS_RAMBOOT */ icache_enable (); diff --git a/include/configs/muas3001.h b/include/configs/muas3001.h index 7343c94..df2ecc1 100644 --- a/include/configs/muas3001.h +++ b/include/configs/muas3001.h @@ -206,10 +206,6 @@ #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE -#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) -#define CONFIG_SYS_RAMBOOT -#endif - #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256KB for Monitor */ #define CONFIG_ENV_IS_IN_FLASH -- 1.8.3.1

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[U-Boot] [PATCH] km/km82xx: remove CONFIG_SYS_RAMBOOT
by Holger Brunck 05 Dec '14

05 Dec '14

This define is never set in our setup, so we can remove it safely. The former code causes cppcheck to complain about: [board/keymile/km82xx/km82xx.c:311]: (error) Uninitialized variable: psize Signed-off-by: Holger Brunck <holger.brunck(a)keymile.com> cc: Valentin Longchamp <valentin.longchamp(a)keymile.com> cc: Wolfgang Denk <wd(a)denx.de> --- board/keymile/km82xx/km82xx.c | 2 -- include/configs/km82xx.h | 3 --- 2 files changed, 5 deletions(-) diff --git a/board/keymile/km82xx/km82xx.c b/board/keymile/km82xx/km82xx.c index dfbfab8..cb13a0b 100644 --- a/board/keymile/km82xx/km82xx.c +++ b/board/keymile/km82xx/km82xx.c @@ -300,11 +300,9 @@ phys_size_t initdram(int board_type) out_8(&memctl->memc_psrt, CONFIG_SYS_PSRT); out_be16(&memctl->memc_mptpr, CONFIG_SYS_MPTPR); -#ifndef CONFIG_SYS_RAMBOOT /* 60x SDRAM setup: */ psize = probe_sdram(memctl); -#endif /* CONFIG_SYS_RAMBOOT */ icache_enable(); diff --git a/include/configs/km82xx.h b/include/configs/km82xx.h index 029c348..220975d 100644 --- a/include/configs/km82xx.h +++ b/include/configs/km82xx.h @@ -204,9 +204,6 @@ "" #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE -#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) -#define CONFIG_SYS_RAMBOOT -#endif #define CONFIG_SYS_MONITOR_LEN (768 << 10) -- 2.1.2

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