January 2014 - U-Boot

[U-Boot] [PATCH 0/3] PPC 85xx: Add support for QEMU's ppce500 PV machine
by Alexander Graf 06 Mar '14

06 Mar '14

In QEMU we implement a PV machine type called "ppce500". That board is able to run any e500+ FSL cores (e500v2, e500mc, e5500, e6500). It is heavily inspired by the MPC8544DS SoC and board combination, but implements only the bare minimum to make Linux happy enough to drive a virtual machine. This patch set implements support for this PV machine type in U-Boot, enabling users to run their virtual machines with netboot, u-boot payload binaries or other fun things they come up with. Alexander Graf (3): PPC 85xx: Detect e500v2 / e500mc during runtime PPC 85xx: Add ELF entry point PPC 85xx: Add qemu-ppce500 machine arch/powerpc/cpu/mpc85xx/fixed_ivor.S | 21 ++- arch/powerpc/cpu/mpc85xx/start.S | 7 + arch/powerpc/cpu/mpc85xx/u-boot.lds | 1 + arch/powerpc/include/asm/config_mpc85xx.h | 4 + board/freescale/qemu-ppce500/Makefile | 10 ++ board/freescale/qemu-ppce500/qemu-ppce500.c | 260 +++++++++++++++++++++++++++ board/freescale/qemu-ppce500/tlb.c | 59 ++++++ boards.cfg | 1 + include/configs/qemu-ppce500.h | 235 ++++++++++++++++++++++++ 9 files changed, 593 insertions(+), 5 deletions(-) create mode 100644 board/freescale/qemu-ppce500/Makefile create mode 100644 board/freescale/qemu-ppce500/qemu-ppce500.c create mode 100644 board/freescale/qemu-ppce500/tlb.c create mode 100644 include/configs/qemu-ppce500.h -- 1.7.10.4

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[U-Boot] [PATCH] OMAP3: igep00x0: Enable required clocks for GPIO that are used.
by Enric Balletbo i Serra 06 Mar '14

06 Mar '14

Enable required clocks for GPIO to fix a boot issue introduced by commit f33b9bd3984fb11e1d8566a866adc5957b1e1c9d (arm: omap3: Enable clocks for peripherals only if they are used). Without this patch the u-boot freezes after the following messages OMAP36XX/37XX-GP ES1.2, CPU-OPP2, L3-200MHz, Max CPU Clock 1 Ghz IGEPv2 + LPDDR/NAND I2C: ready DRAM: 512 MiB NAND: 512 MiB MMC: OMAP SD/MMC: 0 Diving into the issue, the sequence that produces the u-boot freezes is setup_net_chip |--> gpio_direction_out |--> _set_gpio_dataout |--> __raw_writel To avoid this we just need enable the clocks for GPIOs that are used, but it would be interesting implement a mechanism to protect these situations and make sure that the clock is enabled when we request a GPIO. Signed-off-by: Enric Balletbo i Serra <eballetbo(a)gmail.com> --- include/configs/omap3_igep00x0.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/include/configs/omap3_igep00x0.h b/include/configs/omap3_igep00x0.h index 20fbbec..8cc23c1 100644 --- a/include/configs/omap3_igep00x0.h +++ b/include/configs/omap3_igep00x0.h @@ -37,6 +37,11 @@ #define CONFIG_SHOW_BOOT_PROGRESS #endif +/* GPIO banks */ +#define CONFIG_OMAP3_GPIO_3 /* GPIO64 .. 95 is in GPIO bank 3 */ +#define CONFIG_OMAP3_GPIO_5 /* GPIO128..159 is in GPIO bank 5 */ +#define CONFIG_OMAP3_GPIO_6 /* GPIO160..191 is in GPIO bank 6 */ + /* USB */ #define CONFIG_MUSB_UDC 1 #define CONFIG_USB_OMAP3 1 -- 1.8.3.2

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[U-Boot] [PATCH 00/10] Add Marvell Dove and SolidRun CuBox
by Sebastian Hesselbarth 04 Mar '14

04 Mar '14

This patch set add support for the Marvell Dove 88AP510 SoC and the SolidRun CuBox board based on that SoC. The patch set is divided into the four following sections: (1) Patches 1-5: Add support for the Dove SoC and related drivers. Where possible drivers from Marvell Kirkwood are reused (mvsata, mvgbe), or forked to allow more generic usage (SPI, GPIO). The SDHCI driver is different and a new driver is added for it. The forked drivers can also be reused on Kirkwood but that would have required patching existing boards. (2) Patches 6-8: Allow mvgbe to use the phylib API, add support for 88E1310 PHY and allow Dove to use the driver. (3) Patch 9 Add the SolidRun CuBox as the first board based on Marvell Dove SoC. (4) Patch 10 Add support for different UART boot mode found on Dove. Sebastian Hesselbarth (10): ARM: dove: add support for Marvell Dove SoC GPIO: add gpio driver for Orion SoCs MMC: sdhci: Add support for dove sdhci SPI: Add Orion SPI driver block: mvsata: add dove include NET: phy: add 88E1310 PHY initialization NET: mvgbe: add phylib support NET: mvgbe: add support for Dove Boards: Add support for SolidRun CuBox tools: Add support for Dove to kwboot arch/arm/cpu/armv7/dove/Makefile | 49 +++++ arch/arm/cpu/armv7/dove/cpu.c | 266 ++++++++++++++++++++++++++ arch/arm/cpu/armv7/dove/dram.c | 116 +++++++++++ arch/arm/cpu/armv7/dove/lowlevel_init.S | 83 ++++++++ arch/arm/cpu/armv7/dove/mpp.c | 319 +++++++++++++++++++++++++++++++ arch/arm/cpu/armv7/dove/timer.c | 176 +++++++++++++++++ arch/arm/cpu/armv7/dove/usb.c | 101 ++++++++++ arch/arm/include/asm/arch-dove/config.h | 153 +++++++++++++++ arch/arm/include/asm/arch-dove/cpu.h | 204 ++++++++++++++++++++ arch/arm/include/asm/arch-dove/dove.h | 93 +++++++++ arch/arm/include/asm/arch-dove/gpio.h | 35 ++++ arch/arm/include/asm/arch-dove/mpp.h | 283 +++++++++++++++++++++++++++ board/solidrun/cubox/Makefile | 45 +++++ board/solidrun/cubox/cubox.c | 141 ++++++++++++++ board/solidrun/cubox/kwbimage.cfg | 76 ++++++++ boards.cfg | 1 + drivers/block/mvsata_ide.c | 2 + drivers/gpio/Makefile | 1 + drivers/gpio/orion_gpio.c | 167 ++++++++++++++++ drivers/mmc/Makefile | 1 + drivers/mmc/dove_sdhci.c | 101 ++++++++++ drivers/net/mvgbe.c | 70 ++++++- drivers/net/mvgbe.h | 7 + drivers/net/phy/marvell.c | 48 +++++ drivers/spi/Makefile | 1 + drivers/spi/orion_spi.c | 217 +++++++++++++++++++++ include/configs/cubox.h | 175 +++++++++++++++++ include/orion_gpio.h | 64 +++++++ tools/Makefile | 2 + tools/kwboot.c | 44 ++++- 30 files changed, 3033 insertions(+), 8 deletions(-) create mode 100644 arch/arm/cpu/armv7/dove/Makefile create mode 100644 arch/arm/cpu/armv7/dove/cpu.c create mode 100644 arch/arm/cpu/armv7/dove/dram.c create mode 100644 arch/arm/cpu/armv7/dove/lowlevel_init.S create mode 100644 arch/arm/cpu/armv7/dove/mpp.c create mode 100644 arch/arm/cpu/armv7/dove/timer.c create mode 100644 arch/arm/cpu/armv7/dove/usb.c create mode 100644 arch/arm/include/asm/arch-dove/config.h create mode 100644 arch/arm/include/asm/arch-dove/cpu.h create mode 100644 arch/arm/include/asm/arch-dove/dove.h create mode 100644 arch/arm/include/asm/arch-dove/gpio.h create mode 100644 arch/arm/include/asm/arch-dove/mpp.h create mode 100644 board/solidrun/cubox/Makefile create mode 100644 board/solidrun/cubox/cubox.c create mode 100644 board/solidrun/cubox/kwbimage.cfg create mode 100644 drivers/gpio/orion_gpio.c create mode 100644 drivers/mmc/dove_sdhci.c create mode 100644 drivers/spi/orion_spi.c create mode 100644 include/configs/cubox.h create mode 100644 include/orion_gpio.h --- Cc: u-boot(a)lists.denx.de Cc: Sebastian Hesselbarth <sebastian.hesselbarth(a)gmail.com> Cc: Rabeeh Khoury <rabeeh(a)solid-run.com> Cc: Albert Aribaud <albert.u.boot(a)aribaud.net> Cc: Prafulla Wadaskar <prafulla(a)marvell.com> Cc: Andy Fleming <afleming(a)gmail.com> Cc: Joe Hershberger <joe.hershberger(a)gmail.com> Cc: Daniel Stodden <daniel.stodden(a)gmail.com> Cc: Dieter Kiermaier <dk-arm-linux(a)gmx.de> -- 1.7.10.4

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[U-Boot] [PATCH 0/2] env export fixes
by Pierre Aubert 03 Mar '14

03 Mar '14

These patches fix two issues in the export of environment variables with CRC calculation. Pierre Aubert (2): hashtable: fix the export lenght computation. env export fix: compute the CRC on the real lenght of the exported variables. common/cmd_nvedit.c | 5 +++-- lib/hashtable.c | 2 +- 2 files changed, 4 insertions(+), 3 deletions(-) -- 1.7.6.5

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[U-Boot] [PATCH 0/3] arm: atmel: sama5d3: add spi and nand spl boot support
by Bo Shen 03 Mar '14

03 Mar '14

This patch enable spi and nand spl boot support on sama5d3xek Bo Shen (3): arm: atmel: sama5d3: add spi spl boot support mtd: nand: atmel: prepare for nand spl boot support arm: atmel: sama5d3: add nand spl boot support arch/arm/cpu/at91-common/spl.c | 4 + arch/arm/include/asm/arch-at91/spl.h | 4 + board/atmel/sama5d3xek/sama5d3xek.c | 4 + drivers/mtd/nand/atmel_nand.c | 206 ++++++++++++++++++++++++++++++++++ include/configs/sama5d3xek.h | 23 ++++ include/nand.h | 6 + 6 files changed, 247 insertions(+) -- 1.7.9.5

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[U-Boot] [PATCH] spi: oc_tiny_spi: Refactor to simplify spi_xfer implementation
by Axel Lin 02 Mar '14

02 Mar '14

Currently we have similar code for (txp && rxp), (txp && !rxp), (!rxp & txp), and (!txp && !rxp) cases. This patch refactors the code a bit to avoid duplicate similar code. Signed-off-by: Axel Lin <axel.lin(a)ingics.com> --- Hi Thomas, This path is similar to the patch I sent for spi-oc-tiny.c linux driver. I'd appreciate if you can review and test this patch. Regards, Axel drivers/spi/oc_tiny_spi.c | 85 ++++++----------------------------------------- 1 file changed, 11 insertions(+), 74 deletions(-) diff --git a/drivers/spi/oc_tiny_spi.c b/drivers/spi/oc_tiny_spi.c index 4de5d00..a8c1dfd 100644 --- a/drivers/spi/oc_tiny_spi.c +++ b/drivers/spi/oc_tiny_spi.c @@ -158,85 +158,22 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, spi_cs_activate(slave); /* we need to tighten the transfer loop */ - if (txp && rxp) { - writeb(*txp++, &regs->txdata); - if (bytes > 1) { - writeb(*txp++, &regs->txdata); - for (i = 2; i < bytes; i++) { - u8 rx, tx = *txp++; - while (!(readb(&regs->status) & - TINY_SPI_STATUS_TXR)) + writeb(txp ? *txp++ : CONFIG_TINY_SPI_IDLE_VAL, &regs->txdata); + for (i = 1; i < bytes; i++) { + writeb(txp ? *txp++ : CONFIG_TINY_SPI_IDLE_VAL, &regs->txdata); + + if (rxp || (i != bytes - 1)) { + while (!(readb(&regs->status) & TINY_SPI_STATUS_TXR)) ; - rx = readb(&regs->txdata); - writeb(tx, &regs->txdata); - *rxp++ = rx; - } - while (!(readb(&regs->status) & - TINY_SPI_STATUS_TXR)) - ; - *rxp++ = readb(&regs->txdata); } - while (!(readb(&regs->status) & - TINY_SPI_STATUS_TXE)) - ; - *rxp++ = readb(&regs->rxdata); - } else if (rxp) { - writeb(CONFIG_TINY_SPI_IDLE_VAL, &regs->txdata); - if (bytes > 1) { - writeb(CONFIG_TINY_SPI_IDLE_VAL, - &regs->txdata); - for (i = 2; i < bytes; i++) { - u8 rx; - while (!(readb(&regs->status) & - TINY_SPI_STATUS_TXR)) - ; - rx = readb(&regs->txdata); - writeb(CONFIG_TINY_SPI_IDLE_VAL, - &regs->txdata); - *rxp++ = rx; - } - while (!(readb(&regs->status) & - TINY_SPI_STATUS_TXR)) - ; + + if (rxp) *rxp++ = readb(&regs->txdata); - } - while (!(readb(&regs->status) & - TINY_SPI_STATUS_TXE)) + } + while (!(readb(&regs->status) & TINY_SPI_STATUS_TXE)) ; + if (rxp) *rxp++ = readb(&regs->rxdata); - } else if (txp) { - writeb(*txp++, &regs->txdata); - if (bytes > 1) { - writeb(*txp++, &regs->txdata); - for (i = 2; i < bytes; i++) { - u8 tx = *txp++; - while (!(readb(&regs->status) & - TINY_SPI_STATUS_TXR)) - ; - writeb(tx, &regs->txdata); - } - } - while (!(readb(&regs->status) & - TINY_SPI_STATUS_TXE)) - ; - } else { - writeb(CONFIG_TINY_SPI_IDLE_VAL, &regs->txdata); - if (bytes > 1) { - writeb(CONFIG_TINY_SPI_IDLE_VAL, - &regs->txdata); - for (i = 2; i < bytes; i++) { - while (!(readb(&regs->status) & - TINY_SPI_STATUS_TXR)) - ; - writeb(CONFIG_TINY_SPI_IDLE_VAL, - &regs->txdata); - } - } - while (!(readb(&regs->status) & - TINY_SPI_STATUS_TXE)) - ; - } - done: if (flags & SPI_XFER_END) spi_cs_deactivate(slave); -- 1.8.1.2

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[U-Boot] [PATCH v2 00/13] ARMv7: add PSCI support to u-boot
by Marc Zyngier 26 Feb '14

26 Feb '14

PSCI is an ARM standard that provides a generic interface that supervisory software can use to manage power in the following situations: - Core idle management - CPU hotplug - big.LITTLE migration models - System shutdown and reset It basically allows the kernel to offload these tasks to the firmware, and rely on common kernel side code. More importantly, it gives a way to ensure that CPUs enter the kernel at the appropriate exception level (ie HYP mode, to allow the use of the virtualization extensions), even across events like CPUs being powered off/on or suspended. The main idea here is to turn some of the existing u-boot code into a separate section that can live in secure RAM (or a reserved page of memory), containing a secure monitor that will implement the PSCI operations. This code will still be alive when u-boot is long gone, hence the need for a piece of memory that will not be touched by the OS. This patch series contains 4 parts: - the first four patches are just bug fixes - the next three refactor the HYP/non-secure code to allow relocation in secure memory - the next three contain the generic PSCI code and DT infrastructure - the last three implement the CPU_ON method of the Allwinner A20 (aka sun7i). I realize the A20 u-boot code is not upstream yet (BTW is anyone actively working on that?), but hopefully that should give a good idea of how things are structured so far. The patches are against the sunxi u-boot tree as of today, and the first 10 patches will directly apply to mainline u-boot. As for using this code, it goes like this: sun7i# ext2load mmc 0:1 0x40008000 zImage ; ext2load mmc 0:1 0x60000000 sun7i-a20-cubietruck.dtb 2270120 bytes read in 117 ms (18.5 MiB/s) 9138 bytes read in 3 ms (2.9 MiB/s) sun7i# fdt addr 0x60000000 ; fdt resize ; fdt set ethernet0 mac-address "[5a fe b0 07 b0 07]" sun7i# setenv bootargs console=ttyS0,115200 earlyprintk ip=dhcp root=/dev/nfs nfsroot=/backup/a20_root,tcp sun7i# bootz 0x40008000 - 0x60000000 The kernel now boots in HYP mode, finds its secondary CPU without any SMP code present in the kernel, and runs KVM out of the box. Hopefully, the Xen/ARM guys can do the same fairly easily. This code has also been tested on a VExpress TC2, running KVM with all 5 CPUs, in order to make sure there was no obvious regression. I'm wildly cross-posting this patch series, including to lists I'm not subscribed to. Please keep me on Cc for any comment you may have. Cheers, M. Marc Zyngier (13): ARM: HYP/non-sec: fix alignment requirements for vectors ARM: HYP/non-sec: move switch to non-sec to the last boot phase ARM: HYP/non-sec: add a barrier after setting SCR.NS==1 ARM: non-sec: reset CNTVOFF to zero ARM: add missing HYP mode constant ARM: HYP/non-sec: add separate section for secure code ARM: HYP/non-sec: allow relocation to secure RAM ARM: HYP/non-sec: add generic ARMv7 PSCI code ARM: HYP/non-sec: add the option for a second-stage monitor ARM: HYP/non-sec/PSCI: emit DT nodes sunxi: fix SRAM_B/SRAM_D memory map sunxi: HYP/non-sec: add sun7i PSCI backend sunxi: HYP/non-sec: configure CNTFRQ on all CPUs arch/arm/cpu/armv7/Makefile | 5 + arch/arm/cpu/armv7/nonsec_virt.S | 168 ++++++++++++++++--------------- arch/arm/cpu/armv7/psci.S | 113 +++++++++++++++++++++ arch/arm/cpu/armv7/sunxi/Makefile | 3 + arch/arm/cpu/armv7/sunxi/psci.S | 124 +++++++++++++++++++++++ arch/arm/cpu/armv7/sunxi/u-boot-psci.lds | 63 ++++++++++++ arch/arm/cpu/armv7/virt-dt.c | 102 +++++++++++++++++++ arch/arm/cpu/armv7/virt-v7.c | 59 ++++------- arch/arm/cpu/u-boot.lds | 30 ++++++ arch/arm/include/asm/arch-sunxi/cpu.h | 4 +- arch/arm/include/asm/armv7.h | 11 +- arch/arm/include/asm/proc-armv/ptrace.h | 2 + arch/arm/include/asm/psci.h | 35 +++++++ arch/arm/include/asm/secure.h | 26 +++++ arch/arm/lib/bootm.c | 26 ++--- arch/arm/lib/interrupts.c | 2 +- arch/arm/lib/sections.c | 2 + include/configs/sun7i.h | 7 ++ 18 files changed, 641 insertions(+), 141 deletions(-) create mode 100644 arch/arm/cpu/armv7/psci.S create mode 100644 arch/arm/cpu/armv7/sunxi/psci.S create mode 100644 arch/arm/cpu/armv7/sunxi/u-boot-psci.lds create mode 100644 arch/arm/cpu/armv7/virt-dt.c create mode 100644 arch/arm/include/asm/psci.h create mode 100644 arch/arm/include/asm/secure.h -- 1.8.4.3

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[U-Boot] [PATCH] ar8031/8033/phy:enable autonegotiation for ar8031/8033
by Zhao Qiang 25 Feb '14

25 Feb '14

Function "genphy_parse_link()" used "if (mii_reg & BMSR_ANEGCAPABLE)" before while "if (phydev->supported & SUPPORTED_Autoneg)" now. So assign "phydev->supported" to "phydev->drv->features" for ar8031/8033 to enable autonegotiation. Signed-off-by: Zhao Qiang <B45475(a)freescale.com> --- drivers/net/phy/atheros.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/net/phy/atheros.c b/drivers/net/phy/atheros.c index b20b4df..1ee2226 100644 --- a/drivers/net/phy/atheros.c +++ b/drivers/net/phy/atheros.c @@ -13,6 +13,7 @@ static int ar8021_config(struct phy_device *phydev) phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05); phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x3D47); + phydev->supported = phydev->drv->features; return 0; } -- 1.8.4

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[U-Boot] [PATCH v5] Makefile: add a new script to check -fstack-usage support
by Masahiro Yamada 25 Feb '14

25 Feb '14

If -fstack-usage option is given to crosstools that do not support it, gcc displays a warning message but still exits with status 0. This means we can not rely on $(call cc-option,...) to detect if -fstack-usage option is supported or not. Signed-off-by: Masahiro Yamada <yamada.m(a)jp.panasonic.com> --- Some crosstools currently do not support -fstack-usage option. For example, bfin-uclinux-gcc, which is available at https://www.kernel.org/pub/tools/crosstool/ If -fstack-usage option is given to such crosstools, gcc displays a warning message as follows: warning: -fstack-usage not supported for this target [enabled by default] But it still exits with status 0. So, $(call cc-option,-fstack-usage) does not work as we expect because cc-option checks exit status to judge whether the given option is supported or not. Changes in v5: - Rebased on Kbuild series Changes in v4: - Drop executable permission of scripts/gcc-stack-usage.sh - Fix commit log - Add the rationale below --- Makefile | 4 +++- scripts/gcc-stack-usage.sh | 18 ++++++++++++++++++ 2 files changed, 21 insertions(+), 1 deletion(-) create mode 100644 scripts/gcc-stack-usage.sh diff --git a/Makefile b/Makefile index e034677..8f8a131 100644 --- a/Makefile +++ b/Makefile @@ -553,7 +553,9 @@ KBUILD_CFLAGS += -g KBUILD_AFLAGS += -g # Report stack usage if supported -KBUILD_CFLAGS += $(call cc-option,-fstack-usage) +ifeq ($(shell $(CONFIG_SHELL) $(srctree)/scripts/gcc-stack-usage.sh $(CC)),y) + KBUILD_CFLAGS += -fstack-usage +endif KBUILD_CFLAGS += $(call cc-option,-Wno-format-nonliteral) diff --git a/scripts/gcc-stack-usage.sh b/scripts/gcc-stack-usage.sh new file mode 100644 index 0000000..27ac928 --- /dev/null +++ b/scripts/gcc-stack-usage.sh @@ -0,0 +1,18 @@ +#!/bin/sh +# Test for gcc '-fstack-usage' support +# Copyright (C) 2013, Masahiro Yamada <yamada.m(a)jp.panasonic.com> +# +# SPDX-License-Identifier: GPL-2.0+ +# + +TMP="$$" + +cat <<END | $@ -Werror -fstack-usage -x c - -c -o $TMP >/dev/null 2>&1 \ + && echo "y" +int main(void) +{ + return 0; +} +END + +rm -f $TMP $TMP.su -- 1.8.3.2

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[U-Boot] [PATCH 1/4 v2] SPL: powerpc: expand SPL's length to 128K
by ying.zhang＠freescale.com 25 Feb '14

25 Feb '14

From: Ying Zhang <b40530(a)freescale.com> 1. The SPL's length of SDCARD boot has not enough,expand the SPL's length to 128K. 2. deleted unused symbol: CONFIG_SYS_RUN_INDDR Signed-off-by: Ying Zhang <b40530(a)freescale.com> --- Change from v1: - No change. include/configs/P1022DS.h | 12 ++++++------ include/configs/p1_p2_rdb_pc.h | 12 ++++++------ 2 files changed, 12 insertions(+), 12 deletions(-) diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index 9c9d72b..edc8931 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -30,12 +30,12 @@ #define CONFIG_FSL_LAW /* Use common FSL init code */ #define CONFIG_SYS_TEXT_BASE 0x11001000 #define CONFIG_SPL_TEXT_BASE 0xf8f81000 -#define CONFIG_SPL_PAD_TO 0x18000 -#define CONFIG_SPL_MAX_SIZE (96 * 1024) +#define CONFIG_SPL_PAD_TO 0x20000 +#define CONFIG_SPL_MAX_SIZE (128 * 1024) #define CONFIG_SYS_MMC_U_BOOT_SIZE (768 << 10) #define CONFIG_SYS_MMC_U_BOOT_DST (0x11000000) #define CONFIG_SYS_MMC_U_BOOT_START (0x11000000) -#define CONFIG_SYS_MMC_U_BOOT_OFFS (96 << 10) +#define CONFIG_SYS_MMC_U_BOOT_OFFS (128 << 10) #define CONFIG_SYS_MPC85XX_NO_RESETVEC #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds" #define CONFIG_SPL_MMC_BOOT @@ -60,12 +60,12 @@ #define CONFIG_FSL_LAW /* Use common FSL init code */ #define CONFIG_SYS_TEXT_BASE 0x11001000 #define CONFIG_SPL_TEXT_BASE 0xf8f81000 -#define CONFIG_SPL_PAD_TO 0x18000 -#define CONFIG_SPL_MAX_SIZE (96 * 1024) +#define CONFIG_SPL_PAD_TO 0x20000 +#define CONFIG_SPL_MAX_SIZE (128 * 1024) #define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10) #define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x11000000) #define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x11000000) -#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS (96 << 10) +#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS (128 << 10) #define CONFIG_SYS_MPC85XX_NO_RESETVEC #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds" #define CONFIG_SPL_SPI_BOOT diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 95e23ac..4cabf04 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -159,12 +159,12 @@ #define CONFIG_FSL_LAW /* Use common FSL init code */ #define CONFIG_SYS_TEXT_BASE 0x11001000 #define CONFIG_SPL_TEXT_BASE 0xf8f81000 -#define CONFIG_SPL_PAD_TO 0x18000 -#define CONFIG_SPL_MAX_SIZE (96 * 1024) +#define CONFIG_SPL_PAD_TO 0x20000 +#define CONFIG_SPL_MAX_SIZE (128 * 1024) #define CONFIG_SYS_MMC_U_BOOT_SIZE (768 << 10) #define CONFIG_SYS_MMC_U_BOOT_DST (0x11000000) #define CONFIG_SYS_MMC_U_BOOT_START (0x11000000) -#define CONFIG_SYS_MMC_U_BOOT_OFFS (96 << 10) +#define CONFIG_SYS_MMC_U_BOOT_OFFS (128 << 10) #define CONFIG_SYS_MPC85XX_NO_RESETVEC #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds" #define CONFIG_SPL_MMC_BOOT @@ -189,12 +189,12 @@ #define CONFIG_FSL_LAW /* Use common FSL init code */ #define CONFIG_SYS_TEXT_BASE 0x11001000 #define CONFIG_SPL_TEXT_BASE 0xf8f81000 -#define CONFIG_SPL_PAD_TO 0x18000 -#define CONFIG_SPL_MAX_SIZE (96 * 1024) +#define CONFIG_SPL_PAD_TO 0x20000 +#define CONFIG_SPL_MAX_SIZE (128 * 1024) #define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10) #define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x11000000) #define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x11000000) -#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS (96 << 10) +#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS (128 << 10) #define CONFIG_SYS_MPC85XX_NO_RESETVEC #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds" #define CONFIG_SPL_SPI_BOOT -- 1.8.4.1

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