September 2013 - U-Boot

[U-Boot] [PATCH v2 0/2] arm, da85x: updates for the ipam390 board
by Heiko Schocher 04 Nov '13

04 Nov '13

enable the RBL/UBL ECC layout through CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC define see for more info: http://processors.wiki.ti.com/index.php/DM365_Nand_ECC_layout and use this on the ipam390 board. Also do some minor changes for this board: - update default environment - change A2CR to correct value for UART boot mode - adapt cs3cfg timings for nand - change LED bootmode signalization - changes for v2: - patch: nand, davinci: add special UBL ecc position - add comment from Scott Wood: - move if/else/end to a more readable place Heiko Schocher (2): nand, davinci: add special UBL ecc position arm, da85x: update for the ipam390 board board/Barix/ipam390/ipam390-ais-uart.cfg | 2 +- board/Barix/ipam390/ipam390.c | 29 ++++++++------------------ drivers/mtd/nand/davinci_nand.c | 12 +++++++++++ include/configs/ipam390.h | 35 ++++++++++++++++++++------------ 4 Dateien geändert, 44 Zeilen hinzugefügt(+), 34 Zeilen entfernt(-) Signed-off-by: Heiko Schocher <hs(a)denx.de> Cc: Tom Rini <trini(a)ti.com> Cc: Scott Wood <scottwood(a)freescale.com> -- 1.7.11.7

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[U-Boot] [PATCH] ARM: OMAP4: Convert to ti_armv7_common.h
by Lokesh Vutla 04 Nov '13

04 Nov '13

Update omap4_common.h to use ti_armv7_common.h Testing: * Boot tested on OMAP4430 ES2.1 OMAP4460 ES1.1 SDP, OMAP4 PANDA/PANDA ES * Verified ./MAKEALL -s omap Signed-off-by: Lokesh Vutla <lokeshvutla(a)ti.com> --- include/configs/omap4_common.h | 188 ++++++--------------------------------- include/configs/omap4_panda.h | 2 - include/configs/omap4_sdp4430.h | 2 - 3 files changed, 27 insertions(+), 165 deletions(-) diff --git a/include/configs/omap4_common.h b/include/configs/omap4_common.h index e9f2383..ea56eeb 100644 --- a/include/configs/omap4_common.h +++ b/include/configs/omap4_common.h @@ -15,82 +15,61 @@ /* * High Level Configuration Options */ -#define CONFIG_ARMV7 1 /* This is an ARM V7 CPU core */ -#define CONFIG_OMAP 1 /* in a TI OMAP core */ #define CONFIG_OMAP44XX 1 /* which is a 44XX */ #define CONFIG_OMAP4430 1 /* which is in a 4430 */ -#define CONFIG_OMAP_GPIO -#define CONFIG_OMAP_COMMON +#define CONFIG_MISC_INIT_R +#define CONFIG_ARCH_CPU_INIT +#define CONFIG_DISPLAY_CPUINFO 1 +#define CONFIG_DISPLAY_BOARDINFO 1 + +#define CONFIG_SYS_THUMB_BUILD + +#ifndef CONFIG_SYS_L2CACHE_OFF +#define CONFIG_SYS_L2_PL310 1 +#define CONFIG_SYS_PL310_BASE 0x48242000 +#endif +#define CONFIG_SYS_CACHELINE_SIZE 32 /* Get CPU defs */ #include <asm/arch/cpu.h> #include <asm/arch/omap.h> -/* Display CPU and Board Info */ -#define CONFIG_DISPLAY_CPUINFO 1 -#define CONFIG_DISPLAY_BOARDINFO 1 - -#define CONFIG_MISC_INIT_R - -#define CONFIG_OF_LIBFDT 1 -#define CONFIG_CMD_BOOTZ -#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ -#define CONFIG_SETUP_MEMORY_TAGS 1 -#define CONFIG_INITRD_TAG 1 -#define CONFIG_REVISION_TAG 1 +/* Use General purpose timer 1 */ +#define CONFIG_SYS_TIMERBASE GPT2_BASE /* - * Size of malloc() pool * Total Size Environment - 128k - * Malloc - add 256k */ #define CONFIG_ENV_SIZE (128 << 10) -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (256 << 10)) -/* Vector Base */ -#define CONFIG_SYS_CA9_VECTOR_BASE SRAM_ROM_VECT_BASE /* - * Hardware drivers + * For the DDR timing information we can either dynamically determine + * the timings to use or use pre-determined timings (based on using the + * dynamic method. Default to the static timing infomation. */ +#define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS +#ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS +#define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION +#define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS +#endif + +#include <configs/ti_armv7_common.h> /* - * serial port - NS16550 compatible + * Hardware drivers */ -#define V_NS16550_CLK 48000000 - #define CONFIG_SYS_NS16550 #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE (-4) -#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK +#define CONFIG_SYS_NS16550_CLK 48000000 #define CONFIG_CONS_INDEX 3 #define CONFIG_SYS_NS16550_COM3 UART3_BASE -#define CONFIG_BAUDRATE 115200 -#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ - 115200} - -/* CPU */ -#define CONFIG_ARCH_CPU_INIT - -/* I2C */ -#define CONFIG_HARD_I2C 1 -#define CONFIG_SYS_I2C_SPEED 100000 -#define CONFIG_SYS_I2C_SLAVE 1 -#define CONFIG_DRIVER_OMAP34XX_I2C 1 -#define CONFIG_I2C_MULTI_BUS 1 - /* TWL6030 */ #ifndef CONFIG_SPL_BUILD #define CONFIG_TWL6030_POWER 1 #endif -/* MMC */ -#define CONFIG_GENERIC_MMC 1 -#define CONFIG_MMC 1 -#define CONFIG_OMAP_HSMMC 1 -#define CONFIG_DOS_PARTITION 1 - - /* USB */ #define CONFIG_MUSB_UDC 1 #define CONFIG_USB_OMAP3 1 @@ -100,36 +79,13 @@ #define CONFIG_USB_TTY 1 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 -/* Flash */ -#define CONFIG_SYS_NO_FLASH 1 - -/* commands to include */ -#include <config_cmd_default.h> - -/* Enabled commands */ -#define CONFIG_CMD_EXT2 /* EXT2 Support */ -#define CONFIG_CMD_FAT /* FAT support */ -#define CONFIG_CMD_I2C /* I2C serial bus support */ -#define CONFIG_CMD_MMC /* MMC support */ - -/* Disabled commands */ +/* Per-Soc commands */ #undef CONFIG_CMD_NET #undef CONFIG_CMD_NFS -#undef CONFIG_CMD_FPGA /* FPGA configuration Support */ -#undef CONFIG_CMD_IMLS /* List all found images */ /* * Environment setup */ - -#define CONFIG_BOOTDELAY 3 -#define CONFIG_ENV_VARS_UBOOT_CONFIG -#define CONFIG_CMD_FS_GENERIC -#define CONFIG_CMD_EXT2 -#define CONFIG_CMD_EXT4 - -#define CONFIG_ENV_OVERWRITE - #define CONFIG_EXTRA_ENV_SETTINGS \ "loadaddr=0x82000000\0" \ "console=ttyO2,115200n8\0" \ @@ -192,100 +148,10 @@ "fi; " \ "fi" -#define CONFIG_AUTO_COMPLETE 1 - -/* - * Miscellaneous configurable options - */ - -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ -#define CONFIG_SYS_CBSIZE 512 -/* Print Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_MAXARGS 16 -/* Boot Argument Buffer Size */ -#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) - -/* - * memtest setup - */ -#define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (32 << 20)) - -/* Default load address */ -#define CONFIG_SYS_LOAD_ADDR 0x80000000 - -/* Use General purpose timer 1 */ -#define CONFIG_SYS_TIMERBASE GPT2_BASE -#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ -#define CONFIG_SYS_HZ 1000 - -/* - * SDRAM Memory Map - * Even though we use two CS all the memory - * is mapped to one contiguous block - */ -#define CONFIG_NR_DRAM_BANKS 1 - -#define CONFIG_SYS_SDRAM_BASE 0x80000000 -#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \ - GENERATED_GBL_DATA_SIZE) - -#ifndef CONFIG_SYS_L2CACHE_OFF -#define CONFIG_SYS_L2_PL310 1 -#define CONFIG_SYS_PL310_BASE 0x48242000 -#endif -#define CONFIG_SYS_CACHELINE_SIZE 32 - -/* Defines for SDRAM init */ -#define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS - -#ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS -#define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION -#define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS -#endif - /* Defines for SPL */ -#define CONFIG_SPL -#define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_TEXT_BASE 0x40304350 #define CONFIG_SPL_MAX_SIZE (38 * 1024) -#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR #define CONFIG_SPL_DISPLAY_PRINT - -/* - * 64 bytes before this address should be set aside for u-boot.img's - * header. That is 80E7FFC0--0x80E80000 should not be used for any - * other needs. - */ -#define CONFIG_SYS_TEXT_BASE 0x80E80000 - -/* - * BSS and malloc area 64MB into memory to allow enough - * space for the kernel at the beginning of memory - */ -#define CONFIG_SPL_BSS_START_ADDR 0x84000000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x100000 /* 1 MB */ -#define CONFIG_SYS_SPL_MALLOC_START 0x84100000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */ - -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ -#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ -#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 -#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img" - -#define CONFIG_SPL_LIBCOMMON_SUPPORT -#define CONFIG_SPL_LIBDISK_SUPPORT -#define CONFIG_SPL_I2C_SUPPORT -#define CONFIG_SPL_MMC_SUPPORT -#define CONFIG_SPL_FAT_SUPPORT -#define CONFIG_SPL_LIBGENERIC_SUPPORT -#define CONFIG_SPL_SERIAL_SUPPORT -#define CONFIG_SPL_GPIO_SUPPORT #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" -#define CONFIG_SYS_THUMB_BUILD - #endif /* __CONFIG_OMAP4_COMMON_H */ diff --git a/include/configs/omap4_panda.h b/include/configs/omap4_panda.h index 18800f3..0157430 100644 --- a/include/configs/omap4_panda.h +++ b/include/configs/omap4_panda.h @@ -48,8 +48,6 @@ /* ENV related config options */ #define CONFIG_ENV_IS_NOWHERE -#define CONFIG_SYS_PROMPT "Panda # " - #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG #endif /* __CONFIG_PANDA_H */ diff --git a/include/configs/omap4_sdp4430.h b/include/configs/omap4_sdp4430.h index f40e0b7..ea40804 100644 --- a/include/configs/omap4_sdp4430.h +++ b/include/configs/omap4_sdp4430.h @@ -32,6 +32,4 @@ #define CONFIG_ENV_OFFSET 0xE0000 #define CONFIG_CMD_SAVEENV -#define CONFIG_SYS_PROMPT "OMAP4430 SDP # " - #endif /* __CONFIG_SDP4430_H */ -- 1.7.9.5

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[U-Boot] [PATCH 1/4] drivers/rtc/davinci.c: Reference DAVINCI_RTC_BASE more directly
by Tom Rini 04 Nov '13

04 Nov '13

We shouldn't rely on a define to hide this cast for us. Signed-off-by: Tom Rini <trini(a)ti.com> --- drivers/rtc/davinci.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/rtc/davinci.c b/drivers/rtc/davinci.c index e60c0da..018779e 100644 --- a/drivers/rtc/davinci.c +++ b/drivers/rtc/davinci.c @@ -13,7 +13,7 @@ #if defined(CONFIG_CMD_DATE) int rtc_get(struct rtc_time *tmp) { - struct davinci_rtc *rtc = davinci_rtc_base; + struct davinci_rtc *rtc = (struct davinci_rtc *)DAVINCI_RTC_BASE; unsigned long sec, min, hour, mday, wday, mon_cent, year; unsigned long status; @@ -57,7 +57,7 @@ int rtc_get(struct rtc_time *tmp) int rtc_set(struct rtc_time *tmp) { - struct davinci_rtc *rtc = davinci_rtc_base; + struct davinci_rtc *rtc = (struct davinci_rtc *)DAVINCI_RTC_BASE; debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, @@ -75,7 +75,7 @@ int rtc_set(struct rtc_time *tmp) void rtc_reset(void) { - struct davinci_rtc *rtc = davinci_rtc_base; + struct davinci_rtc *rtc = (struct davinci_rtc *)DAVINCI_RTC_BASE; /* run RTC counter */ writel(0x01, &rtc->ctrl); -- 1.7.9.5

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[U-Boot] [PATCH] wandboard: README: Include the quad version
by Fabio Estevam 04 Nov '13

04 Nov '13

From: Fabio Estevam <fabio.estevam(a)freescale.com> Wandboard quad was not ported into U-boot at the time of writing the README. Add it to the list of Wandboard variants. Signed-off-by: Fabio Estevam <fabio.estevam(a)freescale.com> --- board/wandboard/README | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/board/wandboard/README b/board/wandboard/README index 498db2f..1f678e1 100644 --- a/board/wandboard/README +++ b/board/wandboard/README @@ -3,8 +3,8 @@ U-Boot for Wandboard This file contains information for the port of U-Boot to the Wandboard. -Wandboard is a development board that has two variants: one version based -on mx6 dual lite and another one based on mx6 solo. +Wandboard is a development board that has three variants based on the following +SoCs: mx6 quad, mx6 dual lite and mx6 solo. For more details about Wandboard, please refer to: http://www.wandboard.org/ -- 1.8.1.2

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[U-Boot] [RFC][DFU] Unification of dfu_alt_info alt settings description + command execution
by Lukasz Majewski 04 Nov '13

04 Nov '13

Dear All, Since DFU usage at u-boot is spreading to different device types (MMC, NAND), file systems, raw partitions, ubi, etc, I think that it is a good moment to unify and structure the form of dfu_alt_info environment variable. Proposed new format for single dfu entity: NAME | Type | Device | Dev_num | Dev_part | FS | start | size | where: Name - name of the alt setting (as seen by dfu-util -l) Type - description of the image (raw, file, img, command [*]) Device - physical device on which data are stored (mmc, nand, "-") Dev_num - number of the device - it is possible to store data via DFU on several devices of the same type. Dev_part - number of partitions on the device. FS - information about file system on the device (fat, ext2/ext4, ubi). start - start offset from the beginning of the Device (byte or LBA number addressed) size - maximal number of blocks to be stored on the Device (expressed with Bytes of LBA number) (protection from overwriting the whole device) Example: NAME | Type | Device | Dev_num | Dev_part | FS | start | size | ---------------------------------------------------------------------- u-boot | raw | mmc | 0 | "-" [**] | "-" | 0x80 | 0x100 | uImage | file | mmc | 0 | 2 | ext4 | "-" | "-" | root.img | img | mmc | 0 | 5 | "-" | "-" | "-" | root.img | raw | mmc | 0 | "-" | "-" | 0x1000| 0x4000| u-boot | raw | nand | 0 | "-" | "-" | 0x100 | 0x100 | uImage | file | nand | 0 | 3 | ubi | "-" | "-" | command | cmd | "-" | "-" | "-" | "-" | "-" | "-" | [*] - support for sending command via DFU (see below) [**] - "-" - indicates that no value is provided for this field. Despite of that it is mandatory to facilitate parsing. Please share any possible use cases - for now and for the future. My goal is to devise dfu_alt_info structure which would work for us for a long time. After setting up new format, it would be possible to replace different dfu command variations (i.e. dfu mmc 0, dfu nand) with only one command "dfu". ------------------------------------------------------------------------ DFU extension - Command execution. ------------------------------------------------------------------------ As a follow up I plan to add support for sending file filled with command[s]. This would provide interface for automated tests and force board to reset itself after emulated reset command from dfu-util program. dfu_alt_info = "command cmd - - - - - -;" and then on host: dfu-util -aN -D file_with_commands The end step would be to extend dfu-util to support -C switch, which would allow to send u-boot command quoted as text: dfu-util -aN -C "reset" -- Best regards, Lukasz Majewski Samsung R&D Institute Poland (SRPOL) | Linux Platform Group

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[U-Boot] [PATCH] mx5: lowlevel_init: Remove unused macro
by Fabio Estevam 31 Oct '13

31 Oct '13

From: Fabio Estevam <fabio.estevam(a)freescale.com> setup_wdog macro is not used anywhere, so just remove it. Signed-off-by: Fabio Estevam <fabio.estevam(a)freescale.com> --- arch/arm/cpu/armv7/mx5/lowlevel_init.S | 6 ------ 1 file changed, 6 deletions(-) diff --git a/arch/arm/cpu/armv7/mx5/lowlevel_init.S b/arch/arm/cpu/armv7/mx5/lowlevel_init.S index e4cd85c..bffac67 100644 --- a/arch/arm/cpu/armv7/mx5/lowlevel_init.S +++ b/arch/arm/cpu/armv7/mx5/lowlevel_init.S @@ -375,12 +375,6 @@ setup_pll_func: #endif /* CONFIG_MX53 */ .endm -.macro setup_wdog - ldr r0, =WDOG1_BASE_ADDR - mov r1, #0x30 - strh r1, [r0] -.endm - ENTRY(lowlevel_init) mov r10, lr mov r4, #0 /* Fix R4 to 0 */ -- 1.8.1.2

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[U-Boot] [PATCH] ARM: mx5: Enable L2 cache
by Fabio Estevam 31 Oct '13

31 Oct '13

Enable L2 cache for improving the system performance. Signed-off-by: Fabio Estevam <fabio.estevam(a)freescale.com> --- arch/arm/cpu/armv7/mx5/lowlevel_init.S | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/cpu/armv7/mx5/lowlevel_init.S b/arch/arm/cpu/armv7/mx5/lowlevel_init.S index fc7c767..e4cd85c 100644 --- a/arch/arm/cpu/armv7/mx5/lowlevel_init.S +++ b/arch/arm/cpu/armv7/mx5/lowlevel_init.S @@ -45,6 +45,12 @@ #endif mcr 15, 1, r0, c9, c0, 2 + + /* enable L2 cache */ + mrc 15, 0, r0, c1, c0, 1 + orr r0, r0, #2 + mcr 15, 0, r0, c1, c0, 1 + .endm /* init_l2cc */ /* AIPS setup - Only setup MPROTx registers. -- 1.8.1.2

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[U-Boot] [PATCH] imx_watchdog: do not soft-reset while watchdog init
by Anatolij Gustschin 31 Oct '13

31 Oct '13

Currently the driver clears WCR_SRS bit when enabling the watchdog and this causes a software reset. Do not clear WCR_SRS. Signed-off-by: Anatolij Gustschin <agust(a)denx.de> --- drivers/watchdog/imx_watchdog.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/watchdog/imx_watchdog.c b/drivers/watchdog/imx_watchdog.c index 50e602a..d5993b4 100644 --- a/drivers/watchdog/imx_watchdog.c +++ b/drivers/watchdog/imx_watchdog.c @@ -19,6 +19,7 @@ struct watchdog_regs { #define WCR_WDBG 0x02 #define WCR_WDE 0x04 /* WDOG enable */ #define WCR_WDT 0x08 +#define WCR_SRS 0x10 #define WCR_WDW 0x80 #define SET_WCR_WT(x) (x << 8) @@ -45,7 +46,7 @@ void hw_watchdog_init(void) #define CONFIG_WATCHDOG_TIMEOUT_MSECS 128000 #endif timeout = (CONFIG_WATCHDOG_TIMEOUT_MSECS / 500) - 1; - writew(WCR_WDZST | WCR_WDBG | WCR_WDE | WCR_WDT | + writew(WCR_WDZST | WCR_WDBG | WCR_WDE | WCR_WDT | WCR_SRS | WCR_WDW | SET_WCR_WT(timeout), &wdog->wcr); hw_watchdog_reset(); } -- 1.7.9.5

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[U-Boot] Patch about mmc and sdhci, Please look it, i can not pull the patch. I copy it here.
by richie_wang 30 Oct '13

30 Oct '13

>From 133570dbb7f772f78558cfac9d8c558513d033a1 Mon Sep 17 00:00:00 2001 From: richie_wang <macro_system(a)163.com> Date: Wed, 25 Sep 2013 08:20:25 +0800 Subject: [PATCH 3/3] This commit solve mmc_write_blocks with async cmd12 hidden bug When the processor use mmc_write_blocks to write multi-block data to SD Memory card it will send CMD12 to finish the transfer. But if the code using PIO method and processor speed is high than the SD host sending the data in SD host buffer.There will be a condition CMD12 will on cmd line and some data still on data line, which will conflict will multi-write Time requirement in SPEC. This commit makes CPU send CMD12 after register 0x24 bit8 change to zero. Signed-off-by: richie_wang <macro_system(a)163.com> --- :100644 100644 aa2fdef... f2f982c... M drivers/mmc/mmc_write.c :100644 100644 dfb2eee... d66cc9a... M drivers/mmc/sdhci.c :100644 100644 74d06ae... a0c9e32... M include/sdhci.h drivers/mmc/mmc_write.c | 8 ++++++++ drivers/mmc/sdhci.c | 11 +++++++++++ include/sdhci.h | 4 ++++ 3 files changed, 23 insertions(+) diff --git a/drivers/mmc/mmc_write.c b/drivers/mmc/mmc_write.c index aa2fdef..f2f982c 100644 --- a/drivers/mmc/mmc_write.c +++ b/drivers/mmc/mmc_write.c @@ -10,6 +10,7 @@ #include <config.h> #include <common.h> #include <part.h> +#include <sdhci.h> #include "mmc_private.h" static ulong mmc_erase_t(struct mmc *mmc, ulong start, lbaint_t blkcnt) @@ -103,6 +104,7 @@ static ulong mmc_write_blocks(struct mmc *mmc, lbaint_t start, { struct mmc_cmd cmd; struct mmc_data data; + struct sdhci_host* host; int timeout = 1000; if ((start + blkcnt) > mmc->block_dev.lba) { @@ -142,6 +144,12 @@ static ulong mmc_write_blocks(struct mmc *mmc, lbaint_t start, cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION; cmd.cmdarg = 0; cmd.resp_type = MMC_RSP_R1b; + + /* cmd12 async timing problem */ + host = (struct sdhci_host*)mmc->priv; + if(host->magic_num == SDHCI_MAGIC_NUM) + sdhci_cmd12_wait(host); + if (mmc_send_cmd(mmc, &cmd, NULL)) { printf("mmc fail to send stop cmd\n"); return 0; diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c index dfb2eee..d66cc9a 100644 --- a/drivers/mmc/sdhci.c +++ b/drivers/mmc/sdhci.c @@ -410,6 +410,7 @@ int add_sdhci(struct sdhci_host *host, u32 max_clk, u32 min_clk) struct mmc *mmc; unsigned int caps; + host->magic_num = SDHCI_MAGIC_NUM; mmc = malloc(sizeof(struct mmc)); if (!mmc) { printf("mmc malloc fail!\n"); @@ -482,3 +483,13 @@ int add_sdhci(struct sdhci_host *host, u32 max_clk, u32 min_clk) return 0; } + + +void sdhci_cmd12_wait(struct sdhci_host *host) +{ + u32 mask = SDHCI_DOING_WRITE; + + while(sdhci_readl(host, SDHCI_PRESENT_STATE) & mask); + + return ; +} diff --git a/include/sdhci.h b/include/sdhci.h index 74d06ae..a0c9e32 100644 --- a/include/sdhci.h +++ b/include/sdhci.h @@ -233,7 +233,10 @@ struct sdhci_ops { #endif }; +#define SDHCI_MAGIC_NUM 0x20131001 + struct sdhci_host { + unsigned int magic_num; char *name; void *ioaddr; unsigned int quirks; @@ -332,4 +335,5 @@ static inline u8 sdhci_readb(struct sdhci_host *host, int reg) #endif int add_sdhci(struct sdhci_host *host, u32 max_clk, u32 min_clk); +void sdhci_cmd12_wait(struct sdhci_host *host); #endif /* __SDHCI_HW_H */ -- 1.7.9.5 -- View this message in context: http://u-boot.10912.n7.nabble.com/Patch-about-mmc-and-sdhci-Please-look-it-… Sent from the U-Boot mailing list archive at Nabble.com.

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[U-Boot] [PATCH v2 1/3] serial: sh: Add support R8A7790
by Nobuhiro Iwamatsu 30 Oct '13

30 Oct '13

This adds the preset value to register, and setup of baudrate. Signed-off-by: Kouei Abe <kouei.abe.cp(a)renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj(a)renesas.com> --- v2: no changes drivers/serial/serial_sh.c | 1 + drivers/serial/serial_sh.h | 13 +++++++++++++ 2 files changed, 14 insertions(+) diff --git a/drivers/serial/serial_sh.c b/drivers/serial/serial_sh.c index 67cc0dc..0826d59 100644 --- a/drivers/serial/serial_sh.c +++ b/drivers/serial/serial_sh.c @@ -1,5 +1,6 @@ /* * SuperH SCIF device driver. + * Copyright (C) 2013 Renesas Electronics Corporation * Copyright (C) 2007,2008,2010 Nobuhiro Iwamatsu * Copyright (C) 2002 - 2008 Paul Mundt * diff --git a/drivers/serial/serial_sh.h b/drivers/serial/serial_sh.h index 7e38a3f..a6558af 100644 --- a/drivers/serial/serial_sh.h +++ b/drivers/serial/serial_sh.h @@ -224,6 +224,9 @@ struct uart_port { # define SCSPTR3 0xffc60020 /* 16 bit SCIF */ # define SCIF_ORER 0x0001 /* Overrun error bit */ # define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ +#elif defined(CONFIG_R8A7790) +# define SCIF_ORER 0x0001 +# define SCSCR_INIT(port) 0x32 /* TIE=0,RIE=0,TE=1,RE=1,REIE=0, */ #else # error CPU subtype not defined #endif @@ -298,6 +301,9 @@ struct uart_port { /* SH7763 SCIF2 support */ # define SCIF2_RFDC_MASK 0x001f # define SCIF2_TXROOM_MAX 16 +#elif defined(CONFIG_R8A7790) +# define SCIF_ERRORS (SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK) +# define SCIF_RFDC_MASK 0x003f #else # define SCIF_ERRORS (SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK) # define SCIF_RFDC_MASK 0x001f @@ -579,6 +585,10 @@ SCIF_FNS(SCSPTR, 0, 0, 0, 0) #else SCIF_FNS(SCSPTR, 0, 0, 0x20, 16) #endif +#if defined(CONFIG_R8A7790) +SCIF_FNS(DL, 0, 0, 0x30, 16) +SCIF_FNS(CKS, 0, 0, 0x34, 16) +#endif SCIF_FNS(SCLSR, 0, 0, 0x24, 16) #endif #endif @@ -720,6 +730,9 @@ static inline int scbrr_calc(struct uart_port port, int bps, int clk) #define SCBRR_VALUE(bps, clk) scbrr_calc(sh_sci, bps, clk) #elif defined(__H8300H__) || defined(__H8300S__) #define SCBRR_VALUE(bps, clk) (((clk*1000/32)/bps)-1) +#elif defined(CONFIG_R8A7790) +#define SCBRR DL +#define SCBRR_VALUE(bps, clk) (clk / bps / 16) #else /* Generic SH */ #define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(32*bps)-1) #endif -- 1.8.4.rc3

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