July 2013 - U-Boot

[U-Boot] [PATCH 2/2][v2] board/bsc9132qds: Configure DSP DDR controller
by Priyanka Jain 02 Jul '13

02 Jul '13

BSC9132 SoC has two separate DDR controllers for PowerPC side and DSP side DDR. They are mapped to PowerPC and DSP CCSR space respectively. BSC9132QDS has two on-board MC34716EP DDR3 memory one connected to PowerPC and other to DSP side controller. Configure DSP DDR controller similar to PowerPC side DDR controller as memories are exactly similar. Signed-off-by: Manish Jaggi <manish.jaggi(a)freescale.com> Signed-off-by: Priyanka Jain <Priyanka.Jain(a)freescale.com> --- Changes for v2: Added Manish's email-id arch/powerpc/include/asm/immap_85xx.h | 6 ++++++ board/freescale/bsc9132qds/bsc9132qds.c | 22 ++++++++++++++++++++++ 2 files changed, 28 insertions(+), 0 deletions(-) diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index db70d04..ae9a016 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -3047,6 +3047,12 @@ struct ccsr_pman { #define CONFIG_SYS_MPC85xx_GUTS_OFFSET 0xE0000 #define CONFIG_SYS_FSL_SRIO_OFFSET 0xC0000 +#if defined(CONFIG_BSC9132) +#define CONFIG_SYS_FSL_DSP_CCSR_DDR_OFFSET 0x10000 +#define CONFIG_SYS_FSL_DSP_CCSR_DDR_ADDR \ + (CONFIG_SYS_FSL_DSP_CCSRBAR + CONFIG_SYS_FSL_DSP_CCSR_DDR_OFFSET) +#endif + #define CONFIG_SYS_FSL_CPC_ADDR \ (CONFIG_SYS_CCSRBAR + CONFIG_SYS_FSL_CPC_OFFSET) #define CONFIG_SYS_FSL_QMAN_ADDR \ diff --git a/board/freescale/bsc9132qds/bsc9132qds.c b/board/freescale/bsc9132qds/bsc9132qds.c index ddc9d0a..b084c1b 100644 --- a/board/freescale/bsc9132qds/bsc9132qds.c +++ b/board/freescale/bsc9132qds/bsc9132qds.c @@ -141,6 +141,27 @@ void board_config_serdes_mux(void) } } +/* Configure DSP DDR controller */ +void dsp_ddr_configure(void) +{ + /* + *There are separate DDR-controllers for DSP and PowerPC side DDR. + *copy the ddr controller settings from PowerPC side DDR controller + *to the DSP DDR controller as connected DDR memories are similar. + */ + ccsr_ddr_t __iomem *pa_ddr = + (ccsr_ddr_t __iomem *)CONFIG_SYS_MPC8xxx_DDR_ADDR; + ccsr_ddr_t temp_ddr; + ccsr_ddr_t __iomem *dsp_ddr = + (ccsr_ddr_t __iomem *)CONFIG_SYS_FSL_DSP_CCSR_DDR_ADDR; + + memcpy(&temp_ddr, pa_ddr, sizeof(ccsr_ddr_t)); + temp_ddr.cs0_bnds = CONFIG_SYS_DDR1_CS0_BNDS; + temp_ddr.sdram_cfg &= ~SDRAM_CFG_MEM_EN; + memcpy(dsp_ddr, &temp_ddr, sizeof(ccsr_ddr_t)); + dsp_ddr->sdram_cfg |= SDRAM_CFG_MEM_EN; +} + int board_early_init_r(void) { #ifndef CONFIG_SYS_NO_FLASH @@ -169,6 +190,7 @@ int board_early_init_r(void) 0, flash_esel+1, BOOKE_PAGESZ_64M, 1); #endif board_config_serdes_mux(); + dsp_ddr_configure(); return 0; } -- 1.7.4.1

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[U-Boot] [PATCH 1/2][v2] board/bsc9132qds: Add DSP side tlb and laws
by Priyanka Jain 02 Jul '13

02 Jul '13

BSC9132QDS is a Freescale Reference Design Board for BSC9132 SoC which is a integrated device that contains two powerpc e500v2 cores and two DSP starcores. To support DSP starcore -Creating LAW and TLB for DSP-CCSR space. -Creating LAW for DSP-core subsystem M2 and M3 memory -Creating LAW for 1GB DDR which is connected exclusively to DSP-cores Signed-off-by: Manish Jaggi <manish.jaggi(a)freescale.com> Signed-off-by: Priyanka Jain <Priyanka.Jain(a)freescale.com> --- Changes for v2: Added Manish's email-id README | 8 ++++++++ arch/powerpc/include/asm/config_mpc85xx.h | 4 ++++ arch/powerpc/include/asm/fsl_law.h | 6 +++++- board/freescale/bsc9132qds/law.c | 8 ++++++++ board/freescale/bsc9132qds/tlb.c | 5 +++++ include/configs/BSC9132QDS.h | 4 ++++ 6 files changed, 34 insertions(+), 1 deletions(-) diff --git a/README b/README index e8359f8..99a2c02 100644 --- a/README +++ b/README @@ -422,10 +422,18 @@ The following options need to be configured: This is the value to write into CCSR offset 0x18600 according to the A004510 workaround. + CONFIG_SYS_FSL_DSP_DDR_ADDR + This value denotes start offset of DDR memory which is + connected exclusively to the DSP cores. + CONFIG_SYS_FSL_DSP_M2_RAM_ADDR This value denotes start offset of M2 memory which is directly connected to the DSP core. + CONFIG_SYS_FSL_DSP_M3_RAM_ADDR + This value denotes start offset of M3 memory which is directly + connected to the DSP core. + CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT This value denotes start offset of DSP CCSR space. diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index 1d46b14..16ef7df 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -506,6 +506,10 @@ #define CONFIG_TSECV2 #define CONFIG_SYS_FSL_SEC_COMPAT 4 #define CONFIG_NUM_DDR_CONTROLLERS 2 +#define CONFIG_SYS_FSL_DSP_DDR_ADDR 0x40000000 +#define CONFIG_SYS_FSL_DSP_M2_RAM_ADDR 0xb0000000 +#define CONFIG_SYS_FSL_DSP_M3_RAM_ADDR 0xc0000000 +#define CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT 0xff600000 #define CONFIG_SYS_FSL_IFC_BANK_COUNT 3 #define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 #define CONFIG_NAND_FSL_IFC diff --git a/arch/powerpc/include/asm/fsl_law.h b/arch/powerpc/include/asm/fsl_law.h index bea1636..fa51e59 100644 --- a/arch/powerpc/include/asm/fsl_law.h +++ b/arch/powerpc/include/asm/fsl_law.h @@ -82,7 +82,7 @@ enum law_trgt_if { #ifndef CONFIG_MPC8641 LAW_TRGT_IF_PCIE_1 = 0x02, #endif -#if defined(CONFIG_BSC9131) +#if defined(CONFIG_BSC9131) || defined(CONFIG_BSC9132) LAW_TRGT_IF_OCN_DSP = 0x03, #else #if !defined(CONFIG_MPC8572) && !defined(CONFIG_P2020) @@ -94,7 +94,11 @@ enum law_trgt_if { LAW_TRGT_IF_DSP_CCSR = 0x09, LAW_TRGT_IF_DDR_INTRLV = 0x0b, LAW_TRGT_IF_RIO = 0x0c, +#if defined(CONFIG_BSC9132) + LAW_TRGT_IF_CLASS_DSP = 0x0d, +#else LAW_TRGT_IF_RIO_2 = 0x0d, +#endif LAW_TRGT_IF_DPAA_SWP_SRAM = 0x0e, LAW_TRGT_IF_DDR = 0x0f, LAW_TRGT_IF_DDR_2 = 0x16, /* 2nd controller */ diff --git a/board/freescale/bsc9132qds/law.c b/board/freescale/bsc9132qds/law.c index b4bce99..99ea56b 100644 --- a/board/freescale/bsc9132qds/law.c +++ b/board/freescale/bsc9132qds/law.c @@ -32,6 +32,14 @@ struct law_entry law_table[] = { #ifdef CONFIG_SYS_FPGA_BASE_PHYS SET_LAW(CONFIG_SYS_FPGA_BASE_PHYS, LAW_SIZE_128K, LAW_TRGT_IF_IFC), #endif + SET_LAW(CONFIG_SYS_FSL_DSP_CCSRBAR_PHYS, LAW_SIZE_1M, + LAW_TRGT_IF_DSP_CCSR), + SET_LAW(CONFIG_SYS_FSL_DSP_M2_RAM_ADDR, LAW_SIZE_32M, + LAW_TRGT_IF_OCN_DSP), + SET_LAW(CONFIG_SYS_FSL_DSP_M3_RAM_ADDR, LAW_SIZE_32K, + LAW_TRGT_IF_CLASS_DSP), + SET_LAW(CONFIG_SYS_FSL_DSP_DDR_ADDR, LAW_SIZE_1G, + LAW_TRGT_IF_CLASS_DSP) }; int num_law_entries = ARRAY_SIZE(law_table); diff --git a/board/freescale/bsc9132qds/tlb.c b/board/freescale/bsc9132qds/tlb.c index 0ec9a85..734f3f8 100644 --- a/board/freescale/bsc9132qds/tlb.c +++ b/board/freescale/bsc9132qds/tlb.c @@ -57,6 +57,11 @@ struct fsl_e_tlb_entry tlb_table[] = { MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 1, BOOKE_PAGESZ_1M, 1), + /* CCSRBAR (DSP) */ + SET_TLB_ENTRY(1, CONFIG_SYS_FSL_DSP_CCSRBAR, + CONFIG_SYS_FSL_DSP_CCSRBAR_PHYS, MAS3_SW|MAS3_SR, + MAS2_I|MAS2_G, 0, 2, BOOKE_PAGESZ_1M, 1), + #ifndef CONFIG_SPL_BUILD SET_TLB_ENTRY(1, CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE_PHYS, MAS3_SX|MAS3_SR, MAS2_W|MAS2_G, diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h index 3aa4443..91105eb 100644 --- a/include/configs/BSC9132QDS.h +++ b/include/configs/BSC9132QDS.h @@ -240,6 +240,10 @@ combinations. this should be removed later #define CONFIG_SYS_IMMR CONFIG_SYS_CCSRBAR +/* DSP CCSRBAR */ +#define CONFIG_SYS_FSL_DSP_CCSRBAR CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT +#define CONFIG_SYS_FSL_DSP_CCSRBAR_PHYS CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT + /* * IFC Definitions */ -- 1.7.4.1

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[U-Boot] [PATCH v2] net: Use ARRAY_SIZE at appropriate places
by Axel Lin 02 Jul '13

02 Jul '13

Use ARRAY_SIZE instead of having similar implementation in each drivers. Signed-off-by: Axel Lin <axel.lin(a)ingics.com> Cc: Albert Aribaud <albert.u.boot(a)aribaud.net> Cc: Ben Warren <biggerbadderben(a)gmail.com> Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj(a)jcrosoft.com> Cc: Joe Hershberger <joe.hershberger(a)ni.com> Cc: Marek Vasut <marex(a)denx.de> Cc: Mike Frysinger <vapier(a)gentoo.org> Cc: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> Cc: TsiChungLiew <Tsi-Chung.Liew(a)freescale.com> Cc: Wolfgang Denk <wd(a)denx.de> Cc: York Sun <yorksun(a)freescale.com> Signed-off-by: Axel Lin <axel.lin(a)ingics.com> --- Hi Jagan Teki, This is v2 per your request. v2: Fix checkpatch issues, now checkpatch only shows below warnings: a few WARNING: Avoid CamelCase and a WARNING: line over 80 characters #134: FILE: drivers/net/npe/IxEthDBFeatures.c:150: + if (ixEthDBTrafficClassDefinitions[trafficClassDefinitionIndex][IX_ETH_DB_NPE_A_FUNCTIONALITY_ID_INDEX] == npeAImageId.functionalityId) { Obviously, I prefer v1 for below reasons: 1. The diff in v2 becomes bigger and makes it harder for review. 2. The whole file in drivers/net/npe/IxEthDBFeatures.c uses 4 spaces as indent, only the lines touched by this patch uses tab as indent (to make checkpatch happy). This makes the code looks odd after apply v2, I don't think this is an improvement. Well, it's up to maintainer to pick up the version he prefer. Regards, Axel drivers/net/ax88180.c | 2 +- drivers/net/fsl_mcdmafec.c | 2 +- drivers/net/lan91c96.c | 2 +- drivers/net/mcffec.c | 2 +- drivers/net/mcfmii.c | 2 +- drivers/net/ne2000.c | 2 +- drivers/net/npe/IxEthDBFeatures.c | 28 ++++++++++++++-------------- drivers/net/npe/IxOsalIoMem.c | 3 +-- drivers/net/npe/include/IxEthDBPortDefs.h | 2 +- drivers/net/npe/include/IxOsalTypes.h | 2 +- 10 files changed, 23 insertions(+), 24 deletions(-) diff --git a/drivers/net/ax88180.c b/drivers/net/ax88180.c index f501768..7f0cfe5 100644 --- a/drivers/net/ax88180.c +++ b/drivers/net/ax88180.c @@ -157,7 +157,7 @@ static void ax88180_mac_reset (struct eth_device *dev) OUTW (dev, MISC_RESET_MAC, MISC); tmpval = INW (dev, MISC); - for (i = 0; i < (sizeof (program_seq) / sizeof (program_seq[0])); i++) + for (i = 0; i < ARRAY_SIZE(program_seq); i++) OUTW (dev, program_seq[i].value, program_seq[i].offset); } diff --git a/drivers/net/fsl_mcdmafec.c b/drivers/net/fsl_mcdmafec.c index 63842cd..0e18764 100644 --- a/drivers/net/fsl_mcdmafec.c +++ b/drivers/net/fsl_mcdmafec.c @@ -520,7 +520,7 @@ int mcdmafec_initialize(bd_t * bis) u32 tmp = CONFIG_SYS_INTSRAM + 0x2000; #endif - for (i = 0; i < sizeof(fec_info) / sizeof(fec_info[0]); i++) { + for (i = 0; i < ARRAY_SIZE(fec_info); i++) { dev = (struct eth_device *)memalign(CONFIG_SYS_CACHELINE_SIZE, diff --git a/drivers/net/lan91c96.c b/drivers/net/lan91c96.c index 11d350e..47c15c4 100644 --- a/drivers/net/lan91c96.c +++ b/drivers/net/lan91c96.c @@ -779,7 +779,7 @@ static int lan91c96_detect_chip(struct eth_device *dev) SMC_SELECT_BANK(dev, 3); chip_id = (SMC_inw(dev, 0xA) & LAN91C96_REV_CHIPID) >> 4; SMC_SELECT_BANK(dev, 0); - for (r = 0; r < sizeof(supported_chips) / sizeof(struct id_type); r++) + for (r = 0; r < ARRAY_SIZE(supported_chips); r++) if (chip_id == supported_chips[r].id) return r; return 0; diff --git a/drivers/net/mcffec.c b/drivers/net/mcffec.c index ed7459c..7ae6320 100644 --- a/drivers/net/mcffec.c +++ b/drivers/net/mcffec.c @@ -559,7 +559,7 @@ int mcffec_initialize(bd_t * bis) u32 tmp = CONFIG_SYS_INIT_RAM_ADDR + 0x1000; #endif - for (i = 0; i < sizeof(fec_info) / sizeof(fec_info[0]); i++) { + for (i = 0; i < ARRAY_SIZE(fec_info); i++) { dev = (struct eth_device *)memalign(CONFIG_SYS_CACHELINE_SIZE, diff --git a/drivers/net/mcfmii.c b/drivers/net/mcfmii.c index 5e64dbd..63bc8f8 100644 --- a/drivers/net/mcfmii.c +++ b/drivers/net/mcfmii.c @@ -186,7 +186,7 @@ int mii_discover_phy(struct eth_device *dev) printf("PHY @ 0x%x pass %d\n", phyno, pass); #endif - for (i = 0; (i < (sizeof(phyinfo) / sizeof(phy_info_t))) + for (i = 0; (i < ARRAY_SIZE(phyinfo)) && (phyinfo[i].phyid != 0); i++) { if (phyinfo[i].phyid == phytype) { #ifdef ET_DEBUG diff --git a/drivers/net/ne2000.c b/drivers/net/ne2000.c index 3939158..e6cd3e9 100644 --- a/drivers/net/ne2000.c +++ b/drivers/net/ne2000.c @@ -228,7 +228,7 @@ int get_prom(u8* mac_addr, u8* base_addr) mdelay (10); - for (i = 0; i < sizeof (program_seq) / sizeof (program_seq[0]); i++) + for (i = 0; i < ARRAY_SIZE(program_seq); i++) n2k_outb (program_seq[i].value, program_seq[i].offset); PRINTK ("PROM:"); diff --git a/drivers/net/npe/IxEthDBFeatures.c b/drivers/net/npe/IxEthDBFeatures.c index c5b680a..d43efaa 100644 --- a/drivers/net/npe/IxEthDBFeatures.c +++ b/drivers/net/npe/IxEthDBFeatures.c @@ -143,22 +143,22 @@ void ixEthDBFeatureCapabilityScan(void) IX_ENSURE(sizeof (ixEthDBTrafficClassDefinitions) != 0, "DB: no traffic class definitions found, check IxEthDBQoS.h"); /* find the traffic class definition index compatible with the current NPE A functionality ID */ - for (trafficClassDefinitionIndex = 0 ; - trafficClassDefinitionIndex < sizeof (ixEthDBTrafficClassDefinitions) / sizeof (ixEthDBTrafficClassDefinitions[0]); - trafficClassDefinitionIndex++) - { - if (ixEthDBTrafficClassDefinitions[trafficClassDefinitionIndex][IX_ETH_DB_NPE_A_FUNCTIONALITY_ID_INDEX] == npeAImageId.functionalityId) - { - /* found it */ - break; - } - } + for (trafficClassDefinitionIndex = 0; + trafficClassDefinitionIndex < + ARRAY_SIZE(ixEthDBTrafficClassDefinitions); + trafficClassDefinitionIndex++) { + if (ixEthDBTrafficClassDefinitions[trafficClassDefinitionIndex][IX_ETH_DB_NPE_A_FUNCTIONALITY_ID_INDEX] == npeAImageId.functionalityId) { + /* found it */ + break; + } + } /* select the default case if we went over the array boundary */ - if (trafficClassDefinitionIndex == sizeof (ixEthDBTrafficClassDefinitions) / sizeof (ixEthDBTrafficClassDefinitions[0])) - { - trafficClassDefinitionIndex = 0; /* the first record is the default case */ - } + if (trafficClassDefinitionIndex == + ARRAY_SIZE(ixEthDBTrafficClassDefinitions)) { + /* the first record is the default case */ + trafficClassDefinitionIndex = 0; + } /* select queue assignment structure based on the traffic class configuration index */ queueStructureIndex = ixEthDBTrafficClassDefinitions[trafficClassDefinitionIndex][IX_ETH_DB_QUEUE_ASSIGNMENT_INDEX]; diff --git a/drivers/net/npe/IxOsalIoMem.c b/drivers/net/npe/IxOsalIoMem.c index 34df92b..15a16b8 100644 --- a/drivers/net/npe/IxOsalIoMem.c +++ b/drivers/net/npe/IxOsalIoMem.c @@ -66,8 +66,7 @@ ixOsalMemMapFind (UINT32 requestedAddress, { UINT32 mapIndex; - UINT32 numMapElements = - sizeof (ixOsalGlobalMemoryMap) / sizeof (IxOsalMemoryMap); + UINT32 numMapElements = ARRAY_SIZE(ixOsalGlobalMemoryMap); for (mapIndex = 0; mapIndex < numMapElements; mapIndex++) { diff --git a/drivers/net/npe/include/IxEthDBPortDefs.h b/drivers/net/npe/include/IxEthDBPortDefs.h index c3acbdd..eac48cb 100644 --- a/drivers/net/npe/include/IxEthDBPortDefs.h +++ b/drivers/net/npe/include/IxEthDBPortDefs.h @@ -106,7 +106,7 @@ static const IxEthDBPortDefinition ixEthDBPortDefinitions[] = * @def IX_ETH_DB_NUMBER_OF_PORTS * @brief number of supported ports */ -#define IX_ETH_DB_NUMBER_OF_PORTS (sizeof (ixEthDBPortDefinitions) / sizeof (ixEthDBPortDefinitions[0])) +#define IX_ETH_DB_NUMBER_OF_PORTS ARRAY_SIZE(ixEthDBPortDefinitions) /** * @def IX_ETH_DB_UNKNOWN_PORT diff --git a/drivers/net/npe/include/IxOsalTypes.h b/drivers/net/npe/include/IxOsalTypes.h index 06e71de..615c655 100644 --- a/drivers/net/npe/include/IxOsalTypes.h +++ b/drivers/net/npe/include/IxOsalTypes.h @@ -93,7 +93,7 @@ typedef volatile INT32 VINT32; #ifndef NUMELEMS -#define NUMELEMS(x) (sizeof(x) / sizeof((x)[0])) +#define NUMELEMS(x) ARRAY_SIZE(x) #endif -- 1.8.1.2

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[U-Boot] [PATCH v2] exynos5250: move board specific configs to board specific config file
by Inderpal Singh 02 Jul '13

02 Jul '13

Not all boards based on exynos5250 have SPI flash, same serial port and might not require display and the same lds script. Hence move them to board specific config file. Signed-off-by: Inderpal Singh <inderpal.singh(a)linaro.org> --- v1 was posted as the second patch of [1] Changes in v2: - split from the patchset at [1] - moved CONFIG_LCD and CONFIG_SPI_FLASH - rebased to latest u-boot-samsung master branch [1] http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/157101 include/configs/exynos5250-dt.h | 11 +---------- include/configs/smdk5250.h | 16 ++++++++++++++-- include/configs/snow.h | 16 ++++++++++++++-- 3 files changed, 29 insertions(+), 14 deletions(-) diff --git a/include/configs/exynos5250-dt.h b/include/configs/exynos5250-dt.h index 03b07b2..22e47eb 100644 --- a/include/configs/exynos5250-dt.h +++ b/include/configs/exynos5250-dt.h @@ -29,7 +29,6 @@ #define CONFIG_SAMSUNG /* in a SAMSUNG core */ #define CONFIG_S5P /* S5P Family */ #define CONFIG_EXYNOS5 /* which is in a Exynos5 Family */ -#define CONFIG_SMDK5250 /* which is in a SMDK5250 */ #include <asm/arch/cpu.h> /* get chip and board defs */ @@ -78,7 +77,6 @@ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (4 << 20)) /* select serial console configuration */ -#define CONFIG_SERIAL3 /* use SERIAL 3 */ #define CONFIG_BAUDRATE 115200 #define EXYNOS5_DEFAULT_UART_OFFSET 0x010000 @@ -148,8 +146,6 @@ #define CONFIG_SPL #define COPY_BL2_FNPTR_ADDR 0x02020030 -/* specific .lds file */ -#define CONFIG_SPL_LDSCRIPT "board/samsung/smdk5250/smdk5250-uboot-spl.lds" #define CONFIG_SPL_TEXT_BASE 0x02023400 #define CONFIG_SPL_MAX_FOOTPRINT (14 * 1024) @@ -158,7 +154,7 @@ /* Miscellaneous configurable options */ #define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ -#define CONFIG_SYS_PROMPT "SMDK5250 # " +#define CONFIG_SYS_PROMPT "EXYNOS5250 # " #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ #define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */ #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ @@ -198,7 +194,6 @@ /* FLASH and environment organization */ #define CONFIG_SYS_NO_FLASH #undef CONFIG_CMD_IMLS -#define CONFIG_IDENT_STRING " for SMDK5250" #define CONFIG_SYS_MMC_ENV_DEV 0 @@ -247,9 +242,6 @@ #define CONFIG_I2C_EDID /* SPI */ -#define CONFIG_ENV_IS_IN_SPI_FLASH -#define CONFIG_SPI_FLASH - #ifdef CONFIG_SPI_FLASH #define CONFIG_EXYNOS_SPI #define CONFIG_CMD_SF @@ -306,7 +298,6 @@ #define CONFIG_SHA256 /* Display */ -#define CONFIG_LCD #ifdef CONFIG_LCD #define CONFIG_EXYNOS_FB #define CONFIG_EXYNOS_DP diff --git a/include/configs/smdk5250.h b/include/configs/smdk5250.h index 81f83a8..4af1909 100644 --- a/include/configs/smdk5250.h +++ b/include/configs/smdk5250.h @@ -25,9 +25,21 @@ #ifndef __CONFIG_SMDK_H #define __CONFIG_SMDK_H -#include <configs/exynos5250-dt.h> - #undef CONFIG_DEFAULT_DEVICE_TREE #define CONFIG_DEFAULT_DEVICE_TREE exynos5250-smdk5250 +#define CONFIG_SMDK5250 /* which is in a SMDK5250 */ +#define CONFIG_SERIAL3 /* use SERIAL 3 */ + +/* specific .lds file */ +#define CONFIG_SPL_LDSCRIPT "board/samsung/smdk5250/smdk5250-uboot-spl.lds" +#define CONFIG_IDENT_STRING " for SMDK5250" +#define CONFIG_SPI_FLASH +#define CONFIG_ENV_IS_IN_SPI_FLASH + +/* Display */ +#define CONFIG_LCD + +#include <configs/exynos5250-dt.h> + #endif /* __CONFIG_SMDK_H */ diff --git a/include/configs/snow.h b/include/configs/snow.h index b8460fd..e940c69 100644 --- a/include/configs/snow.h +++ b/include/configs/snow.h @@ -25,9 +25,21 @@ #ifndef __CONFIG_SNOW_H #define __CONFIG_SNOW_H -#include <configs/exynos5250-dt.h> - #undef CONFIG_DEFAULT_DEVICE_TREE #define CONFIG_DEFAULT_DEVICE_TREE exynos5250-snow +#define CONFIG_SMDK5250 /* which is in a SMDK5250 */ +#define CONFIG_SERIAL3 /* use SERIAL 3 */ + +/* specific .lds file */ +#define CONFIG_SPL_LDSCRIPT "board/samsung/smdk5250/smdk5250-uboot-spl.lds" +#define CONFIG_IDENT_STRING " for SMDK5250" +#define CONFIG_SPI_FLASH +#define CONFIG_ENV_IS_IN_SPI_FLASH + +/* Display */ +#define CONFIG_LCD + +#include <configs/exynos5250-dt.h> + #endif /* __CONFIG_SNOW_H */ -- 1.7.9.5

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[U-Boot] [PATCH 0/3 v2] video: lcd: splash screen prepare changes
by Robert Winkler 01 Jul '13

01 Jul '13

The first 2 patches are the result of discussion in these threads: http://lists.denx.de/pipermail/u-boot/2013-May/155463.html http://lists.denx.de/pipermail/u-boot/2013-June/155630.html http://lists.denx.de/pipermail/u-boot/2013-June/155632.html The upshot is, move splash_screen_prepare to a common location so it can be used in cfb_console.c and (possibly) make it weak. The first patch can be accepted without the last two. The third patch is a fix for cm_t35 that's only necessary if we make it weak. Robert Winkler (3): video: lcd: Add CONFIG_SPLASH_SCREEN_PREPARE support to CONFIG_VIDEO video: lcd: Make splash_screen_prepare weak, remove config macro omap: cm_t35: Fix cm_t35 for weak splash_screen_prepare README | 8 -------- board/compulab/cm_t35/cm_t35.c | 2 +- common/Makefile | 1 + common/lcd.c | 16 +++------------- common/splash.c | 31 +++++++++++++++++++++++++++++++ doc/README.splashprepare | 8 ++++++++ drivers/video/cfb_console.c | 5 +++-- include/configs/cm_t35.h | 1 - include/lcd.h | 1 - include/splash.h | 29 +++++++++++++++++++++++++++++ 10 files changed, 76 insertions(+), 26 deletions(-) create mode 100644 common/splash.c create mode 100644 doc/README.splashprepare create mode 100644 include/splash.h -- 1.8.3

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[U-Boot] U-boot-2012.04 compilation for qemu-mips board
by krishna dwivedi 01 Jul '13

01 Jul '13

Hi All, Board Configuration: Target Arch CPU BoardName qemu_mips mips mips32 qemu-mips - - Options qemu-mips While bitbake u-boot: Log data follows: | DEBUG: Executing shell function do_compile | NOTE: make -j 4 CROSS_COMPILE=mips-poky-linux- CC=mips-poky-linux-gcc --sysroot=/home/netlogic/eldk/build/tmp/sysroots/qemumips all | awk '(NF && $1 !~ /^#/) { print $1 ": " $1 "_config; $(MAKE)" }' boards.cfg > .boards.depend | System not configured - see README | make: *** [all] Error 1 | ERROR: oe_runmake failed Anyone please let me know what could be issue here. Regards, Krishna

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[U-Boot] Pull request: nand flash
by Scott Wood 01 Jul '13

01 Jul '13

The following changes since commit 2f998071254d566c71c34ef013aef1d9d0ec0fa3: image: Use ENOENT instead of ENOMEDIUM for better compatibility (2013-06-17 09:56:42 -0400) are available in the git repository at: git://git.denx.de/u-boot-nand-flash.git master for you to fetch changes up to 8b6b51a617b8adc773cc82b4886738a6128caf7f: mtd/nand: docg4: fix compiler warnings (2013-06-26 16:19:58 -0500) ---------------------------------------------------------------- Daniel Schwierzeck (1): mtd: nand: fix initialization of BBT options Heiko Schocher (1): dfu, nand: before write a buffer to nand, erase the nand sectors Mike Dunn (2): mtd: nand/docg4: fix driver after Linux resync mtd/nand: docg4: fix compiler warnings Scott Wood (1): nand: Don't call adjust_size_for_badblocks for erase common/cmd_nand.c | 9 +-------- drivers/dfu/dfu_nand.c | 18 ++++++++++++++++-- drivers/mtd/nand/docg4.c | 26 ++++++++++++++------------ drivers/mtd/nand/docg4_spl.c | 15 +++++++-------- drivers/mtd/nand/jz4740_nand.c | 2 +- drivers/mtd/nand/nand_util.c | 4 ++++ drivers/mtd/nand/s3c2410_nand.c | 4 +--- include/nand.h | 2 ++ 8 files changed, 46 insertions(+), 34 deletions(-)

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[U-Boot] [PATCH 3/3] btrfs: removed btrfs_mangle_name
by Stefan Agner 01 Jul '13

01 Jul '13

The function btrfs_mangle_name limited path lenght to 20 characters. Since the command parsing already checks spaces, the function is not needed at all. --- fs/btrfs/btrfs.c | 44 +------------------------------------------- 1 file changed, 1 insertion(+), 43 deletions(-) diff --git a/fs/btrfs/btrfs.c b/fs/btrfs/btrfs.c index e4dfd67..84184f1 100644 --- a/fs/btrfs/btrfs.c +++ b/fs/btrfs/btrfs.c @@ -906,46 +906,6 @@ void btrfs_close_file(struct file *file) free_file(file); } -void btrfs_mangle_name(char *dst, const char *src) -{ - char *p = dst, ch, len; - int i = BTRFS_FILENAME_MAX-1; - - len = strlen(src); - ch = *src; - while (!isspace(ch)) { - if (*src == '/') { - if (src[1] == '/') { - src++; - i--; - continue; - } - } - if (!len) - break; - i--; - len--; - *dst++ = *src++; - ch = *src; - } - while (1) { - if (dst == p) - break; - if (dst[-1] != '/') - break; - if ((dst[-1] == '/') && ((dst - 1) == p)) - break; - - dst--; - i++; - } - - i++; - for (; i > 0; i--) - *dst++ = '\0'; - -} - int searchdir(const char *name) { struct inode *inode = NULL; @@ -1088,10 +1048,8 @@ int btrfs_open_file(const char *name, struct com32_filedata *filedata) { int rv; struct file *file; - char mangled_name[BTRFS_FILENAME_MAX]; - btrfs_mangle_name(mangled_name, name); - rv = searchdir(mangled_name); + rv = searchdir(name); if (rv < 0) return rv; -- 1.8.3.1

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[U-Boot] [PATCH 2/3] btrfs: Fix crash while path parsing
by Stefan Agner 01 Jul '13

01 Jul '13

When parsing a path with a leading slash, the root inode was freed which lead to a crash. Path parsing is now improved and allows leading slashs like other filesystem commands (e.g. ext4load). Signed-off-by: Stefan Agner <stefan(a)agner.ch> --- fs/btrfs/btrfs.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/fs/btrfs/btrfs.c b/fs/btrfs/btrfs.c index a7fcc16..e4dfd67 100644 --- a/fs/btrfs/btrfs.c +++ b/fs/btrfs/btrfs.c @@ -963,6 +963,9 @@ int searchdir(const char *name) if (!pathbuf) goto err; + while (*p == '/') + p++; + do { got_link: if (*p == '/') { @@ -1324,9 +1327,6 @@ int btrfs_ls(const char *dirn) char *dirname = (char *)dirn; struct _DIR_ *dir; - if (*dirname == '/' && *(dirname+1) == 0) - *dirname = '.'; - dir = opendir(dirname); if (dir == NULL) return -1; -- 1.8.3.1

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[U-Boot] [PATCH 1/3] btrfs: use PLATFORM_NO_UNALIGNED to allow unaligned access
by Stefan Agner 01 Jul '13

01 Jul '13

Reading the super block leads to data abort crashes. Enabling the no unaligned option works around this. Since the format of the super block is fixed by the on-disk format unaligned access might by necessary in order to have btrfs support at all. Signed-off-by: Stefan Agner <stefan(a)agner.ch> --- fs/btrfs/Makefile | 1 + 1 file changed, 1 insertion(+) diff --git a/fs/btrfs/Makefile b/fs/btrfs/Makefile index a9e2021..104a06e 100644 --- a/fs/btrfs/Makefile +++ b/fs/btrfs/Makefile @@ -35,6 +35,7 @@ COBJS-$(CONFIG_FS_BTR) := btrfs.o SRCS := $(AOBJS:.o=.S) $(COBJS-y:.o=.c) OBJS := $(addprefix $(obj),$(AOBJS) $(COBJS-y)) +$(obj)btrfs.o: CFLAGS += $(PLATFORM_NO_UNALIGNED) all: $(LIB) $(AOBJS) -- 1.8.3.1

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