July 2013 - U-Boot

[U-Boot] [PATCH 1/2] MMC: add sdhci generic framework
by Lei Wen 15 Oct '13

15 Oct '13

Nowdays, there are plenty of mmc driver in uboot adopt the sd standard host design, aka as sdhci. It is better to centralize the common logic together to better maintenance. Signed-off-by: Lei Wen <leiwen(a)marvell.com> --- drivers/mmc/Makefile | 1 + drivers/mmc/sdhci.c | 433 ++++++++++++++++++++++++++++++++++++++++++++++++++ include/sdhci.h | 325 +++++++++++++++++++++++++++++++++++++ 3 files changed, 759 insertions(+), 0 deletions(-) create mode 100644 drivers/mmc/sdhci.c create mode 100644 include/sdhci.h diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile index a8fe17a..50b5117 100644 --- a/drivers/mmc/Makefile +++ b/drivers/mmc/Makefile @@ -38,6 +38,7 @@ COBJS-$(CONFIG_OMAP3_MMC) += omap3_mmc.o COBJS-$(CONFIG_OMAP_HSMMC) += omap_hsmmc.o COBJS-$(CONFIG_PXA_MMC) += pxa_mmc.o COBJS-$(CONFIG_S5P_MMC) += s5p_mmc.o +COBJS-$(CONFIG_SDHCI) += sdhci.o COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c new file mode 100644 index 0000000..9ebd33d --- /dev/null +++ b/drivers/mmc/sdhci.c @@ -0,0 +1,433 @@ +/* + * Copyright 2011, Marvell Semiconductor Inc. + * Lei Wen <leiwen(a)marvell.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + * Back ported to the 8xx platform (from the 8260 platform) by + * Murray.Jensen(a)cmst.csiro.au, 27-Jan-01. + */ + +#include <common.h> +#include <malloc.h> +#include <mmc.h> +#include <sdhci.h> + +void *aligned_buffer; + +static void sdhci_reset(struct sdhci_host *host, u8 mask) +{ + unsigned long timeout; + + /* Wait max 100 ms */ + timeout = 100; + sdhci_writeb(host, mask, SDHCI_SOFTWARE_RESET); + while (sdhci_readb(host, SDHCI_SOFTWARE_RESET) & mask) { + if (timeout == 0) { + printf("Reset 0x%x never completed.\n", (int)mask); + return; + } + timeout--; + udelay(1000); + } +} + +static void sdhci_cmd_done(struct sdhci_host *host, struct mmc_cmd *cmd) +{ + int i; + if (cmd->resp_type & MMC_RSP_136) { + /* CRC is stripped so we need to do some shifting. */ + for (i = 0; i < 4; i++) { + cmd->response[i] = sdhci_readl(host, + SDHCI_RESPONSE + (3-i)*4) << 8; + if (i != 3) + cmd->response[i] |= sdhci_readb(host, + SDHCI_RESPONSE + (3-i)*4-1); + } + } else { + cmd->response[0] = sdhci_readl(host, SDHCI_RESPONSE); + } +} + +static void sdhci_transfer_pio(struct sdhci_host *host, struct mmc_data *data) +{ + int i; + char *offs; + for (i = 0; i < data->blocksize; i += 4) { + offs = data->dest + i; + if (data->flags == MMC_DATA_READ) + *(u32 *)offs = sdhci_readl(host, SDHCI_BUFFER); + else + sdhci_writel(host, *(u32 *)offs, SDHCI_BUFFER); + } +} + +static int sdhci_transfer_data(struct sdhci_host *host, struct mmc_data *data, + unsigned int start_addr) +{ + unsigned int stat, rdy, mask, block = 0; + + rdy = SDHCI_INT_SPACE_AVAIL | SDHCI_INT_DATA_AVAIL; + mask = SDHCI_DATA_AVAILABLE | SDHCI_SPACE_AVAILABLE; + do { + stat = sdhci_readl(host, SDHCI_INT_STATUS); + if (stat & SDHCI_INT_ERROR) { + printf("Error detected in status(0x%X)!\n", stat); + return -1; + } + if (stat & rdy) { + if (!(sdhci_readl(host, SDHCI_PRESENT_STATE) & mask)) + continue; + sdhci_writel(host, rdy, SDHCI_INT_STATUS); + sdhci_transfer_pio(host, data); + data->dest += data->blocksize; + if (++block >= data->blocks) + break; + } +#ifdef CONFIG_MMC_SDMA + if (stat & SDHCI_INT_DMA_END) { + sdhci_writel(host, SDHCI_INT_DMA_END, SDHCI_INT_STATUS); + start_addr &= SDHCI_DEFAULT_BOUNDARY_SIZE - 1; + start_addr += SDHCI_DEFAULT_BOUNDARY_SIZE; + sdhci_writel(host, start_addr, SDHCI_DMA_ADDRESS); + } +#endif + } while (!(stat & SDHCI_INT_DATA_END)); + return 0; +} + +int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd, + struct mmc_data *data) +{ + struct sdhci_host *host = (struct sdhci_host *)mmc->priv; + unsigned int stat = 0; + int ret = 0; + int trans_bytes = 0, is_aligned = 1; + u32 mask, flags, mode; + unsigned int timeout, start_addr = 0; + + /* Wait max 10 ms */ + timeout = 10; + + sdhci_writel(host, SDHCI_INT_ALL_MASK, SDHCI_INT_STATUS); + mask = SDHCI_CMD_INHIBIT | SDHCI_DATA_INHIBIT; + + /* We shouldn't wait for data inihibit for stop commands, even + though they might use busy signaling */ + if (cmd->cmdidx == MMC_CMD_STOP_TRANSMISSION) + mask &= ~SDHCI_DATA_INHIBIT; + + while (sdhci_readl(host, SDHCI_PRESENT_STATE) & mask) { + if (timeout == 0) { + printf("Controller never released inhibit bit(s).\n"); + return COMM_ERR; + } + timeout--; + udelay(1000); + } + + mask = SDHCI_INT_RESPONSE; + if (!(cmd->resp_type & MMC_RSP_PRESENT)) + flags = SDHCI_CMD_RESP_NONE; + else if (cmd->resp_type & MMC_RSP_136) + flags = SDHCI_CMD_RESP_LONG; + else if (cmd->resp_type & MMC_RSP_BUSY) { + flags = SDHCI_CMD_RESP_SHORT_BUSY; + mask |= SDHCI_INT_DATA_END; + } else + flags = SDHCI_CMD_RESP_SHORT; + + if (cmd->resp_type & MMC_RSP_CRC) + flags |= SDHCI_CMD_CRC; + if (cmd->resp_type & MMC_RSP_OPCODE) + flags |= SDHCI_CMD_INDEX; + if (data) + flags |= SDHCI_CMD_DATA; + + /*Set Transfer mode regarding to data flag*/ + if (data != 0) { + sdhci_writeb(host, 0xe, SDHCI_TIMEOUT_CONTROL); + mode = SDHCI_TRNS_BLK_CNT_EN; + trans_bytes = data->blocks * data->blocksize; + if (data->blocks > 1) + mode |= SDHCI_TRNS_MULTI; + + if (data->flags == MMC_DATA_READ) + mode |= SDHCI_TRNS_READ; + +#ifdef CONFIG_MMC_SDMA + if (data->flags == MMC_DATA_READ) + start_addr = (unsigned int)data->dest; + else + start_addr = (unsigned int)data->src; + if ((host->quirks & SDHCI_QUIRK_32BIT_DMA_ADDR) && + (start_addr & 0x7) != 0x0) { + is_aligned = 0; + start_addr = (unsigned int)aligned_buffer; + if (data->flags != MMC_DATA_READ) + memcpy(aligned_buffer, data->src, trans_bytes); + } + + sdhci_writel(host, start_addr, SDHCI_DMA_ADDRESS); + mode |= SDHCI_TRNS_DMA; +#endif + sdhci_writew(host, SDHCI_MAKE_BLKSZ(SDHCI_DEFAULT_BOUNDARY_ARG, + data->blocksize), + SDHCI_BLOCK_SIZE); + sdhci_writew(host, data->blocks, SDHCI_BLOCK_COUNT); + sdhci_writew(host, mode, SDHCI_TRANSFER_MODE); + } + + sdhci_writel(host, cmd->cmdarg, SDHCI_ARGUMENT); +#ifdef CONFIG_MMC_SDMA + flush_cache(0, ~0); +#endif + sdhci_writew(host, SDHCI_MAKE_CMD(cmd->cmdidx, flags), SDHCI_COMMAND); + do { + stat = sdhci_readl(host, SDHCI_INT_STATUS); + if (stat & SDHCI_INT_ERROR) + break; + } while ((stat & mask) != mask); + + if ((stat & (SDHCI_INT_ERROR | mask)) == mask) { + sdhci_cmd_done(host, cmd); + sdhci_writel(host, mask, SDHCI_INT_STATUS); + } else + ret = -1; + + if (!ret && data) + ret = sdhci_transfer_data(host, data, start_addr); + + stat = sdhci_readl(host, SDHCI_INT_STATUS); + sdhci_writel(host, SDHCI_INT_ALL_MASK, SDHCI_INT_STATUS); + if (!ret) { + if ((host->quirks & SDHCI_QUIRK_32BIT_DMA_ADDR) && + !is_aligned && (data->flags == MMC_DATA_READ)) + memcpy(data->dest, aligned_buffer, trans_bytes); + return 0; + } + + sdhci_reset(host, SDHCI_RESET_CMD); + sdhci_reset(host, SDHCI_RESET_DATA); + if (stat & SDHCI_INT_TIMEOUT) + return TIMEOUT; + else + return COMM_ERR; +} + +static int sdhci_set_clock(struct mmc *mmc, unsigned int clock) +{ + struct sdhci_host *host = (struct sdhci_host *)mmc->priv; + unsigned int div, clk, timeout; + + sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); + + if (clock == 0) + return 0; + + if (host->version >= SDHCI_SPEC_300) { + /* Version 3.00 divisors must be a multiple of 2. */ + if (mmc->f_max <= clock) + div = 1; + else { + for (div = 2; div < SDHCI_MAX_DIV_SPEC_300; div += 2) { + if ((mmc->f_max / div) <= clock) + break; + } + } + } else { + /* Version 2.00 divisors must be a power of 2. */ + for (div = 1; div < SDHCI_MAX_DIV_SPEC_200; div *= 2) { + if ((mmc->f_max / div) <= clock) + break; + } + } + div >>= 1; + + clk = (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT; + clk |= ((div & SDHCI_DIV_HI_MASK) >> SDHCI_DIV_MASK_LEN) + << SDHCI_DIVIDER_HI_SHIFT; + clk |= SDHCI_CLOCK_INT_EN; + sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); + + /* Wait max 20 ms */ + timeout = 20; + while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL)) + & SDHCI_CLOCK_INT_STABLE)) { + if (timeout == 0) { + printf("Internal clock never stabilised.\n"); + return -1; + } + timeout--; + udelay(1000); + } + + clk |= SDHCI_CLOCK_CARD_EN; + sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); + return 0; +} + +static void sdhci_set_power(struct sdhci_host *host, unsigned short power) +{ + u8 pwr = 0; + + if (power != (unsigned short)-1) { + switch (1 << power) { + case MMC_VDD_165_195: + pwr = SDHCI_POWER_180; + break; + case MMC_VDD_29_30: + case MMC_VDD_30_31: + pwr = SDHCI_POWER_300; + break; + case MMC_VDD_32_33: + case MMC_VDD_33_34: + pwr = SDHCI_POWER_330; + break; + } + } + + if (pwr == 0) { + sdhci_writeb(host, 0, SDHCI_POWER_CONTROL); + return; + } + + pwr |= SDHCI_POWER_ON; + + sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL); +} + +void sdhci_set_ios(struct mmc *mmc) +{ + u32 ctrl; + struct sdhci_host *host = (struct sdhci_host *)mmc->priv; + + if (mmc->clock != host->clock) + sdhci_set_clock(mmc, mmc->clock); + + /* Set bus width */ + ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); + if (mmc->bus_width == 8) { + ctrl &= ~SDHCI_CTRL_4BITBUS; + if (host->version >= SDHCI_SPEC_300) + ctrl |= SDHCI_CTRL_8BITBUS; + } else { + if (host->version >= SDHCI_SPEC_300) + ctrl &= ~SDHCI_CTRL_8BITBUS; + if (mmc->bus_width == 4) + ctrl |= SDHCI_CTRL_4BITBUS; + else + ctrl &= ~SDHCI_CTRL_4BITBUS; + } + + if (mmc->clock > 26000000) + ctrl |= SDHCI_CTRL_HISPD; + else + ctrl &= ~SDHCI_CTRL_HISPD; + + sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); +} + +int sdhci_init(struct mmc *mmc) +{ + struct sdhci_host *host = (struct sdhci_host *)mmc->priv; + + if ((host->quirks & SDHCI_QUIRK_32BIT_DMA_ADDR) && !aligned_buffer) { + aligned_buffer = memalign(8, 512*1024); + if (!aligned_buffer) { + printf("Aligned buffer alloc failed!!!"); + return -1; + } + } + + /* Eable all state */ + sdhci_writel(host, SDHCI_INT_ALL_MASK, SDHCI_INT_ENABLE); + sdhci_writel(host, SDHCI_INT_ALL_MASK, SDHCI_SIGNAL_ENABLE); + + sdhci_set_power(host, fls(mmc->voltages) - 1); + + return 0; +} + +int add_sdhci(struct sdhci_host *host, u32 max_clk, u32 min_clk) +{ + struct mmc *mmc; + unsigned int caps; + + mmc = malloc(sizeof(struct mmc)); + if (!mmc) { + printf("mmc malloc fail!\n"); + return -1; + } + + mmc->priv = host; + + sprintf(mmc->name, "%s", host->name); + mmc->send_cmd = sdhci_send_command; + mmc->set_ios = sdhci_set_ios; + mmc->init = sdhci_init; + + caps = sdhci_readl(host, SDHCI_CAPABILITIES); +#ifdef CONFIG_MMC_SDMA + if (!(caps & SDHCI_CAN_DO_SDMA)) { + printf("Your controller don't support sdma!!\n"); + return -1; + } +#endif + + if (max_clk) + mmc->f_max = max_clk; + else { + if (host->version >= SDHCI_SPEC_300) + mmc->f_max = (caps & SDHCI_CLOCK_V3_BASE_MASK) + >> SDHCI_CLOCK_BASE_SHIFT; + else + mmc->f_max = (caps & SDHCI_CLOCK_BASE_MASK) + >> SDHCI_CLOCK_BASE_SHIFT; + mmc->f_max *= 1000000; + } + if (mmc->f_max == 0) { + printf("Hardware doesn't specify base clock frequency\n"); + return -1; + } + if (min_clk) + mmc->f_min = min_clk; + else { + if (host->version >= SDHCI_SPEC_300) + mmc->f_min = mmc->f_max / SDHCI_MAX_DIV_SPEC_300; + else + mmc->f_min = mmc->f_max / SDHCI_MAX_DIV_SPEC_200; + } + + mmc->voltages = 0; + if (caps & SDHCI_CAN_VDD_330) + mmc->voltages |= MMC_VDD_32_33 | MMC_VDD_33_34; + if (caps & SDHCI_CAN_VDD_300) + mmc->voltages |= MMC_VDD_29_30 | MMC_VDD_30_31; + if (caps & SDHCI_CAN_VDD_180) + mmc->voltages |= MMC_VDD_165_195; + mmc->host_caps = MMC_MODE_HS | MMC_MODE_HS_52MHz | MMC_MODE_4BIT; + if (caps & SDHCI_CAN_DO_8BIT) + mmc->host_caps |= MMC_MODE_8BIT; + + sdhci_reset(host, SDHCI_RESET_ALL); + mmc_register(mmc); + + return 0; +} diff --git a/include/sdhci.h b/include/sdhci.h new file mode 100644 index 0000000..6d52ce9 --- /dev/null +++ b/include/sdhci.h @@ -0,0 +1,325 @@ +/* + * Copyright 2011, Marvell Semiconductor Inc. + * Lei Wen <leiwen(a)marvell.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + * Back ported to the 8xx platform (from the 8260 platform) by + * Murray.Jensen(a)cmst.csiro.au, 27-Jan-01. + */ +#ifndef __SDHCI_HW_H +#define __SDHCI_HW_H + +#include <asm/io.h> +/* + * Controller registers + */ + +#define SDHCI_DMA_ADDRESS 0x00 + +#define SDHCI_BLOCK_SIZE 0x04 +#define SDHCI_MAKE_BLKSZ(dma, blksz) (((dma & 0x7) << 12) | (blksz & 0xFFF)) + +#define SDHCI_BLOCK_COUNT 0x06 + +#define SDHCI_ARGUMENT 0x08 + +#define SDHCI_TRANSFER_MODE 0x0C +#define SDHCI_TRNS_DMA 0x01 +#define SDHCI_TRNS_BLK_CNT_EN 0x02 +#define SDHCI_TRNS_ACMD12 0x04 +#define SDHCI_TRNS_READ 0x10 +#define SDHCI_TRNS_MULTI 0x20 + +#define SDHCI_COMMAND 0x0E +#define SDHCI_CMD_RESP_MASK 0x03 +#define SDHCI_CMD_CRC 0x08 +#define SDHCI_CMD_INDEX 0x10 +#define SDHCI_CMD_DATA 0x20 +#define SDHCI_CMD_ABORTCMD 0xC0 + +#define SDHCI_CMD_RESP_NONE 0x00 +#define SDHCI_CMD_RESP_LONG 0x01 +#define SDHCI_CMD_RESP_SHORT 0x02 +#define SDHCI_CMD_RESP_SHORT_BUSY 0x03 + +#define SDHCI_MAKE_CMD(c, f) (((c & 0xff) << 8) | (f & 0xff)) +#define SDHCI_GET_CMD(c) ((c>>8) & 0x3f) + +#define SDHCI_RESPONSE 0x10 + +#define SDHCI_BUFFER 0x20 + +#define SDHCI_PRESENT_STATE 0x24 +#define SDHCI_CMD_INHIBIT 0x00000001 +#define SDHCI_DATA_INHIBIT 0x00000002 +#define SDHCI_DOING_WRITE 0x00000100 +#define SDHCI_DOING_READ 0x00000200 +#define SDHCI_SPACE_AVAILABLE 0x00000400 +#define SDHCI_DATA_AVAILABLE 0x00000800 +#define SDHCI_CARD_PRESENT 0x00010000 +#define SDHCI_WRITE_PROTECT 0x00080000 + +#define SDHCI_HOST_CONTROL 0x28 +#define SDHCI_CTRL_LED 0x01 +#define SDHCI_CTRL_4BITBUS 0x02 +#define SDHCI_CTRL_HISPD 0x04 +#define SDHCI_CTRL_DMA_MASK 0x18 +#define SDHCI_CTRL_SDMA 0x00 +#define SDHCI_CTRL_ADMA1 0x08 +#define SDHCI_CTRL_ADMA32 0x10 +#define SDHCI_CTRL_ADMA64 0x18 +#define SDHCI_CTRL_8BITBUS 0x20 + +#define SDHCI_POWER_CONTROL 0x29 +#define SDHCI_POWER_ON 0x01 +#define SDHCI_POWER_180 0x0A +#define SDHCI_POWER_300 0x0C +#define SDHCI_POWER_330 0x0E + +#define SDHCI_BLOCK_GAP_CONTROL 0x2A + +#define SDHCI_WAKE_UP_CONTROL 0x2B +#define SDHCI_WAKE_ON_INT 0x01 +#define SDHCI_WAKE_ON_INSERT 0x02 +#define SDHCI_WAKE_ON_REMOVE 0x04 + +#define SDHCI_CLOCK_CONTROL 0x2C +#define SDHCI_DIVIDER_SHIFT 8 +#define SDHCI_DIVIDER_HI_SHIFT 6 +#define SDHCI_DIV_MASK 0xFF +#define SDHCI_DIV_MASK_LEN 8 +#define SDHCI_DIV_HI_MASK 0x300 +#define SDHCI_CLOCK_CARD_EN 0x0004 +#define SDHCI_CLOCK_INT_STABLE 0x0002 +#define SDHCI_CLOCK_INT_EN 0x0001 + +#define SDHCI_TIMEOUT_CONTROL 0x2E + +#define SDHCI_SOFTWARE_RESET 0x2F +#define SDHCI_RESET_ALL 0x01 +#define SDHCI_RESET_CMD 0x02 +#define SDHCI_RESET_DATA 0x04 + +#define SDHCI_INT_STATUS 0x30 +#define SDHCI_INT_ENABLE 0x34 +#define SDHCI_SIGNAL_ENABLE 0x38 +#define SDHCI_INT_RESPONSE 0x00000001 +#define SDHCI_INT_DATA_END 0x00000002 +#define SDHCI_INT_DMA_END 0x00000008 +#define SDHCI_INT_SPACE_AVAIL 0x00000010 +#define SDHCI_INT_DATA_AVAIL 0x00000020 +#define SDHCI_INT_CARD_INSERT 0x00000040 +#define SDHCI_INT_CARD_REMOVE 0x00000080 +#define SDHCI_INT_CARD_INT 0x00000100 +#define SDHCI_INT_ERROR 0x00008000 +#define SDHCI_INT_TIMEOUT 0x00010000 +#define SDHCI_INT_CRC 0x00020000 +#define SDHCI_INT_END_BIT 0x00040000 +#define SDHCI_INT_INDEX 0x00080000 +#define SDHCI_INT_DATA_TIMEOUT 0x00100000 +#define SDHCI_INT_DATA_CRC 0x00200000 +#define SDHCI_INT_DATA_END_BIT 0x00400000 +#define SDHCI_INT_BUS_POWER 0x00800000 +#define SDHCI_INT_ACMD12ERR 0x01000000 +#define SDHCI_INT_ADMA_ERROR 0x02000000 + +#define SDHCI_INT_NORMAL_MASK 0x00007FFF +#define SDHCI_INT_ERROR_MASK 0xFFFF8000 + +#define SDHCI_INT_CMD_MASK (SDHCI_INT_RESPONSE | SDHCI_INT_TIMEOUT | \ + SDHCI_INT_CRC | SDHCI_INT_END_BIT | SDHCI_INT_INDEX) +#define SDHCI_INT_DATA_MASK (SDHCI_INT_DATA_END | SDHCI_INT_DMA_END | \ + SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL | \ + SDHCI_INT_DATA_TIMEOUT | SDHCI_INT_DATA_CRC | \ + SDHCI_INT_DATA_END_BIT | SDHCI_INT_ADMA_ERROR) +#define SDHCI_INT_ALL_MASK ((unsigned int)-1) + +#define SDHCI_ACMD12_ERR 0x3C + +/* 3E-3F reserved */ + +#define SDHCI_CAPABILITIES 0x40 +#define SDHCI_TIMEOUT_CLK_MASK 0x0000003F +#define SDHCI_TIMEOUT_CLK_SHIFT 0 +#define SDHCI_TIMEOUT_CLK_UNIT 0x00000080 +#define SDHCI_CLOCK_BASE_MASK 0x00003F00 +#define SDHCI_CLOCK_V3_BASE_MASK 0x0000FF00 +#define SDHCI_CLOCK_BASE_SHIFT 8 +#define SDHCI_MAX_BLOCK_MASK 0x00030000 +#define SDHCI_MAX_BLOCK_SHIFT 16 +#define SDHCI_CAN_DO_8BIT 0x00040000 +#define SDHCI_CAN_DO_ADMA2 0x00080000 +#define SDHCI_CAN_DO_ADMA1 0x00100000 +#define SDHCI_CAN_DO_HISPD 0x00200000 +#define SDHCI_CAN_DO_SDMA 0x00400000 +#define SDHCI_CAN_VDD_330 0x01000000 +#define SDHCI_CAN_VDD_300 0x02000000 +#define SDHCI_CAN_VDD_180 0x04000000 +#define SDHCI_CAN_64BIT 0x10000000 + +#define SDHCI_CAPABILITIES_1 0x44 + +#define SDHCI_MAX_CURRENT 0x48 + +/* 4C-4F reserved for more max current */ + +#define SDHCI_SET_ACMD12_ERROR 0x50 +#define SDHCI_SET_INT_ERROR 0x52 + +#define SDHCI_ADMA_ERROR 0x54 + +/* 55-57 reserved */ + +#define SDHCI_ADMA_ADDRESS 0x58 + +/* 60-FB reserved */ + +#define SDHCI_SLOT_INT_STATUS 0xFC + +#define SDHCI_HOST_VERSION 0xFE +#define SDHCI_VENDOR_VER_MASK 0xFF00 +#define SDHCI_VENDOR_VER_SHIFT 8 +#define SDHCI_SPEC_VER_MASK 0x00FF +#define SDHCI_SPEC_VER_SHIFT 0 +#define SDHCI_SPEC_100 0 +#define SDHCI_SPEC_200 1 +#define SDHCI_SPEC_300 2 + +/* + * End of controller registers. + */ + +#define SDHCI_MAX_DIV_SPEC_200 256 +#define SDHCI_MAX_DIV_SPEC_300 2046 + +/* + * quirks + */ +#define SDHCI_QUIRK_32BIT_DMA_ADDR (1 << 0) + +/* + * Host SDMA buffer boundary. Valid values from 4K to 512K in powers of 2. + */ +#define SDHCI_DEFAULT_BOUNDARY_SIZE (512 * 1024) +#define SDHCI_DEFAULT_BOUNDARY_ARG (7) +struct sdhci_ops { +#ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS + u32 (*read_l)(struct sdhci_host *host, int reg); + u16 (*read_w)(struct sdhci_host *host, int reg); + u8 (*read_b)(struct sdhci_host *host, int reg); + void (*write_l)(struct sdhci_host *host, u32 val, int reg); + void (*write_w)(struct sdhci_host *host, u16 val, int reg); + void (*write_b)(struct sdhci_host *host, u8 val, int reg); +#endif +}; + +struct sdhci_host { + char *name; + void *ioaddr; + unsigned int quirks; + unsigned int version; + unsigned int clock; + const struct sdhci_ops *ops; +}; + +#ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS + +static inline void sdhci_writel(struct sdhci_host *host, u32 val, int reg) +{ + if (unlikely(host->ops->write_l)) + host->ops->write_l(host, val, reg); + else + writel(val, host->ioaddr + reg); +} + +static inline void sdhci_writew(struct sdhci_host *host, u16 val, int reg) +{ + if (unlikely(host->ops->write_w)) + host->ops->write_w(host, val, reg); + else + writew(val, host->ioaddr + reg); +} + +static inline void sdhci_writeb(struct sdhci_host *host, u8 val, int reg) +{ + if (unlikely(host->ops->write_b)) + host->ops->write_b(host, val, reg); + else + writeb(val, host->ioaddr + reg); +} + +static inline u32 sdhci_readl(struct sdhci_host *host, int reg) +{ + if (unlikely(host->ops->read_l)) + return host->ops->read_l(host, reg); + else + return readl(host->ioaddr + reg); +} + +static inline u16 sdhci_readw(struct sdhci_host *host, int reg) +{ + if (unlikely(host->ops->read_w)) + return host->ops->read_w(host, reg); + else + return readw(host->ioaddr + reg); +} + +static inline u8 sdhci_readb(struct sdhci_host *host, int reg) +{ + if (unlikely(host->ops->read_b)) + return host->ops->read_b(host, reg); + else + return readb(host->ioaddr + reg); +} + +#else + +static inline void sdhci_writel(struct sdhci_host *host, u32 val, int reg) +{ + writel(val, host->ioaddr + reg); +} + +static inline void sdhci_writew(struct sdhci_host *host, u16 val, int reg) +{ + writew(val, host->ioaddr + reg); +} + +static inline void sdhci_writeb(struct sdhci_host *host, u8 val, int reg) +{ + writeb(val, host->ioaddr + reg); +} +static inline u32 sdhci_readl(struct sdhci_host *host, int reg) +{ + return readl(host->ioaddr + reg); +} + +static inline u16 sdhci_readw(struct sdhci_host *host, int reg) +{ + return readw(host->ioaddr + reg); +} + +static inline u8 sdhci_readb(struct sdhci_host *host, int reg) +{ + return readb(host->ioaddr + reg); +} +#endif + +int add_sdhci(struct sdhci_host *host, u32 max_clk, u32 min_clk); +#endif /* __SDHCI_HW_H */ -- 1.7.0.4

6 20

[U-Boot] dual licensed files
by Roger Meier 14 Oct '13

14 Oct '13

Thank you Wolfgang for simplifying license handling! What about dual licensed files? What do you prefer? SPDX-License-Identifier: GPL-2.0+ SPDX-License-Identifier: BSD-2-Clause or SPDX-License-Identifier: GPL-2.0+, BSD-2-Clause Other seperator? All the best! -roger

4 6

[U-Boot] [PATCHv2 0/8] qspi controller: Normal, quad and memory mapped read support
by Sourav Poddar 07 Oct '13

07 Oct '13

This patch series add uboot ti qspi controller driver. QSPI is a kind of spi module that allows single, dual and quad read access to external spi devices. The module has a memory mapped interface which provide direct interface for accessing data form external spi devices. SPI mode ------- SPI mode uses mtd spi framework for transfer and reception of data. Can be used in: 1. Normal mode: use single pin for transfers 2. Dual Mode: use two pins for transfers. 3. Quad mode: use four pin for transfer Memory mapped read mode ----------------------- In this, SPI controller is configured using configuration port and then controler is switched to memory mapped port for data read. Series proposed suport for quad read as well as memory mapped read in spi mtd frameowrk as well as ti qpsi driver. Test info is attached as the last patch in the series. Matt Porter (3): omap5: add qspi support spi: add TI QSPI driver dra7xx_evm: add SPL API, QSPI, and serial flash support Ravikumar Kattekola (1): drivers: mtd: qspi: Add quad read support Sourav Poddar (4): armv7: hw_data: change clock divider setting. drivers: mtd: spi: Modify read/write command for sfl256s flash. driver: spi: Add memory mapped read support README: qspi usecase and testing documentation. arch/arm/cpu/armv7/omap5/hw_data.c | 9 +- arch/arm/cpu/armv7/omap5/prcm-regs.c | 1 + arch/arm/include/asm/arch-omap5/omap.h | 3 + arch/arm/include/asm/arch-omap5/spl.h | 1 + arch/arm/include/asm/omap_common.h | 1 + board/ti/dra7xx/mux_data.h | 10 + doc/README.ti_qspi_dra_test | 38 ++++ doc/README.ti_qspi_flash | 47 +++++ drivers/mtd/spi/spansion.c | 1 + drivers/mtd/spi/spi_flash.c | 148 ++++++++++++++- drivers/mtd/spi/spi_flash_internal.h | 2 + drivers/spi/Makefile | 1 + drivers/spi/ti_qspi.c | 327 ++++++++++++++++++++++++++++++++ include/configs/dra7xx_evm.h | 19 ++ include/spi.h | 5 + 15 files changed, 610 insertions(+), 3 deletions(-) create mode 100644 doc/README.ti_qspi_dra_test create mode 100644 doc/README.ti_qspi_flash create mode 100644 drivers/spi/ti_qspi.c

4 26

[U-Boot] [PATCH] config.mk: Add -Wundef to CFLAGS
by Masahiro Yamada 05 Oct '13

05 Oct '13

In U-boot source, some '#if' directives evaluate undefined identifiers. To find and fix them, this commit adds -Wundef to CFLAGS. Signed-off-by: Masahiro Yamada <yamada.m(a)jp.panasonic.com> --- config.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/config.mk b/config.mk index f71e145..7a92ae3 100644 --- a/config.mk +++ b/config.mk @@ -259,7 +259,7 @@ CPPFLAGS += -I$(TOPDIR)/include CPPFLAGS += -fno-builtin -ffreestanding -nostdinc \ -isystem $(gccincdir) -pipe $(PLATFORM_CPPFLAGS) -CFLAGS := $(CPPFLAGS) -Wall -Wstrict-prototypes +CFLAGS := $(CPPFLAGS) -Wall -Wstrict-prototypes -Wundef ifdef BUILD_TAG CFLAGS += -DBUILD_TAG='"$(BUILD_TAG)"' -- 1.8.1.2

3 7

[U-Boot] [PATCH 0/2 V3] exynos: Support a delay after deactivate for SPI
by Rajeshwari Shinde 03 Oct '13

03 Oct '13

This patch set exports the function timer_get_us and adds a delay for devices that need some time to react after spi transation finishes This patch set is based on "EXYNOS: SPI: Support SPI_PREAMBLE mode" link: "http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/162269" Changes in V2: - Removed #ifdefine for exported function. Changes in V3: - Rebased on "[PATCH 0/2 V5] spi: Enable SPI_PREAMBLE Mode" Rajeshwari Shinde (2): exynos: Export timer_get_us() to get microsecond timer spi: exynos: Support a delay after deactivate drivers/spi/exynos_spi.c | 19 +++++++++++++++++++ include/common.h | 6 ++++++ 2 files changed, 25 insertions(+), 0 deletions(-) -- 1.7.4.4

3 7

[U-Boot] [PATCH] sf: spansion: Add support for S25FL512S_256K
by Nobuhiro Iwamatsu 03 Oct '13

03 Oct '13

Add support for Spansion S25FL512S_256K SPI flash. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj(a)renesas.com> --- drivers/mtd/spi/spansion.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/mtd/spi/spansion.c b/drivers/mtd/spi/spansion.c index 47a4897..a7dc096 100644 --- a/drivers/mtd/spi/spansion.c +++ b/drivers/mtd/spi/spansion.c @@ -1,4 +1,5 @@ /* + * Copyright (C) 2013 Renesas Electronics Corporation * Copyright (C) 2009 Freescale Semiconductor, Inc. * * Author: Mingkai Hu (Mingkai.hu(a)freescale.com) @@ -101,6 +102,13 @@ static const struct spansion_spi_flash_params spansion_spi_flash_table[] = { .nr_sectors = 1024, .name = "S25FL512S_64K", }, + { + .idcode1 = 0x0220, + .idcode2 = 0x4d00, + .pages_per_sector = 1024, + .nr_sectors = 256, + .name = "S25FL512S_256K", + }, }; struct spi_flash *spi_flash_probe_spansion(struct spi_slave *spi, u8 *idcode) -- 1.8.3.2

3 3

[U-Boot] [PATCH 1/3] arm/km: add support for km_kirkwood_128m16 board
by Holger Brunck 02 Oct '13

02 Oct '13

From: Karlheinz Jerg <karlheinz.jerg(a)keymile.com> The board is similar to the standard km_kirkwood board. From a u-boot point of view, the only difference is an increased 256 MiB DRAM (128M16). A board based on this design is for example the SUP12. Signed-off-by: Karlheinz Jerg <karlheinz.jerg(a)keymile.com> Signed-off-by: Holger Brunck <holger.brunck(a)keymile.com> --- boards.cfg | 1 + include/configs/km_kirkwood.h | 10 ++++++++++ 2 files changed, 11 insertions(+) diff --git a/boards.cfg b/boards.cfg index c0c4282..2bb493f 100644 --- a/boards.cfg +++ b/boards.cfg @@ -165,6 +165,7 @@ lschlv2 arm arm926ejs lsxl buffalo lsxhl arm arm926ejs lsxl buffalo kirkwood lsxl:LSXHL km_kirkwood arm arm926ejs km_arm keymile kirkwood km_kirkwood:KM_KIRKWOOD km_kirkwood_pci arm arm926ejs km_arm keymile kirkwood km_kirkwood:KM_KIRKWOOD_PCI +km_kirkwood_128m16 arm arm926ejs km_arm keymile kirkwood km_kirkwood:KM_KIRKWOOD_128M16 kmnusa arm arm926ejs km_arm keymile kirkwood km_kirkwood:KM_NUSA kmsuv31 arm arm926ejs km_arm keymile kirkwood km_kirkwood:KM_SUV31 mgcoge3un arm arm926ejs km_arm keymile kirkwood km_kirkwood:KM_MGCOGE3UN diff --git a/include/configs/km_kirkwood.h b/include/configs/km_kirkwood.h index 83bb7aa..2b5f389 100644 --- a/include/configs/km_kirkwood.h +++ b/include/configs/km_kirkwood.h @@ -51,6 +51,16 @@ #define KM_IVM_BUS "pca9544a:70:9" /* I2C2 (Mux-Port 1)*/ #define CONFIG_KM_FPGA_CONFIG +/* KM_KIRKWOOD_128M16 */ +#elif defined(CONFIG_KM_KIRKWOOD_128M16) +#define CONFIG_IDENT_STRING "\nKeymile Kirkwood 128M16" +#define CONFIG_HOSTNAME km_kirkwood_128m16 +#undef CONFIG_SYS_KWD_CONFIG +#define CONFIG_SYS_KWD_CONFIG \ + $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg +#define CONFIG_KM_DISABLE_PCIE +#define KM_IVM_BUS "pca9544a:70:9" /* I2C2 (Mux-Port 1)*/ + /* KM_NUSA */ #elif defined(CONFIG_KM_NUSA) #define KM_IVM_BUS "pca9547:70:9" /* I2C2 (Mux-Port 1)*/ -- 1.8.0.1

3 6

[U-Boot] [PATCH V3 0/3] Introduce Samsung's new board Trats2
by Piotr Wilczek 25 Sep '13

25 Sep '13

This patchset add support for a new Samsung board Trats2. Multi I2C file is update to support more buses. Battery support is added for Trats2. This patchset depends on: http://patchwork.ozlabs.org/patch/246101/ http://patchwork.ozlabs.org/patch/246100/ http://patchwork.ozlabs.org/patch/245311/ http://patchwork.ozlabs.org/patch/245307/ http://patchwork.ozlabs.org/patch/245306/ Changes in v3: - add Maintainer entry - changed T-flash detect pin to GPX3[3] - removed MMC_ASYNC - use only software i2c Changes in v2: - removed lcd callback in panel_info - changed i2c from hardware to software - use max77693 multifunction pmic Piotr Wilczek (3): power:battery: add battery support for Trats2 board i2c:multi_i2c: add new macros I2C_7 and I2C_8 samsung: trats2: add support for new board Trats2 MAINTAINERS | 4 + board/samsung/common/multi_i2c.c | 33 +++ board/samsung/trats2/Makefile | 50 ++++ board/samsung/trats2/trats2.c | 529 ++++++++++++++++++++++++++++++++++++ boards.cfg | 1 + drivers/power/battery/Makefile | 1 + drivers/power/battery/bat_trats2.c | 81 ++++++ include/configs/trats2.h | 326 ++++++++++++++++++++++ 8 files changed, 1025 insertions(+) create mode 100644 board/samsung/trats2/Makefile create mode 100644 board/samsung/trats2/trats2.c create mode 100644 drivers/power/battery/bat_trats2.c create mode 100644 include/configs/trats2.h -- 1.7.9.5

5 26

[U-Boot] [PATCH] drivers:power:max77693: add support for new multi function pmic max77693
by Piotr Wilczek 25 Sep '13

25 Sep '13

This patch add support for new multi function pmic max77693. The driver is split into three modules: pmic, muic and fuelgage. Signed-off-by: Piotr Wilczek <p.wilczek(a)samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park(a)samsung.com> CC: Minkyu Kang <mk7.kang(a)samsung.com> --- Makefile | 1 + drivers/power/mfd/Makefile | 49 +++++++++++++ drivers/power/mfd/fg_max77693.c | 143 +++++++++++++++++++++++++++++++++++++ drivers/power/mfd/muic_max77693.c | 91 +++++++++++++++++++++++ drivers/power/mfd/pmic_max77693.c | 110 ++++++++++++++++++++++++++++ include/power/max77693_fg.h | 65 +++++++++++++++++ include/power/max77693_muic.h | 90 +++++++++++++++++++++++ include/power/max77693_pmic.h | 56 +++++++++++++++ 8 files changed, 605 insertions(+) create mode 100644 drivers/power/mfd/Makefile create mode 100644 drivers/power/mfd/fg_max77693.c create mode 100644 drivers/power/mfd/muic_max77693.c create mode 100644 drivers/power/mfd/pmic_max77693.c create mode 100644 include/power/max77693_fg.h create mode 100644 include/power/max77693_muic.h create mode 100644 include/power/max77693_pmic.h diff --git a/Makefile b/Makefile index c52f0f1..ea2cc11 100644 --- a/Makefile +++ b/Makefile @@ -298,6 +298,7 @@ LIBS-y += drivers/pci/libpci.o LIBS-y += drivers/pcmcia/libpcmcia.o LIBS-y += drivers/power/libpower.o \ drivers/power/fuel_gauge/libfuel_gauge.o \ + drivers/power/mfd/libmfd.o \ drivers/power/pmic/libpmic.o \ drivers/power/battery/libbattery.o LIBS-y += drivers/spi/libspi.o diff --git a/drivers/power/mfd/Makefile b/drivers/power/mfd/Makefile new file mode 100644 index 0000000..2ab3b00 --- /dev/null +++ b/drivers/power/mfd/Makefile @@ -0,0 +1,49 @@ +# +# Copyright (C) 2013 Samsung Electronics +# Piotr Wilczek <p.wilczek(a)samsung.com> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB := $(obj)libmfd.o + +COBJS-$(CONFIG_POWER_PMIC_MAX77693) += pmic_max77693.o +COBJS-$(CONFIG_POWER_MUIC_MAX77693) += muic_max77693.o +COBJS-$(CONFIG_POWER_FG_MAX77693) += fg_max77693.o + +COBJS := $(COBJS-y) +SRCS := $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) + +all: $(LIB) + +$(LIB): $(obj).depend $(OBJS) + $(call cmd_link_o_target, $(OBJS)) + + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################## diff --git a/drivers/power/mfd/fg_max77693.c b/drivers/power/mfd/fg_max77693.c new file mode 100644 index 0000000..0004cf8 --- /dev/null +++ b/drivers/power/mfd/fg_max77693.c @@ -0,0 +1,143 @@ +/* + * Copyright (C) 2013 Samsung Electronics + * Piotr Wilczek <p.wilczek(a)samsung.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <power/pmic.h> +#include <power/max77693_fg.h> +#include <i2c.h> +#include <power/power_chrg.h> +#include <power/battery.h> +#include <power/fg_battery_cell_params.h> +#include <errno.h> + +static int max77693_get_vcell(u32 *vcell) +{ + u16 value; + u8 ret; + + ret = i2c_read(MAX77693_FUEL_I2C_ADDR, MAX77693_VCELL, 1, + (u8 *)&value, 2); + if (ret) + return -1; + + *vcell = (u32)(value >> 3); + *vcell = *vcell * 625; + + return 0; +} + +static int max77693_get_soc(u32 *soc) +{ + u16 value; + u8 ret; + + ret = i2c_read(MAX77693_FUEL_I2C_ADDR, MAX77693_VFSOC, 1, + (u8 *)&value, 2); + if (ret) + return -1; + + *soc = (u32)(value >> 8); + + return 0; +} + +static int power_update_battery(struct pmic *p, struct pmic *bat) +{ + struct power_battery *pb = bat->pbat; + int ret = 0; + + if (pmic_probe(p)) { + puts("Can't find max17042 fuel gauge\n"); + return -1; + } + + max77693_get_soc(&pb->bat->state_of_chrg); + max77693_get_vcell(&pb->bat->voltage_uV); + + return ret; +} + +static int power_check_battery(struct pmic *p, struct pmic *bat) +{ + struct power_battery *pb = bat->pbat; + unsigned int val; + int ret = 0; + + if (pmic_probe(p)) { + puts("Can't find max17042 fuel gauge\n"); + return -1; + } + + ret |= pmic_reg_read(p, MAX77693_STATUS, &val); + debug("fg status: 0x%x\n", val); + + ret |= pmic_reg_read(p, MAX77693_VERSION, &pb->bat->version); + + power_update_battery(p, bat); + debug("fg ver: 0x%x\n", pb->bat->version); + printf("BAT: state_of_charge(SOC):%d%%\n", + pb->bat->state_of_chrg); + + printf(" voltage: %d.%6.6d [V] (expected to be %d [mAh])\n", + pb->bat->voltage_uV / 1000000, + pb->bat->voltage_uV % 1000000, + pb->bat->capacity); + + if (pb->bat->voltage_uV > 3850000) + pb->bat->state = EXT_SOURCE; + else if (pb->bat->voltage_uV < 3600000 || pb->bat->state_of_chrg < 5) + pb->bat->state = CHARGE; + else + pb->bat->state = NORMAL; + + return ret; +} + +static struct power_fg power_fg_ops = { + .fg_battery_check = power_check_battery, + .fg_battery_update = power_update_battery, +}; + +int power_fg_init(unsigned char bus) +{ + static const char name[] = "MAX77693_FG"; + struct pmic *p = pmic_alloc(); + + if (!p) { + printf("%s: POWER allocation error!\n", __func__); + return -ENOMEM; + } + + debug("Board Fuel Gauge init\n"); + + p->name = name; + p->interface = PMIC_I2C; + p->number_of_regs = FG_NUM_OF_REGS; + p->hw.i2c.addr = MAX77693_FUEL_I2C_ADDR; + p->hw.i2c.tx_num = 2; + p->sensor_byte_order = PMIC_SENSOR_BYTE_ORDER_BIG; + p->bus = bus; + + p->fg = &power_fg_ops; + return 0; +} diff --git a/drivers/power/mfd/muic_max77693.c b/drivers/power/mfd/muic_max77693.c new file mode 100644 index 0000000..eaa9120 --- /dev/null +++ b/drivers/power/mfd/muic_max77693.c @@ -0,0 +1,91 @@ +/* + * Copyright (C) 2013 Samsung Electronics + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <power/pmic.h> +#include <power/power_chrg.h> +#include <power/max77693_muic.h> +#include <i2c.h> +#include <errno.h> + +static int power_chrg_get_type(struct pmic *p) +{ + unsigned int val; + unsigned int charge_type, charger; + + /* if probe failed, return cable none */ + if (pmic_probe(p)) + return CHARGER_NO; + + pmic_reg_read(p, MAX77693_MUIC_STATUS2, &val); + + charge_type = val & MAX77693_MUIC_CHG_MASK; + + switch (charge_type) { + case MAX77693_MUIC_CHG_NO: + charger = CHARGER_NO; + break; + case MAX77693_MUIC_CHG_USB: + case MAX77693_MUIC_CHG_USB_D: + charger = CHARGER_USB; + break; + case MAX77693_MUIC_CHG_TA: + case MAX77693_MUIC_CHG_TA_1A: + charger = CHARGER_TA; + break; + case MAX77693_MUIC_CHG_TA_500: + charger = CHARGER_TA_500; + break; + default: + charger = CHARGER_UNKNOWN; + break; + } + + return charger; +} + +static struct power_chrg power_chrg_muic_ops = { + .chrg_type = power_chrg_get_type, +}; + +int power_muic_init(unsigned int bus) +{ + static const char name[] = "MAX77693_MUIC"; + struct pmic *p = pmic_alloc(); + + if (!p) { + printf("%s: POWER allocation error!\n", __func__); + return -ENOMEM; + } + + debug("Board Micro USB Interface Controller init\n"); + + p->name = name; + p->interface = PMIC_I2C; + p->number_of_regs = MUIC_NUM_OF_REGS; + p->hw.i2c.addr = MAX77693_MUIC_I2C_ADDR; + p->hw.i2c.tx_num = 1; + p->bus = bus; + + p->chrg = &power_chrg_muic_ops; + return 0; +} diff --git a/drivers/power/mfd/pmic_max77693.c b/drivers/power/mfd/pmic_max77693.c new file mode 100644 index 0000000..037fcce --- /dev/null +++ b/drivers/power/mfd/pmic_max77693.c @@ -0,0 +1,110 @@ +/* + * Copyright (C) 2013 Samsung Electronics + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <power/pmic.h> +#include <power/max77693_pmic.h> +#include <i2c.h> +#include <errno.h> + +static int max77693_charger_state(struct pmic *p, int state, int current) +{ + unsigned int val; + + if (pmic_probe(p)) + return -1; + + /* unlock write capability */ + val = MAX77693_CHG_UNLOCK; + pmic_reg_write(p, MAX77693_CHG_CNFG_06, val); + + if (state == CHARGER_DISABLE) { + puts("Disable the charger.\n"); + pmic_reg_read(p, MAX77693_CHG_CNFG_00, &val); + val &= ~0x01; + pmic_reg_write(p, MAX77693_CHG_CNFG_00, val); + return -1; + } + + if (current < CHARGER_MIN_CURRENT || current > CHARGER_MAX_CURRENT) { + printf("%s: Wrong charge current: %d [mA]\n", + __func__, current); + return -1; + } + + /* set charging current */ + pmic_reg_read(p, MAX77693_CHG_CNFG_02, &val); + val &= ~MAX77693_CHG_CC; + val |= current * 10 / 333; /* 0.1A/3 steps */ + pmic_reg_write(p, MAX77693_CHG_CNFG_02, val); + + /* enable charging */ + val = MAX77693_CHG_MODE_ON; + pmic_reg_write(p, MAX77693_CHG_CNFG_00, val); + + /* check charging current */ + pmic_reg_read(p, MAX77693_CHG_CNFG_02, &val); + val &= 0x3f; + printf("Enable the charger @ %d [mA]\n", val * 333 / 10); + + return 0; +} + +static int max77693_charger_bat_present(struct pmic *p) +{ + unsigned int val; + + if (pmic_probe(p)) + return -1; + + pmic_reg_read(p, MAX77693_CHG_INT_OK, &val); + + return !(val & MAX77693_CHG_DETBAT); +} + +static struct power_chrg power_chrg_pmic_ops = { + .chrg_bat_present = max77693_charger_bat_present, + .chrg_state = max77693_charger_state, +}; + +int pmic_init_max77693(unsigned char bus) +{ + static const char name[] = "MAX77693_PMIC"; + struct pmic *p = pmic_alloc(); + + if (!p) { + printf("%s: POWER allocation error!\n", __func__); + return -ENOMEM; + } + + debug("Board PMIC init\n"); + + p->name = name; + p->interface = PMIC_I2C; + p->number_of_regs = PMIC_NUM_OF_REGS; + p->hw.i2c.addr = MAX77693_PMIC_I2C_ADDR; + p->hw.i2c.tx_num = 1; + p->bus = bus; + + p->chrg = &power_chrg_pmic_ops; + return 0; +} diff --git a/include/power/max77693_fg.h b/include/power/max77693_fg.h new file mode 100644 index 0000000..d129187 --- /dev/null +++ b/include/power/max77693_fg.h @@ -0,0 +1,65 @@ +/* + * Copyright (C) 2013 Samsung Electronics + * Piotr Wilczek <p.wilczek(a)samsung.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __MAX77693_FG_H_ +#define __MAX77693_FG_H_ + +/* MAX 77693 registers */ +enum { + MAX77693_STATUS = 0x00, + MAX77693_SOCREP = 0x06, + MAX77693_VCELL = 0x09, + MAX77693_CURRENT = 0x0A, + MAX77693_AVG_CURRENT = 0x0B, + MAX77693_SOCMIX = 0x0D, + MAX77693_SOCAV = 0x0E, + MAX77693_DESIGN_CAP = 0x18, + MAX77693_AVG_VCELL = 0x19, + MAX77693_CONFIG = 0x1D, + MAX77693_VERSION = 0x21, + MAX77693_LEARNCFG = 0x28, + MAX77693_FILTERCFG = 0x29, + MAX77693_RELAXCFG = 0x2A, + MAX77693_MISCCFG = 0x2B, + MAX77693_CGAIN = 0x2E, + MAX77693_COFF = 0x2F, + MAX77693_RCOMP0 = 0x38, + MAX77693_TEMPCO = 0x39, + MAX77693_FSTAT = 0x3D, + MAX77693_VFOCV = 0xEE, + MAX77693_VFSOC = 0xFF, + + FG_NUM_OF_REGS = 0x100, +}; + +#define MAX77693_POR (1 << 1) + +#define MODEL_UNLOCK1 0x0059 +#define MODEL_UNLOCK2 0x00c4 +#define MODEL_LOCK1 0x0000 +#define MODEL_LOCK2 0x0000 + +#define MAX77693_FUEL_I2C_ADDR (0x6C >> 1) + +int power_fg_init(unsigned char bus); +#endif /* __MAX77693_FG_H_ */ diff --git a/include/power/max77693_muic.h b/include/power/max77693_muic.h new file mode 100644 index 0000000..076fdc0 --- /dev/null +++ b/include/power/max77693_muic.h @@ -0,0 +1,90 @@ +/* + * Copyright (C) 2013 Samsung Electronics + * Piotr Wilczek <p.wilczek(a)samsung.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __MAX77693_MUIC_H_ +#define __MAX77693_MUIC_H_ + +#include <power/power_chrg.h> + +/* + * MUIC REGISTER + */ + +#define MAX77693_MUIC_PREFIX "max77693-muic:" + +/* MAX77693_MUIC_STATUS1 */ +#define MAX77693_MUIC_ADC_MASK 0x1F + +/* MAX77693_MUIC_STATUS2 */ +#define MAX77693_MUIC_CHG_NO 0x00 +#define MAX77693_MUIC_CHG_USB 0x01 +#define MAX77693_MUIC_CHG_USB_D 0x02 +#define MAX77693_MUIC_CHG_TA 0x03 +#define MAX77693_MUIC_CHG_TA_500 0x04 +#define MAX77693_MUIC_CHG_TA_1A 0x05 +#define MAX77693_MUIC_CHG_MASK 0x07 + +/* MAX77693_MUIC_CONTROL1 */ +#define MAX77693_MUIC_CTRL1_DN1DP2 ((0x1 << 3) | 0x1) +#define MAX77693_MUIC_CTRL1_UT1UR2 ((0x3 << 3) | 0x3) +#define MAX77693_MUIC_CTRL1_ADN1ADP2 ((0x4 << 3) | 0x4) +#define MAX77693_MUIC_CTRL1_AUT1AUR2 ((0x5 << 3) | 0x5) +#define MAX77693_MUIC_CTRL1_MASK 0xC0 + +#define MUIC_PATH_USB 0 +#define MUIC_PATH_UART 1 + +#define MUIC_PATH_CP 0 +#define MUIC_PATH_AP 1 + +enum muic_path { + MUIC_PATH_USB_CP, + MUIC_PATH_USB_AP, + MUIC_PATH_UART_CP, + MUIC_PATH_UART_AP, +}; + +/* MAX 777693 MUIC registers */ +enum { + MAX77693_MUIC_ID = 0x00, + MAX77693_MUIC_INT1 = 0x01, + MAX77693_MUIC_INT2 = 0x02, + MAX77693_MUIC_INT3 = 0x03, + MAX77693_MUIC_STATUS1 = 0x04, + MAX77693_MUIC_STATUS2 = 0x05, + MAX77693_MUIC_STATUS3 = 0x06, + MAX77693_MUIC_INTMASK1 = 0x07, + MAX77693_MUIC_INTMASK2 = 0x08, + MAX77693_MUIC_INTMASK3 = 0x09, + MAX77693_MUIC_CDETCTRL = 0x0A, + MAX77693_MUIC_CONTROL1 = 0x0C, + MAX77693_MUIC_CONTROL2 = 0x0D, + MAX77693_MUIC_CONTROL3 = 0x0E, + + MUIC_NUM_OF_REGS = 0x0F, +}; + +#define MAX77693_MUIC_I2C_ADDR (0x4A >> 1) + +int power_muic_init(unsigned int bus); +#endif /* __MAX77693_MUIC_H_ */ diff --git a/include/power/max77693_pmic.h b/include/power/max77693_pmic.h new file mode 100644 index 0000000..07c3dd6 --- /dev/null +++ b/include/power/max77693_pmic.h @@ -0,0 +1,56 @@ +/* + * Copyright (C) 2013 Samsung Electronics + * Piotr Wilczek <p.wilczek(a)samsung.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __MAX77693_PMIC_H_ +#define __MAX77693_PMIC_H_ + +#include <power/power_chrg.h> + +enum {CHARGER_ENABLE, CHARGER_DISABLE}; + +#define CHARGER_MIN_CURRENT 200 +#define CHARGER_MAX_CURRENT 2000 + +#define MAX77693_CHG_PREFIX "max77693-chg:" + +/* Registers */ + +#define MAX77693_CHG_BASE 0xB0 +#define MAX77693_CHG_INT_OK 0xB2 +#define MAX77693_CHG_CNFG_00 0xB7 +#define MAX77693_CHG_CNFG_02 0xB9 +#define MAX77693_CHG_CNFG_06 0xBD +#define MAX77693_SAFEOUT 0xC6 + +#define PMIC_NUM_OF_REGS 0xC7 + +#define MAX77693_CHG_DETBAT (0x1 << 7) /* MAX77693_CHG_INT_OK */ +#define MAX77693_CHG_MODE_ON 0x05 /* MAX77693_CHG_CNFG_00 */ +#define MAX77693_CHG_CC 0x3F /* MAX77693_CHG_CNFG_02 */ +#define MAX77693_CHG_LOCK (0x0 << 2) /* MAX77693_CHG_CNFG_06 */ +#define MAX77693_CHG_UNLOCK (0x3 << 2) /* MAX77693_CHG_CNFG_06 */ + +#define MAX77693_PMIC_I2C_ADDR (0xCC >> 1) + +int pmic_init_max77693(unsigned char bus); +#endif /* __MAX77693_PMIC_H_ */ -- 1.7.9.5

2 4

[U-Boot] [PATCH] arm:samsung:serial: Extract common Samsung UART code
by Lukasz Majewski 24 Sep '13

24 Sep '13

This commit removes duplicated code for UART IP block embedded at Samsung SoCs. New ./include/asm/samsung-common directory has been created to store common code for existing and future Samsung targets. Additionally building of UART code now depends on more verbose CONFIG_S5P_SERIAL define. For this reason all relevant configs have been adjusted. Signed-off-by: Lukasz Majewski <l.majewski(a)majess.pl> Cc: Minkyu Kang <mk7.kang(a)samsung.com> --- arch/arm/include/asm/arch-exynos/uart.h | 58 ------------------ arch/arm/include/asm/arch-s5pc1xx/uart.h | 58 ------------------ arch/arm/include/asm/samsung-common/uart.h | 88 ++++++++++++++++++++++++++++ drivers/serial/Makefile | 2 +- drivers/serial/serial_s5p.c | 13 +--- include/configs/exynos5250-dt.h | 1 + include/configs/origen.h | 1 + include/configs/s5p_goni.h | 1 + include/configs/s5pc210_universal.h | 1 + include/configs/smdkc100.h | 1 + include/configs/smdkv310.h | 1 + include/configs/trats.h | 1 + 12 files changed, 98 insertions(+), 128 deletions(-) delete mode 100644 arch/arm/include/asm/arch-exynos/uart.h delete mode 100644 arch/arm/include/asm/arch-s5pc1xx/uart.h create mode 100644 arch/arm/include/asm/samsung-common/uart.h diff --git a/arch/arm/include/asm/arch-exynos/uart.h b/arch/arm/include/asm/arch-exynos/uart.h deleted file mode 100644 index 6cc68df..0000000 --- a/arch/arm/include/asm/arch-exynos/uart.h +++ /dev/null @@ -1,58 +0,0 @@ -/* - * (C) Copyright 2009 Samsung Electronics - * Minkyu Kang <mk7.kang(a)samsung.com> - * Heungjun Kim <riverful.kim(a)samsung.com> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - */ - -#ifndef __ASM_ARCH_UART_H_ -#define __ASM_ARCH_UART_H_ - -#ifndef __ASSEMBLY__ -/* baudrate rest value */ -union br_rest { - unsigned short slot; /* udivslot */ - unsigned char value; /* ufracval */ -}; - -struct s5p_uart { - unsigned int ulcon; - unsigned int ucon; - unsigned int ufcon; - unsigned int umcon; - unsigned int utrstat; - unsigned int uerstat; - unsigned int ufstat; - unsigned int umstat; - unsigned char utxh; - unsigned char res1[3]; - unsigned char urxh; - unsigned char res2[3]; - unsigned int ubrdiv; - union br_rest rest; - unsigned char res3[0xffd0]; -}; - -static inline int s5p_uart_divslot(void) -{ - return 0; -} - -#endif /* __ASSEMBLY__ */ - -#endif diff --git a/arch/arm/include/asm/arch-s5pc1xx/uart.h b/arch/arm/include/asm/arch-s5pc1xx/uart.h deleted file mode 100644 index 1c56739..0000000 --- a/arch/arm/include/asm/arch-s5pc1xx/uart.h +++ /dev/null @@ -1,58 +0,0 @@ -/* - * (C) Copyright 2009 Samsung Electronics - * Minkyu Kang <mk7.kang(a)samsung.com> - * Heungjun Kim <riverful.kim(a)samsung.com> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - */ - -#ifndef __ASM_ARCH_UART_H_ -#define __ASM_ARCH_UART_H_ - -#ifndef __ASSEMBLY__ -/* baudrate rest value */ -union br_rest { - unsigned short slot; /* udivslot */ - unsigned char value; /* ufracval */ -}; - -struct s5p_uart { - unsigned int ulcon; - unsigned int ucon; - unsigned int ufcon; - unsigned int umcon; - unsigned int utrstat; - unsigned int uerstat; - unsigned int ufstat; - unsigned int umstat; - unsigned char utxh; - unsigned char res1[3]; - unsigned char urxh; - unsigned char res2[3]; - unsigned int ubrdiv; - union br_rest rest; - unsigned char res3[0x3d0]; -}; - -static inline int s5p_uart_divslot(void) -{ - return 1; -} - -#endif /* __ASSEMBLY__ */ - -#endif diff --git a/arch/arm/include/asm/samsung-common/uart.h b/arch/arm/include/asm/samsung-common/uart.h new file mode 100644 index 0000000..3b6572d --- /dev/null +++ b/arch/arm/include/asm/samsung-common/uart.h @@ -0,0 +1,88 @@ +/* + * (C) Copyright 2009 Samsung Electronics + * Minkyu Kang <mk7.kang(a)samsung.com> + * Heungjun Kim <riverful.kim(a)samsung.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#ifndef __ASM_ARCH_UART_H_ +#define __ASM_ARCH_UART_H_ + +#ifndef __ASSEMBLY__ +/* baudrate rest value */ +union br_rest { + unsigned short slot; /* udivslot */ + unsigned char value; /* ufracval */ +}; + +struct s5p_uart { + unsigned int ulcon; + unsigned int ucon; + unsigned int ufcon; + unsigned int umcon; + unsigned int utrstat; + unsigned int uerstat; + unsigned int ufstat; + unsigned int umstat; + unsigned char utxh; + unsigned char res1[3]; + unsigned char urxh; + unsigned char res2[3]; + unsigned int ubrdiv; + union br_rest rest; +#if defined(CONFIG_S5PC100) || \ + defined(CONFIG_S5PC110) || \ + defined(CONFIG_S3C64XX) + unsigned char res3[0x3d0]; +#else /* Exynos 4 and 5 */ + unsigned char res3[0xffd0]; +#endif +}; + + +static inline int s5p_uart_divslot(void) +{ +#if defined(CONFIG_S5PC100) || \ + defined(CONFIG_S5PC110) || \ + defined(CONFIG_S3C64XX) + return 1; +#else /* Exynos 4 and 5 */ + return 0; +#endif +} + +#if defined(CONFIG_S3C64XX) +#define RX_FIFO_COUNT_MASK 0x3f +#define RX_FIFO_FULL_MASK (1 << 6) +#define TX_FIFO_FULL_MASK (1 << 14) +#else /* S5PC110 and Exynos 4 and 5 */ +#define RX_FIFO_COUNT_MASK 0xff +#define RX_FIFO_FULL_MASK (1 << 8) +#define TX_FIFO_FULL_MASK (1 << 24) +#endif + +/* Information about a serial port */ +struct fdt_serial { + u32 base_addr; /* address of registers in physical memory */ + u8 port_id; /* uart port number */ + u8 enabled; /* 1 if enabled, 0 if disabled */ +}; + +#endif /* __ASSEMBLY__ */ + +#endif diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index 0f954a5..4c4ba75 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile @@ -35,7 +35,7 @@ COBJS-$(CONFIG_LPC32XX_HSUART) += lpc32xx_hsuart.o COBJS-$(CONFIG_MCFUART) += mcfuart.o COBJS-$(CONFIG_OPENCORES_YANU) += opencores_yanu.o COBJS-$(CONFIG_SYS_NS16550) += ns16550.o -COBJS-$(CONFIG_S5P) += serial_s5p.o +COBJS-$(CONFIG_S5P_SERIAL) += serial_s5p.o COBJS-$(CONFIG_SYS_NS16550_SERIAL) += serial_ns16550.o COBJS-$(CONFIG_IMX_SERIAL) += serial_imx.o COBJS-$(CONFIG_IXP_SERIAL) += serial_ixp.o diff --git a/drivers/serial/serial_s5p.c b/drivers/serial/serial_s5p.c index 6836c7a..fb0677b 100644 --- a/drivers/serial/serial_s5p.c +++ b/drivers/serial/serial_s5p.c @@ -25,22 +25,13 @@ #include <fdtdec.h> #include <linux/compiler.h> #include <asm/io.h> -#include <asm/arch/uart.h> +#include <asm/samsung-common/uart.h> #include <asm/arch/clk.h> #include <serial.h> DECLARE_GLOBAL_DATA_PTR; -#define RX_FIFO_COUNT_MASK 0xff -#define RX_FIFO_FULL_MASK (1 << 8) -#define TX_FIFO_FULL_MASK (1 << 24) - -/* Information about a serial port */ -struct fdt_serial { - u32 base_addr; /* address of registers in physical memory */ - u8 port_id; /* uart port number */ - u8 enabled; /* 1 if enabled, 0 if disabled */ -} config __attribute__ ((section(".data"))); +struct fdt_serial config __attribute__ ((section(".data"))); static inline struct s5p_uart *s5p_get_base_uart(int dev_index) { diff --git a/include/configs/exynos5250-dt.h b/include/configs/exynos5250-dt.h index 582c584..303a8de 100644 --- a/include/configs/exynos5250-dt.h +++ b/include/configs/exynos5250-dt.h @@ -86,6 +86,7 @@ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (4 << 20)) /* select serial console configuration */ +#define CONFIG_S5P_SERIAL #define CONFIG_BAUDRATE 115200 #define EXYNOS5_DEFAULT_UART_OFFSET 0x010000 #define CONFIG_SILENT_CONSOLE diff --git a/include/configs/origen.h b/include/configs/origen.h index 5013aee..7197243 100644 --- a/include/configs/origen.h +++ b/include/configs/origen.h @@ -64,6 +64,7 @@ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20)) /* select serial console configuration */ +#define CONFIG_S5P_SERIAL #define CONFIG_SERIAL2 1 /* use SERIAL 2 */ #define CONFIG_BAUDRATE 115200 #define EXYNOS4_DEFAULT_UART_OFFSET 0x020000 diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index 56e8347..440c4a3 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -58,6 +58,7 @@ /* * select serial console configuration */ +#define CONFIG_S5P_SERIAL #define CONFIG_SERIAL2 1 /* use SERIAL2 */ #define CONFIG_BAUDRATE 115200 diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h index eb13bb3..398db2a 100644 --- a/include/configs/s5pc210_universal.h +++ b/include/configs/s5pc210_universal.h @@ -64,6 +64,7 @@ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20)) /* select serial console configuration */ +#define CONFIG_S5P_SERIAL #define CONFIG_SERIAL2 1 /* use SERIAL 2 */ #define CONFIG_BAUDRATE 115200 diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h index fb640db..6964a77 100644 --- a/include/configs/smdkc100.h +++ b/include/configs/smdkc100.h @@ -63,6 +63,7 @@ /* * select serial console configuration */ +#define CONFIG_S5P_SERIAL #define CONFIG_SERIAL0 1 /* use SERIAL 0 on SMDKC100 */ /* PWM */ diff --git a/include/configs/smdkv310.h b/include/configs/smdkv310.h index 0f04597..3c68543 100644 --- a/include/configs/smdkv310.h +++ b/include/configs/smdkv310.h @@ -64,6 +64,7 @@ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20)) /* select serial console configuration */ +#define CONFIG_S5P_SERIAL #define CONFIG_SERIAL1 1 /* use SERIAL 1 */ #define CONFIG_BAUDRATE 115200 #define EXYNOS4_DEFAULT_UART_OFFSET 0x010000 diff --git a/include/configs/trats.h b/include/configs/trats.h index 356d87b..e9c1fa4 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -69,6 +69,7 @@ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (16 << 20)) /* select serial console configuration */ +#define CONFIG_S5P_SERIAL #define CONFIG_SERIAL2 /* use SERIAL 2 */ #define CONFIG_BAUDRATE 115200 -- 1.7.10.4

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