April 2013 - U-Boot

[U-Boot] [PATCH] mtd: nand: fix the partial page write condition
by Tao Hou 22 May '13

22 May '13

When writelen is mtd->writesize - 1, it is still a partial page write Signed-off-by: Tao Hou <hotforest(a)gmail.com> Cc: Scott Wood <scottwood(a)freescale.com> --- drivers/mtd/nand/nand_base.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index a2d06be..3d84659 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c @@ -1973,7 +1973,7 @@ static int nand_do_write_ops(struct mtd_info *mtd, loff_t to, uint8_t *wbuf = buf; /* Partial page write ? */ - if (unlikely(column || writelen < (mtd->writesize - 1))) { + if (unlikely(column || writelen < mtd->writesize)) { cached = 0; bytes = min_t(int, bytes - column, (int) writelen); chip->pagebuf = -1; -- 1.7.9.5

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[U-Boot] [PATCH] nand: adjust erase/read/write partition/chip size for bad blocks
by Harvey Chapman 22 May '13

22 May '13

Adjust the sizes calculated for whole partition/chip operations by removing the size of bad blocks so we don't try to erase/read/write past a partition/chip boundary. Signed-off-by: Harvey Chapman <hchapman(a)3gfp.com> --- common/cmd_nand.c | 51 +++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 51 insertions(+) diff --git a/common/cmd_nand.c b/common/cmd_nand.c index 495610c..657ea23 100644 --- a/common/cmd_nand.c +++ b/common/cmd_nand.c @@ -428,6 +428,32 @@ static int raw_access(nand_info_t *nand, ulong addr, loff_t off, ulong count, return ret; } +static int adjust_size_for_badblocks(loff_t *size, loff_t offset, int dev) { + /* We grab the nand info object here fresh because this is usually + * called after arg_off_size() which can change the value of dev. + */ + nand_info_t *nand = &nand_info[dev]; + loff_t original_size = *size; + loff_t maxoffset = offset + *size; + int badblocks = 0; + + /* count badblocks in NAND from offset to offset + size */ + for (; offset < maxoffset; offset += nand->erasesize) + if (nand_block_isbad(nand, offset)) { + badblocks++; + } + /* adjust size if any bad blocks found */ + if (badblocks) { + *size -= badblocks * nand->erasesize; + printf("size adjusted to 0x%llx (%d bad blocks)\n", + (unsigned long long)*size, badblocks); + } + /* return size adjusted as a positive value so callers + * can use the return code to determine if anything happened + */ + return (original_size - *size); +} + static int do_nand(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { int i, ret = 0; @@ -524,6 +550,7 @@ static int do_nand(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) int scrub = !strncmp(cmd, "scrub", 5); int spread = 0; int args = 2; + int adjust_size = 0; const char *scrub_warn = "Warning: " "scrub option will erase all factory set bad blocks!\n" @@ -540,8 +567,10 @@ static int do_nand(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) spread = 1; } else if (!strcmp(&cmd[5], ".part")) { args = 1; + adjust_size = 1; } else if (!strcmp(&cmd[5], ".chip")) { args = 0; + adjust_size = 1; } else { goto usage; } @@ -560,6 +589,15 @@ static int do_nand(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) if (arg_off_size(argc - o, argv + o, &dev, &off, &size) != 0) return 1; + /* The size for erase.part and erase.chip has been calculated + * for us as the remainder of the chip/partition from offset. + * Adjust down for bad blocks, if necessary, so we don't + * erase past the end of the chip/partition by accident. + */ + if (adjust_size && !scrub) { + adjust_size_for_badblocks(&size, off, dev); + } + nand = &nand_info[dev]; memset(&opts, 0, sizeof(opts)); @@ -644,6 +682,19 @@ static int do_nand(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) &off, &size) != 0) return 1; + /* If no size was given, it has been calculated for us as + * the remainder of the chip/partition from offset. Adjust + * down for bad blocks, if necessary, so we don't + * read/write past the end of the partition by accident. + * + * nand read addr part size "size" is arg 5 + */ + if (argc < 5) { + /* Don't try to use rwsize here, it's not the + * right type + */ + adjust_size_for_badblocks(&size, off, dev); + } rwsize = size; } -- 1.7.10.4

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[U-Boot] [PATCH] nand/fsl_elbc: detect page size at runtime
by Scott Wood 22 May '13

22 May '13

This avoids needing a separate U-Boot config when some revisions of a board have small-page NAND and other revisions have large-page NAND (except for NAND SPL targets). CONFIG_FSL_ELBC_FMR is removed -- it was never used nor documented, and it gets in the way of this change. Signed-off-by: Scott Wood <scottwood(a)freescale.com> --- drivers/mtd/nand/fsl_elbc_nand.c | 39 +++++++++++++++++++++----------------- 1 file changed, 22 insertions(+), 17 deletions(-) diff --git a/drivers/mtd/nand/fsl_elbc_nand.c b/drivers/mtd/nand/fsl_elbc_nand.c index 834a8a6..fb34d12 100644 --- a/drivers/mtd/nand/fsl_elbc_nand.c +++ b/drivers/mtd/nand/fsl_elbc_nand.c @@ -756,20 +756,8 @@ static int fsl_elbc_chip_init(int devnum, u8 *addr) nand->ecc.read_page = fsl_elbc_read_page; nand->ecc.write_page = fsl_elbc_write_page; -#ifdef CONFIG_FSL_ELBC_FMR - priv->fmr = CONFIG_FSL_ELBC_FMR; -#else priv->fmr = (15 << FMR_CWTO_SHIFT) | (2 << FMR_AL_SHIFT); - /* - * Hardware expects small page has ECCM0, large page has ECCM1 - * when booting from NAND. Board config can override if not - * booting from NAND. - */ - if (or & OR_FCM_PGS) - priv->fmr |= FMR_ECCM; -#endif - /* If CS Base Register selects full hardware ECC then use it */ if ((br & BR_DECC) == BR_DECC_CHK_GEN) { nand->ecc.mode = NAND_ECC_HW; @@ -786,11 +774,26 @@ static int fsl_elbc_chip_init(int devnum, u8 *addr) nand->ecc.mode = NAND_ECC_SOFT; } + ret = nand_scan_ident(mtd, 1, NULL); + if (ret) + return ret; + /* Large-page-specific setup */ - if (or & OR_FCM_PGS) { + if (mtd->writesize == 2048) { + setbits_be32(&elbc_ctrl->regs->bank[priv->bank].or, + OR_FCM_PGS); + in_be32(&elbc_ctrl->regs->bank[priv->bank].or); + priv->page_size = 1; nand->badblock_pattern = &largepage_memorybased; + /* + * Hardware expects small page has ECCM0, large page has + * ECCM1 when booting from NAND, and we follow that even + * when not booting from NAND. + */ + priv->fmr |= FMR_ECCM; + /* adjust ecc setup if needed */ if ((br & BR_DECC) == BR_DECC_CHK_GEN) { nand->ecc.steps = 4; @@ -798,12 +801,14 @@ static int fsl_elbc_chip_init(int devnum, u8 *addr) &fsl_elbc_oob_lp_eccm1 : &fsl_elbc_oob_lp_eccm0; } + } else if (mtd->writesize == 512) { + clrbits_be32(&elbc_ctrl->regs->bank[priv->bank].or, + OR_FCM_PGS); + in_be32(&elbc_ctrl->regs->bank[priv->bank].or); + } else { + return -ENODEV; } - ret = nand_scan_ident(mtd, 1, NULL); - if (ret) - return ret; - ret = nand_scan_tail(mtd); if (ret) return ret; -- 1.7.9.5

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[U-Boot] [PATCH] ARM: cfi_flash: Fix unaligned accesses to cfi_qry structure
by Andrew Gabbasov 22 May '13

22 May '13

Packed structure cfi_qry contains unaligned 16- and 32-bits members, accessing which causes problems when cfi_flash driver is compiled with -munaligned-access option: flash initialization hangs, probably due to data error. This fix converts 16- and 32-bit members to byte arrays and uses special macros to access such fields. It removes possible unaligned accesses in cfi_flash driver. Signed-off-by: Andrew Gabbasov <andrew_gabbasov(a)mentor.com> --- drivers/mtd/cfi_flash.c | 23 +++++++++++++---------- include/mtd/cfi_flash.h | 18 +++++++++++------- 2 files changed, 24 insertions(+), 17 deletions(-) diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c index 60dbb78..2112ffc 100644 --- a/drivers/mtd/cfi_flash.c +++ b/drivers/mtd/cfi_flash.c @@ -1636,13 +1636,16 @@ void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset, */ static void cfi_reverse_geometry(struct cfi_qry *qry) { - unsigned int i, j; - u32 tmp; + unsigned int i, j, k; + u8 tmp; for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) { - tmp = qry->erase_region_info[i]; - qry->erase_region_info[i] = qry->erase_region_info[j]; - qry->erase_region_info[j] = tmp; + for (k = 0; k < 4; k++) { + tmp = qry->erase_region_info[k][i]; + qry->erase_region_info[k][i] = + qry->erase_region_info[k][j]; + qry->erase_region_info[k][j] = tmp; + } } } @@ -1891,7 +1894,7 @@ static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry) && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) { flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP, sizeof(struct cfi_qry)); - info->interface = le16_to_cpu(qry->interface_desc); + info->interface = cfiqry_get16(qry->interface_desc); info->cfi_offset = flash_offset_cfi[cfi_offset]; debug ("device interface is %d\n", @@ -2053,8 +2056,8 @@ ulong flash_get_size (phys_addr_t base, int banknum) info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE); if (flash_detect_cfi (info, &qry)) { - info->vendor = le16_to_cpu(qry.p_id); - info->ext_addr = le16_to_cpu(qry.p_adr); + info->vendor = cfiqry_get16(qry.p_id); + info->ext_addr = cfiqry_get16(qry.p_adr); num_erase_regions = qry.num_erase_regions; if (info->ext_addr) { @@ -2140,7 +2143,7 @@ ulong flash_get_size (phys_addr_t base, int banknum) break; } - tmp = le32_to_cpu(qry.erase_region_info[i]); + tmp = cfiqry_get32(qry.erase_region_info[i]); debug("erase region %u: 0x%08lx\n", i, tmp); erase_region_count = (tmp & 0xffff) + 1; @@ -2213,7 +2216,7 @@ ulong flash_get_size (phys_addr_t base, int banknum) } info->sector_count = sect_cnt; - info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size); + info->buffer_size = 1 << cfiqry_get16(qry.max_buf_write_size); tmp = 1 << qry.block_erase_timeout_typ; info->erase_blk_tout = tmp * (1 << qry.block_erase_timeout_max); diff --git a/include/mtd/cfi_flash.h b/include/mtd/cfi_flash.h index 966b5e0..30d6896 100644 --- a/include/mtd/cfi_flash.h +++ b/include/mtd/cfi_flash.h @@ -131,10 +131,10 @@ typedef union { /* CFI standard query structure */ struct cfi_qry { u8 qry[3]; - u16 p_id; - u16 p_adr; - u16 a_id; - u16 a_adr; + u8 p_id[2]; + u8 p_adr[2]; + u8 a_id[2]; + u8 a_adr[2]; u8 vcc_min; u8 vcc_max; u8 vpp_min; @@ -148,10 +148,10 @@ struct cfi_qry { u8 block_erase_timeout_max; u8 chip_erase_timeout_max; u8 dev_size; - u16 interface_desc; - u16 max_buf_write_size; + u8 interface_desc[2]; + u8 max_buf_write_size[2]; u8 num_erase_regions; - u32 erase_region_info[NUM_ERASE_REGIONS]; + u8 erase_region_info[4][NUM_ERASE_REGIONS]; } __attribute__((packed)); struct cfi_pri_hdr { @@ -160,6 +160,10 @@ struct cfi_pri_hdr { u8 minor_version; } __attribute__((packed)); +#define cfiqry_get16(mp) ((u16)((mp)[0]) | ((u16)((mp)[1]) << 8)) +#define cfiqry_get32(mp) ((u32)((mp)[0]) | ((u32)((mp)[1]) << 8) | \ + ((u32)((mp)[2]) << 16) | ((u32)((mp)[3]) << 24)) + #ifndef CONFIG_SYS_FLASH_BANKS_LIST #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } #endif -- 1.7.10.4

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[U-Boot] [PATCH] fdt_support: Use CONFIG_NR_DRAM_BANKS if defined
by Doug Anderson 22 May '13

22 May '13

It appears that there are some cases where we have more than 4 banks of memory. Use CONFIG_NR_DRAM_BANKS if it's defined to handle this. This will take up a little extra stack space (64 bytes extra if we go up to 8 banks), but that seems OK. Signed-off-by: Doug Anderson <dianders(a)chromium.org> --- Note: nothing in-tree has 8 banks defined yet, but some configs have it defined that are not in tree yet. common/fdt_support.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/common/fdt_support.c b/common/fdt_support.c index 812acb4..416100e 100644 --- a/common/fdt_support.c +++ b/common/fdt_support.c @@ -387,7 +387,11 @@ static void write_cell(u8 *addr, u64 val, int size) } } +#ifdef CONFIG_NR_DRAM_BANKS +#define MEMORY_BANKS_MAX CONFIG_NR_DRAM_BANKS +#else #define MEMORY_BANKS_MAX 4 +#endif int fdt_fixup_memory_banks(void *blob, u64 start[], u64 size[], int banks) { int err, nodeoffset; -- 1.8.2.1

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[U-Boot] [PATCH 0/4] Fix fixup_silent_linux() buffer overrun
by Doug Anderson 22 May '13

22 May '13

This set of patches together fixes a buffer overrun in the fixup_silent_linux() function when we've got a long linux command line. It also adds the removal of "earlyprintk" when we are silencing the linux console. One thing you will notice is that some of these changes have unit tests assocated with them. I wasn't sure exactly where these should live. If people would prefer them elsewhere (or simply removed), just let me know and I'll resubmit. Doug Anderson (4): cmdline: Add linux command line munging tools cosmetic: Fixup fixup_silent_linux() for checkpatch bootm: Avoid 256-byte overflow in fixup_silent_linux() bootm: Add earlyprintk to fixup_silent_linux common/Makefile | 1 + common/cmd_bootm.c | 136 +++++++++++++++++++---- common/cmdline.c | 318 ++++++++++++++++++++++++++++++++++++++++++++++++++++ include/cmdline.h | 30 +++++ 4 files changed, 465 insertions(+), 20 deletions(-) create mode 100644 common/cmdline.c create mode 100644 include/cmdline.h -- 1.7.3.1

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[U-Boot] [PATCH v4 0/7] Add gdsys ControlCenter Digital board
by Dirk Eibach 22 May '13

22 May '13

Changes in v4: - consider CONFIG_CMD_BOOTM for all architectures Changes in v3: - fix email addresses Changes in v2: - configuration for SPI builds was missing - replace some numeric constants with named constants - style fixes (as shown by checkpatch.pl) in common/cmd_tpm.c and lib/tpm.c - whitespace fixes Dirk Eibach (5): Update gdsys email account mpc85xx: Add CONFIG_RELEASE_CORE0_ONLY Add Atmel I2C tpm Build arch/$ARCH/lib/bootm.o depending on CONFIG_CMD_BOOTM mpc85xx: Add gdsys ControlCenter Digital board Reinhard Pfau (2): tpm: add AUTH1 cmds for LoadKey2 and GetPubKey i2c: fsl_i2c: i2c_read(): dont try to write address w/ alen=0 MAINTAINERS | 2 +- README | 20 + arch/arm/lib/Makefile | 2 +- arch/avr32/lib/Makefile | 2 +- arch/m68k/lib/Makefile | 2 +- arch/microblaze/lib/Makefile | 2 +- arch/mips/lib/Makefile | 4 +- arch/nds32/lib/Makefile | 3 +- arch/nios2/lib/Makefile | 2 +- arch/openrisc/lib/Makefile | 2 +- arch/powerpc/cpu/mpc85xx/mp.c | 8 +- arch/powerpc/cpu/ppc4xx/cmd_chip_config.c | 2 +- arch/powerpc/include/asm/ppc4xx_config.h | 2 +- arch/powerpc/lib/Makefile | 2 +- arch/sh/lib/Makefile | 2 +- arch/sparc/lib/Makefile | 3 +- arch/x86/lib/Makefile | 2 +- board/gdsys/405ep/405ep.c | 2 +- board/gdsys/405ep/dlvision-10g.c | 2 +- board/gdsys/405ep/io.c | 2 +- board/gdsys/405ep/iocon.c | 2 +- board/gdsys/405ep/neo.c | 2 +- board/gdsys/405ex/io64.c | 2 +- board/gdsys/common/Makefile | 1 + board/gdsys/common/dp501.c | 107 +++ board/gdsys/common/dp501.h | 30 + board/gdsys/common/miiphybb.c | 2 +- board/gdsys/common/osd.c | 2 +- board/gdsys/common/osd.h | 2 +- board/gdsys/dlvision/dlvision.c | 2 +- board/gdsys/gdppc440etx/gdppc440etx.c | 2 +- board/gdsys/gdppc440etx/init.S | 2 +- board/gdsys/intip/init.S | 2 +- board/gdsys/intip/intip.c | 2 +- board/gdsys/p1022/Makefile | 37 + board/gdsys/p1022/controlcenterd-id.c | 1205 +++++++++++++++++++++++++++++ board/gdsys/p1022/controlcenterd-id.h | 29 + board/gdsys/p1022/controlcenterd.c | 447 +++++++++++ board/gdsys/p1022/ddr.c | 71 ++ board/gdsys/p1022/diu.c | 87 +++ board/gdsys/p1022/law.c | 20 + board/gdsys/p1022/sdhc_boot.c | 63 ++ board/gdsys/p1022/tlb.c | 77 ++ boards.cfg | 7 + common/cmd_tpm.c | 100 +++ drivers/gpio/pca9698.c | 2 +- drivers/hwmon/lm63.c | 2 +- drivers/i2c/fsl_i2c.c | 9 +- drivers/tpm/Makefile | 1 + drivers/tpm/atmel_twi_tpm.c | 119 +++ include/configs/controlcenterd.h | 525 +++++++++++++ include/configs/dlvision-10g.h | 2 +- include/configs/dlvision.h | 2 +- include/configs/gdppc440etx.h | 2 +- include/configs/intip.h | 2 +- include/configs/io.h | 2 +- include/configs/io64.h | 2 +- include/configs/iocon.h | 2 +- include/configs/neo.h | 2 +- include/gdsys_fpga.h | 2 +- include/pca9698.h | 2 +- include/tpm.h | 174 +++++ lib/tpm.c | 351 +++++++++- 63 files changed, 3526 insertions(+), 48 deletions(-) create mode 100644 board/gdsys/common/dp501.c create mode 100644 board/gdsys/common/dp501.h create mode 100644 board/gdsys/p1022/Makefile create mode 100644 board/gdsys/p1022/controlcenterd-id.c create mode 100644 board/gdsys/p1022/controlcenterd-id.h create mode 100644 board/gdsys/p1022/controlcenterd.c create mode 100644 board/gdsys/p1022/ddr.c create mode 100644 board/gdsys/p1022/diu.c create mode 100644 board/gdsys/p1022/law.c create mode 100644 board/gdsys/p1022/sdhc_boot.c create mode 100644 board/gdsys/p1022/tlb.c create mode 100644 drivers/tpm/atmel_twi_tpm.c create mode 100644 include/configs/controlcenterd.h -- 1.7.2.5

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[U-Boot] [PATCH] cmd_boot: cleanup for 'go' command
by Kuo-Jung Su 22 May '13

22 May '13

From: Kuo-Jung Su <dantesu(a)faraday-tech.com> With MMU/D-Cache enabled, data might be retained at cache rather than at DRAM when we execute 'go' command, and some of the bare-metal softwares would always invalidate the entire data cache at start-up, and causes data lost issue. This patch is designed to fixed this issue. It has been verified at ARM based systems, and should also work at other platforms. Signed-off-by: Kuo-Jung Su <dantesu(a)faraday-tech.com> --- common/cmd_boot.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/common/cmd_boot.c b/common/cmd_boot.c index d3836fd..1a1a532 100644 --- a/common/cmd_boot.c +++ b/common/cmd_boot.c @@ -50,6 +50,16 @@ static int do_go(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) printf ("## Starting application at 0x%08lX ...\n", addr); +#ifdef CONFIG_USE_IRQ + disable_interrupts(); +#endif +#ifndef CONFIG_SYS_DCACHE_OFF + flush_dcache_all(); +#endif +#ifndef CONFIG_SYS_ICACHE_OFF + invalidate_icache_all(); +#endif + /* * pass address parameter as argv[0] (aka command name), * and all remaining args -- 1.7.9.5

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[U-Boot] Questions about U-boot of customized MPC8315E board
by du zhenhuan 22 May '13

22 May '13

Hello, I'm a newbie using U-boot and met several problems with a customized board based on MPC8315E-RDB board. On the new board, I have changed the Ethernet PHY to TI's DP83848 and NAND FLASH to 64Mbit (from old 32Mbit). During U-boot form NOR FLASH , I met two problems : 1, if NAND flash support is enabled, U-boot just print out "NAND : " without size info and then print out text like "machine check ...,", then print out "resetting board ..." So the board keep resetting again and again. Does this have anything to do with NAND FLASH size change or NAND PART types? 2.if NAND flash support is disabled, U-boot just go to Ethernet PHY initialization part and print out that DP83848 is not supported , Where can I put new driver to support it? 3.How can I watch more ouput infomation during U-boot boot process to debug these problems ? Thanks.

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[U-Boot] [PATCH 0/2] SPI: Enable SPI_PREAMBLE Mode
by Rajeshwari Shinde 21 May '13

21 May '13

This patch set enables PREAMBLE Mode for EXYNOS SPI. Rajeshwari Shinde (2): SPI: Add support for preamble bytes EXYNOS: SPI: Support SPI_PREAMBLE mode drivers/spi/exynos_spi.c | 62 ++++++++++++++++++++++++++++++++++++++++------ include/spi.h | 5 +++ 2 files changed, 59 insertions(+), 8 deletions(-) -- 1.7.4.4

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