April 2013 - U-Boot

[U-Boot] [Patch v2, batch 2 01/23] powerpc/B4860: Corrected FMAN1 operating frequency print at u-boot
by York Sun 14 May '13

14 May '13

From: Sandeep Singh <sandeep(a)freescale.com> The bit positions for FMAN1 freq in RCW is different for B4860. Also addded a case when FMAN1 frewuency is equal to systembus. Signed-off-by: Sandeep Singh <Sandeep(a)freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal(a)freescale.com> --- arch/powerpc/cpu/mpc85xx/speed.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c index 297f2ed..9fc7b54 100644 --- a/arch/powerpc/cpu/mpc85xx/speed.c +++ b/arch/powerpc/cpu/mpc85xx/speed.c @@ -132,10 +132,15 @@ void get_sys_info (sys_info_t * sysInfo) sysInfo->freqProcessor[cpu] = freqCC_PLL[cplx_pll] / core_cplx_PLL_div[c_pll_sel]; } +#ifdef CONFIG_PPC_B4860 +#define FM1_CLK_SEL 0xe0000000 +#define FM1_CLK_SHIFT 29 +#else #define PME_CLK_SEL 0xe0000000 #define PME_CLK_SHIFT 29 #define FM1_CLK_SEL 0x1c000000 #define FM1_CLK_SHIFT 26 +#endif rcw_tmp = in_be32(&gur->rcwsr[7]); #ifdef CONFIG_SYS_DPAA_PME @@ -185,6 +190,9 @@ void get_sys_info (sys_info_t * sysInfo) case 4: sysInfo->freqFMan[0] = freqCC_PLL[3] / 4; break; + case 5: + sysInfo->freqFMan[0] = sysInfo->freqSystemBus; + break; case 6: sysInfo->freqFMan[0] = freqCC_PLL[4] / 2; break; -- 1.7.9.5

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[U-Boot] [RFC PATCH 0/15] RFC: Add tracing functionality to U-Boot
by Simon Glass 14 May '13

14 May '13

This series adds a tracing feature to U-Boot which is useful for profiling boot time and other purposes. The core trace library relies on standard gcc function instrumentation and a microsecond timer which should work correctly on almost any architecture. Generic board is used to avoid the need to add the same code in multiple places (CONFIG_SYS_GENERIC_BOARD). Tracing must be built into the U-Boot image at build time, but can be paused and resumed while running. A trace buffer is used to collect trace information. This buffer can then be transmitted to a host for processing. A host-based processing tool is provided which converts the data to the same format used by Linux, and that can be read by the pytimechart GUI tool. A U-Boot 'trace' command provides access to the trace information, including support for writing it to memory in a few forms. Support is provided for stopping tracing at the last possible moment in the bootm process (just before U-Boot jumps to the OS). This is done with a new 'fake go' command, which allows bootm to go through the motions of an OS boot without actually committing to it. Once the 'fake go' is complete, U-Boot can stop tracing and continue execution to transmit the trace information to the host, before jumping to the OS for real. The system is tested on sandbox and has previously worked on ARM Tegra and Exynos machines. A simple test script is provided for sandbox, along with documentation on how to use the feature. This feature has been successfully used alongside bootstage to locate bottlenecks and reduce overall boot time. Because of the bootm changes this series sits on top of the image improvements that were done for verified boot. This series is available at: http://git.denx.de/u-boot-x86.git in branch 'trace'. Simon Glass (15): bootstage; Correct printf types Add function to print a number with grouped digits Add trace library Add a trace command Support tracing in config.mk when enabled Add trace support to generic board Add proftool to decode profile data sandbox: Support trace feature Add a simple test for sandbox trace Clarify bootm OS arguments Refactor the bootm command to reduce code duplication Add a 'fake' go command to the bootm command arm: Implement the 'fake' go command Show stdout on error in fit-test exynos: Avoid function instrumentation for microsecond timer Makefile | 3 +- arch/arm/cpu/armv7/s5p-common/timer.c | 2 +- arch/arm/include/asm/arch-exynos/cpu.h | 10 +- arch/arm/lib/bootm.c | 33 +- arch/microblaze/lib/bootm.c | 4 +- arch/nios2/lib/bootm.c | 4 +- arch/openrisc/lib/bootm.c | 4 +- arch/sandbox/cpu/cpu.c | 2 +- arch/sandbox/cpu/os.c | 2 +- common/Makefile | 1 + common/board_f.c | 15 + common/board_r.c | 11 + common/bootstage.c | 26 +- common/cmd_bootm.c | 517 ++++++++++++++-------------- common/cmd_trace.c | 133 +++++++ common/image-fdt.c | 13 +- common/image.c | 22 +- config.mk | 11 +- doc/README.trace | 361 +++++++++++++++++++ include/asm-generic/global_data.h | 3 + include/common.h | 4 + include/configs/sandbox.h | 13 + include/image.h | 17 +- include/trace.h | 125 +++++++ include/vsprintf.h | 11 + lib/Makefile | 1 + lib/trace.c | 378 ++++++++++++++++++++ lib/vsprintf.c | 16 + test/image/test-fit.py | 19 +- test/trace/test-trace.sh | 88 +++++ tools/.gitignore | 1 + tools/Makefile | 6 + tools/proftool.c | 611 +++++++++++++++++++++++++++++++++ 33 files changed, 2133 insertions(+), 334 deletions(-) create mode 100644 common/cmd_trace.c create mode 100644 doc/README.trace create mode 100644 include/trace.h create mode 100644 lib/trace.c create mode 100755 test/trace/test-trace.sh create mode 100644 tools/proftool.c -- 1.8.2.1

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[U-Boot] [PATCH 0/19] Remove unused code, add accurate timier and bootstage
by Simon Glass 13 May '13

13 May '13

This series removes unused x86 code based on advice from Graeme Russ. THis code was used for real mode which is no longer needed in U-Boot. A new more accurate timer is added, and this permits bootstage to be enabled and produce useful results on x86. Doug Anderson (2): bootstage: Copy bootstage strings post-relocation Call bootstage_relocate() after malloc is initted Simon Glass (17): x86: Remove unused bios/pci code x86: Remove unused portion of link script x86: Remove legacy board init code x86: Declare global_data pointer when it is used x86: Implement panic output for coreboot x86: Rationalise kernel booting logic and bootstage x86: Add TSC timer x86: Remove old broken timer implementation x86: Remove ISR timer x86: Re-enable PCAT timer 2 for beeping bootstage: Add stubs for new bootstage functions x86: Enable bootstage for coreboot bootstage: Allow marking a particular line of code x86: Fix warning in cmd_ximg.c when CONFIG_GZIP is not defined x86: config: Enable LZO for coreboot, remove zlib, gzip x86: Support adding coreboot timestanps to bootstage x86: Add coreboot timestamps arch/x86/cpu/Makefile | 2 +- arch/x86/cpu/coreboot/coreboot.c | 13 ++ arch/x86/cpu/coreboot/timestamp.c | 42 +++- arch/x86/cpu/cpu.c | 5 + arch/x86/cpu/interrupts.c | 2 + arch/x86/cpu/timer.c | 17 -- arch/x86/cpu/u-boot.lds | 12 -- arch/x86/include/asm/arch-coreboot/timestamp.h | 7 + arch/x86/include/asm/init_helpers.h | 9 - arch/x86/include/asm/init_wrappers.h | 42 ---- arch/x86/include/asm/pci.h | 4 - arch/x86/include/asm/u-boot-x86.h | 4 + arch/x86/include/asm/u-boot.h | 32 --- arch/x86/lib/Makefile | 10 +- arch/x86/lib/bios.h | 170 --------------- arch/x86/lib/board.c | 273 ------------------------- arch/x86/lib/bootm.c | 8 - arch/x86/lib/cmd_boot.c | 2 + arch/x86/lib/init_helpers.c | 98 --------- arch/x86/lib/init_wrappers.c | 164 --------------- arch/x86/lib/pcat_timer.c | 69 +------ arch/x86/lib/pci.c | 188 ----------------- arch/x86/lib/physmem.c | 2 + arch/x86/lib/relocate.c | 2 + arch/x86/lib/timer.c | 116 ----------- arch/x86/lib/tsc_timer.c | 107 ++++++++++ arch/x86/lib/zimage.c | 11 +- common/board_r.c | 1 + common/bootstage.c | 44 ++++ common/cmd_ximg.c | 2 + include/bootstage.h | 54 +++++ include/configs/coreboot.h | 18 +- 32 files changed, 314 insertions(+), 1216 deletions(-) delete mode 100644 arch/x86/cpu/timer.c delete mode 100644 arch/x86/include/asm/init_wrappers.h delete mode 100644 arch/x86/lib/bios.h delete mode 100644 arch/x86/lib/board.c delete mode 100644 arch/x86/lib/init_wrappers.c delete mode 100644 arch/x86/lib/pci.c delete mode 100644 arch/x86/lib/timer.c create mode 100644 arch/x86/lib/tsc_timer.c -- 1.8.2.1

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[U-Boot] [PATCH v1 1/2] blackfin: bf609: implement soft switch
by Sonic Zhang 13 May '13

13 May '13

From: Sonic Zhang <sonic.zhang(a)analog.com> Set up soft switch pins properly in board init code. Signed-off-by: Sonic Zhang <sonic.zhang(a)analog.com> Signed-off-by: Scott Jiang <scott.jiang(a)analog.com> Signed-off-by: Bob Liu <lliubbo(a)gmail.com> --- board/bf609-ezkit/soft_switch.c | 180 +++++++++++++++++++++++++++++++++++++++ board/bf609-ezkit/soft_switch.h | 71 +++++++++++++++ 2 files changed, 251 insertions(+), 0 deletions(-) create mode 100644 board/bf609-ezkit/soft_switch.c create mode 100644 board/bf609-ezkit/soft_switch.h diff --git a/board/bf609-ezkit/soft_switch.c b/board/bf609-ezkit/soft_switch.c new file mode 100644 index 0000000..2e1404f --- /dev/null +++ b/board/bf609-ezkit/soft_switch.c @@ -0,0 +1,180 @@ +/* + * U-boot - main board file + * + * Copyright (c) 2008-2011 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + */ + +#include <common.h> +#include <asm/blackfin.h> +#include <asm/io.h> +#include <i2c.h> +#include "soft_switch.h" + +#define SWITCH_ADDR 0x21 + +#define NUM_SWITCH 3 +#define IODIRA 0x0 +#define IODIRB 0x1 +#define OLATA 0x14 +#define OLATB 0x15 + +struct switch_config { + uchar dir0; /* IODIRA */ + uchar dir1; /* IODIRB */ + uchar value0; /* OLATA */ + uchar value1; /* OLATB */ +}; + +static struct switch_config switch_config_array[NUM_SWITCH] = { + { +/* + U45 Port A U45 Port B + + 7--------------- RMII_CLK_EN | 7--------------- ~TEMP_THERM_EN + | 6------------- ~CNT0ZM_EN | | 6------------- ~TEMP_IRQ_EN + | | 5----------- ~CNT0DG_EN | | | 5----------- ~UART0CTS_146_EN + | | | 4--------- ~CNT0UD_EN | | | | 4--------- ~UART0CTS_RST_EN + | | | | 3------- ~CAN0RX_EN | | | | | 3------- ~UART0CTS_RTS_LPBK + | | | | | 2----- ~CAN0_ERR_EN | | | | | | 2----- ~UART0CTS_EN + | | | | | | 1--- ~CAN_STB | | | | | | | 1--- ~UART0RX_EN + | | | | | | | 0- CAN_EN | | | | | | | | 0- ~UART0RTS_EN + | | | | | | | | | | | | | | | | | + O O O O O O O O | O O O O O O O O (I/O direction) + 1 0 0 0 0 0 1 1 | 1 1 1 1 1 0 0 0 (value being set) +*/ + .dir0 = 0x0, /* all output */ + .dir1 = 0x0, /* all output */ + .value0 = RMII_CLK_EN | CAN_STB | CAN_EN, + .value1 = TEMP_THERM_EN | TEMP_IRQ_EN | UART0CTS_146_EN + | UART0CTS_RST_EN | UART0CTS_RTS_LPBK, + }, + { +/* + U46 Port A U46 Port B + + 7--------------- ~LED4_GPIO_EN | 7--------------- EMPTY + | 6------------- ~LED3_GPIO_EN | | 6------------- ~SPI0D3_EN + | | 5----------- ~LED2_GPIO_EN | | | 5----------- ~SPI0D2_EN + | | | 4--------- ~LED1_GPIO_EN | | | | 4--------- ~SPIFLASH_CS_EN + | | | | 3------- SMC0_LP0_EN | | | | | 3------- ~SD_WP_EN + | | | | | 2----- EMPTY | | | | | | 2----- ~SD_CD_EN + | | | | | | 1--- SMC0_EPPI2 | | | | | | | 1--- ~PUSHBUTTON2_EN + _LP1_SWITCH + | | | | | | | 0- OVERRIDE_SMC0 | | | | | | | | 0- ~PUSHBUTTON1_EN + _LP0_BOOT + | | | | | | | | | | | | | | | | | + O O O O O O O O | O O O O O O O O (I/O direction) + 0 0 0 0 0 X 0 1 | X 0 0 0 0 0 0 0 (value being set) +*/ + .dir0 = 0x0, /* all output */ + .dir1 = 0x0, /* all output */ +#ifdef CONFIG_BFIN_LINKPORT + .value0 = OVERRIDE_SMC0_LP0_BOOT, +#else + .value0 = SMC0_EPPI2_LP1_SWITCH, +#endif + .value1 = 0x0, + }, + { +/* + U47 Port A U47 Port B + + 7--------------- ~PD2_SPI0MISO | 7--------------- EMPTY + _EI3_EN + | 6------------- ~PD1_SPI0D3 | | 6------------- EMPTY + _EPPI1D17 + _SPI0SEL2 + _EI3_EN + | | 5----------- ~PD0_SPI0D2 | | | 5----------- EMPTY + _EPPI1D16 + _SPI0SEL3 + _EI3_EN + | | | 4--------- ~WAKE_PUSH | | | | 4--------- EMPTY + BUTTON_EN + | | | | 3------- ~ETHERNET_EN | | | | | 3------- EMPTY + | | | | | 2----- PHYAD0 | | | | | | 2----- EMPTY + | | | | | | 1--- PHY_PWR | | | | | | | 1--- ~PD4_SPI0CK_EI3_EN + _DWN_INT + | | | | | | | 0- ~PHYINT_EN | | | | | | | | 0- ~PD3_SPI0MOSI_EI3_EN + | | | | | | | | | | | | | | | | | + O O O O O I I O | O O O O O O O O (I/O direction) + 1 1 1 0 0 0 0 0 | X X X X X X 1 1 (value being set) +*/ + .dir0 = 0x6, /* bits 1 and 2 input, all others output */ + .dir1 = 0x0, /* all output */ + .value0 = PD1_SPI0D3_EN | PD0_SPI0D2_EN, + .value1 = 0, + }, +}; + +static int setup_soft_switch(int addr, struct switch_config *config) +{ + int ret = 0; + + ret = i2c_write(addr, OLATA, 1, &config->value0, 1); + if (ret) + return ret; + ret = i2c_write(addr, OLATB, 1, &config->value1, 1); + if (ret) + return ret; + + ret = i2c_write(addr, IODIRA, 1, &config->dir0, 1); + if (ret) + return ret; + return i2c_write(addr, IODIRB, 1, &config->dir1, 1); +} + +int config_switch_bit(int num, int port, int bit, int dir, uchar value) +{ + int addr = SWITCH_ADDR + num; + int ret, data_reg, dir_reg; + uchar tmp; + + if (port == IO_PORT_A) { + data_reg = OLATA; + dir_reg = IODIRA; + } else { + data_reg = OLATB; + dir_reg = IODIRB; + } + + if (dir == IO_PORT_INPUT) { + ret = i2c_read(addr, dir_reg, 1, &tmp, 1); + if (ret) + return ret; + tmp |= bit; + return i2c_write(addr, dir_reg, 1, &tmp, 1); + } else { + ret = i2c_read(addr, data_reg, 1, &tmp, 1); + if (ret) + return ret; + if (value) + tmp |= bit; + else + tmp &= ~bit; + ret = i2c_write(addr, data_reg, 1, &tmp, 1); + if (ret) + return ret; + ret = i2c_read(addr, dir_reg, 1, &tmp, 1); + if (ret) + return ret; + tmp &= ~bit; + return i2c_write(addr, dir_reg, 1, &tmp, 1); + } +} + +int setup_board_switches(void) +{ + int ret; + int i; + + for (i = 0; i < NUM_SWITCH; i++) { + ret = setup_soft_switch(SWITCH_ADDR + i, + &switch_config_array[i]); + if (ret) + return ret; + } + return 0; +} diff --git a/board/bf609-ezkit/soft_switch.h b/board/bf609-ezkit/soft_switch.h new file mode 100644 index 0000000..8da0e44 --- /dev/null +++ b/board/bf609-ezkit/soft_switch.h @@ -0,0 +1,71 @@ +/* + * U-boot - main board file + * + * Copyright (c) 2008-2011 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + */ + +#ifndef __SOFT_SWITCH_H__ +#define __SOFT_SWITCH_H__ + +/* switch 0 port A */ +#define CAN_EN 0x1 +#define CAN_STB 0x2 +#define CAN0_ERR_EN 0x4 +#define CAN0RX_EN 0x8 +#define CNT0UD_EN 0x10 +#define CNT0DG_EN 0x20 +#define CNT0ZM_EN 0x40 +#define RMII_CLK_EN 0x80 + +/* switch 0 port B */ +#define UART0RTS_EN 0x1 +#define UART0RX_EN 0x2 +#define UART0CTS_EN 0x4 +#define UART0CTS_RTS_LPBK 0x8 +#define UART0CTS_RST_EN 0x10 +#define UART0CTS_146_EN 0x20 +#define TEMP_IRQ_EN 0x40 +#define TEMP_THERM_EN 0x80 + +/* switch 1 port A */ +#define OVERRIDE_SMC0_LP0_BOOT 0x1 +#define SMC0_EPPI2_LP1_SWITCH 0x2 +#define SMC0_LP0_EN 0x8 +#define LED1_GPIO_EN 0x10 +#define LED2_GPIO_EN 0x20 +#define LED3_GPIO_EN 0x40 +#define LED4_GPIO_EN 0x80 + +/* switch 1 port B */ +#define PUSHBUTTON1_EN 0x1 +#define PUSHBUTTON2_EN 0x2 +#define SD_CD_EN 0x4 +#define SD_WP_EN 0x8 +#define SPIFLASH_CS_EN 0x10 +#define SPI0D2_EN 0x20 +#define SPI0D3_EN 0x40 + +/* switch 2 port A */ +#define PHYINT_EN 0x1 +#define PHY_PWR_DWN_INT 0x2 +#define PHYAD0 0x4 +#define ETHERNET_EN 0x8 +#define WAKE_PUSHBUTTON_EN 0x10 +#define PD0_SPI0D2_EN 0x20 +#define PD1_SPI0D3_EN 0x40 +#define PD2_SPI0MISO_EN 0x80 + +/* switch 2 port B */ +#define PD3_SPI0MOSI_EN 0x1 +#define PD4_SPI0CK_EN 0x2 + +#define IO_PORT_A 0 +#define IO_PORT_B 1 +#define IO_PORT_INPUT 0 +#define IO_PORT_OUTPUT 1 + +int config_switch_bit(int num, int port, int bit, int dir, uchar value); +int setup_board_switches(void); +#endif -- 1.7.0.4

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[U-Boot] [PATCH 0/2] EXYNOS: Support a delay after deactivate for SPI
by Rajeshwari Shinde 13 May '13

13 May '13

This patch set exports the function timer_get_us and adds a delay for devices that need some time to react after spi transation finishes This patch set is based on "Exynos: Add timer_get_us function" link: http://patchwork.ozlabs.org/patch/223566/ "EXYNOS: SPI: Support SPI_PREAMBLE mode" link: http://patchwork.ozlabs.org/patch/229891/ Rajeshwari Shinde (2): EXYNOS: Export timer_get_us() to get microsecond timer EXYNOS: SPI: Support a delay after deactivate drivers/spi/exynos_spi.c | 20 ++++++++++++++++++++ include/common.h | 8 ++++++++ 2 files changed, 28 insertions(+), 0 deletions(-) -- 1.7.4.4

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[U-Boot] [PATCH 0/4] Exynos5: Add cpu freq and tmu throttling
by Akshay Saraswat 13 May '13

13 May '13

This patch set adds cpu frequency scaling and tmu throttling for exynos5. Akshay Saraswat (4): pmic: max77686: add pmic_set_voltage api for max77686 Exynos5: cpufreq: Implement frequency scaling for exynos5 smdk5250: enable support for tmu throttling Exynos5: config: enable cpu freq arch/arm/include/asm/arch-exynos/cpufreq.h | 54 ++++++ board/samsung/smdk5250/smdk5250.c | 19 ++ drivers/power/Makefile | 1 + drivers/power/exynos-cpufreq.c | 282 +++++++++++++++++++++++++++++ drivers/power/pmic/pmic_max77686.c | 61 +++++++ include/configs/exynos5250-dt.h | 3 + include/power/max77686_pmic.h | 12 ++ include/power/pmic.h | 1 + 8 files changed, 433 insertions(+) create mode 100644 arch/arm/include/asm/arch-exynos/cpufreq.h create mode 100644 drivers/power/exynos-cpufreq.c -- 1.8.0

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[U-Boot] [PATCH 0/4 V4] SMDK5250: FDT: Add device tree support for console
by Rajeshwari Shinde 13 May '13

13 May '13

Enabled fdt support for default console on SMDK5250. Changes in V2: - Changed the compatible string to "samsung,exynos4210-uart" Changes in V3: - Rebased the patchset on latest u-boot-samsung branch. - Added a alias console as we will support one at any point of time. - Moved driver config structure to data section. - Changed silent_console to silent-console. - Did put a check for base address before doing fdt decoding. Changes in V4: - Rebased the patchset on latest u-boot-samsung branch. - Changed to COMPAT_SAMSUNG_EXYNOS5_SERIAL to COMPAT_SAMSUNG_EXYNOS_SERIAL Rajeshwari Shinde (4): EXYNOS5: FDT: Add compatible strings for Serial EXYNOS5: FDT: Add serial device node values S5P: Serial: Add fdt support to driver CONFIG: EXYNOS5: Enable silent console arch/arm/dts/exynos5250.dtsi | 28 ++++++++++ board/samsung/dts/exynos5250-smdk5250.dts | 2 + drivers/serial/serial_s5p.c | 78 +++++++++++++++++++++++++++++ include/configs/exynos5250-dt.h | 2 + include/fdtdec.h | 1 + lib/fdtdec.c | 1 + 6 files changed, 112 insertions(+), 0 deletions(-) -- 1.7.4.4

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[U-Boot] [PATCH v4 0/3] arm: atmel: add at91sam9n12ek board support
by Josh Wu 12 May '13

12 May '13

This patch series will add at91sam9n12ek board support. In the board, spi/nand flash, mmc, lcd are supported. TODO: - ethernet support - usb support. Change since v3: - drop the patch: at91: clock: remove chip macro for plla div2. Still use macro to add 9n12 in clock.c The reason is it will impact 9g20ek board. Since in 9g20, this PMC_MCKR bit 12 means Processor Clock Division. it is different from other boards. Thanks Shen Bo for finding this issue. To keep it consistent, I just drop this patch. Add a 9N12 macro for MCKR. - rebase on top of latest atmel master. Changes since v2: - re-arrange the patch series order. move 'at91: clock: remove chip macro for plla div2' ahead to 9n12 patches. - remove redudent blank line in the end of at91sam9n12_devices.c Changes since v1: - split into more patches to make it clearer. - include an extra patch that use run-time detect for spi ip. - include an extra patch to remove the chip select for clock part. - merge at91sam9n12 register definition with at91sam9x5. - fix copyright issue and add maintainer. - disable pull-up as possible as we can. - add mtdparts command. - fix warnings and typos. Bo Shen (1): spi: atmel_spi: using ip version to check whether has wdrbt Josh Wu (2): arm: at91: add at91sam9n12 register definition arm: at91: add at91sam9n12ek board support MAINTAINERS | 3 + arch/arm/cpu/arm926ejs/at91/Makefile | 1 + arch/arm/cpu/arm926ejs/at91/at91sam9n12_devices.c | 177 +++++++++++++++ arch/arm/cpu/arm926ejs/at91/clock.c | 4 +- arch/arm/include/asm/arch-at91/at91sam9_matrix.h | 2 +- arch/arm/include/asm/arch-at91/at91sam9x5.h | 19 +- arch/arm/include/asm/arch-at91/at91sam9x5_matrix.h | 17 +- arch/arm/include/asm/arch-at91/hardware.h | 2 +- board/atmel/at91sam9n12ek/Makefile | 52 +++++ board/atmel/at91sam9n12ek/at91sam9n12ek.c | 228 +++++++++++++++++++ boards.cfg | 3 + drivers/spi/atmel_spi.c | 15 +- drivers/spi/atmel_spi.h | 2 +- include/configs/at91sam9n12ek.h | 232 ++++++++++++++++++++ 14 files changed, 743 insertions(+), 14 deletions(-) create mode 100644 arch/arm/cpu/arm926ejs/at91/at91sam9n12_devices.c create mode 100644 board/atmel/at91sam9n12ek/Makefile create mode 100644 board/atmel/at91sam9n12ek/at91sam9n12ek.c create mode 100644 include/configs/at91sam9n12ek.h -- 1.7.9.5

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[U-Boot] [PATCH 1/1] TPM: STMicroelectronics u-boot driver I2C
by Mathias leblanc 11 May '13

11 May '13

From: admin01 <admin01(a)admin01-desktop.(none)> * STMicroelectronics version 1.2.0, Copyright (C) 2013 * STMicroelectronics comes with ABSOLUTELY NO WARRANTY. * This is free software, and you are welcome to redistribute it * under certain conditions. This is the driver for TPM chip from ST Microelectronics. If you have a TPM security chip from STMicroelectronics working with an I2C, read the README file and add the correct defines regarding the tpm in the configuration file of your board. This file is located in include/configs/your_board.h The driver will be accessible from within uboot terminal. Signed-off-by: Mathias leblanc <admin01(a)admin01-desktop.(none)> --- Makefile | 2 +- README | 12 + common/cmd_tpm.c | 176 ++++++++++++ drivers/tpm/Makefile | 1 + drivers/tpm/compatibility.h | 52 ++++ drivers/tpm/tis_i2c.c | 211 ++++++++++++++ drivers/tpm/tpm.c | 472 +++++++++++++++++++++++++++++++ drivers/tpm/tpm.h | 164 +++++++++++ drivers/tpm/tpm_i2c_st.c | 601 ++++++++++++++++++++++++++++++++++++++++ include/configs/omap3_beagle.h | 8 + include/tpm.h | 16 + 11 files changed, 1714 insertions(+), 1 deletions(-) create mode 100644 drivers/tpm/compatibility.h create mode 100644 drivers/tpm/tis_i2c.c create mode 100644 drivers/tpm/tpm.c create mode 100644 drivers/tpm/tpm.h create mode 100644 drivers/tpm/tpm_i2c_st.c diff --git a/Makefile b/Makefile index 12763ce..ef954a4 100644 --- a/Makefile +++ b/Makefile @@ -314,7 +314,7 @@ endif LIBS-y += drivers/rtc/librtc.o LIBS-y += drivers/serial/libserial.o LIBS-y += drivers/sound/libsound.o -LIBS-$(CONFIG_GENERIC_LPC_TPM) += drivers/tpm/libtpm.o +LIBS-$(CONFIG_TPM) += drivers/tpm/libtpm.o LIBS-y += drivers/twserial/libtws.o LIBS-y += drivers/usb/eth/libusb_eth.o LIBS-y += drivers/usb/gadget/libusb_gadget.o diff --git a/README b/README index 7f2506a..0e497d1 100644 --- a/README +++ b/README @@ -1210,6 +1210,18 @@ The following options need to be configured: to. Contemporary x86 systems usually map it at 0xfed40000. + CONFIG_ST_TPM_I2C + Define to compile the ST TPM I2C DRIVER. + + CONFIG_TPM_I2C_BUS + Define the bus number of the board. + + CONFIG_TPM_I2C_ADDR + Define the address of the TPM. + + CONFIG_CMD_TPM + Define to use some TPM u-boot commands. + - USB Support: At the moment only the UHCI host controller is supported (PIP405, MIP405, MPC5200); define diff --git a/common/cmd_tpm.c b/common/cmd_tpm.c index 0970a6f..5d4f485 100644 --- a/common/cmd_tpm.c +++ b/common/cmd_tpm.c @@ -158,6 +158,182 @@ U_BOOT_CMD(tpm, MAX_TRANSACTION_SIZE, 1, do_tpm, "device and read the response" ); +static int do_tpm_hash(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + u8 tpm_buffer[MAX_TRANSACTION_SIZE]; + u32 write_size, read_size; + char *p; + int rv = -1; + argc -= 1; + argv += 1; + u8 response[MAX_TRANSACTION_SIZE]; + u32 rlength = MAX_TRANSACTION_SIZE; + + u8 Startup[] = { + 0x00, 0xc1, + 0x00, 0x00, 0x00, 0x0c, + 0x00, 0x00, 0x00, 0x99, + 0x00, 0x01 + }; + + u8 SelfTestFull[] = { + 0x00, 0xc1, + 0x00, 0x00, 0x00, 0x0a, + 0x00, 0x00, 0x00, 0x50 + }; + + u8 ReadPcr17[] = { + 0x00, 0xc1, + 0x00, 0x00, 0x00, 0x0e, + 0x00, 0x00, 0x00, 0x15, + 0x00, 0x00, 0x00, 0x11 + }; + + for (write_size = 0; write_size < argc; write_size++) { + u32 datum = simple_strtoul(argv[write_size], &p, 0); + if (*p || (datum > 0xff)) { + printf("\n%s: bad data value\n\n", argv[write_size]); + cmd_usage(cmdtp); + return rv; + } + tpm_buffer[write_size] = (u8)datum; + } + + if (tis_init()) { + puts("tis_init() failed!\n"); + return -1; + } + + if (tis_open()) { + puts("tis_open() failed!\n"); + return -1; + } + + rv = tis_sendrecv(Startup, sizeof(Startup), &response, &rlength); + if (rv) { + printf("tpm test Startup failed\n"); + CHECK(tis_close()); + } + + rv = tis_sendrecv(SelfTestFull, sizeof(SelfTestFull), &response, + &rlength); + if (rv) { + printf("tpm test SelfTestFull failed\n"); + CHECK(tis_close()); + } + + if (!tis_sendrecv(ReadPcr17, sizeof(ReadPcr17), &response, + &read_size)) { + int i; + puts("TPM Read PCR 17:\n"); + for (i = 10; i < read_size; i++) + printf(" %2.2x", response[i]); + puts("\n"); + rv = 0; + } else { + printf("tpm test ReadPcr17 failed\n"); + CHECK(tis_close()); + } + + read_size = sizeof(tpm_buffer); + if (!tis_sendrecv_hash(tpm_buffer, write_size, tpm_buffer, + &read_size)) { + int i; + puts("Got TPM Hash response:\n"); + for (i = 0; i < read_size; i++) + printf(" %2.2x", tpm_buffer[i]); + puts("\n"); + rv = 0; + } else { + puts("tpm hash command failed\n"); + } + + if (!tis_sendrecv(ReadPcr17, sizeof(ReadPcr17), &response, + &read_size)) { + int i; + puts("TPM Read PCR 17 after hash:\n"); + for (i = 10; i < read_size; i++) + printf(" %2.2x", response[i]); + puts("\n"); + rv = 0; + } else { + printf("tpm test ReadPcr17 failed\n"); + CHECK(tis_close()); + } + + if (tis_close()) { + puts("tis_close() failed!\n"); + rv = -1; + } + + return rv; +} + + +U_BOOT_CMD(tpm_hash, MAX_TRANSACTION_SIZE, 1, do_tpm_hash, + "<byte> [<byte> ...] - write data to hash and read response", + "send arbitrary data to the TPM " + "device and read the response." + "ex: tpm 53 01 75 06 00 08 24 05 00 08 00 01" +); + +static int do_tpm_get_flag(void) +{ + int rv = 0; + u8 response[MAX_TRANSACTION_SIZE]; + u32 rlength = MAX_TRANSACTION_SIZE; + + u8 Startup[] = { + 0x00, 0xc1, + 0x00, 0x00, 0x00, 0x0c, + 0x00, 0x00, 0x00, 0x99, + 0x00, 0x01 + }; + u8 SelfTestFull[] = { + 0x00, 0xc1, + 0x00, 0x00, 0x00, 0x0a, + 0x00, 0x00, 0x00, 0x50 + }; + u8 GetPermFlags[] = { + 0x00, 0xc1, + 0x00, 0x00, 0x00, 0x16, + 0x00, 0x00, 0x00, 0x65, + 0x00, 0x00, 0x00, 0x04, + 0x00, 0x00, 0x00, 0x04, + 0x00, 0x00, 0x01, 0x08 + }; + + + CHECK(tis_init()); + + + CHECK(tis_open()); + rv = tis_sendrecv(Startup, sizeof(Startup), response, &rlength); + if (rv) { + printf("tpm test Startup failed\n"); + CHECK(tis_close()); + } + rv = tis_sendrecv(SelfTestFull, sizeof(SelfTestFull), response, + &rlength); + if (rv) { + printf("tpm test SelfTestFull failed\n"); + CHECK(tis_close()); + } + rv = tis_sendrecv(GetPermFlags, sizeof(GetPermFlags), response, + &rlength); + if (rv) { + printf("tpm test GetPermFlags failed\n"); + CHECK(tis_close()); + } + CHECK(tis_close()); + return rv; +} + + +U_BOOT_CMD(tpm_get_flag, 1, 1, do_tpm_get_flag, + "start tpm get flag command", "" +); + static int do_tpm_stress(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { diff --git a/drivers/tpm/Makefile b/drivers/tpm/Makefile index be11c8b..802b54e 100644 --- a/drivers/tpm/Makefile +++ b/drivers/tpm/Makefile @@ -24,6 +24,7 @@ include $(TOPDIR)/config.mk LIB := $(obj)libtpm.o COBJS-$(CONFIG_GENERIC_LPC_TPM) = generic_lpc_tpm.o +COBJS-$(CONFIG_ST_TPM_I2C) = tis_i2c.o tpm.o tpm_i2c_st.o COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) diff --git a/drivers/tpm/compatibility.h b/drivers/tpm/compatibility.h new file mode 100644 index 0000000..c68a855 --- /dev/null +++ b/drivers/tpm/compatibility.h @@ -0,0 +1,52 @@ +/* + * Copyright (C) 2011 Infineon Technologies + * + * Authors: + * Peter Huewe <huewe.external(a)infineon.com> + * + * Version: 2.1.1 + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _COMPATIBILITY_H_ +#define _COMPATIBILITY_H_ + +/* all includes from U-Boot */ +#include <linux/types.h> +#include <linux/unaligned/be_byteshift.h> +#include <asm-generic/errno.h> +#include <compiler.h> +#include <common.h> + +/* extended error numbers from linux (see errno.h) */ +#define ECANCELED 125 /* Operation Canceled */ + +#define msleep(t) udelay((t)*1000) + +/* Timer frequency. Corresponds to msec timer resolution*/ +#define HZ 1000 + + +#define dev_dbg(dev, format, arg...) debug(format, ##arg) +#define dev_err(dev, format, arg...) printf(format, ##arg) +#define dev_info(dev, format, arg...) debug(format, ##arg) +#define dbg_printf debug + +#endif diff --git a/drivers/tpm/tis_i2c.c b/drivers/tpm/tis_i2c.c new file mode 100644 index 0000000..a494608 --- /dev/null +++ b/drivers/tpm/tis_i2c.c @@ -0,0 +1,211 @@ +/* + * Copyright (c) 2012 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <config.h> +#include <common.h> +#include <i2c.h> +#include "tpm.h" + +DECLARE_GLOBAL_DATA_PTR; + +/* Define in board config */ +#ifndef CONFIG_TPM_I2C_BUS + #define CONFIG_TPM_I2C_BUS 0 + #define CONFIG_TPM_I2C_ADDR 0 +#endif + +/* TPM configuration */ +struct tpm { + int i2c_bus; + int slave_addr; + char inited; + int old_bus; +} tpm; + + +static int tpm_select(void) +{ + int ret; + + tpm.old_bus = i2c_get_bus_num(); + if (tpm.old_bus != tpm.i2c_bus) { + ret = i2c_set_bus_num(tpm.i2c_bus); + if (ret) { + debug("%s: Fail to set i2c bus %d\n", __func__, + tpm.i2c_bus); + return -1; + } + } + return 0; +} + +static int tpm_deselect(void) +{ + int ret; + + if (tpm.old_bus != i2c_get_bus_num()) { + ret = i2c_set_bus_num(tpm.old_bus); + if (ret) { + debug("%s: Fail to restore i2c bus %d\n", + __func__, tpm.old_bus); + return -1; + } + } + tpm.old_bus = -1; + return 0; +} + +/** + * Decode TPM configuration. + * + * @param dev Returns a configuration of TPM device + * @return 0 if ok, -1 on error + */ +static int tpm_decode_config(struct tpm *dev) +{ +#ifdef CONFIG_OF_CONTROL + const void *blob = gd->fdt_blob; + int node, parent; + int i2c_bus; + + node = fdtdec_next_compatible(blob, 0, COMPAT_INFINEON_SLB9635_TPM); + if (node < 0) { + debug("%s: Node not found\n", __func__); + return -1; + } + parent = fdt_parent_offset(blob, node); + if (parent < 0) { + debug("%s: Cannot find node parent\n", __func__); + return -1; + } + i2c_bus = i2c_get_bus_num_fdt(blob, parent); + if (i2c_bus < 0) + return -1; + dev->i2c_bus = i2c_bus; + dev->slave_addr = fdtdec_get_addr(blob, node, "reg"); +#else + dev->i2c_bus = CONFIG_TPM_I2C_BUS; + dev->slave_addr = CONFIG_TPM_I2C_ADDR; +#endif + return 0; +} + +/* Methods used by cmd_tpm */ +int tis_init(void) +{ + if (tpm.inited) + return 0; + if (tpm_decode_config(&tpm)) + return -1; + if (tpm_select()) + return -1; + /* + * Probe TPM twice; the first probing might fail because TPM is asleep, + * and the probing can wake up TPM. + */ + if (i2c_probe(tpm.slave_addr) && i2c_probe(tpm.slave_addr)) { + debug("%s: fail to probe i2c addr 0x%x\n", __func__, + tpm.slave_addr); + return -1; + } + tpm_deselect(); + tpm.inited = 1; + return 0; +} + +int tis_open(void) +{ + int rc; + if (!tpm.inited) + return -1; + + if (tpm_select()) + return -1; + + rc = tpm_open(tpm.slave_addr); + tpm_deselect(); + + return rc; +} + +int tis_close(void) +{ + if (!tpm.inited) + return -1; + + if (tpm_select()) + return -1; + + tpm_close(); + + tpm_deselect(); + + return 0; +} + +int tis_sendrecv_hash(const uint8_t *sendbuf, size_t sbuf_size, + uint8_t *recvbuf, size_t *rbuf_len) +{ + int len; + uint8_t buf[TPM_BUFSIZE]; + + if (!tpm.inited) + return -1; + + if (sizeof(buf) < sbuf_size) + return -1; + + memcpy(buf, sendbuf, sbuf_size); + + if (tpm_select()) + return -1; + + len = tpm_transmit_hash(buf, sbuf_size); + + tpm_deselect(); + + if (len < 10) { + *rbuf_len = 0; + return -1; + } + + memcpy(recvbuf, buf, len); + *rbuf_len = len; + + return 0; +} + +int tis_sendrecv(const uint8_t *sendbuf, size_t sbuf_size, + uint8_t *recvbuf, size_t *rbuf_len) +{ + int len; + uint8_t buf[TPM_BUFSIZE]; + + if (!tpm.inited) + return -1; + + if (sizeof(buf) < sbuf_size) + return -1; + + memcpy(buf, sendbuf, sbuf_size); + + if (tpm_select()) + return -1; + + len = tpm_transmit(buf, sbuf_size); + + tpm_deselect(); + + if (len < 10) { + *rbuf_len = 0; + return -1; + } + + memcpy(recvbuf, buf, len); + *rbuf_len = len; + + return 0; +} diff --git a/drivers/tpm/tpm.c b/drivers/tpm/tpm.c new file mode 100644 index 0000000..3f4f66e --- /dev/null +++ b/drivers/tpm/tpm.c @@ -0,0 +1,472 @@ +/* + * Copyright (C) 2011 Infineon Technologies + * + * Authors: + * Peter Huewe <huewe.external(a)infineon.com> + * + * Description: + * Device driver for TCG/TCPA TPM (trusted platform module). + * Specifications at www.trustedcomputinggroup.org + * + * It is based on the Linux kernel driver tpm.c from Leendert van + * Dorn, Dave Safford, Reiner Sailer, and Kyleen Hall. + * + * Version: 2.1.1 + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation, version 2 of the + * License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <malloc.h> +#include "tpm.h" + +/* global structure for tpm chip data */ +struct tpm_chip g_chip; + +enum tpm_duration { + TPM_SHORT = 0, + TPM_MEDIUM = 1, + TPM_LONG = 2, + TPM_UNDEFINED, +}; + +#define TPM_MAX_ORDINAL 243 +#define TPM_MAX_PROTECTED_ORDINAL 12 +#define TPM_PROTECTED_ORDINAL_MASK 0xFF + +/* + * Array with one entry per ordinal defining the maximum amount + * of time the chip could take to return the result. The ordinal + * designation of short, medium or long is defined in a table in + * TCG Specification TPM Main Part 2 TPM Structures Section 17. The + * values of the SHORT, MEDIUM, and LONG durations are retrieved + * from the chip during initialization with a call to tpm_get_timeouts. + */ +static const u8 tpm_protected_ordinal_duration[TPM_MAX_PROTECTED_ORDINAL] = { + TPM_UNDEFINED, /* 0 */ + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_UNDEFINED, /* 5 */ + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_SHORT, /* 10 */ + TPM_SHORT, +}; + +static const u8 tpm_ordinal_duration[TPM_MAX_ORDINAL] = { + TPM_UNDEFINED, /* 0 */ + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_UNDEFINED, /* 5 */ + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_SHORT, /* 10 */ + TPM_SHORT, + TPM_MEDIUM, + TPM_LONG, + TPM_LONG, + TPM_MEDIUM, /* 15 */ + TPM_SHORT, + TPM_SHORT, + TPM_MEDIUM, + TPM_LONG, + TPM_SHORT, /* 20 */ + TPM_SHORT, + TPM_MEDIUM, + TPM_MEDIUM, + TPM_MEDIUM, + TPM_SHORT, /* 25 */ + TPM_SHORT, + TPM_MEDIUM, + TPM_SHORT, + TPM_SHORT, + TPM_MEDIUM, /* 30 */ + TPM_LONG, + TPM_MEDIUM, + TPM_SHORT, + TPM_SHORT, + TPM_SHORT, /* 35 */ + TPM_MEDIUM, + TPM_MEDIUM, + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_MEDIUM, /* 40 */ + TPM_LONG, + TPM_MEDIUM, + TPM_SHORT, + TPM_SHORT, + TPM_SHORT, /* 45 */ + TPM_SHORT, + TPM_SHORT, + TPM_SHORT, + TPM_LONG, + TPM_MEDIUM, /* 50 */ + TPM_MEDIUM, + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_UNDEFINED, /* 55 */ + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_MEDIUM, /* 60 */ + TPM_MEDIUM, + TPM_MEDIUM, + TPM_SHORT, + TPM_SHORT, + TPM_MEDIUM, /* 65 */ + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_SHORT, /* 70 */ + TPM_SHORT, + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_UNDEFINED, /* 75 */ + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_LONG, /* 80 */ + TPM_UNDEFINED, + TPM_MEDIUM, + TPM_LONG, + TPM_SHORT, + TPM_UNDEFINED, /* 85 */ + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_SHORT, /* 90 */ + TPM_SHORT, + TPM_SHORT, + TPM_SHORT, + TPM_SHORT, + TPM_UNDEFINED, /* 95 */ + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_MEDIUM, /* 100 */ + TPM_SHORT, + TPM_SHORT, + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_UNDEFINED, /* 105 */ + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_SHORT, /* 110 */ + TPM_SHORT, + TPM_SHORT, + TPM_SHORT, + TPM_SHORT, + TPM_SHORT, /* 115 */ + TPM_SHORT, + TPM_SHORT, + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_LONG, /* 120 */ + TPM_LONG, + TPM_MEDIUM, + TPM_UNDEFINED, + TPM_SHORT, + TPM_SHORT, /* 125 */ + TPM_SHORT, + TPM_LONG, + TPM_SHORT, + TPM_SHORT, + TPM_SHORT, /* 130 */ + TPM_MEDIUM, + TPM_UNDEFINED, + TPM_SHORT, + TPM_MEDIUM, + TPM_UNDEFINED, /* 135 */ + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_SHORT, /* 140 */ + TPM_SHORT, + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_UNDEFINED, /* 145 */ + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_SHORT, /* 150 */ + TPM_MEDIUM, + TPM_MEDIUM, + TPM_SHORT, + TPM_SHORT, + TPM_UNDEFINED, /* 155 */ + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_SHORT, /* 160 */ + TPM_SHORT, + TPM_SHORT, + TPM_SHORT, + TPM_UNDEFINED, + TPM_UNDEFINED, /* 165 */ + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_LONG, /* 170 */ + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_UNDEFINED, /* 175 */ + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_MEDIUM, /* 180 */ + TPM_SHORT, + TPM_MEDIUM, + TPM_MEDIUM, + TPM_MEDIUM, + TPM_MEDIUM, /* 185 */ + TPM_SHORT, + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_UNDEFINED, /* 190 */ + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_UNDEFINED, /* 195 */ + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_SHORT, /* 200 */ + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_SHORT, + TPM_SHORT, /* 205 */ + TPM_SHORT, + TPM_SHORT, + TPM_SHORT, + TPM_SHORT, + TPM_MEDIUM, /* 210 */ + TPM_UNDEFINED, + TPM_MEDIUM, + TPM_MEDIUM, + TPM_MEDIUM, + TPM_UNDEFINED, /* 215 */ + TPM_MEDIUM, + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_SHORT, + TPM_SHORT, /* 220 */ + TPM_SHORT, + TPM_SHORT, + TPM_SHORT, + TPM_SHORT, + TPM_UNDEFINED, /* 225 */ + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_SHORT, /* 230 */ + TPM_LONG, + TPM_MEDIUM, + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_UNDEFINED, /* 235 */ + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_UNDEFINED, + TPM_SHORT, /* 240 */ + TPM_UNDEFINED, + TPM_MEDIUM, +}; + +/* + * Returns max number of milliseconds to wait + */ +unsigned long tpm_calc_ordinal_duration(struct tpm_chip *chip, u32 ordinal) +{ + int duration_idx = TPM_UNDEFINED; + int duration = 0; + + if (ordinal < TPM_MAX_ORDINAL) + duration_idx = tpm_ordinal_duration[ordinal]; + else if ((ordinal & TPM_PROTECTED_ORDINAL_MASK) < + TPM_MAX_PROTECTED_ORDINAL) + duration_idx = + tpm_protected_ordinal_duration[ordinal & + TPM_PROTECTED_ORDINAL_MASK]; + + if (duration_idx != TPM_UNDEFINED) + duration = chip->vendor.duration[duration_idx]; + if (duration <= 0) + return 2 * 60 * HZ; /*two minutes timeout*/ + else + return duration; +} + +ssize_t tpm_transmit_hash(const unsigned char *buf, size_t bufsiz) +{ + ssize_t rc; + u32 count, ordinal; + unsigned long start, stop; + + struct tpm_chip *chip = &g_chip; + + rc = chip->vendor.send_hash(chip, (u8 *) buf, bufsiz); + if (rc < 0) { + dev_err(chip->dev, "tpm_transmit: tpm_send: error %zd\n", rc); + goto out; + } + +out_recv: + + dbg_printf("out_recv: reading response...\n"); + rc = chip->vendor.recv(chip, (u8 *) buf, TPM_BUFSIZE); + if (rc < 0) + dev_err(chip->dev, "tpm_transmit: tpm_recv: error %zd\n", rc); +out: + return rc; +} + +ssize_t tpm_transmit(const unsigned char *buf, size_t bufsiz) +{ + ssize_t rc; + u32 count, ordinal; + unsigned long start, stop; + + struct tpm_chip *chip = &g_chip; + + /* switch endianess: big->little */ + count = get_unaligned_be32(buf + TPM_CMD_SIZE_BYTE); + ordinal = get_unaligned_be32(buf + TPM_CMD_ORDINAL_BYTE); + + if (count == 0) { + dev_err(chip->dev, "no data\n"); + return -ENODATA; + } + if (count > bufsiz) { + dev_err(chip->dev, + "invalid count value %x %zx\n", count, bufsiz); + return -E2BIG; + } + + rc = chip->vendor.send(chip, (u8 *) buf, count); + if (rc < 0) { + dev_err(chip->dev, "tpm_transmit: tpm_send: error %zd\n", rc); + goto out; + } + + if (chip->vendor.irq) + goto out_recv; + + start = get_timer(0); + stop = tpm_calc_ordinal_duration(chip, ordinal); + do { + dbg_printf("waiting for status...\n"); + u8 status = chip->vendor.status(chip); + if ((status & chip->vendor.req_complete_mask) == + chip->vendor.req_complete_val) { + dbg_printf("...got it;\n"); + goto out_recv; + } + + if ((status == chip->vendor.req_canceled)) { + dev_err(chip->dev, "Operation Canceled\n"); + rc = -ECANCELED; + goto out; + } + msleep(TPM_TIMEOUT); + } while (get_timer(start) < stop); + + chip->vendor.cancel(chip); + dev_err(chip->dev, "Operation Timed out\n"); + rc = -ETIME; + goto out; + +out_recv: + + dbg_printf("out_recv: reading response...\n"); + rc = chip->vendor.recv(chip, (u8 *) buf, TPM_BUFSIZE); + if (rc < 0) + dev_err(chip->dev, "tpm_transmit: tpm_recv: error %zd\n", rc); +out: + return rc; +} + +enum tpm_capabilities { + TPM_CAP_PROP = cpu_to_be32(5), +}; + +enum tpm_sub_capabilities { + TPM_CAP_PROP_TIS_TIMEOUT = cpu_to_be32(0x115), + TPM_CAP_PROP_TIS_DURATION = cpu_to_be32(0x120), +}; + +struct tpm_chip *tpm_register_hardware(const struct tpm_vendor_specific *entry) +{ + struct tpm_chip *chip; + + /* Driver specific per-device data */ + chip = &g_chip; + memcpy(&chip->vendor, entry, sizeof(struct tpm_vendor_specific)); + chip->is_open = 1; + + return chip; +} + +int tpm_open(uint32_t dev_addr) +{ + int rc; + if (g_chip.is_open) + return -EBUSY; + rc = tpm_vendor_init(dev_addr); + if (rc < 0) + g_chip.is_open = 0; + return rc; +} + +void tpm_close(void) +{ + if (g_chip.is_open) { + tpm_vendor_cleanup(&g_chip); + g_chip.is_open = 0; + } +} diff --git a/drivers/tpm/tpm.h b/drivers/tpm/tpm.h new file mode 100644 index 0000000..151c584 --- /dev/null +++ b/drivers/tpm/tpm.h @@ -0,0 +1,164 @@ +/* + * Copyright (C) 2011 Infineon Technologies + * + * Authors: + * Peter Huewe <huewe.external(a)infineon.com> + * + * Version: 2.1.1 + * + * Description: + * Device driver for TCG/TCPA TPM (trusted platform module). + * Specifications at www.trustedcomputinggroup.org + * + * It is based on the Linux kernel driver tpm.c from Leendert van + * Dorn, Dave Safford, Reiner Sailer, and Kyleen Hall. + * + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation, version 2 of the + * License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _TPM_H_ +#define _TPM_H_ + +#include "compatibility.h" + +enum tpm_timeout { + TPM_TIMEOUT = 5, /* msecs */ +}; + +/* Size of external transmit buffer (used in tpm_transmit)*/ +#define TPM_BUFSIZE 4096 +#define TPM_ERROR_SIZE 10 +#define TPM_HEADER_SIZE 10 + +/* Index of fields in TPM command buffer */ +#define TPM_CMD_SIZE_BYTE 2 +#define TPM_CMD_ORDINAL_BYTE 6 + +/* Index of Count field in TPM response buffer */ +#define TPM_RSP_SIZE_BYTE 2 +#define TPM_RSP_RC_BYTE 6 + +struct tpm_chip; + +struct tpm_vendor_specific { + const u8 req_complete_mask; + const u8 req_complete_val; + const u8 req_canceled; + int irq; + int (*recv) (struct tpm_chip *, u8 *, size_t); + int (*send) (struct tpm_chip *, u8 *, size_t); + int (*send_hash) (struct tpm_chip *, u8 *, size_t); + void (*cancel) (struct tpm_chip *); + u8 (*status) (struct tpm_chip *); + int locality; + unsigned long timeout_a, timeout_b, timeout_c, timeout_d; /* msec */ + unsigned long duration[3]; /* msec */ +}; + +struct tpm_chip { + int is_open; + struct tpm_vendor_specific vendor; + /* testing */ + u8 dev; +}; + +struct tpm_input_header { + __be16 tag; + __be32 length; + __be32 ordinal; +} __attribute__ ((packed)); + +struct tpm_output_header { + __be16 tag; + __be32 length; + __be32 return_code; +} __attribute__ ((packed)); + +struct timeout_t { + __be32 a; + __be32 b; + __be32 c; + __be32 d; +} __attribute__ ((packed)); + +struct duration_t { + __be32 tpm_short; + __be32 tpm_medium; + __be32 tpm_long; +} __attribute__ ((packed)); + +typedef union { + struct timeout_t timeout; + struct duration_t duration; +} cap_t; + +struct tpm_getcap_params_in { + __be32 cap; + __be32 subcap_size; + __be32 subcap; +} __attribute__ ((packed)); + +struct tpm_getcap_params_out { + __be32 cap_size; + cap_t cap; +} __attribute__ ((packed)); + +typedef union { + struct tpm_input_header in; + struct tpm_output_header out; +} tpm_cmd_header; + +typedef union { + struct tpm_getcap_params_out getcap_out; + struct tpm_getcap_params_in getcap_in; +} tpm_cmd_params; + +struct tpm_cmd_t { + tpm_cmd_header header; + tpm_cmd_params params; +} __attribute__ ((packed)); + + +/* ---------- Interface for TPM vendor ------------ */ + +extern struct tpm_chip *tpm_register_hardware( + const struct tpm_vendor_specific *); + +extern int tpm_vendor_init(uint32_t dev_addr); + +extern void tpm_vendor_cleanup(struct tpm_chip *chip); + +/* ---------- Interface for TDDL ------------------- */ + +/* + * if dev_addr != 0 - redefines TPM device address + * Returns < 0 on error, 0 on success. + */ +extern int tpm_open(uint32_t dev_addr); + +extern void tpm_close(void); + +/* + * Transmit bufsiz bytes out of buf to TPM and get results back in buf, too. + * Returns < 0 on error, 0 on success. + */ +extern ssize_t tpm_transmit(const unsigned char *buf, size_t bufsiz); + +#endif diff --git a/drivers/tpm/tpm_i2c_st.c b/drivers/tpm/tpm_i2c_st.c new file mode 100644 index 0000000..cb716c5 --- /dev/null +++ b/drivers/tpm/tpm_i2c_st.c @@ -0,0 +1,601 @@ +/* + * STMicroelectronics TPM I2C UBOOT Linux driver for TPM ST33ZP24 + * Copyright (C) 2013 STMicroelectronics + * + * Description: + * Device driver for TCG/TCPA TPM (trusted platform module). + * Specifications at www.trustedcomputinggroup.org + * + * This device driver implements the TPM interface as defined in + * the TCG TPM Interface Spec version 1.2, revision 1.0 and the + * STMicroelectronics I2C Protocol Stack Specification version 1.2.0. + * + * It is based on the Linux kernel driver tpm.c from Leendert van + * Dorn, Dave Safford, Reiner Sailer, and Kyleen Hall. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation, version 2 of the + * License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + * STMicroelectronics version 1.2.0, Copyright (C) 2013 + * STMicroelectronics comes with ABSOLUTELY NO WARRANTY. + * This is free software, and you are welcome to redistribute it + * under certain conditions. + * + * @Author: Mathias Leblanc tpmsupport(a)st.com + * + * @File: tpm_i2c_st.c + * + */ + +#include <common.h> +#include <i2c.h> +#include <linux/types.h> + +#include "compatibility.h" +#include "tpm.h" + +/* max. buffer size supported by our tpm */ +#ifdef TPM_BUFSIZE +#undef TPM_BUFSIZE +#endif + +#define MINOR_NUM_I2C 224 + +#define TPM_ACCESS (0x0) +#define TPM_STS (0x18) +#define TPM_HASH_END (0x20) +#define TPM_DATA_FIFO (0x24) +#define TPM_HASH_DATA (0x24) +#define TPM_HASH_START (0x28) +#define TPM_INTF_CAPABILITY (0x14) +#define TPM_INT_STATUS (0x10) +#define TPM_INT_ENABLE (0x08) + +#define TPM_DUMMY_BYTE 0xAA +#define TPM_WRITE_DIRECTION 0x80 +#define TPM_HEADER_SIZE 10 +#define TPM_BUFSIZE 2048 + +#define LOCALITY0 0 +#define LOCALITY4 4 + +struct st_tpm_hash { + int size; + u8 *data; +}; + +enum stm33zp24_access { + TPM_ACCESS_VALID = 0x80, + TPM_ACCESS_ACTIVE_LOCALITY = 0x20, + TPM_ACCESS_REQUEST_PENDING = 0x04, + TPM_ACCESS_REQUEST_USE = 0x02, +}; + +enum stm33zp24_status { + TPM_STS_VALID = 0x80, + TPM_STS_COMMAND_READY = 0x40, + TPM_STS_GO = 0x20, + TPM_STS_DATA_AVAIL = 0x10, + TPM_STS_DATA_EXPECT = 0x08, +}; + +enum stm33zp24_int_flags { + TPM_GLOBAL_INT_ENABLE = 0x80, + TPM_INTF_CMD_READY_INT = 0x080, + TPM_INTF_FIFO_AVALAIBLE_INT = 0x040, + TPM_INTF_WAKE_UP_READY_INT = 0x020, + TPM_INTF_LOC4SOFTRELEASE_INT = 0x008, + TPM_INTF_LOCALITY_CHANGE_INT = 0x004, + TPM_INTF_STS_VALID_INT = 0x002, + TPM_INTF_DATA_AVAIL_INT = 0x001, +}; + +enum tis_defaults { + TIS_SHORT_TIMEOUT = 750, /* ms */ + TIS_LONG_TIMEOUT = 2000, /* 2 sec */ +}; + +struct tpm_i2c_ST_dev { + uint addr; + u8 buf[TPM_BUFSIZE]; +}; + +static struct tpm_i2c_ST_dev tpm_dev = { + /* Note: replace with defined addr from board configuration */ + .addr = CONFIG_TPM_I2C_ADDR +}; + +/* + * write8_reg + * Send byte to the TIS register according to the ST33ZP24 I2C protocol. + * @param: tpm_register, the tpm tis register where the data should be written + * @param: tpm_data, the tpm_data to write inside the tpm_register + * @param: tpm_size, The length of the data + * @return: Returns negative errno, or else the number of bytes written. + */ +static int write8_reg(u8 addr, u8 tpm_register, + u8 *tpm_data, u16 tpm_size) +{ + u8 data; + data = tpm_register; + memcpy(&(tpm_dev.buf[0]), &data, sizeof(data)); + memcpy(&(tpm_dev.buf[0])+1, tpm_data, tpm_size); + + return i2c_write(addr, 0, 0, &tpm_dev.buf[0], + tpm_size + 1); + +} /* write8_reg() */ + +/* +* read8_reg +* Recv byte from the TIS register according to the ST33ZP24 I2C protocol. +* @param: tpm_register, the tpm tis register where the data should be read +* @param: tpm_data, the TPM response +* @param: tpm_size, tpm TPM response size to read. +* @return: number of byte read successfully: should be one if success. +*/ +static int read8_reg(u8 addr, u8 tpm_register, +u8 *tpm_data, int tpm_size) +{ + u8 status = 0; + u8 data; + data = TPM_DUMMY_BYTE; + status = write8_reg(addr, tpm_register, &data, 1); + if (status == 0) + status = i2c_read(addr, 0, 0, tpm_data, tpm_size); +return status; +} /* read8_reg() */ + +/* + * I2C_WRITE_DATA + * Send byte to the TIS register according to the ST33ZP24 I2C protocol. + * @param: client, the chip description + * @param: tpm_register, the tpm tis register where the data should be written + * @param: tpm_data, the tpm_data to write inside the tpm_register + * @param: tpm_size, The length of the data + * @return: number of byte written successfully: should be one if success. + */ +#define I2C_WRITE_DATA(client, tpm_register, tpm_data, tpm_size)\ + (write8_reg(client, tpm_register | \ + TPM_WRITE_DIRECTION, tpm_data, tpm_size)) + +/* + * I2C_READ_DATA + * Recv byte from the TIS register according to the ST33ZP24 I2C protocol. + * @param: tpm, the chip description + * @param: tpm_register, the tpm tis register where the data should be read + * @param: tpm_data, the TPM response + * @param: tpm_size, tpm TPM response size to read. + * @return: number of byte read successfully: should be one if success. + */ +#define I2C_READ_DATA(client, tpm_register, tpm_data, tpm_size)\ + (read8_reg(client, tpm_register, tpm_data, tpm_size)) + +/* + * release_locality release the active locality + * @param: chip, the tpm chip description. + */ +static void release_locality(struct tpm_chip *chip) +{ + u8 data = TPM_ACCESS_ACTIVE_LOCALITY; + + I2C_WRITE_DATA(tpm_dev.addr, TPM_ACCESS, &data, 1); +} + +/* + * clear_interruption + * clear the TPM interrupt register. + * @param: tpm, the chip description + */ +static void clear_interruption(u8 addr) +{ + u8 interrupt; + I2C_READ_DATA(tpm_dev.addr, TPM_INT_STATUS, &interrupt, 1); + I2C_WRITE_DATA(tpm_dev.addr, TPM_INT_STATUS, &interrupt, 1); + I2C_READ_DATA(tpm_dev.addr, TPM_INT_STATUS, &interrupt, 1); +} /* clear_interruption() */ + +int wait_for_serirq_timeout(struct tpm_chip *chip, int condition, + unsigned long timeout) +{ + int status = 2; + + clear_interruption(tpm_dev.addr); + if (condition) + status = 1; + + return status; +} + +/* + * check_locality if the locality is active + * @param: chip, the tpm chip description + * @return: the active locality or -EACCESS. + */ +static int check_locality(struct tpm_chip *chip) +{ + u8 data; + u8 status; + status = I2C_READ_DATA(tpm_dev.addr, TPM_ACCESS, &data, 1); + + if ((status == 0) && (data & + (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) == + (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) + return chip->vendor.locality; + + return -EACCES; + +} /* check_locality() */ + +/* + * request_locality request the TPM locality + * @param: chip, the chip description + * @return: the active locality or EACCESS. + */ +static int request_locality(struct tpm_chip *chip) +{ + unsigned long start, stop; + long rc; + u8 data; + if (check_locality(chip) == chip->vendor.locality) + return chip->vendor.locality; + + data = TPM_ACCESS_REQUEST_USE; + rc = I2C_WRITE_DATA(tpm_dev.addr, TPM_ACCESS, &data, 1); + if (rc < 0) + goto end; + + if (chip->vendor.irq) { + rc = wait_for_serirq_timeout(chip, (check_locality + (chip) >= 0), + chip->vendor.timeout_a); + if (rc > 0) + return chip->vendor.locality; + } else{ + /* wait for locality activated */ + start = get_timer(0); + stop = chip->vendor.timeout_a; + do { + if (check_locality(chip) >= 0) + return chip->vendor.locality; + + msleep(TPM_TIMEOUT); + } while (get_timer(start) < stop); + } + rc = -EACCES; +end: + return rc; +} /* request_locality() */ + +/* + * tpm_stm_i2c_cancel, cancel is not implemented. + * @param: chip, tpm_chip description. + */ +static void tpm_stm_i2c_cancel(struct tpm_chip *chip) +{ + u8 data; + + data = TPM_STS_COMMAND_READY; + I2C_WRITE_DATA(tpm_dev.addr, TPM_STS, &data, 1); + if (chip->vendor.irq) + wait_for_serirq_timeout(chip, 1, chip->vendor.timeout_a); +} /* tpm_stm_i2c_cancel() */ + +/* + * tpm_stm_spi_status return the TPM_STS register + * @param: chip, the tpm chip description + * @return: the TPM_STS register value. + */ +static u8 tpm_stm_i2c_status(struct tpm_chip *chip) +{ + u8 data; + I2C_READ_DATA(tpm_dev.addr, TPM_STS, &data, 1); + return data; +} /* tpm_stm_i2c_status() */ + +/* + * get_burstcount return the burstcount address 0x19 0x1A + * @param: chip, the chip description + * return: the burstcount. + */ +static int get_burstcount(struct tpm_chip *chip) +{ + unsigned long start, stop; + int burstcnt, status; + u8 tpm_reg, temp; + + /* wait for burstcount */ + /* which timeout value, spec has 2 answers (c & d) */ + start = get_timer(0); + stop = chip->vendor.timeout_d; + do { + tpm_reg = TPM_STS + 1; + status = I2C_READ_DATA(tpm_dev.addr, tpm_reg, &temp, 1); + if (status < 0) + goto end; + + tpm_reg = tpm_reg + 1; + burstcnt = temp; + status = I2C_READ_DATA(tpm_dev.addr, tpm_reg, &temp, 1); + if (status < 0) + goto end; + + burstcnt |= temp << 8; + if (burstcnt) + return burstcnt; + + msleep(TPM_TIMEOUT); + } while (get_timer(start) < stop); + +end: + return -EBUSY; +} /* get_burstcount() */ + + +/* + * recv_data receive data + * @param: chip, the tpm chip description + * @param: buf, the buffer where the data are received + * @param: count, the number of data to receive + * @return: the number of bytes read from TPM FIFO. + */ +static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count) +{ + int size = 0, burstcnt, len; + + while (size < count) { + burstcnt = get_burstcount(chip); + len = count - size; + if ((len) > burstcnt) + len = burstcnt; + if (I2C_READ_DATA(tpm_dev.addr, TPM_DATA_FIFO, + buf + size, len) == 0) + size += len; + else + break; + } + return size; +} /* recv_data() */ + +/* + * tpm_stm_i2c_recv received TPM response through the I2C bus. + * @param: chip, tpm_chip description. + * @param: buf, the buffer to store datas. + * @param: count, the number of bytes to send. + * @return: In case of success the number of bytes received. + * In other case, a < 0 value describing the issue. + */ +static int tpm_stm_i2c_recv(struct tpm_chip *chip, unsigned char *buf, + size_t count) +{ + int size = 0; + int expected; + + if (chip == NULL) + return -EBUSY; + + if (count < TPM_HEADER_SIZE) { + size = -EIO; + goto out; + } + + size = recv_data(chip, buf, TPM_HEADER_SIZE); + if (size < TPM_HEADER_SIZE) { + dev_err(chip->dev, "Unable to read header\n"); + goto out; + } + + + expected = get_unaligned_be32(buf + TPM_RSP_SIZE_BYTE); + if (expected > count) { + size = -EIO; + goto out; + } + + size += recv_data(chip, &buf[TPM_HEADER_SIZE], + expected - TPM_HEADER_SIZE); + if (size < expected) { + dev_err(chip->dev, "Unable to read remainder of result\n"); + size = -ETIME; + goto out; + } + +out: + chip->vendor.cancel(chip); + release_locality(chip); + return size; +} /* tpm_stm_i2c_recv() */ + +/* + * tpm_stm_i2c_send send TPM commands through the I2C bus. + * + * @param: chip, tpm_chip description. + * @param: buf, the buffer to send. + * @param: len, the number of bytes to send. + * @return: In case of success the number of bytes sent. + * In other case, a < 0 value describing the issue. + */ +static int tpm_stm_i2c_send(struct tpm_chip *chip, u8 *buf, + size_t len) +{ + u32 ret = 0, + status, + burstcnt = 0, i, size; + u8 data; + + if (chip == NULL) + return -EBUSY; + if (len < TPM_HEADER_SIZE) + return -EBUSY; + + ret = request_locality(chip); + if (ret < 0) + return ret; + + status = tpm_stm_i2c_status(chip); + if ((status & TPM_STS_COMMAND_READY) == 0) + tpm_stm_i2c_cancel(chip); + + for (i = 0 ; i < len - 1 ;) { + burstcnt = get_burstcount(chip); + size = len - i - 1; + if ((size) > burstcnt) + size = burstcnt; + ret = I2C_WRITE_DATA(tpm_dev.addr, TPM_DATA_FIFO, buf, size); + if (ret < 0) + goto out_err; + + i += size; + } + + status = tpm_stm_i2c_status(chip); + if ((status & TPM_STS_DATA_EXPECT) == 0) { + ret = -EIO; + goto out_err; + } + + ret = I2C_WRITE_DATA(tpm_dev.addr, TPM_DATA_FIFO, buf + len - 1, 1); + if (ret < 0) + goto out_err; + + status = tpm_stm_i2c_status(chip); + if ((status & TPM_STS_DATA_EXPECT) != 0) { + ret = -EIO; + goto out_err; + } + + data = TPM_STS_GO; + I2C_WRITE_DATA(tpm_dev.addr, TPM_STS, &data, 1); + + return len; +out_err: + tpm_stm_i2c_cancel(chip); + release_locality(chip); + return ret; +} /* tpm_stm_i2c_send() */ + +/* + * tpm_stm_i2c_send_hash send TPM locality 4 hash datas through the I2C bus + * to update the PCR[17]. + * @param: chip, the tpm_chip description. + * @param: buf, the data buffer to send. + * @param: len, the number of bytes to send. + * @return: In case of success the number of bytes sent. + * In other case, a < 0 value describing the issue. + */ +static int tpm_stm_i2c_send_hash(struct tpm_chip *chip, unsigned char *buf, + size_t len) +{ + u32 ret = 0; + u8 data; + + if (chip == NULL) + return -EBUSY; + + release_locality(chip); + + tpm_dev.addr = 0x1B; + chip->vendor.locality = LOCALITY4; + + data = TPM_DUMMY_BYTE; + ret = I2C_WRITE_DATA(tpm_dev.addr, TPM_HASH_START, &data, 1); + if (ret < 0) + goto end; + ret = I2C_WRITE_DATA(tpm_dev.addr, TPM_DATA_FIFO, buf, len); + if (ret < 0) + goto end; + +end: + I2C_WRITE_DATA(tpm_dev.addr, TPM_HASH_END, &data, 1); + release_locality(chip); + chip->vendor.locality = LOCALITY0; + tpm_dev.addr = 0x13; + ret = request_locality(chip); + return ret; +} /* tpm_stm_i2c_send_hash */ + +static struct tpm_vendor_specific st_i2c_tpm = { + .send = tpm_stm_i2c_send, + .send_hash = tpm_stm_i2c_send_hash, + .recv = tpm_stm_i2c_recv, + .cancel = tpm_stm_i2c_cancel, + .status = tpm_stm_i2c_status, + .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID, + .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID, + .req_canceled = TPM_STS_COMMAND_READY, +}; + +/* + * tpm_vendor_init initialize the TPM device + * @param: dev_addr, the i2c address of the tpm. + * @return: 0 in case of success. + * -1 in other case. + */ +int tpm_vendor_init(uint32_t dev_addr) +{ + u32 vendor; + uint old_addr; + int rc = 0; + struct tpm_chip *chip; + + old_addr = tpm_dev.addr; + if (dev_addr != 0) + tpm_dev.addr = dev_addr; + + chip = tpm_register_hardware(&st_i2c_tpm); + + if (chip < 0) { + rc = -ENODEV; + goto out_err; + } + + /* Default timeouts */ + chip->vendor.timeout_a = TIS_SHORT_TIMEOUT; + chip->vendor.timeout_b = TIS_LONG_TIMEOUT; + chip->vendor.timeout_c = TIS_SHORT_TIMEOUT; + chip->vendor.timeout_d = TIS_SHORT_TIMEOUT; + + chip->vendor.locality = LOCALITY0; + + if (request_locality(chip) != 0) { + rc = -ENODEV; + goto out_err; + } + + vendor = be32_to_cpu(vendor); + + + dev_info(dev, "1.2 TPM STMicroelectronics"); + /* + * A timeout query to TPM can be placed here. + * Standard timeout values are used so far + */ + + return 0; + +out_err: + tpm_dev.addr = old_addr; + return rc; +} /* tpm_vendor_init() */ + + + +void tpm_vendor_cleanup(struct tpm_chip *chip) +{ + release_locality(chip); +} /* tpm_vendor_cleanup() */ diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index 48ce4c0..ef381f8 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -111,6 +111,14 @@ #define STATUS_LED_BOOT STATUS_LED_BIT #define STATUS_LED_GREEN STATUS_LED_BIT1 +/* TPM */ +#define CONFIG_CMD_TPM +#define CONFIG_TPM +#define CONFIG_ST_TPM_DEBUG +#define CONFIG_ST_TPM_I2C +#define CONFIG_TPM_I2C_BUS 1 +#define CONFIG_TPM_I2C_ADDR 0x13 + /* Enable Multi Bus support for I2C */ #define CONFIG_I2C_MULTI_BUS 1 diff --git a/include/tpm.h b/include/tpm.h index 6b21e9c..9074885 100644 --- a/include/tpm.h +++ b/include/tpm.h @@ -68,4 +68,20 @@ int tis_close(void); int tis_sendrecv(const uint8_t *sendbuf, size_t send_size, uint8_t *recvbuf, size_t *recv_len); +/* + * tis_sendrecv_hash() + * + * Send the requested data to the TPM for hash in LOC 4 + * and then try to get its response + * + * @sendbuf - buffer of the data to hash + * @send_size size of the data to send + * @recvbuf - memory to save the response to + * @recv_len - pointer to the size of the response buffer + * + * Returns 0 on success (and places the number of response bytes at recv_len) + * or -1 on failure. + */ +int tis_sendrecv_hash(const uint8_t *sendbuf, size_t send_size, uint8_t *recvbuf, + size_t *recv_len); #endif /* _INCLUDE_TPM_H_ */ -- 1.7.1

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[U-Boot] [PATCH v5 0/7] Add gdsys ControlCenter Digital board
by dirk.eibach＠gdsys.cc 11 May '13

11 May '13

From: Dirk Eibach <dirk.eibach(a)gdsys.cc> Changes in v5: - avoid probing dp501 i2c bridge addresses - fix i2c_probe Changes in v4: - consider CONFIG_CMD_BOOTM for all architectures Changes in v3: - fix email addresses Changes in v2: - configuration for SPI builds was missing - replace some numeric constants with named constants - style fixes (as shown by checkpatch.pl) in common/cmd_tpm.c and lib/tpm.c - whitespace fixes Dirk Eibach (5): Update gdsys email account mpc85xx: Add CONFIG_RELEASE_CORE0_ONLY Add Atmel I2C tpm Build arch/$ARCH/lib/bootm.o depending on CONFIG_CMD_BOOTM mpc85xx: Add gdsys ControlCenter Digital board Reinhard Pfau (2): tpm: add AUTH1 cmds for LoadKey2 and GetPubKey i2c: fsl_i2c: i2c_read(): dont try to write address w/ alen=0 MAINTAINERS | 2 +- README | 20 + arch/arm/lib/Makefile | 2 +- arch/avr32/lib/Makefile | 2 +- arch/m68k/lib/Makefile | 2 +- arch/microblaze/lib/Makefile | 2 +- arch/mips/lib/Makefile | 4 +- arch/nds32/lib/Makefile | 3 +- arch/nios2/lib/Makefile | 2 +- arch/openrisc/lib/Makefile | 2 +- arch/powerpc/cpu/mpc85xx/mp.c | 8 +- arch/powerpc/cpu/ppc4xx/cmd_chip_config.c | 2 +- arch/powerpc/include/asm/ppc4xx_config.h | 2 +- arch/powerpc/lib/Makefile | 2 +- arch/sh/lib/Makefile | 2 +- arch/sparc/lib/Makefile | 3 +- arch/x86/lib/Makefile | 2 +- board/gdsys/405ep/405ep.c | 2 +- board/gdsys/405ep/dlvision-10g.c | 2 +- board/gdsys/405ep/io.c | 2 +- board/gdsys/405ep/iocon.c | 2 +- board/gdsys/405ep/neo.c | 2 +- board/gdsys/405ex/io64.c | 2 +- board/gdsys/common/Makefile | 1 + board/gdsys/common/dp501.c | 107 +++ board/gdsys/common/dp501.h | 30 + board/gdsys/common/miiphybb.c | 2 +- board/gdsys/common/osd.c | 2 +- board/gdsys/common/osd.h | 2 +- board/gdsys/dlvision/dlvision.c | 2 +- board/gdsys/gdppc440etx/gdppc440etx.c | 2 +- board/gdsys/gdppc440etx/init.S | 2 +- board/gdsys/intip/init.S | 2 +- board/gdsys/intip/intip.c | 2 +- board/gdsys/p1022/Makefile | 37 + board/gdsys/p1022/controlcenterd-id.c | 1205 +++++++++++++++++++++++++++++ board/gdsys/p1022/controlcenterd-id.h | 29 + board/gdsys/p1022/controlcenterd.c | 447 +++++++++++ board/gdsys/p1022/ddr.c | 71 ++ board/gdsys/p1022/diu.c | 87 +++ board/gdsys/p1022/law.c | 20 + board/gdsys/p1022/sdhc_boot.c | 63 ++ board/gdsys/p1022/tlb.c | 77 ++ boards.cfg | 7 + common/cmd_tpm.c | 100 +++ drivers/gpio/pca9698.c | 2 +- drivers/hwmon/lm63.c | 2 +- drivers/i2c/fsl_i2c.c | 9 +- drivers/tpm/Makefile | 1 + drivers/tpm/atmel_twi_tpm.c | 119 +++ include/configs/controlcenterd.h | 527 +++++++++++++ include/configs/dlvision-10g.h | 2 +- include/configs/dlvision.h | 2 +- include/configs/gdppc440etx.h | 2 +- include/configs/intip.h | 2 +- include/configs/io.h | 2 +- include/configs/io64.h | 2 +- include/configs/iocon.h | 2 +- include/configs/neo.h | 2 +- include/gdsys_fpga.h | 2 +- include/pca9698.h | 2 +- include/tpm.h | 174 +++++ lib/tpm.c | 351 +++++++++- 63 files changed, 3528 insertions(+), 48 deletions(-) create mode 100644 board/gdsys/common/dp501.c create mode 100644 board/gdsys/common/dp501.h create mode 100644 board/gdsys/p1022/Makefile create mode 100644 board/gdsys/p1022/controlcenterd-id.c create mode 100644 board/gdsys/p1022/controlcenterd-id.h create mode 100644 board/gdsys/p1022/controlcenterd.c create mode 100644 board/gdsys/p1022/ddr.c create mode 100644 board/gdsys/p1022/diu.c create mode 100644 board/gdsys/p1022/law.c create mode 100644 board/gdsys/p1022/sdhc_boot.c create mode 100644 board/gdsys/p1022/tlb.c create mode 100644 drivers/tpm/atmel_twi_tpm.c create mode 100644 include/configs/controlcenterd.h -- 1.7.2.5

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