April 2013 - U-Boot

[U-Boot] [RFC PATCH 0/1] GPIO support for Microblaze
by Michal Simek 29 Apr '13

29 Apr '13

I want to also write gpio support for Zynq and this driver should be also used for arm zynq. Currently we have support just for only gpio controller but not for various of them. That's why I would like to get some input from you if possible to add dynamic gpio allocation which could be also helpful for OF support. Output from my gpio status on Microblaze is below. Thanks, Michal U-Boot> gpio status gpio_info: reset/40000000 (0-0) GPIO_0: reset_pin is an INPUT value = 0 gpio_info: led/40040000 (1-5) GPIO_1: UNKNOWN is an INPUT value = 0 GPIO_2: UNKNOWN is an OUTPUT value = 1 GPIO_3: UNKNOWN is an INPUT value = 0 GPIO_4: UNKNOWN is an INPUT value = 0 GPIO_5: UNKNOWN is an OUTPUT value = 0 Michal Simek (1): gpio: Add support for microblaze xilinx GPIO arch/microblaze/include/asm/gpio.h | 50 +--- .../xilinx/microblaze-generic/microblaze-generic.c | 17 +- drivers/gpio/Makefile | 1 + drivers/gpio/xilinx_gpio.c | 323 +++++++++++++++++++++ include/configs/microblaze-generic.h | 3 +- 5 files changed, 353 insertions(+), 41 deletions(-) create mode 100644 drivers/gpio/xilinx_gpio.c -- 1.8.2.1

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[U-Boot] u-boot was skipped: because UBOOT_MACHINE is not set
by Zafrullah Syed 29 Apr '13

29 Apr '13

Hi all, I am trying to build<http://gumstix.org/software-development/yocto-project.html> a bitbake target for my RobOvero board.I get this following error: "*ERROR: u-boot was skipped: because UBOOT_MACHINE is not set*" How do I set values and build uboot for Overo Series RobOvero board(PCB 30019-R3277) Thank You. -- Regards, Zafrullah Syed

1 0

[U-Boot] [PATCH v2 0/15] Xilinx Zynq patches
by Michal Simek 29 Apr '13

29 Apr '13

Patchset contains several patches which improve Xilinx Zynq arm port. Patchset contain: - core changes - gem updates - mmc support - i2c support - pl support I am sending them in one package because driver depends on each other in zynq shared files. Thanks for your comments, Michal P.S.: The first version sent by patman that's why sorry for any mistake. Changes in v2: - New patch in this series to reflect Tom's comments - Remove XPSS_ prefix and replace it with ZYNQ - Remove CONFIG_ prefix from non configurable macros (scutimer) - Remove CONFIG_ prefix from non configurable macro (gem) - Remove CONFIG_ prefix from non configurable macros (emio) - Remove CONFIG_ prefix from non configurable macros (sdhci) - Remove CONFIG_ prefix from non configurable macros (i2c) - Fix checkpatch warnings (i2c) - Fix #define<space>Macro name (i2c) - Fix multiline comments (i2c) - Remove trailing 1 for configurations (i2c) - Fix bugs reported by Tom Rini - Fix checkpatch warnings (fpga) - Fix comments (fpga) - Do not use CamelCase for XilinxZynq (fpga) David Andrey (3): arm: zynq: U-Boot udelay < 1000 FIX net: gem: Pass phy address to init net: gem: Preserve clk on emio interface Michal Simek (12): arm: zynq: Rename XPSS_ prefix to ZYNQ_ for hardcoded SoC addresses zynq: Move scutimer baseaddr to hardware.h net: phy: Define Marvell 88e1518 phy net: gem: Remove WRAP bit from TX buffer description net: gem: Simplify return path in zynq_gem_recv net: gem: Do not initialize BDs again net: gem: Fix gem driver on 1Gbps LAN zynq: Move macros to hardware.h net: gem: Add support for phy autodetection mmc: Add support for Xilinx Zynq sdhci controller i2c: zynq: Add support for Xilinx Zynq fpga: Add support for loading bitstream for Xilinx Zynq arch/arm/cpu/armv7/zynq/slcr.c | 61 ++++++ arch/arm/cpu/armv7/zynq/timer.c | 49 ++++- arch/arm/include/asm/arch-zynq/hardware.h | 36 +++- arch/arm/include/asm/arch-zynq/sys_proto.h | 7 + board/xilinx/zynq/board.c | 66 ++++++- drivers/fpga/Makefile | 1 + drivers/fpga/xilinx.c | 37 ++++ drivers/fpga/zynqpl.c | 231 ++++++++++++++++++++++ drivers/i2c/Makefile | 1 + drivers/i2c/zynq_i2c.c | 306 +++++++++++++++++++++++++++++ drivers/mmc/Makefile | 1 + drivers/mmc/zynq_sdhci.c | 40 ++++ drivers/net/phy/marvell.c | 11 ++ drivers/net/zynq_gem.c | 199 +++++++++++++------ include/configs/zynq.h | 39 +++- include/netdev.h | 2 +- include/xilinx.h | 4 + include/zynqpl.h | 59 ++++++ 18 files changed, 1065 insertions(+), 85 deletions(-) create mode 100644 drivers/fpga/zynqpl.c create mode 100644 drivers/i2c/zynq_i2c.c create mode 100644 drivers/mmc/zynq_sdhci.c create mode 100644 include/zynqpl.h -- 1.8.2.1

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[U-Boot] [PATCH v2] mmc: Split device init to decouple OCR-polling delay
by Simon Glass 29 Apr '13

29 Apr '13

From: Che-Liang Chiou <clchiou(a)chromium.org> Most of time that MMC driver spends on initializing a device is polling OCR (operation conditions register). To decouple this polling loop, device init is split into two parts: The first part fires the OCR query command, and the second part polls the result. So the caller is now no longer bound to the OCR-polling delay; he may fire the query, go somewhere and then come back later for the result. To use this, call mmc_set_preinit() on any device which needs this. This can save significant amounts of time on boot (e.g. 200ms) by hiding the MMC init time behind other init. Signed-off-by: Che-Liang Chiou <clchiou(a)chromium.org> Signed-off-by: Simon Glass <sjg(a)chromium.org> --- Changes in v2: - Rebase to master drivers/mmc/mmc.c | 137 ++++++++++++++++++++++++++++++++++++++++------------ include/mmc.h | 30 ++++++++++++ 2 files changed, 135 insertions(+), 32 deletions(-) diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index 72e8ce6..09695e8 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -503,48 +503,70 @@ static int sd_send_op_cond(struct mmc *mmc) return 0; } -static int mmc_send_op_cond(struct mmc *mmc) +/* We pass in the cmd since otherwise the init seems to fail */ +static int mmc_send_op_cond_iter(struct mmc *mmc, struct mmc_cmd *cmd, + int use_arg) { - int timeout = 10000; - struct mmc_cmd cmd; int err; + cmd->cmdidx = MMC_CMD_SEND_OP_COND; + cmd->resp_type = MMC_RSP_R3; + cmd->cmdarg = 0; + if (use_arg && !mmc_host_is_spi(mmc)) { + cmd->cmdarg = + (mmc->voltages & + (mmc->op_cond_response & OCR_VOLTAGE_MASK)) | + (mmc->op_cond_response & OCR_ACCESS_MODE); + + if (mmc->host_caps & MMC_MODE_HC) + cmd->cmdarg |= OCR_HCS; + } + err = mmc_send_cmd(mmc, cmd, NULL); + if (err) + return err; + mmc->op_cond_response = cmd->response[0]; + return 0; +} + +int mmc_send_op_cond(struct mmc *mmc) +{ + struct mmc_cmd cmd; + int err, i; + /* Some cards seem to need this */ mmc_go_idle(mmc); /* Asking to the card its capabilities */ - cmd.cmdidx = MMC_CMD_SEND_OP_COND; - cmd.resp_type = MMC_RSP_R3; - cmd.cmdarg = 0; - - err = mmc_send_cmd(mmc, &cmd, NULL); + mmc->op_cond_pending = 1; + for (i = 0; i < 2; i++) { + err = mmc_send_op_cond_iter(mmc, &cmd, i != 0); + if (err) + return err; - if (err) - return err; + /* exit if not busy (flag seems to be inverted) */ + if (mmc->op_cond_response & OCR_BUSY) + return 0; + } + return IN_PROGRESS; +} - udelay(1000); +int mmc_complete_op_cond(struct mmc *mmc) +{ + struct mmc_cmd cmd; + int timeout = 1000; + uint start; + int err; + mmc->op_cond_pending = 0; + start = get_timer(0); do { - cmd.cmdidx = MMC_CMD_SEND_OP_COND; - cmd.resp_type = MMC_RSP_R3; - cmd.cmdarg = (mmc_host_is_spi(mmc) ? 0 : - (mmc->voltages & - (cmd.response[0] & OCR_VOLTAGE_MASK)) | - (cmd.response[0] & OCR_ACCESS_MODE)); - - if (mmc->host_caps & MMC_MODE_HC) - cmd.cmdarg |= OCR_HCS; - - err = mmc_send_cmd(mmc, &cmd, NULL); - + err = mmc_send_op_cond_iter(mmc, &cmd, 1); if (err) return err; - - udelay(1000); - } while (!(cmd.response[0] & OCR_BUSY) && timeout--); - - if (timeout <= 0) - return UNUSABLE_ERR; + if (get_timer(start) > timeout) + return UNUSABLE_ERR; + udelay(100); + } while (!(mmc->op_cond_response & OCR_BUSY)); if (mmc_host_is_spi(mmc)) { /* read OCR for spi */ cmd.cmdidx = MMC_CMD_SPI_READ_OCR; @@ -1227,7 +1249,7 @@ block_dev_desc_t *mmc_get_dev(int dev) } #endif -int mmc_init(struct mmc *mmc) +int mmc_start_init(struct mmc *mmc) { int err; @@ -1267,17 +1289,48 @@ int mmc_init(struct mmc *mmc) if (err == TIMEOUT) { err = mmc_send_op_cond(mmc); - if (err) { + if (err && err != IN_PROGRESS) { printf("Card did not respond to voltage select!\n"); return UNUSABLE_ERR; } } - err = mmc_startup(mmc); + if (err == IN_PROGRESS) + mmc->init_in_progress = 1; + + return err; +} + +static int mmc_complete_init(struct mmc *mmc) +{ + int err = 0; + + if (mmc->op_cond_pending) + err = mmc_complete_op_cond(mmc); + + if (!err) + err = mmc_startup(mmc); if (err) mmc->has_init = 0; else mmc->has_init = 1; + mmc->init_in_progress = 0; + return err; +} + +int mmc_init(struct mmc *mmc) +{ + int err = IN_PROGRESS; + unsigned start = get_timer(0); + + if (mmc->has_init) + return 0; + if (!mmc->init_in_progress) + err = mmc_start_init(mmc); + + if (!err || err == IN_PROGRESS) + err = mmc_complete_init(mmc); + debug("%s: %d, time %lu\n", __func__, err, get_timer(start)); return err; } @@ -1315,6 +1368,25 @@ int get_mmc_num(void) return cur_dev_num; } +void mmc_set_preinit(struct mmc *mmc, int preinit) +{ + mmc->preinit = preinit; +} + +static void do_preinit(void) +{ + struct mmc *m; + struct list_head *entry; + + list_for_each(entry, &mmc_devices) { + m = list_entry(entry, struct mmc, link); + + if (m->preinit) + mmc_start_init(m); + } +} + + int mmc_initialize(bd_t *bis) { INIT_LIST_HEAD (&mmc_devices); @@ -1325,5 +1397,6 @@ int mmc_initialize(bd_t *bis) print_mmc_devices(','); + do_preinit(); return 0; } diff --git a/include/mmc.h b/include/mmc.h index a13e2bd..445d714 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -62,6 +62,7 @@ #define UNUSABLE_ERR -17 /* Unusable Card */ #define COMM_ERR -18 /* Communications Error */ #define TIMEOUT -19 +#define IN_PROGRESS -20 /* operation is in progress */ #define MMC_CMD_GO_IDLE_STATE 0 #define MMC_CMD_SEND_OP_COND 1 @@ -260,6 +261,10 @@ struct mmc { int (*init)(struct mmc *mmc); int (*getcd)(struct mmc *mmc); uint b_max; + char op_cond_pending; /* 1 if we are waiting on an op_cond command */ + char init_in_progress; /* 1 if we have done mmc_start_init() */ + char preinit; /* start init as early as possible */ + uint op_cond_response; /* the response byte from the last op_cond */ }; int mmc_register(struct mmc *mmc); @@ -276,6 +281,31 @@ int mmc_switch_part(int dev_num, unsigned int part_num); int mmc_getcd(struct mmc *mmc); void spl_mmc_load(void) __noreturn; +/** + * Start device initialization and return immediately; it does not block on + * polling OCR (operation condition register) status. Then you should call + * mmc_init, which would block on polling OCR status and complete the device + * initializatin. + * + * @param mmc Pointer to a MMC device struct + * @return 0 on success, IN_PROGRESS on waiting for OCR status, <0 on error. + */ +int mmc_start_init(struct mmc *mmc); + +/** + * Set preinit flag of mmc device. + * + * This will cause the device to be pre-inited during mmc_initialize(), + * which may save boot time if the device is not accessed until later. + * Some eMMC devices take 200-300ms to init, but unfortunately they + * must be sent a series of commands to even get them to start preparing + * for operation. + * + * @param mmc Pointer to a MMC device struct + * @param preinit preinit flag value + */ +void mmc_set_preinit(struct mmc *mmc, int preinit); + #ifdef CONFIG_GENERIC_MMC #define mmc_host_is_spi(mmc) ((mmc)->host_caps & MMC_MODE_SPI) struct mmc *mmc_spi_init(uint bus, uint cs, uint speed, uint mode); -- 1.7.7.3

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[U-Boot] mx28evk spi boot
by smithknown 29 Apr '13

29 Apr '13

I populated N25M256A spi norflash chip into freescale mx28evk board. include/configs/mx28evk.h /* SPI Flash */ #define CONFIG_SPI_FLASH #define CONFIG_SF_DEFAULT_BUS 2 #define CONFIG_SF_DEFAULT_CS 0 /* this may vary and depends on the installed chip */ #define CONFIG_SPI_FLASH_STMICRO #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 #define CONFIG_SF_DEFAULT_SPEED 50000000 /* SPI MXS driver*/ #define CONFIG_HARD_SPI #define CONFIG_MXS_SPI #define CONFIG_SPI_HALF_DUPLEX #define CONFIG_DEFAULT_SPI_BUS 2 #define CONFIG_DEFAULT_SPI_MODE SPI_MODE_0 verified that u-boot-2013.04 has N25M256A supported: static const struct stmicro_spi_flash_params stmicro_spi_flash_table[] = { .............. { .id = 0xbb19, .pages_per_sector = 256, .nr_sectors = 512, .name = "N25Q256A", }, }; But at u-boot, the spi read always return 0xff as follows: MX28EVK U-Boot > sf probe 2:0 50000000 0 SF: Unsupported manufacturer ff Failed to initialize SPI flash at 2:0 MX28EVK U-Boot > sf probe 2:0 50000000 3 SF: Unsupported manufacturer ff Failed to initialize SPI flash at 2:0 I do not want to say that there is hardware issue too early, wonder if I missed any steps here? Thanks, Smith -- View this message in context: http://u-boot.10912.n7.nabble.com/mx28evk-spi-boot-tp153575.html Sent from the U-Boot mailing list archive at Nabble.com.

1 1

[U-Boot] [PATCH] arm: mxs: Preprocess u-boot.bd so they contain full path
by Marek Vasut 29 Apr '13

29 Apr '13

The u-boot-imx23.bd and u-boot-imx28.bd need to be preprocessed, otherwise they have issues with out-of-tree build where elftosb tool couldn't sometimes find the u-boot.bin and spl/u-boot-spl.bin . Preprocess these .bd files with sed and insert full path to u-boot.bin and spl/u-boot-spl.bin to prevent this issue. Moreover, to avoid adding more churn into main Makefile, move all this preprocessing and u-boot.sb generation into CPU directory instead. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Fabio Estevam <fabio.estevam(a)freescale.com> Cc: Stefano Babic <sbabic(a)denx.de> --- Makefile | 7 ++----- arch/arm/cpu/arm926ejs/mxs/Makefile | 10 ++++++++++ arch/arm/cpu/arm926ejs/mxs/u-boot-imx23.bd | 4 ++-- arch/arm/cpu/arm926ejs/mxs/u-boot-imx28.bd | 4 ++-- 4 files changed, 16 insertions(+), 9 deletions(-) diff --git a/Makefile b/Makefile index f8ecfd7..5338924 100644 --- a/Makefile +++ b/Makefile @@ -512,13 +512,9 @@ $(obj)u-boot.ais: $(obj)spl/u-boot-spl.bin $(obj)u-boot.img cat $(obj)spl/u-boot-spl-pad.ais $(obj)u-boot.img > \ $(obj)u-boot.ais -# Specify the target for use in elftosb call -ELFTOSB_TARGET-$(CONFIG_MX23) = imx23 -ELFTOSB_TARGET-$(CONFIG_MX28) = imx28 $(obj)u-boot.sb: $(obj)u-boot.bin $(obj)spl/u-boot-spl.bin - elftosb -zf $(ELFTOSB_TARGET-y) -c $(TOPDIR)/$(CPUDIR)/$(SOC)/u-boot-$(ELFTOSB_TARGET-y).bd \ - -o $(obj)u-boot.sb + $(MAKE) -C $(SRCTREE)/$(CPUDIR)/$(SOC)/ $(OBJTREE)/u-boot.sb # On x600 (SPEAr600) U-Boot is appended to U-Boot SPL. # Both images are created using mkimage (crc etc), so that the ROM @@ -861,6 +857,7 @@ clobber: tidy @rm -f $(obj)u-boot.ais @rm -f $(obj)u-boot.dtb @rm -f $(obj)u-boot.sb + @rm -f $(obj)u-boot.bd @rm -f $(obj)u-boot.spr @rm -f $(obj)nand_spl/{u-boot.{lds,lst},System.map} @rm -f $(obj)nand_spl/{u-boot-nand_spl.lds,u-boot-spl,u-boot-spl.map} diff --git a/arch/arm/cpu/arm926ejs/mxs/Makefile b/arch/arm/cpu/arm926ejs/mxs/Makefile index eeecf89..038c1c1 100644 --- a/arch/arm/cpu/arm926ejs/mxs/Makefile +++ b/arch/arm/cpu/arm926ejs/mxs/Makefile @@ -40,6 +40,16 @@ all: $(obj).depend $(LIB) $(LIB): $(OBJS) $(call cmd_link_o_target, $(OBJS)) +# Specify the target for use in elftosb call +ELFTOSB_TARGET-$(CONFIG_MX23) = imx23 +ELFTOSB_TARGET-$(CONFIG_MX28) = imx28 + +$(OBJTREE)/u-boot.bd: $(SRCTREE)/$(CPUDIR)/$(SOC)/u-boot-$(ELFTOSB_TARGET-y).bd + sed "s@OBJTREE@$(OBJTREE)@g" $^ > $@ + +$(OBJTREE)/u-boot.sb: $(OBJTREE)/u-boot.bin $(OBJTREE)/spl/u-boot-spl.bin $(OBJTREE)/u-boot.bd + elftosb -zf $(ELFTOSB_TARGET-y) -c $(OBJTREE)/u-boot.bd -o $(OBJTREE)/u-boot.sb + ######################################################################### # defines $(obj).depend target diff --git a/arch/arm/cpu/arm926ejs/mxs/u-boot-imx23.bd b/arch/arm/cpu/arm926ejs/mxs/u-boot-imx23.bd index 3a51879..8b6c30e 100644 --- a/arch/arm/cpu/arm926ejs/mxs/u-boot-imx23.bd +++ b/arch/arm/cpu/arm926ejs/mxs/u-boot-imx23.bd @@ -4,8 +4,8 @@ options { } sources { - u_boot_spl="spl/u-boot-spl.bin"; - u_boot="u-boot.bin"; + u_boot_spl="OBJTREE/spl/u-boot-spl.bin"; + u_boot="OBJTREE/u-boot.bin"; } section (0) { diff --git a/arch/arm/cpu/arm926ejs/mxs/u-boot-imx28.bd b/arch/arm/cpu/arm926ejs/mxs/u-boot-imx28.bd index c60615a..a5fa648 100644 --- a/arch/arm/cpu/arm926ejs/mxs/u-boot-imx28.bd +++ b/arch/arm/cpu/arm926ejs/mxs/u-boot-imx28.bd @@ -1,6 +1,6 @@ sources { - u_boot_spl="spl/u-boot-spl.bin"; - u_boot="u-boot.bin"; + u_boot_spl="OBJTREE/spl/u-boot-spl.bin"; + u_boot="OBJTREE/u-boot.bin"; } section (0) { -- 1.7.10.4

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[U-Boot] [PATCH] mx23: Put back RAM voltage level to its original value
by Fabio Estevam 29 Apr '13

29 Apr '13

From: Fabio Estevam <fabio.estevam(a)freescale.com> commit 5c2f444c9 (mxs: Reset the EMI block on mx23) changed the DDR voltage level, which causes mx23evk to fail to load a kernel. Put back the original values, so that mx23evk can boot a kernel again. Signed-off-by: Fabio Estevam <fabio.estevam(a)freescale.com> --- arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c index bc2d69c..4950490 100644 --- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c +++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c @@ -234,7 +234,7 @@ static void mx23_mem_setup_vddmem(void) struct mxs_power_regs *power_regs = (struct mxs_power_regs *)MXS_POWER_BASE; - writel((0x10 << POWER_VDDMEMCTRL_TRG_OFFSET) | + writel((0x12 << POWER_VDDMEMCTRL_TRG_OFFSET) | POWER_VDDMEMCTRL_ENABLE_ILIMIT | POWER_VDDMEMCTRL_ENABLE_LINREG | POWER_VDDMEMCTRL_PULLDOWN_ACTIVE, @@ -242,7 +242,7 @@ static void mx23_mem_setup_vddmem(void) early_delay(10000); - writel((0x10 << POWER_VDDMEMCTRL_TRG_OFFSET) | + writel((0x12 << POWER_VDDMEMCTRL_TRG_OFFSET) | POWER_VDDMEMCTRL_ENABLE_LINREG, &power_regs->hw_power_vddmemctrl); } -- 1.7.9.5

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[U-Boot] How to make DocBook
by TigerLiu＠viatech.com.cn 28 Apr '13

28 Apr '13

Hi, experts: How to make doc/DocBook? I tried to execute "make htmldocs", it tips: "u-boot/doc/DocBook/fs.xml not found" Best wishes,

2 1

[U-Boot] [PATCH 0/5] vybrid: Add vybrid CPU and vf600 tower board support
by Alison Wang 28 Apr '13

28 Apr '13

This series contains the support for vybrid CPU and vf600 tower board. The Vybrid devices are a family of Freescale's latest Dual Single Core offering with ARM Cortex A5 and CM4 based processors for Advanced Connected Radio, Entry Infotainment, and Cluster as well as high end industrial and general purpose applications. Alison Wang (5): vybrid: add vybrid CPU support vybrid: add Freescale vybrid vf600 tower board support vybrid: add uart driver support vybrid: add eSDHC driver support vybrid: add ethernet driver support Makefile | 8 ++ arch/arm/cpu/armv7/vybrid-common/Makefile | 46 +++++++ arch/arm/cpu/armv7/vybrid-common/cpu.c | 127 ++++++++++++++++++ arch/arm/cpu/armv7/vybrid-common/speed.c | 37 +++++ arch/arm/cpu/armv7/vybrid-common/timer.c | 140 +++++++++++++++++++ arch/arm/cpu/armv7/vybrid/Makefile | 45 +++++++ arch/arm/cpu/armv7/vybrid/asm-offsets.c | 70 ++++++++++ arch/arm/cpu/armv7/vybrid/clock.c | 278 ++++++++++++++++++++++++++++++++++++++ arch/arm/cpu/armv7/vybrid/iomux.c | 42 ++++++ arch/arm/cpu/armv7/vybrid/lowlevel_init.S | 128 ++++++++++++++++++ arch/arm/cpu/armv7/vybrid/soc.c | 42 ++++++ arch/arm/include/asm/arch-vybrid/clock.h | 41 ++++++ arch/arm/include/asm/arch-vybrid/iomux.h | 323 ++++++++++++++++++++++++++++++++++++++++++++ arch/arm/include/asm/arch-vybrid/serial-vybrid.h | 213 +++++++++++++++++++++++++++++ arch/arm/include/asm/arch-vybrid/sys_proto.h | 30 +++++ arch/arm/include/asm/arch-vybrid/timer.h | 405 +++++++++++++++++++++++++++++++++++++++++++++++++++++++ arch/arm/include/asm/arch-vybrid/vybrid-pins.h | 88 ++++++++++++ arch/arm/include/asm/arch-vybrid/vybrid-regs.h | 735 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ arch/arm/include/asm/fec.h | 302 +++++++++++++++++++++++++++++++++++++++++ arch/arm/include/asm/global_data.h | 3 + arch/arm/include/asm/mach-types.h | 56 ++++++++ arch/arm/include/asm/u-boot.h | 3 + board/freescale/vybrid/Makefile | 40 ++++++ board/freescale/vybrid/vybrid.c | 488 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ board/freescale/vybrid/vybridimage.cfg | 44 ++++++ boards.cfg | 2 + drivers/mmc/fsl_esdhc.c | 4 +- drivers/net/mcffec.c | 18 ++- drivers/net/mcfmii.c | 5 +- drivers/serial/Makefile | 1 + drivers/serial/serial.c | 2 + drivers/serial/serial_vybrid.c | 129 ++++++++++++++++++ include/configs/vybrid.h | 284 +++++++++++++++++++++++++++++++++++++++ include/configs/vybrid_iram.h | 284 +++++++++++++++++++++++++++++++++++++++ 34 files changed, 4455 insertions(+), 8 deletions(-) create mode 100644 arch/arm/cpu/armv7/vybrid-common/Makefile create mode 100644 arch/arm/cpu/armv7/vybrid-common/cpu.c create mode 100644 arch/arm/cpu/armv7/vybrid-common/speed.c create mode 100644 arch/arm/cpu/armv7/vybrid-common/timer.c create mode 100644 arch/arm/cpu/armv7/vybrid/Makefile create mode 100644 arch/arm/cpu/armv7/vybrid/asm-offsets.c create mode 100644 arch/arm/cpu/armv7/vybrid/clock.c create mode 100644 arch/arm/cpu/armv7/vybrid/iomux.c create mode 100644 arch/arm/cpu/armv7/vybrid/lowlevel_init.S create mode 100644 arch/arm/cpu/armv7/vybrid/soc.c create mode 100644 arch/arm/include/asm/arch-vybrid/clock.h create mode 100644 arch/arm/include/asm/arch-vybrid/iomux.h create mode 100644 arch/arm/include/asm/arch-vybrid/serial-vybrid.h create mode 100644 arch/arm/include/asm/arch-vybrid/sys_proto.h create mode 100644 arch/arm/include/asm/arch-vybrid/timer.h create mode 100644 arch/arm/include/asm/arch-vybrid/vybrid-pins.h create mode 100644 arch/arm/include/asm/arch-vybrid/vybrid-regs.h create mode 100644 arch/arm/include/asm/fec.h create mode 100644 board/freescale/vybrid/Makefile create mode 100644 board/freescale/vybrid/vybrid.c create mode 100644 board/freescale/vybrid/vybridimage.cfg create mode 100644 drivers/serial/serial_vybrid.c create mode 100644 include/configs/vybrid.h create mode 100644 include/configs/vybrid_iram.h

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[U-Boot] [PATCH 1/4] imx: iomux-v3: Fix common pad control definitions
by Benoît Thébaudeau 28 Apr '13

28 Apr '13

Commit dc88403 "iomux-v3: Place pad control definitions into common file" broke mx51_efikamx because it made i.MX6's pad control definitions conflict with i.MX51's. i.MX51's pad control definitions are actually common to some other i.MX (25/35/53), so move them to the common iomux-v3.h (just like what is done in Linux's), and select the correct definitions depending on whether CONFIG_MX6 is defined or not. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau(a)advansee.com> --- arch/arm/include/asm/arch-mx5/iomux-mx51.h | 23 ----------------------- arch/arm/include/asm/imx-common/iomux-v3.h | 28 ++++++++++++++++++++++++++++ 2 files changed, 28 insertions(+), 23 deletions(-) diff --git a/arch/arm/include/asm/arch-mx5/iomux-mx51.h b/arch/arm/include/asm/arch-mx5/iomux-mx51.h index 4f37295..5f96dc4 100644 --- a/arch/arm/include/asm/arch-mx5/iomux-mx51.h +++ b/arch/arm/include/asm/arch-mx5/iomux-mx51.h @@ -21,27 +21,6 @@ #include <asm/imx-common/iomux-v3.h> -#define PAD_CTL_DVS (1 << 13) -#define PAD_CTL_INPUT_DDR (1 << 9) -#define PAD_CTL_HYS (1 << 8) - -#define PAD_CTL_PKE (1 << 7) -#define PAD_CTL_PUE (1 << 6 | PAD_CTL_PKE) -#define PAD_CTL_PUS_100K_DOWN (0 << 4 | PAD_CTL_PUE) -#define PAD_CTL_PUS_47K_UP (1 << 4 | PAD_CTL_PUE) -#define PAD_CTL_PUS_100K_UP (2 << 4 | PAD_CTL_PUE) -#define PAD_CTL_PUS_22K_UP (3 << 4 | PAD_CTL_PUE) - -#define PAD_CTL_ODE (1 << 3) - -#define PAD_CTL_DSE_LOW (0 << 1) -#define PAD_CTL_DSE_MED (1 << 1) -#define PAD_CTL_DSE_HIGH (2 << 1) -#define PAD_CTL_DSE_MAX (3 << 1) - -#define PAD_CTL_SRE_FAST (1 << 0) -#define PAD_CTL_SRE_SLOW (0 << 0) - /* Pad control groupings */ #define MX51_UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_DSE_HIGH | \ PAD_CTL_HYS | PAD_CTL_SRE_FAST) @@ -61,8 +40,6 @@ PAD_CTL_SRE_FAST | PAD_CTL_DVS) #define MX51_GPIO_PAD_CTRL (PAD_CTL_DSE_HIGH | PAD_CTL_PKE | PAD_CTL_SRE_FAST) -#define __NA_ 0x000 - /* * The naming convention for the pad modes is MX51_PAD_<padname>__<padmode> * If <padname> or <padmode> refers to a GPIO, it is named GPIO<unit>_<num> diff --git a/arch/arm/include/asm/imx-common/iomux-v3.h b/arch/arm/include/asm/imx-common/iomux-v3.h index 7b1580d..87d849a 100644 --- a/arch/arm/include/asm/imx-common/iomux-v3.h +++ b/arch/arm/include/asm/imx-common/iomux-v3.h @@ -23,6 +23,8 @@ #ifndef __MACH_IOMUX_V3_H__ #define __MACH_IOMUX_V3_H__ +#include <common.h> + /* * build IOMUX_PAD structure * @@ -95,6 +97,8 @@ typedef u64 iomux_v3_cfg_t; #define GPIO_PORTE (4 << GPIO_PORT_SHIFT) #define GPIO_PORTF (5 << GPIO_PORT_SHIFT) +#ifdef CONFIG_MX6 + #define PAD_CTL_HYS (1 << 16) #define PAD_CTL_PUS_100K_DOWN (0 << 14) #define PAD_CTL_PUS_47K_UP (1 << 14) @@ -115,10 +119,34 @@ typedef u64 iomux_v3_cfg_t; #define PAD_CTL_DSE_48ohm (5 << 3) #define PAD_CTL_DSE_40ohm (6 << 3) #define PAD_CTL_DSE_34ohm (7 << 3) + +#else + +#define PAD_CTL_DVS (1 << 13) +#define PAD_CTL_INPUT_DDR (1 << 9) +#define PAD_CTL_HYS (1 << 8) + +#define PAD_CTL_PKE (1 << 7) +#define PAD_CTL_PUE (1 << 6 | PAD_CTL_PKE) +#define PAD_CTL_PUS_100K_DOWN (0 << 4 | PAD_CTL_PUE) +#define PAD_CTL_PUS_47K_UP (1 << 4 | PAD_CTL_PUE) +#define PAD_CTL_PUS_100K_UP (2 << 4 | PAD_CTL_PUE) +#define PAD_CTL_PUS_22K_UP (3 << 4 | PAD_CTL_PUE) + +#define PAD_CTL_ODE (1 << 3) + +#define PAD_CTL_DSE_LOW (0 << 1) +#define PAD_CTL_DSE_MED (1 << 1) +#define PAD_CTL_DSE_HIGH (2 << 1) +#define PAD_CTL_DSE_MAX (3 << 1) + +#endif + #define PAD_CTL_SRE_FAST (1 << 0) #define PAD_CTL_SRE_SLOW (0 << 0) #define IOMUX_CONFIG_SION 0x10 +#define __NA_ 0x000 #define NO_MUX_I 0 #define NO_PAD_I 0 -- 1.7.10.4

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