April 2013 - U-Boot

[U-Boot] [UBOOT PATCH 1/2] ARM:Panda:Fix device tree loading for the panda-es
by Dan Murphy 29 Apr '13

29 Apr '13

Fix the device tree loading for panda(4430) and panda-es(4460) Modify the board name if a 4460 panda or panda-es is detected at run time. In the findfdt add a check for the panda-es board name and load the panda-es device tree blob. Signed-off-by: Dan Murphy <dmurphy(a)ti.com> --- board/ti/panda/panda.c | 6 ++++++ include/configs/omap4_common.h | 4 +++- 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/board/ti/panda/panda.c b/board/ti/panda/panda.c index cab0598..2bbe392 100644 --- a/board/ti/panda/panda.c +++ b/board/ti/panda/panda.c @@ -82,6 +82,12 @@ int misc_init_r(void) if (omap_revision() == OMAP4430_ES1_0) return 0; +#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG + if (omap_revision() >= OMAP4460_ES1_0 || + omap_revision() <= OMAP4460_ES1_1) + setenv("board_name", strcat(CONFIG_SYS_BOARD, "-es")); +#endif + gpio_direction_input(PANDA_ULPI_PHY_TYPE_GPIO); phy_type = gpio_get_value(PANDA_ULPI_PHY_TYPE_GPIO); diff --git a/include/configs/omap4_common.h b/include/configs/omap4_common.h index 1fd3097..68faeca 100644 --- a/include/configs/omap4_common.h +++ b/include/configs/omap4_common.h @@ -176,7 +176,9 @@ "if test $board_name = sdp4430; then " \ "setenv fdtfile omap4-sdp.dtb; fi; " \ "if test $board_name = panda; then " \ - "setenv fdtfile omap4-panda-es.dtb; fi\0" \ + "setenv fdtfile omap4-panda.dtb; fi;" \ + "if test $board_name = panda-es; then " \ + "setenv fdtfile omap4-panda-es.dtb; fi; \0" \ "loadfdt=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \ #define CONFIG_BOOTCOMMAND \ -- 1.7.9.5

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[U-Boot] [PATCH] ARM: OMAP5: Fix warm reset with USB cable connected
by Lokesh Vutla 29 Apr '13

29 Apr '13

Warm reset on OMAP5 freezes when USB cable is connected. Fix requires PRM_RSTTIME.RSTTIME1 to be programmed with the time for which reset should be held low for the voltages and the oscillator to reach stable state. There are 3 parameters to be considered for calculating the time, which are mostly board and PMIC dependent. -1- Time taken by the Oscillator to shut + restart -2- PMIC OTP times -3- Voltage rail ramp times, which inturn depends on the PMIC slew rate and value of the voltage ramp needed. In order to keep the code in u-boot simple, have a way for boards to specify a pre computed time directly using the 'CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC' option. If boards fail to specify the time, use a default as specified by 'CONFIG_DEFAULT_OMAP_RESET_TIME_MAX_USEC' instead. Using the default value translates into some ~22ms and should work in all cases. However in order to avoid this large delay hiding other bugs, its recommended that all boards look at their respective data sheets and specify a pre computed and optimal value using 'CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC' In order to help future board additions to compute this config option value, add a README at doc/README.omap-reset-time which explains how to compute the value. Also update the toplevel README with the additional option and pointers to doc/README.omap-reset-time. Signed-off-by: Lokesh Vutla <lokeshvutla(a)ti.com> [rnayak(a)ti.com: Updated changelog and added the README] Signed-off-by: Rajendra Nayak <rnayak(a)ti.com> --- README | 4 ++++ arch/arm/cpu/armv7/omap-common/clocks-common.c | 1 + arch/arm/cpu/armv7/omap-common/reset.c | 4 ++++ arch/arm/cpu/armv7/omap5/hwinit.c | 19 +++++++++++++++++++ arch/arm/cpu/armv7/omap5/prcm-regs.c | 2 ++ arch/arm/include/asm/arch-omap4/sys_proto.h | 1 + arch/arm/include/asm/arch-omap5/clocks.h | 10 ++++++++++ arch/arm/include/asm/arch-omap5/sys_proto.h | 10 ++++++++++ arch/arm/include/asm/omap_common.h | 1 + doc/README.omap-reset-time | 20 ++++++++++++++++++++ include/configs/omap5_uevm.h | 1 + 11 files changed, 73 insertions(+) create mode 100644 doc/README.omap-reset-time diff --git a/README b/README index 0bc0af5..4531891 100644 --- a/README +++ b/README @@ -3323,6 +3323,10 @@ Configuration Settings: offset _bss_start_ofs from CONFIG_SYS_TEXT_BASE, rather than directly. You should not need to touch this setting. +- CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC (OMAP only) + This is set by OMAP boards for the max time that reset should + be asserted. See doc/README.omap-reset-time for details on how + the value can be calulated on a given board. The following definitions that deal with the placement and management of environment data (variable area); in general, we support the diff --git a/arch/arm/cpu/armv7/omap-common/clocks-common.c b/arch/arm/cpu/armv7/omap-common/clocks-common.c index 2b955c7..99910cd 100644 --- a/arch/arm/cpu/armv7/omap-common/clocks-common.c +++ b/arch/arm/cpu/armv7/omap-common/clocks-common.c @@ -716,6 +716,7 @@ void prcm_init(void) setup_non_essential_dplls(); enable_non_essential_clocks(); #endif + setup_warmreset_time(); break; default: break; diff --git a/arch/arm/cpu/armv7/omap-common/reset.c b/arch/arm/cpu/armv7/omap-common/reset.c index 587bb47..57ea9d9 100644 --- a/arch/arm/cpu/armv7/omap-common/reset.c +++ b/arch/arm/cpu/armv7/omap-common/reset.c @@ -39,3 +39,7 @@ u32 __weak warm_reset(void) { return (readl(PRM_RSTST) & PRM_RSTST_WARM_RESET_MASK); } + +void __weak setup_warmreset_time(void) +{ +} diff --git a/arch/arm/cpu/armv7/omap5/hwinit.c b/arch/arm/cpu/armv7/omap5/hwinit.c index 2f4b247..d29df78 100644 --- a/arch/arm/cpu/armv7/omap5/hwinit.c +++ b/arch/arm/cpu/armv7/omap5/hwinit.c @@ -363,3 +363,22 @@ u32 warm_reset(void) { return readl((*prcm)->prm_rstst) & PRM_RSTST_WARM_RESET_MASK; } + +void setup_warmreset_time(void) +{ + u32 rst_time, rst_val; + +#ifndef CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC + rst_time = CONFIG_DEFAULT_OMAP_RESET_TIME_MAX_USEC; +#else + rst_time = CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC; +#endif + rst_time = usec_to_32k(rst_time) << RSTTIME1_SHIFT; + + if (rst_time > RSTTIME1_MASK) + rst_time = RSTTIME1_MASK; + + rst_val = readl((*prcm)->prm_rsttime) & ~RSTTIME1_MASK; + rst_val |= rst_time; + writel(rst_val, (*prcm)->prm_rsttime); +} diff --git a/arch/arm/cpu/armv7/omap5/prcm-regs.c b/arch/arm/cpu/armv7/omap5/prcm-regs.c index b8a61fe..e9f6a32 100644 --- a/arch/arm/cpu/armv7/omap5/prcm-regs.c +++ b/arch/arm/cpu/armv7/omap5/prcm-regs.c @@ -729,6 +729,7 @@ struct prcm_regs const omap5_es2_prcm = { .cm_wkupaon_io_srcomp_clkctrl = 0x4ae07998, .prm_rstctrl = 0x4ae07c00, .prm_rstst = 0x4ae07c04, + .prm_rsttime = 0x4ae07c08, .prm_vc_val_bypass = 0x4ae07ca0, .prm_vc_cfg_i2c_mode = 0x4ae07cb4, .prm_vc_cfg_i2c_clk = 0x4ae07cb8, @@ -952,6 +953,7 @@ struct prcm_regs const dra7xx_prcm = { .cm_wkupaon_scrm_clkctrl = 0x4ae07890, .prm_rstctrl = 0x4ae07d00, .prm_rstst = 0x4ae07d04, + .prm_rsttime = 0x4ae07d08, .prm_vc_val_bypass = 0x4ae07da0, .prm_vc_cfg_i2c_mode = 0x4ae07db4, .prm_vc_cfg_i2c_clk = 0x4ae07db8, diff --git a/arch/arm/include/asm/arch-omap4/sys_proto.h b/arch/arm/include/asm/arch-omap4/sys_proto.h index d5f1868..ac9c1f8 100644 --- a/arch/arm/include/asm/arch-omap4/sys_proto.h +++ b/arch/arm/include/asm/arch-omap4/sys_proto.h @@ -58,6 +58,7 @@ void omap_vc_init(u16 speed_khz); int omap_vc_bypass_send_value(u8 sa, u8 reg_addr, u8 reg_data); u32 warm_reset(void); void force_emif_self_refresh(void); +void setup_warmreset_time(void); /* * This is used to verify if the configuration header * was executed by Romcode prior to control of transfer diff --git a/arch/arm/include/asm/arch-omap5/clocks.h b/arch/arm/include/asm/arch-omap5/clocks.h index cfde374..68afa76 100644 --- a/arch/arm/include/asm/arch-omap5/clocks.h +++ b/arch/arm/include/asm/arch-omap5/clocks.h @@ -190,6 +190,10 @@ #define OPTFCLKEN_SRCOMP_FCLK_SHIFT 8 #define OPTFCLKEN_SRCOMP_FCLK_MASK (1 << 8) +/* PRM_RSTTIME */ +#define RSTTIME1_SHIFT 0 +#define RSTTIME1_MASK (0x3ff << 0) + /* Clock frequencies */ #define OMAP_SYS_CLK_FREQ_38_4_MHZ 38400000 #define OMAP_SYS_CLK_IND_38_4_MHZ 6 @@ -251,4 +255,10 @@ #define DPLL_NO_LOCK 0 #define DPLL_LOCK 1 +/* + * MAX value for PRM_RSTTIME[9:0]RSTTIME1 stored is 0x3ff. + * 0x3ff is in the no of FUNC_32K_CLK cycles. Converting cycles + * into microsec and passing the value. + */ +#define CONFIG_DEFAULT_OMAP_RESET_TIME_MAX_USEC 31219 #endif /* _CLOCKS_OMAP5_H_ */ diff --git a/arch/arm/include/asm/arch-omap5/sys_proto.h b/arch/arm/include/asm/arch-omap5/sys_proto.h index e66ab44..393c8bf 100644 --- a/arch/arm/include/asm/arch-omap5/sys_proto.h +++ b/arch/arm/include/asm/arch-omap5/sys_proto.h @@ -64,6 +64,7 @@ u32 warm_reset(void); void force_emif_self_refresh(void); void get_ioregs(const struct ctrl_ioregs **regs); void srcomp_enable(void); +void setup_warmreset_time(void); /* * This is used to verify if the configuration header @@ -122,4 +123,13 @@ static inline u32 omap_hw_init_context(void) #endif } +static inline u32 div_round_up(u32 num, u32 den) +{ + return (num + den - 1)/den; +} + +static inline u32 usec_to_32k(u32 usec) +{ + return div_round_up(32768 * usec, 1000000); +} #endif diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h index 091ddb5..6d377d5 100644 --- a/arch/arm/include/asm/omap_common.h +++ b/arch/arm/include/asm/omap_common.h @@ -316,6 +316,7 @@ struct prcm_regs { u32 cm_wkupaon_io_srcomp_clkctrl; u32 prm_rstctrl; u32 prm_rstst; + u32 prm_rsttime; u32 prm_vc_val_bypass; u32 prm_vc_cfg_i2c_mode; u32 prm_vc_cfg_i2c_clk; diff --git a/doc/README.omap-reset-time b/doc/README.omap-reset-time new file mode 100644 index 0000000..0c974ba --- /dev/null +++ b/doc/README.omap-reset-time @@ -0,0 +1,20 @@ +README on how reset time on OMAPs should be calculated + +CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC: +Most OMAPs' provide a way to specify the time for +which the reset should be held low while the voltages +and Oscillator outputs stabilize. + +This time is mostly board and PMIC dependent. Hence the +boards are expected to specify a pre-computed time +using the above option, (the details on how to compute +the value are given below) without which a default time +as specified by CONFIG_DEFAULT_OMAP_RESET_TIME_MAX_USEC +is used. + +The value for CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC +can be computed using a summation of the below 3 parameters +-1- Time taken by the Osciallator to stop and restart +-2- PMIC OTP time +-3- Voltage ramp time, which can be derived using the +PMIC slew rate and value of voltage ramp needed. diff --git a/include/configs/omap5_uevm.h b/include/configs/omap5_uevm.h index 240fdfc..52eb7af 100644 --- a/include/configs/omap5_uevm.h +++ b/include/configs/omap5_uevm.h @@ -54,4 +54,5 @@ #define CONFIG_SYS_PROMPT "OMAP5430 EVM # " +#define CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC 16296 #endif /* __CONFIG_OMAP5_EVM_H */ -- 1.7.9.5

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[U-Boot] [PATCH] Remove duplicate / unused #defines on AM335x boards
by Mark Jackson 29 Apr '13

29 Apr '13

As part of a review of a recent patch to add a new AM335x board, Tom found several duplicate and/or unused #defines. This patch simply removes them. The two affected configs have been recompiled to check nothing was broken (from a compilation point of view !!) Reported-by: Tom Rini <trini(a)ti.com> Signed-off-by: Mark Jackson <mpfj-list(a)mimc.co.uk> --- include/configs/am335x_evm.h | 10 ++-------- include/configs/pcm051.h | 4 +--- 2 files changed, 3 insertions(+), 11 deletions(-) diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index ef00306..5739422 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -196,7 +196,6 @@ + (8 * 1024 * 1024)) #define CONFIG_SYS_LOAD_ADDR 0x81000000 /* Default load address */ -#define CONFIG_SYS_HZ 1000 /* 1ms clock */ #define CONFIG_MMC #define CONFIG_GENERIC_MMC @@ -260,12 +259,11 @@ /* Platform/Board specific defs */ #define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ -#define CONFIG_SYS_HZ 1000 +#define CONFIG_SYS_HZ 1000 /* 1ms clock */ /* NS16550 Configuration */ #define CONFIG_SYS_NS16550 #define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SERIAL_MULTI #define CONFIG_SYS_NS16550_REG_SIZE (-4) #define CONFIG_SYS_NS16550_CLK (48000000) #define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */ @@ -360,11 +358,7 @@ #define CONFIG_SYS_NAND_ECCSIZE 512 #define CONFIG_SYS_NAND_ECCBYTES 14 -#define CONFIG_SYS_NAND_ECCSTEPS 4 -#define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \ - CONFIG_SYS_NAND_ECCSTEPS) - -#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 diff --git a/include/configs/pcm051.h b/include/configs/pcm051.h index d0ea74e..2e3f08b 100644 --- a/include/configs/pcm051.h +++ b/include/configs/pcm051.h @@ -129,7 +129,6 @@ + (8 * 1024 * 1024)) #define CONFIG_SYS_LOAD_ADDR 0x80007fc0 /* Default load address */ -#define CONFIG_SYS_HZ 1000 /* 1ms clock */ #define CONFIG_MMC #define CONFIG_GENERIC_MMC @@ -158,13 +157,12 @@ /* Platform/Board specific defs */ #define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ -#define CONFIG_SYS_HZ 1000 +#define CONFIG_SYS_HZ 1000 /* 1ms clock */ #define CONFIG_CONS_INDEX 1 /* NS16550 Configuration */ #define CONFIG_SYS_NS16550 #define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SERIAL_MULTI #define CONFIG_SYS_NS16550_REG_SIZE (-4) #define CONFIG_SYS_NS16550_CLK (48000000) #define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */ -- 1.7.9.5

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[U-Boot] [PATCH] omap5_common: Add optargs variable for kernel command line args
by Tom Rini 29 Apr '13

29 Apr '13

Add 'optargs' variable to be set to additional kernel arguments, similar to omap3*/am3* usage. Cc: Sricharan R <r.sricharan(a)ti.com> Signed-off-by: Tom Rini <trini(a)ti.com> --- include/configs/omap5_common.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/configs/omap5_common.h b/include/configs/omap5_common.h index 2751627..5384a55 100644 --- a/include/configs/omap5_common.h +++ b/include/configs/omap5_common.h @@ -150,10 +150,12 @@ "usbtty=cdc_acm\0" \ "vram=16M\0" \ "partitions=" PARTS_DEFAULT "\0" \ + "optargs=\0" \ "mmcdev=0\0" \ "mmcroot=/dev/mmcblk0p2 rw\0" \ "mmcrootfstype=ext3 rootwait\0" \ "mmcargs=setenv bootargs console=${console} " \ + "${optargs} " \ "vram=${vram} " \ "root=${mmcroot} " \ "rootfstype=${mmcrootfstype}\0" \ -- 1.7.9.5

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[U-Boot] [PATCH v3] OMAP5: USB: hsusbtll_clkctrl has to be in hw_auto for USB to work
by Lubomir Popov 29 Apr '13

29 Apr '13

USB TLL clocks do not support 'explicit_en', only 'hw_auto' control (R. Sricharan). cm_l3init_hsusbtll_clkctrl has to be moved to the clk_modules_hw_auto_essential[] array in order to make the clock work. This fix is needed (but not sufficient) for USB EHCI operation in U-Boot. Signed-off-by: Lubomir Popov <lpopov(a)mm-sol.com> --- V3 updates commit comments only. V2 fixes line wrap issue of the patch itself. arch/arm/cpu/armv7/omap5/hw_data.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c index ced274e..e5e41fd 100644 --- a/arch/arm/cpu/armv7/omap5/hw_data.c +++ b/arch/arm/cpu/armv7/omap5/hw_data.c @@ -403,6 +403,7 @@ void enable_basic_uboot_clocks(void) }; u32 const clk_modules_hw_auto_essential[] = { + (*prcm)->cm_l3init_hsusbtll_clkctrl, 0 }; @@ -411,7 +412,6 @@ void enable_basic_uboot_clocks(void) (*prcm)->cm_l4per_i2c2_clkctrl, (*prcm)->cm_l4per_i2c3_clkctrl, (*prcm)->cm_l4per_i2c4_clkctrl, - (*prcm)->cm_l3init_hsusbtll_clkctrl, (*prcm)->cm_l3init_hsusbhost_clkctrl, (*prcm)->cm_l3init_fsusb_clkctrl, 0 -- 1.7.9.5

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[U-Boot] [PATCHv2 0/2] Add initial support for AQUILA-CYGNUS
by Enric Balletbo i Serra 29 Apr '13

29 Apr '13

IGEP COM AQUILA and CYGNUS are two computer-on-module based on AM3354 and AM3352 processors. Both use SODIMM from factor and are designed for industrial range purpose. Changes since v1 (As Tom suggested) * Remove ATAGS and FDT as we have no support. * Remove CMD_EXT2 as is not required. * Remove fdt related stuff from environment. * Reduce the space dedicated to u-boot in MTDPARTS * Remove SPL_NET, we don't use this. Enric Balletbo i Serra (2): Add DDR3 support for IGEP COM AQUILA/CYGNUS. ARM: Add support for IGEP COM AQUILA/CYGNUS MAINTAINERS | 1 + arch/arm/include/asm/arch-am33xx/ddr_defs.h | 17 ++ board/isee/igep0033/Makefile | 46 +++++ board/isee/igep0033/board.c | 232 ++++++++++++++++++++++ board/isee/igep0033/board.h | 27 +++ board/isee/igep0033/mux.c | 89 +++++++++ boards.cfg | 1 + include/configs/igep0033.h | 284 +++++++++++++++++++++++++++ 8 files changed, 697 insertions(+) create mode 100644 board/isee/igep0033/Makefile create mode 100644 board/isee/igep0033/board.c create mode 100644 board/isee/igep0033/board.h create mode 100644 board/isee/igep0033/mux.c create mode 100644 include/configs/igep0033.h -- 1.7.10.4

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[U-Boot] [PATCH V2] arm: omap: emif: Fix DDR3 init after warm reset
by Lokesh Vutla 29 Apr '13

29 Apr '13

EMIF supports a global warm reset mode, during which the EMIF keeps the SDRAM content. But if leveling is enabled at the time of warm reset for DDR3, the following steps needs to be done after warm reset: 1) Keep EMIF in self refresh mode. 2) Reset PHY to bring back the PHY to a known state. 3) Start Levelling procedure. Doing the same. And also enabling DLL lock and code output after warm reset. Tested on OMAP5432 ES2.0 Signed-off-by: Lokesh Vutla <lokeshvutla(a)ti.com> --- Changes since V1: - Changed $subject - Removed redundant in_sdram check arch/arm/cpu/armv7/omap-common/emif-common.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/arch/arm/cpu/armv7/omap-common/emif-common.c b/arch/arm/cpu/armv7/omap-common/emif-common.c index 9eb1279..3e3f3ea 100644 --- a/arch/arm/cpu/armv7/omap-common/emif-common.c +++ b/arch/arm/cpu/armv7/omap-common/emif-common.c @@ -1072,6 +1072,11 @@ static void do_sdram_init(u32 base) else ddr3_init(base, regs); } + if (warm_reset() && (emif_sdram_type() == EMIF_SDRAM_TYPE_DDR3)) { + set_lpmode_selfrefresh(base); + emif_reset_phy(base); + ddr3_leveling(base, regs); + } /* Write to the shadow registers */ emif_update_timings(base, regs); @@ -1259,10 +1264,10 @@ void sdram_init(void) in_sdram = running_from_sdram(); debug("in_sdram = %d\n", in_sdram); - if (!(in_sdram || warm_reset())) { - if (sdram_type == EMIF_SDRAM_TYPE_LPDDR2) + if (!in_sdram) { + if ((sdram_type == EMIF_SDRAM_TYPE_LPDDR2) && !warm_reset()) bypass_dpll((*prcm)->cm_clkmode_dpll_core); - else + else if (sdram_type == EMIF_SDRAM_TYPE_DDR3) writel(CM_DLL_CTRL_NO_OVERRIDE, (*prcm)->cm_dll_ctrl); } -- 1.7.9.5

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[U-Boot] [PATCH] beagleboard: Update comment in get_board_rev()
by Tom Rini 29 Apr '13

29 Apr '13

We are able to tell the difference between xM Rev Ax/Bx and xM Rev Cx, and have been for some time. The comment above the function however did not list this, so update. Signed-off-by: Tom Rini <trini(a)ti.com> --- board/ti/beagle/beagle.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c index 3d9b6dd..c686f40 100644 --- a/board/ti/beagle/beagle.c +++ b/board/ti/beagle/beagle.c @@ -108,13 +108,14 @@ int board_init(void) /* * Routine: get_board_revision * Description: Detect if we are running on a Beagle revision Ax/Bx, - * C1/2/3, C4 or xM. This can be done by reading + * C1/2/3, C4, xM Ax/Bx or xM Cx. This can be done by reading * the level of GPIO173, GPIO172 and GPIO171. This should * result in * GPIO173, GPIO172, GPIO171: 1 1 1 => Ax/Bx * GPIO173, GPIO172, GPIO171: 1 1 0 => C1/2/3 * GPIO173, GPIO172, GPIO171: 1 0 1 => C4 - * GPIO173, GPIO172, GPIO171: 0 0 0 => xM + * GPIO173, GPIO172, GPIO171: 0 1 0 => xM Cx + * GPIO173, GPIO172, GPIO171: 0 0 0 => xM Ax/Bx */ static int get_board_revision(void) { -- 1.7.9.5

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[U-Boot] [PATCH] am33xx: Fix warning with CONFIG_DISPLAY_CPUINFO
by Tom Rini 29 Apr '13

29 Apr '13

The arm_freq and ddr_freq variables are unused, so remove. Fixup whitespace slightly while in here. Signed-off-by: Tom Rini <trini(a)ti.com> --- arch/arm/cpu/armv7/am33xx/sys_info.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/arch/arm/cpu/armv7/am33xx/sys_info.c b/arch/arm/cpu/armv7/am33xx/sys_info.c index 5fd8b47..ac049ac 100644 --- a/arch/arm/cpu/armv7/am33xx/sys_info.c +++ b/arch/arm/cpu/armv7/am33xx/sys_info.c @@ -92,7 +92,6 @@ u32 get_sysboot_value(void) int print_cpuinfo(void) { char *cpu_s, *sec_s; - int arm_freq, ddr_freq; switch (get_cpu_type()) { case AM335X: @@ -123,10 +122,7 @@ int print_cpuinfo(void) sec_s = "?"; } - printf("%s-%s rev %d\n", - cpu_s, sec_s, get_cpu_rev()); - - /* TODO: Print ARM and DDR frequencies */ + printf("%s-%s rev %d\n", cpu_s, sec_s, get_cpu_rev()); return 0; } -- 1.7.9.5

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[U-Boot] [PATCH 01/16] i2c, ppc4xx_i2c: switch to new multibus/multiadapter support
by Dirk Eibach 29 Apr '13

29 Apr '13

Signed-off-by: Dirk Eibach <dirk.eibach(a)gdsys.cc> Cc: Heiko Schocher <hs(a)denx.de> Cc: Stefan Roese <sr(a)denx.de> --- This patch is based on http://git.denx.de/?p=u-boot/u-boot-i2c.git;a=shortlog;h=refs/heads/2013041…. Heiko said: "... and if the merge window opens I post this patch with the other patches for this new i2c framework on the ML." So, Heiko, the merge window is wide open, your turn now :) arch/powerpc/cpu/ppc4xx/40x_spd_sdram.c | 6 +- arch/powerpc/cpu/ppc4xx/44x_spd_ddr.c | 6 +- arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c | 3 +- arch/powerpc/cpu/ppc4xx/cmd_chip_config.c | 2 +- arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c | 3 +- arch/powerpc/include/asm/ppc4xx-i2c.h | 18 - board/csb272/csb272.c | 2 +- board/esd/du440/du440.c | 2 - board/lwmon5/kbd.c | 2 +- board/mpl/pip405/pip405.c | 2 +- board/sandburst/common/ppc440gx_i2c.c | 510 ----------------------------- board/sandburst/common/ppc440gx_i2c.h | 60 ---- board/sandburst/common/sb_common.c | 103 +++--- board/sandburst/common/sb_common.h | 1 - board/sandburst/karef/Makefile | 3 +- board/sandburst/karef/karef.c | 5 - board/sandburst/metrobox/Makefile | 3 +- board/sandburst/metrobox/metrobox.c | 6 - drivers/i2c/Makefile | 2 +- drivers/i2c/ppc4xx_i2c.c | 193 ++++++------ include/configs/APC405.h | 9 +- include/configs/ASH405.h | 9 +- include/configs/CANBT.h | 9 +- include/configs/CATcenter.h | 9 +- include/configs/CMS700.h | 9 +- include/configs/CPCI2DP.h | 9 +- include/configs/CPCI405.h | 9 +- include/configs/CPCI4052.h | 9 +- include/configs/CPCI405AB.h | 9 +- include/configs/CPCI405DT.h | 9 +- include/configs/CPCIISER4.h | 9 +- include/configs/CRAYL1.h | 9 +- include/configs/DP405.h | 9 +- include/configs/DU405.h | 9 +- include/configs/DU440.h | 18 +- include/configs/G2000.h | 9 +- include/configs/HH405.h | 11 +- include/configs/HUB405.h | 9 +- include/configs/JSE.h | 9 +- include/configs/KAREF.h | 16 +- include/configs/METROBOX.h | 16 +- include/configs/MIP405.h | 9 +- include/configs/OCRTC.h | 9 +- include/configs/ORSG.h | 9 +- include/configs/PCI405.h | 9 +- include/configs/PIP405.h | 9 +- include/configs/PLU405.h | 9 +- include/configs/PMC405.h | 9 +- include/configs/PMC405DE.h | 9 +- include/configs/PMC440.h | 14 +- include/configs/PPChameleonEVB.h | 9 +- include/configs/VOH405.h | 9 +- include/configs/VOM405.h | 9 +- include/configs/W7OLMC.h | 9 +- include/configs/W7OLMG.h | 9 +- include/configs/WUH405.h | 9 +- include/configs/acadia.h | 2 +- include/configs/alpr.h | 11 +- include/configs/amcc-common.h | 7 +- include/configs/bamboo.h | 2 +- include/configs/bluestone.h | 2 +- include/configs/bubinga.h | 4 +- include/configs/canyonlands.h | 2 +- include/configs/csb272.h | 9 +- include/configs/csb472.h | 9 +- include/configs/dlvision-10g.h | 2 +- include/configs/dlvision.h | 2 +- include/configs/ebony.h | 2 +- include/configs/gdppc440etx.h | 2 +- include/configs/icon.h | 3 +- include/configs/intip.h | 2 +- include/configs/io.h | 2 +- include/configs/io64.h | 2 +- include/configs/iocon.h | 8 +- include/configs/katmai.h | 3 +- include/configs/kilauea.h | 2 +- include/configs/korat.h | 9 +- include/configs/luan.h | 2 +- include/configs/lwmon5.h | 9 +- include/configs/makalu.h | 2 +- include/configs/neo.h | 2 +- include/configs/ocotea.h | 2 +- include/configs/p3p440.h | 11 +- include/configs/pcs440ep.h | 9 +- include/configs/quad100hd.h | 9 +- include/configs/redwood.h | 4 +- include/configs/sbc405.h | 9 +- include/configs/sc3.h | 9 +- include/configs/sequoia.h | 2 +- include/configs/t3corp.h | 2 +- include/configs/taihu.h | 4 +- include/configs/taishan.h | 2 +- include/configs/walnut.h | 2 +- include/configs/xpedite1000.h | 10 +- include/configs/yosemite.h | 2 +- include/configs/yucca.h | 4 +- include/configs/zeus.h | 9 +- 97 files changed, 457 insertions(+), 1021 deletions(-) delete mode 100644 board/sandburst/common/ppc440gx_i2c.c delete mode 100644 board/sandburst/common/ppc440gx_i2c.h diff --git a/arch/powerpc/cpu/ppc4xx/40x_spd_sdram.c b/arch/powerpc/cpu/ppc4xx/40x_spd_sdram.c index 48aa753..fd458fd 100644 --- a/arch/powerpc/cpu/ppc4xx/40x_spd_sdram.c +++ b/arch/powerpc/cpu/ppc4xx/40x_spd_sdram.c @@ -52,10 +52,6 @@ /* * Set default values */ -#ifndef CONFIG_SYS_I2C_SPEED -#define CONFIG_SYS_I2C_SPEED 50000 -#endif - #define ONE_BILLION 1000000000 #define SDRAM0_CFG_DCE 0x80000000 @@ -158,7 +154,7 @@ long int spd_sdram(int(read_spd)(uint addr)) * Make sure I2C controller is initialized * before continuing. */ - i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); + i2c_set_bus_num(CONFIG_SYS_SPD_BUS_NUM); } /* Make shure we are using SDRAM */ diff --git a/arch/powerpc/cpu/ppc4xx/44x_spd_ddr.c b/arch/powerpc/cpu/ppc4xx/44x_spd_ddr.c index 161d274..9c566c1 100644 --- a/arch/powerpc/cpu/ppc4xx/44x_spd_ddr.c +++ b/arch/powerpc/cpu/ppc4xx/44x_spd_ddr.c @@ -62,10 +62,6 @@ /* * Set default values */ -#ifndef CONFIG_SYS_I2C_SPEED -#define CONFIG_SYS_I2C_SPEED 50000 -#endif - #define ONE_BILLION 1000000000 /* @@ -168,7 +164,7 @@ long int spd_sdram(void) { * Make sure I2C controller is initialized * before continuing. */ - i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); + i2c_set_bus_num(CONFIG_SYS_SPD_BUS_NUM); /* * Read the SPD information using I2C interface. Check to see if the diff --git a/arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c b/arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c index def7ebf..a66973e 100644 --- a/arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c +++ b/arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c @@ -459,8 +459,7 @@ phys_size_t initdram(int board_type) */ /* switch to correct I2C bus */ - I2C_SET_BUS(CONFIG_SYS_SPD_BUS_NUM); - i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); + i2c_set_bus_num(CONFIG_SYS_SPD_BUS_NUM); /*------------------------------------------------------------------ * Clear out the serial presence detect buffers. diff --git a/arch/powerpc/cpu/ppc4xx/cmd_chip_config.c b/arch/powerpc/cpu/ppc4xx/cmd_chip_config.c index 72c5aec..0eafe3e 100644 --- a/arch/powerpc/cpu/ppc4xx/cmd_chip_config.c +++ b/arch/powerpc/cpu/ppc4xx/cmd_chip_config.c @@ -56,7 +56,7 @@ static int do_chip_config(cmd_tbl_t *cmdtp, int flag, int argc, char * const arg * First switch to correct I2C bus. This is I2C bus 0 * for all currently available 4xx derivats. */ - I2C_SET_BUS(0); + i2c_set_bus_num(0); #ifdef CONFIG_CMD_EEPROM ret = eeprom_read(CONFIG_4xx_CONFIG_I2C_EEPROM_ADDR, diff --git a/arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c b/arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c index 3ceab32..df96375 100644 --- a/arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c +++ b/arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c @@ -1041,8 +1041,7 @@ phys_size_t initdram(int board_type) * before continuing. */ /* switch to correct I2C bus */ - I2C_SET_BUS(CONFIG_SYS_SPD_BUS_NUM); - i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); + i2c_set_bus_num(CONFIG_SYS_SPD_BUS_NUM); /*------------------------------------------------------------------ * Clear out the serial presence detect buffers. diff --git a/arch/powerpc/include/asm/ppc4xx-i2c.h b/arch/powerpc/include/asm/ppc4xx-i2c.h index 0c6c926..89de508 100644 --- a/arch/powerpc/include/asm/ppc4xx-i2c.h +++ b/arch/powerpc/include/asm/ppc4xx-i2c.h @@ -34,24 +34,6 @@ #define IIC_TIMEOUT 1 /* 1 second */ -#if defined(CONFIG_I2C_MULTI_BUS) -#define I2C_BUS_OFFS (i2c_bus_num * 0x100) -#else -#define I2C_BUS_OFFS (0x000) -#endif /* CONFIG_I2C_MULTI_BUS */ - -#if defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ - defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \ - defined(CONFIG_460EX) || defined(CONFIG_460GT) -#define I2C_BASE_ADDR (CONFIG_SYS_PERIPHERAL_BASE + 0x00000700 + I2C_BUS_OFFS) -#elif defined(CONFIG_440) || defined(CONFIG_405EX) -/* all remaining 440 variants */ -#define I2C_BASE_ADDR (CONFIG_SYS_PERIPHERAL_BASE + 0x00000400 + I2C_BUS_OFFS) -#else -/* all 405 variants */ -#define I2C_BASE_ADDR (0xEF600500 + I2C_BUS_OFFS) -#endif - struct ppc4xx_i2c { u8 mdbuf; u8 res1; diff --git a/board/csb272/csb272.c b/board/csb272/csb272.c index 8b36127..a53dac1 100644 --- a/board/csb272/csb272.c +++ b/board/csb272/csb272.c @@ -51,7 +51,7 @@ uchar pll_fs6377_regs[16] = { */ int pll_init(void) { - i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); + i2c_set_bus_num(0); return i2c_write(CONFIG_SYS_I2C_PLL_ADDR, 0, 1, (uchar *) pll_fs6377_regs, sizeof(pll_fs6377_regs)); diff --git a/board/esd/du440/du440.c b/board/esd/du440/du440.c index 1ada1bc..64d43c5 100644 --- a/board/esd/du440/du440.c +++ b/board/esd/du440/du440.c @@ -385,7 +385,6 @@ int last_stage_init(void) return 0; } -#if defined(CONFIG_I2C_MULTI_BUS) /* * read field strength from I2C ADC */ @@ -500,7 +499,6 @@ U_BOOT_CMD( "Initialize USB hub", "" ); -#endif /* CONFIG_I2C_MULTI_BUS */ #define CONFIG_SYS_BOOT_EEPROM_PAGE_WRITE_BITS 3 int boot_eeprom_write (unsigned dev_addr, diff --git a/board/lwmon5/kbd.c b/board/lwmon5/kbd.c index b66f681..9834bfd 100644 --- a/board/lwmon5/kbd.c +++ b/board/lwmon5/kbd.c @@ -111,7 +111,7 @@ static void kbd_init (void) uchar val, errcd; int i; - i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); + i2c_set_bus_num(0); gd->arch.kbd_status = 0; diff --git a/board/mpl/pip405/pip405.c b/board/mpl/pip405/pip405.c index b203037..655e129 100644 --- a/board/mpl/pip405/pip405.c +++ b/board/mpl/pip405/pip405.c @@ -209,7 +209,7 @@ int board_early_init_f (void) #endif /* Read Serial Presence Detect Information */ - i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); + i2c_set_bus_num(0); for (i = 0; i < 128; i++) datain[i] = 127; i2c_read(SPD_EEPROM_ADDRESS,0,1,datain,128); diff --git a/board/sandburst/common/ppc440gx_i2c.c b/board/sandburst/common/ppc440gx_i2c.c deleted file mode 100644 index 85b63fc..0000000 --- a/board/sandburst/common/ppc440gx_i2c.c +++ /dev/null @@ -1,510 +0,0 @@ -/* - * Copyright (C) 2005 Sandburst Corporation - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* - * Ported from arch/powerpc/cpu/ppc4xx/i2c.c by AS HARNOIS by - * Travis B. Sawyer - * Sandburst Corporation. - */ -#include <common.h> -#include <asm/ppc4xx.h> -#include <asm/ppc4xx-i2c.h> -#include <i2c.h> -#include <command.h> -#include "ppc440gx_i2c.h" -#include <asm/io.h> - -#ifdef CONFIG_I2C_BUS1 - -#define IIC_OK 0 -#define IIC_NOK 1 -#define IIC_NOK_LA 2 /* Lost arbitration */ -#define IIC_NOK_ICT 3 /* Incomplete transfer */ -#define IIC_NOK_XFRA 4 /* Transfer aborted */ -#define IIC_NOK_DATA 5 /* No data in buffer */ -#define IIC_NOK_TOUT 6 /* Transfer timeout */ - -#define IIC_TIMEOUT 1 /* 1 second */ -#if defined(CONFIG_SYS_I2C_NOPROBES) -static uchar i2c_no_probes[] = CONFIG_SYS_I2C_NOPROBES; -#endif - -static struct ppc4xx_i2c *i2c = (struct ppc4xx_i2c *)I2C_REGISTERS_BUS1_BASE_ADDRESS; - -static void _i2c_bus1_reset (void) -{ - int i, status; - - /* Reset status register */ - /* write 1 in SCMP and IRQA to clear these fields */ - out_8 (IIC_STS1, 0x0A); - - /* write 1 in IRQP IRQD LA ICT XFRA to clear these fields */ - out_8 (IIC_EXTSTS1, 0x8F); - __asm__ volatile ("eieio"); - - /* - * Get current state, reset bus - * only if no transfers are pending. - */ - i = 10; - do { - /* Get status */ - status = in_8 (IIC_STS1); - udelay (500); /* 500us */ - i--; - } while ((status & IIC_STS_PT) && (i > 0)); - /* Soft reset controller */ - status = in_8 (IIC_XTCNTLSS1); - out_8 (IIC_XTCNTLSS1, (status | IIC_XTCNTLSS_SRST)); - __asm__ volatile ("eieio"); - - /* make sure where in initial state, data hi, clock hi */ - out_8 (IIC_DIRECTCNTL1, 0xC); - for (i = 0; i < 10; i++) { - if ((in_8 (IIC_DIRECTCNTL1) & 0x3) != 0x3) { - /* clock until we get to known state */ - out_8 (IIC_DIRECTCNTL1, 0x8); /* clock lo */ - udelay (100); /* 100us */ - out_8 (IIC_DIRECTCNTL1, 0xC); /* clock hi */ - udelay (100); /* 100us */ - } else { - break; - } - } - /* send start condition */ - out_8 (IIC_DIRECTCNTL1, 0x4); - udelay (1000); /* 1ms */ - /* send stop condition */ - out_8 (IIC_DIRECTCNTL1, 0xC); - udelay (1000); /* 1ms */ - /* Unreset controller */ - out_8 (IIC_XTCNTLSS1, (status & ~IIC_XTCNTLSS_SRST)); - udelay (1000); /* 1ms */ -} - -void i2c1_init (int speed, int slaveadd) -{ - sys_info_t sysInfo; - unsigned long freqOPB; - int val, divisor; - -#ifdef CONFIG_SYS_I2C_INIT_BOARD - /* call board specific i2c bus reset routine before accessing the */ - /* environment, which might be in a chip on that bus. For details */ - /* about this problem see doc/I2C_Edge_Conditions. */ - i2c_init_board(); -#endif - - /* Handle possible failed I2C state */ - /* FIXME: put this into i2c_init_board()? */ - _i2c_bus1_reset (); - - /* clear lo master address */ - out_8 (IIC_LMADR1, 0); - - /* clear hi master address */ - out_8 (IIC_HMADR1, 0); - - /* clear lo slave address */ - out_8 (IIC_LSADR1, 0); - - /* clear hi slave address */ - out_8 (IIC_HSADR1, 0); - - /* Clock divide Register */ - /* get OPB frequency */ - get_sys_info (&sysInfo); - freqOPB = sysInfo.freqPLB / sysInfo.pllOpbDiv; - /* set divisor according to freqOPB */ - divisor = (freqOPB - 1) / 10000000; - if (divisor == 0) - divisor = 1; - out_8 (IIC_CLKDIV1, divisor); - - /* no interrupts */ - out_8 (IIC_INTRMSK1, 0); - - /* clear transfer count */ - out_8 (IIC_XFRCNT1, 0); - - /* clear extended control & stat */ - /* write 1 in SRC SRS SWC SWS to clear these fields */ - out_8 (IIC_XTCNTLSS1, 0xF0); - - /* Mode Control Register - Flush Slave/Master data buffer */ - out_8 (IIC_MDCNTL1, IIC_MDCNTL_FSDB | IIC_MDCNTL_FMDB); - __asm__ volatile ("eieio"); - - - val = in_8(IIC_MDCNTL1); - __asm__ volatile ("eieio"); - - /* Ignore General Call, slave transfers are ignored, - disable interrupts, exit unknown bus state, enable hold - SCL - 100kHz normaly or FastMode for 400kHz and above - */ - - val |= IIC_MDCNTL_EUBS|IIC_MDCNTL_HSCL; - if( speed >= 400000 ){ - val |= IIC_MDCNTL_FSM; - } - out_8 (IIC_MDCNTL1, val); - - /* clear control reg */ - out_8 (IIC_CNTL1, 0x00); - __asm__ volatile ("eieio"); - -} - -/* - This code tries to use the features of the 405GP i2c - controller. It will transfer up to 4 bytes in one pass - on the loop. It only does out_8(lbz) to the buffer when it - is possible to do out16(lhz) transfers. - - cmd_type is 0 for write 1 for read. - - addr_len can take any value from 0-255, it is only limited - by the char, we could make it larger if needed. If it is - 0 we skip the address write cycle. - - Typical case is a Write of an addr followd by a Read. The - IBM FAQ does not cover this. On the last byte of the write - we don't set the creg CHT bit, and on the first bytes of the - read we set the RPST bit. - - It does not support address only transfers, there must be - a data part. If you want to write the address yourself, put - it in the data pointer. - - It does not support transfer to/from address 0. - - It does not check XFRCNT. -*/ -static -int i2c_transfer1(unsigned char cmd_type, - unsigned char chip, - unsigned char addr[], - unsigned char addr_len, - unsigned char data[], - unsigned short data_len ) -{ - unsigned char* ptr; - int reading; - int tran,cnt; - int result; - int status; - int i; - uchar creg; - - if( data == 0 || data_len == 0 ){ - /*Don't support data transfer of no length or to address 0*/ - printf( "i2c_transfer: bad call\n" ); - return IIC_NOK; - } - if( addr && addr_len ){ - ptr = addr; - cnt = addr_len; - reading = 0; - }else{ - ptr = data; - cnt = data_len; - reading = cmd_type; - } - - /*Clear Stop Complete Bit*/ - out_8(IIC_STS1,IIC_STS_SCMP); - /* Check init */ - i=10; - do { - /* Get status */ - status = in_8(IIC_STS1); - __asm__ volatile("eieio"); - i--; - } while ((status & IIC_STS_PT) && (i>0)); - - if (status & IIC_STS_PT) { - result = IIC_NOK_TOUT; - return(result); - } - /*flush the Master/Slave Databuffers*/ - out_8(IIC_MDCNTL1, ((in_8(IIC_MDCNTL1))|IIC_MDCNTL_FMDB|IIC_MDCNTL_FSDB)); - /*need to wait 4 OPB clocks? code below should take that long*/ - - /* 7-bit adressing */ - out_8(IIC_HMADR1,0); - out_8(IIC_LMADR1, chip); - __asm__ volatile("eieio"); - - tran = 0; - result = IIC_OK; - creg = 0; - - while ( tran != cnt && (result == IIC_OK)) { - int bc,j; - - /* Control register = - Normal transfer, 7-bits adressing, Transfer up to bc bytes, Normal start, - Transfer is a sequence of transfers - */ - creg |= IIC_CNTL_PT; - - bc = (cnt - tran) > 4 ? 4 : - cnt - tran; - creg |= (bc-1)<<4; - /* if the real cmd type is write continue trans*/ - if ( (!cmd_type && (ptr == addr)) || ((tran+bc) != cnt) ) - creg |= IIC_CNTL_CHT; - - if (reading) - creg |= IIC_CNTL_READ; - else { - for(j=0; j<bc; j++) { - /* Set buffer */ - out_8(IIC_MDBUF1,ptr[tran+j]); - __asm__ volatile("eieio"); - } - } - out_8(IIC_CNTL1, creg ); - __asm__ volatile("eieio"); - - /* Transfer is in progress - we have to wait for upto 5 bytes of data - 1 byte chip address+r/w bit then bc bytes - of data. - udelay(10) is 1 bit time at 100khz - Doubled for slop. 20 is too small. - */ - i=2*5*8; - do { - /* Get status */ - status = in_8(IIC_STS1); - __asm__ volatile("eieio"); - udelay (10); - i--; - } while ((status & IIC_STS_PT) && !(status & IIC_STS_ERR) - && (i>0)); - - if (status & IIC_STS_ERR) { - result = IIC_NOK; - status = in_8 (IIC_EXTSTS1); - /* Lost arbitration? */ - if (status & IIC_EXTSTS_LA) - result = IIC_NOK_LA; - /* Incomplete transfer? */ - if (status & IIC_EXTSTS_ICT) - result = IIC_NOK_ICT; - /* Transfer aborted? */ - if (status & IIC_EXTSTS_XFRA) - result = IIC_NOK_XFRA; - } else if ( status & IIC_STS_PT) { - result = IIC_NOK_TOUT; - } - /* Command is reading => get buffer */ - if ((reading) && (result == IIC_OK)) { - /* Are there data in buffer */ - if (status & IIC_STS_MDBS) { - /* - even if we have data we have to wait 4OPB clocks - for it to hit the front of the FIFO, after that - we can just read. We should check XFCNT here and - if the FIFO is full there is no need to wait. - */ - udelay (1); - for(j=0;j<bc;j++) { - ptr[tran+j] = in_8(IIC_MDBUF1); - __asm__ volatile("eieio"); - } - } else - result = IIC_NOK_DATA; - } - creg = 0; - tran+=bc; - if( ptr == addr && tran == cnt ) { - ptr = data; - cnt = data_len; - tran = 0; - reading = cmd_type; - if( reading ) - creg = IIC_CNTL_RPST; - } - } - return (result); -} - -int i2c_probe1 (uchar chip) -{ - uchar buf[1]; - - buf[0] = 0; - - /* - * What is needed is to send the chip address and verify that the - * address was <ACK>ed (i.e. there was a chip at that address which - * drove the data line low). - */ - return(i2c_transfer1 (1, chip << 1, 0,0, buf, 1) != 0); -} - - -int i2c_read1 (uchar chip, uint addr, int alen, uchar * buffer, int len) -{ - uchar xaddr[4]; - int ret; - - if ( alen > 4 ) { - printf ("I2C read: addr len %d not supported\n", alen); - return 1; - } - - if ( alen > 0 ) { - xaddr[0] = (addr >> 24) & 0xFF; - xaddr[1] = (addr >> 16) & 0xFF; - xaddr[2] = (addr >> 8) & 0xFF; - xaddr[3] = addr & 0xFF; - } - - -#ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW - /* - * EEPROM chips that implement "address overflow" are ones - * like Catalyst 24WC04/08/16 which has 9/10/11 bits of - * address and the extra bits end up in the "chip address" - * bit slots. This makes a 24WC08 (1Kbyte) chip look like - * four 256 byte chips. - * - * Note that we consider the length of the address field to - * still be one byte because the extra address bits are - * hidden in the chip address. - */ - if( alen > 0 ) - chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW); -#endif - if( (ret = i2c_transfer1( 1, chip<<1, &xaddr[4-alen], alen, buffer, len )) != 0) { - printf( "I2c read: failed %d\n", ret); - return 1; - } - return 0; -} - -int i2c_write1 (uchar chip, uint addr, int alen, uchar * buffer, int len) -{ - uchar xaddr[4]; - - if ( alen > 4 ) { - printf ("I2C write: addr len %d not supported\n", alen); - return 1; - - } - if ( alen > 0 ) { - xaddr[0] = (addr >> 24) & 0xFF; - xaddr[1] = (addr >> 16) & 0xFF; - xaddr[2] = (addr >> 8) & 0xFF; - xaddr[3] = addr & 0xFF; - } - -#ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW - /* - * EEPROM chips that implement "address overflow" are ones - * like Catalyst 24WC04/08/16 which has 9/10/11 bits of - * address and the extra bits end up in the "chip address" - * bit slots. This makes a 24WC08 (1Kbyte) chip look like - * four 256 byte chips. - * - * Note that we consider the length of the address field to - * still be one byte because the extra address bits are - * hidden in the chip address. - */ - if( alen > 0 ) - chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW); -#endif - - return (i2c_transfer1( 0, chip<<1, &xaddr[4-alen], alen, buffer, len ) != 0); -} - -/*----------------------------------------------------------------------- - * Read a register - */ -uchar i2c_reg_read1(uchar i2c_addr, uchar reg) -{ - uchar buf; - - i2c_read1(i2c_addr, reg, 1, &buf, (uchar)1); - - return(buf); -} - -/*----------------------------------------------------------------------- - * Write a register - */ -void i2c_reg_write1(uchar i2c_addr, uchar reg, uchar val) -{ - i2c_write1(i2c_addr, reg, 1, &val, 1); -} - - -int do_i2c1_probe(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) -{ - int j; -#if defined(CONFIG_SYS_I2C_NOPROBES) - int k, skip; -#endif - - puts ("Valid chip addresses:"); - for(j = 0; j < 128; j++) { -#if defined(CONFIG_SYS_I2C_NOPROBES) - skip = 0; - for (k = 0; k < sizeof(i2c_no_probes); k++){ - if (j == i2c_no_probes[k]){ - skip = 1; - break; - } - } - if (skip) - continue; -#endif - if(i2c_probe1(j) == 0) { - printf(" %02X", j); - } - } - putc ('\n'); - -#if defined(CONFIG_SYS_I2C_NOPROBES) - puts ("Excluded chip addresses:"); - for( k = 0; k < sizeof(i2c_no_probes); k++ ) - printf(" %02X", i2c_no_probes[k] ); - putc ('\n'); -#endif - - return 0; -} - -U_BOOT_CMD( - iprobe1, 1, 1, do_i2c1_probe, - "probe to discover valid I2C chip addresses", - "" -); - -#endif /* CONFIG_I2C_BUS1 */ diff --git a/board/sandburst/common/ppc440gx_i2c.h b/board/sandburst/common/ppc440gx_i2c.h deleted file mode 100644 index 7496db4..0000000 --- a/board/sandburst/common/ppc440gx_i2c.h +++ /dev/null @@ -1,60 +0,0 @@ -/* - * Copyright (C) 2005 Sandburst Corporation - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* - * Ported from i2c driver for ppc4xx by AS HARNOIS by - * Travis B. Sawyer - * Sandburst Corporation - */ -#include <common.h> -#include <asm/ppc4xx.h> -#include <asm/ppc4xx-i2c.h> -#include <i2c.h> - -#ifdef CONFIG_HARD_I2C - -#define I2C_BUS1_BASE_ADDR (CONFIG_SYS_PERIPHERAL_BASE + 0x00000500) -#define I2C_REGISTERS_BUS1_BASE_ADDRESS I2C_BUS1_BASE_ADDR -#define IIC_MDBUF1 (&i2c->mdbuf) -#define IIC_SDBUF1 (&i2c->sdbuf) -#define IIC_LMADR1 (&i2c->lmadr) -#define IIC_HMADR1 (&i2c->hmadr) -#define IIC_CNTL1 (&i2c->cntl) -#define IIC_MDCNTL1 (&i2c->mdcntl) -#define IIC_STS1 (&i2c->sts) -#define IIC_EXTSTS1 (&i2c->extsts) -#define IIC_LSADR1 (&i2c->lsadr) -#define IIC_HSADR1 (&i2c->hsadr) -#define IIC_CLKDIV1 (&i2c->clkdiv) -#define IIC_INTRMSK1 (&i2c->intrmsk) -#define IIC_XFRCNT1 (&i2c->xfrcnt) -#define IIC_XTCNTLSS1 (&i2c->xtcntlss) -#define IIC_DIRECTCNTL1 (&i2c->directcntl) - -void i2c1_init (int speed, int slaveadd); -int i2c_probe1 (uchar chip); -int i2c_read1 (uchar chip, uint addr, int alen, uchar * buffer, int len); -int i2c_write1 (uchar chip, uint addr, int alen, uchar * buffer, int len); -uchar i2c_reg_read1(uchar i2c_addr, uchar reg); -void i2c_reg_write1(uchar i2c_addr, uchar reg, uchar val); - -#endif /* CONFIG_HARD_I2C */ diff --git a/board/sandburst/common/sb_common.c b/board/sandburst/common/sb_common.c index 6b91074..305e110 100644 --- a/board/sandburst/common/sb_common.c +++ b/board/sandburst/common/sb_common.c @@ -26,7 +26,6 @@ #include <asm/io.h> #include <spd_sdram.h> #include <i2c.h> -#include "ppc440gx_i2c.h" #include "sb_common.h" DECLARE_GLOBAL_DATA_PTR; @@ -84,7 +83,7 @@ unsigned short sbcommon_get_serial_number(void) /* Get the board serial number from eeprom */ /* Initialize I2C */ - i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); + i2c_set_bus_num(0); /* Read 256 bytes in EEPROM */ i2c_read (0x50, 0, 1, buff, 0x100); @@ -110,85 +109,87 @@ void sbcommon_fans(void) * Attempt to turn on 2 of the fans... * Need to go through the bridge */ + i2c_set_bus_num(1); puts ("FANS: "); /* select fan4 through the bridge */ - i2c_reg_write1(0x73, /* addr */ - 0x00, /* reg */ - 0x08); /* val = bus 4 */ + i2c_reg_write(0x73, /* addr */ + 0x00, /* reg */ + 0x08); /* val = bus 4 */ /* Turn on FAN 4 */ - i2c_reg_write1(0x2e, - 1, - 0x80); + i2c_reg_write(0x2e, + 1, + 0x80); - i2c_reg_write1(0x2e, - 0, - 0x19); + i2c_reg_write(0x2e, + 0, + 0x19); /* Deselect bus 4 on the bridge */ - i2c_reg_write1(0x73, - 0x00, - 0x00); + i2c_reg_write(0x73, + 0x00, + 0x00); /* select fan3 through the bridge */ - i2c_reg_write1(0x73, /* addr */ - 0x00, /* reg */ - 0x04); /* val = bus 3 */ + i2c_reg_write(0x73, /* addr */ + 0x00, /* reg */ + 0x04); /* val = bus 3 */ /* Turn on FAN 3 */ - i2c_reg_write1(0x2e, - 1, - 0x80); + i2c_reg_write(0x2e, + 1, + 0x80); - i2c_reg_write1(0x2e, - 0, - 0x19); + i2c_reg_write(0x2e, + 0, + 0x19); /* Deselect bus 3 on the bridge */ - i2c_reg_write1(0x73, - 0x00, - 0x00); + i2c_reg_write(0x73, + 0x00, + 0x00); /* select fan2 through the bridge */ - i2c_reg_write1(0x73, /* addr */ - 0x00, /* reg */ - 0x02); /* val = bus 4 */ + i2c_reg_write(0x73, /* addr */ + 0x00, /* reg */ + 0x02); /* val = bus 4 */ /* Turn on FAN 2 */ - i2c_reg_write1(0x2e, - 1, - 0x80); + i2c_reg_write(0x2e, + 1, + 0x80); - i2c_reg_write1(0x2e, - 0, - 0x19); + i2c_reg_write(0x2e, + 0, + 0x19); /* Deselect bus 2 on the bridge */ - i2c_reg_write1(0x73, - 0x00, - 0x00); + i2c_reg_write(0x73, + 0x00, + 0x00); /* select fan1 through the bridge */ - i2c_reg_write1(0x73, /* addr */ - 0x00, /* reg */ - 0x01); /* val = bus 0 */ + i2c_reg_write(0x73, /* addr */ + 0x00, /* reg */ + 0x01); /* val = bus 0 */ /* Turn on FAN 1 */ - i2c_reg_write1(0x2e, - 1, - 0x80); + i2c_reg_write(0x2e, + 1, + 0x80); - i2c_reg_write1(0x2e, - 0, - 0x19); + i2c_reg_write(0x2e, + 0, + 0x19); /* Deselect bus 1 on the bridge */ - i2c_reg_write1(0x73, - 0x00, - 0x00); + i2c_reg_write(0x73, + 0x00, + 0x00); puts ("on\n"); + i2c_set_bus_num(0); return; @@ -319,7 +320,7 @@ void board_get_enetaddr(int macaddr_idx, uchar *enet) if (0 == macaddr_idx) { /* Initialize I2C */ - i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); + i2c_set_bus_num(0); /* Read 256 bytes in EEPROM */ i2c_read (0x50, 0, 1, buff, 0x100); diff --git a/board/sandburst/common/sb_common.h b/board/sandburst/common/sb_common.h index e652ba8..5b28244 100644 --- a/board/sandburst/common/sb_common.h +++ b/board/sandburst/common/sb_common.h @@ -28,7 +28,6 @@ #include <asm/io.h> #include <spd_sdram.h> #include <i2c.h> -#include "ppc440gx_i2c.h" /* * GPIO Settings diff --git a/board/sandburst/karef/Makefile b/board/sandburst/karef/Makefile index fe9b514..d9b3170 100644 --- a/board/sandburst/karef/Makefile +++ b/board/sandburst/karef/Makefile @@ -40,8 +40,7 @@ CFLAGS += -DBUILDUSER='"$(BUILDUSER)"' LIB = $(obj)lib$(BOARD).o -COBJS = $(BOARD).o ../common/flash.o ../common/ppc440gx_i2c.o \ - ../common/sb_common.o +COBJS = $(BOARD).o ../common/flash.o ../common/sb_common.o SOBJS = init.o diff --git a/board/sandburst/karef/karef.c b/board/sandburst/karef/karef.c index 186998d..d156844 100644 --- a/board/sandburst/karef/karef.c +++ b/board/sandburst/karef/karef.c @@ -337,11 +337,6 @@ int checkboard (void) ************************************************************************/ int misc_init_f (void) { - /* Turn on i2c bus 1 */ - puts ("I2C1: "); - i2c1_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); - puts ("ready\n"); - /* Turn on fans 3 & 4 */ sbcommon_fans(); diff --git a/board/sandburst/metrobox/Makefile b/board/sandburst/metrobox/Makefile index 6019d59..3f19bf2 100644 --- a/board/sandburst/metrobox/Makefile +++ b/board/sandburst/metrobox/Makefile @@ -39,8 +39,7 @@ CFLAGS += -DBUILDUSER='"$(BUILDUSER)"' LIB = $(obj)lib$(BOARD).o -COBJS = $(BOARD).o ../common/flash.o ../common/ppc440gx_i2c.o \ - ../common/sb_common.o +COBJS = $(BOARD).o ../common/flash.o ../common/sb_common.o SOBJS = init.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) diff --git a/board/sandburst/metrobox/metrobox.c b/board/sandburst/metrobox/metrobox.c index 76d8293..ce4a029 100644 --- a/board/sandburst/metrobox/metrobox.c +++ b/board/sandburst/metrobox/metrobox.c @@ -30,7 +30,6 @@ #include <asm/io.h> #include <spd_sdram.h> #include <i2c.h> -#include "../common/ppc440gx_i2c.h" #include "../common/sb_common.h" #if defined(CONFIG_HAS_ETH0) || defined(CONFIG_HAS_ETH1) || \ defined(CONFIG_HAS_ETH2) || defined(CONFIG_HAS_ETH3) @@ -305,11 +304,6 @@ int checkboard (void) ************************************************************************/ int misc_init_f (void) { - /* Turn on i2c bus 1 */ - puts ("I2C1: "); - i2c1_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); - puts ("ready\n"); - /* Turn on fans */ sbcommon_fans(); diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile index 564d061..0298e3e 100644 --- a/drivers/i2c/Makefile +++ b/drivers/i2c/Makefile @@ -36,7 +36,6 @@ COBJS-$(CONFIG_DRIVER_OMAP1510_I2C) += omap1510_i2c.o COBJS-$(CONFIG_DRIVER_OMAP24XX_I2C) += omap24xx_i2c.o COBJS-$(CONFIG_DRIVER_OMAP34XX_I2C) += omap24xx_i2c.o COBJS-$(CONFIG_PCA9564_I2C) += pca9564_i2c.o -COBJS-$(CONFIG_PPC4XX_I2C) += ppc4xx_i2c.o COBJS-$(CONFIG_DRIVER_S3C24X0_I2C) += s3c24x0_i2c.o COBJS-$(CONFIG_S3C44B0_I2C) += s3c44b0_i2c.o COBJS-$(CONFIG_TSI108_I2C) += tsi108_i2c.o @@ -45,6 +44,7 @@ COBJS-$(CONFIG_SH_I2C) += sh_i2c.o COBJS-$(CONFIG_SH_SH7734_I2C) += sh_sh7734_i2c.o COBJS-$(CONFIG_SYS_I2C) += i2c_core.o COBJS-$(CONFIG_SYS_I2C_FSL) += fsl_i2c.o +COBJS-$(CONFIG_SYS_I2C_PPC4XX) += ppc4xx_i2c.o COBJS-$(CONFIG_SYS_I2C_SOFT) += soft_i2c.o COBJS-$(CONFIG_SYS_I2C_TEGRA) += tegra_i2c.o diff --git a/drivers/i2c/ppc4xx_i2c.c b/drivers/i2c/ppc4xx_i2c.c index 53fedd5..c924874 100644 --- a/drivers/i2c/ppc4xx_i2c.c +++ b/drivers/i2c/ppc4xx_i2c.c @@ -32,27 +32,29 @@ #include <i2c.h> #include <asm/io.h> -#ifdef CONFIG_HARD_I2C - DECLARE_GLOBAL_DATA_PTR; -#if defined(CONFIG_I2C_MULTI_BUS) -/* - * Initialize the bus pointer to whatever one the SPD EEPROM is on. - * Default is bus 0. This is necessary because the DDR initialization - * runs from ROM, and we can't switch buses because we can't modify - * the global variables. - */ -#ifndef CONFIG_SYS_SPD_BUS_NUM -#define CONFIG_SYS_SPD_BUS_NUM 0 +static inline struct ppc4xx_i2c *ppc4xx_get_i2c(int hwadapnr) +{ + unsigned long base; + +#if defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ + defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \ + defined(CONFIG_460EX) || defined(CONFIG_460GT) + base = CONFIG_SYS_PERIPHERAL_BASE + 0x00000700 + (hwadapnr * 0x100); +#elif defined(CONFIG_440) || defined(CONFIG_405EX) +/* all remaining 440 variants */ + base = CONFIG_SYS_PERIPHERAL_BASE + 0x00000400 + (hwadapnr * 0x100); +#else +/* all 405 variants */ + base = 0xEF600500 + (hwadapnr * 0x100); #endif -static unsigned int i2c_bus_num __attribute__ ((section (".data"))) = - CONFIG_SYS_SPD_BUS_NUM; -#endif /* CONFIG_I2C_MULTI_BUS */ + return (struct ppc4xx_i2c *)base; +} -static void _i2c_bus_reset(void) +static void _i2c_bus_reset(struct i2c_adapter *adap) { - struct ppc4xx_i2c *i2c = (struct ppc4xx_i2c *)I2C_BASE_ADDR; + struct ppc4xx_i2c *i2c = ppc4xx_get_i2c(adap->hwadapnr); int i; u8 dc; @@ -91,11 +93,10 @@ static void _i2c_bus_reset(void) out_8(&i2c->xtcntlss, 0); } -void i2c_init(int speed, int slaveaddr) +static void ppc4xx_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr) { - struct ppc4xx_i2c *i2c; + struct ppc4xx_i2c *i2c = ppc4xx_get_i2c(adap->hwadapnr); int val, divisor; - int bus; #ifdef CONFIG_SYS_I2C_INIT_BOARD /* @@ -106,67 +107,57 @@ void i2c_init(int speed, int slaveaddr) i2c_init_board(); #endif - for (bus = 0; bus < CONFIG_SYS_MAX_I2C_BUS; bus++) { - I2C_SET_BUS(bus); - - /* Set i2c pointer after calling I2C_SET_BUS() */ - i2c = (struct ppc4xx_i2c *)I2C_BASE_ADDR; - - /* Handle possible failed I2C state */ - /* FIXME: put this into i2c_init_board()? */ - _i2c_bus_reset(); + /* Handle possible failed I2C state */ + /* FIXME: put this into i2c_init_board()? */ + _i2c_bus_reset(adap); - /* clear lo master address */ - out_8(&i2c->lmadr, 0); + /* clear lo master address */ + out_8(&i2c->lmadr, 0); - /* clear hi master address */ - out_8(&i2c->hmadr, 0); - - /* clear lo slave address */ - out_8(&i2c->lsadr, 0); + /* clear hi master address */ + out_8(&i2c->hmadr, 0); - /* clear hi slave address */ - out_8(&i2c->hsadr, 0); + /* clear lo slave address */ + out_8(&i2c->lsadr, 0); - /* Clock divide Register */ - /* set divisor according to freq_opb */ - divisor = (get_OPB_freq() - 1) / 10000000; - if (divisor == 0) - divisor = 1; - out_8(&i2c->clkdiv, divisor); + /* clear hi slave address */ + out_8(&i2c->hsadr, 0); - /* no interrupts */ - out_8(&i2c->intrmsk, 0); + /* Clock divide Register */ + /* set divisor according to freq_opb */ + divisor = (get_OPB_freq() - 1) / 10000000; + if (divisor == 0) + divisor = 1; + out_8(&i2c->clkdiv, divisor); - /* clear transfer count */ - out_8(&i2c->xfrcnt, 0); + /* no interrupts */ + out_8(&i2c->intrmsk, 0); - /* clear extended control & stat */ - /* write 1 in SRC SRS SWC SWS to clear these fields */ - out_8(&i2c->xtcntlss, 0xF0); + /* clear transfer count */ + out_8(&i2c->xfrcnt, 0); - /* Mode Control Register - Flush Slave/Master data buffer */ - out_8(&i2c->mdcntl, IIC_MDCNTL_FSDB | IIC_MDCNTL_FMDB); + /* clear extended control & stat */ + /* write 1 in SRC SRS SWC SWS to clear these fields */ + out_8(&i2c->xtcntlss, 0xF0); - val = in_8(&i2c->mdcntl); + /* Mode Control Register + Flush Slave/Master data buffer */ + out_8(&i2c->mdcntl, IIC_MDCNTL_FSDB | IIC_MDCNTL_FMDB); - /* Ignore General Call, slave transfers are ignored, - * disable interrupts, exit unknown bus state, enable hold - * SCL 100kHz normaly or FastMode for 400kHz and above - */ + val = in_8(&i2c->mdcntl); - val |= IIC_MDCNTL_EUBS | IIC_MDCNTL_HSCL; - if (speed >= 400000) - val |= IIC_MDCNTL_FSM; - out_8(&i2c->mdcntl, val); + /* Ignore General Call, slave transfers are ignored, + * disable interrupts, exit unknown bus state, enable hold + * SCL 100kHz normaly or FastMode for 400kHz and above + */ - /* clear control reg */ - out_8(&i2c->cntl, 0x00); - } + val |= IIC_MDCNTL_EUBS | IIC_MDCNTL_HSCL; + if (speed >= 400000) + val |= IIC_MDCNTL_FSM; + out_8(&i2c->mdcntl, val); - /* set to SPD bus as default bus upon powerup */ - I2C_SET_BUS(CONFIG_SYS_SPD_BUS_NUM); + /* clear control reg */ + out_8(&i2c->cntl, 0x00); } /* @@ -194,14 +185,15 @@ void i2c_init(int speed, int slaveaddr) * * It does not check XFRCNT. */ -static int i2c_transfer(unsigned char cmd_type, +static int _i2c_transfer(struct i2c_adapter *adap, + unsigned char cmd_type, unsigned char chip, unsigned char addr[], unsigned char addr_len, unsigned char data[], unsigned short data_len) { - struct ppc4xx_i2c *i2c = (struct ppc4xx_i2c *)I2C_BASE_ADDR; + struct ppc4xx_i2c *i2c = ppc4xx_get_i2c(adap->hwadapnr); u8 *ptr; int reading; int tran, cnt; @@ -345,7 +337,7 @@ static int i2c_transfer(unsigned char cmd_type, return result; } -int i2c_probe(uchar chip) +static int ppc4xx_i2c_probe(struct i2c_adapter *adap, uchar chip) { uchar buf[1]; @@ -356,11 +348,11 @@ int i2c_probe(uchar chip) * address was <ACK>ed (i.e. there was a chip at that address which * drove the data line low). */ - return (i2c_transfer(1, chip << 1, 0, 0, buf, 1) != 0); + return (_i2c_transfer(adap, 1, chip << 1, 0, 0, buf, 1) != 0); } -static int ppc4xx_i2c_transfer(uchar chip, uint addr, int alen, uchar *buffer, - int len, int read) +static int ppc4xx_i2c_transfer(struct i2c_adapter *adap, uchar chip, uint addr, + int alen, uchar *buffer, int len, int read) { uchar xaddr[4]; int ret; @@ -394,43 +386,50 @@ static int ppc4xx_i2c_transfer(uchar chip, uint addr, int alen, uchar *buffer, chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW); #endif - if ((ret = i2c_transfer(read, chip << 1, &xaddr[4 - alen], alen, - buffer, len)) != 0) { + ret = _i2c_transfer(adap, read, chip << 1, &xaddr[4 - alen], alen, + buffer, len); + if (ret) { printf("I2C %s: failed %d\n", read ? "read" : "write", ret); - return 1; } return 0; } -int i2c_read(uchar chip, uint addr, int alen, uchar * buffer, int len) +static int ppc4xx_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr, + int alen, uchar *buffer, int len) { - return ppc4xx_i2c_transfer(chip, addr, alen, buffer, len, 1); + return ppc4xx_i2c_transfer(adap, chip, addr, alen, buffer, len, 1); } -int i2c_write(uchar chip, uint addr, int alen, uchar * buffer, int len) +static int ppc4xx_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr, + int alen, uchar *buffer, int len) { - return ppc4xx_i2c_transfer(chip, addr, alen, buffer, len, 0); + return ppc4xx_i2c_transfer(adap, chip, addr, alen, buffer, len, 0); } -#if defined(CONFIG_I2C_MULTI_BUS) -/* - * Functions for multiple I2C bus handling - */ -unsigned int i2c_get_bus_num(void) +static unsigned int ppc4xx_i2c_set_bus_speed(struct i2c_adapter *adap, + unsigned int speed) { - return i2c_bus_num; -} - -int i2c_set_bus_num(unsigned int bus) -{ - if (bus >= CONFIG_SYS_MAX_I2C_BUS) + if (speed != adap->speed) return -1; - - i2c_bus_num = bus; - - return 0; + return speed; } -#endif /* CONFIG_I2C_MULTI_BUS */ -#endif /* CONFIG_HARD_I2C */ + +/* + * Register ppc4xx i2c adapters + */ +#ifdef CONFIG_SYS_I2C_PPC4XX_CH0 +U_BOOT_I2C_ADAP_COMPLETE(ppc4xx_0, ppc4xx_i2c_init, ppc4xx_i2c_probe, + ppc4xx_i2c_read, ppc4xx_i2c_write, + ppc4xx_i2c_set_bus_speed, + CONFIG_SYS_I2C_PPC4XX_SPEED_0, + CONFIG_SYS_I2C_PPC4XX_SLAVE_0, 0) +#endif +#ifdef CONFIG_SYS_I2C_PPC4XX_CH1 +U_BOOT_I2C_ADAP_COMPLETE(ppc4xx_1, ppc4xx_i2c_init, ppc4xx_i2c_probe, + ppc4xx_i2c_read, ppc4xx_i2c_write, + ppc4xx_i2c_set_bus_speed, + CONFIG_SYS_I2C_PPC4XX_SPEED_1, + CONFIG_SYS_I2C_PPC4XX_SLAVE_1, 1) +#endif diff --git a/include/configs/APC405.h b/include/configs/APC405.h index 9a65cbc..6720445 100644 --- a/include/configs/APC405.h +++ b/include/configs/APC405.h @@ -305,10 +305,11 @@ /* * I2C EEPROM (CAT24WC16) for environment */ -#define CONFIG_HARD_I2C /* I2c with hardware support */ -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ -#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_PPC4XX +#define CONFIG_SYS_I2C_PPC4XX_CH0 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */ diff --git a/include/configs/ASH405.h b/include/configs/ASH405.h index 09aa763..a6545c1 100644 --- a/include/configs/ASH405.h +++ b/include/configs/ASH405.h @@ -246,10 +246,11 @@ /*----------------------------------------------------------------------- * I2C EEPROM (CAT24WC16) for environment */ -#define CONFIG_HARD_I2C /* I2c with hardware support */ -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_PPC4XX +#define CONFIG_SYS_I2C_PPC4XX_CH0 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */ diff --git a/include/configs/CANBT.h b/include/configs/CANBT.h index d36cc89..fdff733 100644 --- a/include/configs/CANBT.h +++ b/include/configs/CANBT.h @@ -184,10 +184,11 @@ #define CONFIG_SYS_I2C_SOFT /* Software I2C support enabled */ #endif #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */ -#define CONFIG_HARD_I2C /* I2C with hardware support */ -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_PPC4XX +#define CONFIG_SYS_I2C_PPC4XX_CH0 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */ diff --git a/include/configs/CATcenter.h b/include/configs/CATcenter.h index 1e3a564..d17adf8 100644 --- a/include/configs/CATcenter.h +++ b/include/configs/CATcenter.h @@ -401,10 +401,11 @@ /*----------------------------------------------------------------------- * I2C EEPROM (CAT24WC16) for environment */ -#define CONFIG_HARD_I2C /* I2c with hardware support */ -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_PPC4XX +#define CONFIG_SYS_I2C_PPC4XX_CH0 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */ diff --git a/include/configs/CMS700.h b/include/configs/CMS700.h index 686d158..ca258e6 100644 --- a/include/configs/CMS700.h +++ b/include/configs/CMS700.h @@ -226,10 +226,11 @@ /*----------------------------------------------------------------------- * I2C EEPROM (CAT24WC16) for environment */ -#define CONFIG_HARD_I2C /* I2c with hardware support */ -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ -#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_PPC4XX +#define CONFIG_SYS_I2C_PPC4XX_CH0 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */ diff --git a/include/configs/CPCI2DP.h b/include/configs/CPCI2DP.h index 11cf58b..8a3eb54 100644 --- a/include/configs/CPCI2DP.h +++ b/include/configs/CPCI2DP.h @@ -210,10 +210,11 @@ /*----------------------------------------------------------------------- * I2C EEPROM (CAT24WC16) for environment */ -#define CONFIG_HARD_I2C /* I2c with hardware support */ -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_PPC4XX +#define CONFIG_SYS_I2C_PPC4XX_CH0 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */ diff --git a/include/configs/CPCI405.h b/include/configs/CPCI405.h index e3e5ebc..4751b8f 100644 --- a/include/configs/CPCI405.h +++ b/include/configs/CPCI405.h @@ -259,10 +259,11 @@ /*----------------------------------------------------------------------- * I2C EEPROM (CAT24WC08) for environment */ -#define CONFIG_HARD_I2C /* I2c with hardware support */ -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_PPC4XX +#define CONFIG_SYS_I2C_PPC4XX_CH0 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */ diff --git a/include/configs/CPCI4052.h b/include/configs/CPCI4052.h index c4fff48..6cbee62 100644 --- a/include/configs/CPCI4052.h +++ b/include/configs/CPCI4052.h @@ -286,10 +286,11 @@ /*----------------------------------------------------------------------- * I2C EEPROM (CAT24WC16) for environment */ -#define CONFIG_HARD_I2C /* I2c with hardware support */ -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_PPC4XX +#define CONFIG_SYS_I2C_PPC4XX_CH0 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */ diff --git a/include/configs/CPCI405AB.h b/include/configs/CPCI405AB.h index 9122cbd..5a014c4 100644 --- a/include/configs/CPCI405AB.h +++ b/include/configs/CPCI405AB.h @@ -262,10 +262,11 @@ /*----------------------------------------------------------------------- * I2C EEPROM (CAT24WC32) for environment */ -#define CONFIG_HARD_I2C /* I2c with hardware support */ -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ -#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_PPC4XX +#define CONFIG_SYS_I2C_PPC4XX_CH0 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC32 */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* Bytes of address */ diff --git a/include/configs/CPCI405DT.h b/include/configs/CPCI405DT.h index f778af7..7572f57 100644 --- a/include/configs/CPCI405DT.h +++ b/include/configs/CPCI405DT.h @@ -281,10 +281,11 @@ /*----------------------------------------------------------------------- * I2C EEPROM (CAT24WC16) for environment */ -#define CONFIG_HARD_I2C /* I2c with hardware support */ -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_PPC4XX +#define CONFIG_SYS_I2C_PPC4XX_CH0 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */ diff --git a/include/configs/CPCIISER4.h b/include/configs/CPCIISER4.h index 35daed0..854847b 100644 --- a/include/configs/CPCIISER4.h +++ b/include/configs/CPCIISER4.h @@ -195,10 +195,11 @@ /*----------------------------------------------------------------------- * I2C EEPROM (CAT24WC08) for environment */ -#define CONFIG_HARD_I2C /* I2C with hardware support */ -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_PPC4XX +#define CONFIG_SYS_I2C_PPC4XX_CH0 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */ diff --git a/include/configs/CRAYL1.h b/include/configs/CRAYL1.h index 6bceccb..37139ed 100644 --- a/include/configs/CRAYL1.h +++ b/include/configs/CRAYL1.h @@ -76,11 +76,12 @@ #define CONFIG_SERVERIP 10.0.0.1 #define CONFIG_ETHADDR 00:40:a6:80:14:5 */ -#define CONFIG_HARD_I2C 1 /* hardware support for i2c */ -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_PPC4XX +#define CONFIG_SYS_I2C_PPC4XX_CH0 #define CONFIG_SDRAM_BANK0 1 -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F #define CONFIG_SYS_I2C_EEPROM_ADDR 0x57 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 #define CONFIG_IDENT_STRING "Cray L1" diff --git a/include/configs/DP405.h b/include/configs/DP405.h index 6d67d6e..fa09797 100644 --- a/include/configs/DP405.h +++ b/include/configs/DP405.h @@ -178,10 +178,11 @@ /*----------------------------------------------------------------------- * I2C EEPROM (CAT24WC16) for environment */ -#define CONFIG_HARD_I2C /* I2c with hardware support */ -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_PPC4XX +#define CONFIG_SYS_I2C_PPC4XX_CH0 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */ diff --git a/include/configs/DU405.h b/include/configs/DU405.h index 24df85a..26162d1 100644 --- a/include/configs/DU405.h +++ b/include/configs/DU405.h @@ -197,10 +197,11 @@ /*----------------------------------------------------------------------- * I2C EEPROM (CAT24WC08) for environment */ -#define CONFIG_HARD_I2C /* I2c with hardware support */ -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_PPC4XX +#define CONFIG_SYS_I2C_PPC4XX_CH0 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */ diff --git a/include/configs/DU440.h b/include/configs/DU440.h index 09876f5..2de4443 100644 --- a/include/configs/DU440.h +++ b/include/configs/DU440.h @@ -170,18 +170,20 @@ /* * I2C */ -#define CONFIG_HARD_I2C 1 /* I2C with hardware support */ -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ -#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_I2C_MULTI_BUS 1 +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_PPC4XX +#define CONFIG_SYS_I2C_PPC4XX_CH0 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F +#define CONFIG_SYS_I2C_PPC4XX_CH1 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_1 100000 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_1 0x7F #define CONFIG_SYS_SPD_BUS_NUM 0 #define IIC1_MCP3021_ADDR 0x4d #define IIC1_USB2507_ADDR 0x2c -#ifdef CONFIG_I2C_MULTI_BUS -#define CONFIG_SYS_I2C_NOPROBES {{1, IIC1_USB2507_ADDR}} -#endif +#define CONFIG_SYS_I2C_NOPROBES { {1, IIC1_USB2507_ADDR} } + #define CONFIG_SYS_I2C_MULTI_EEPROMS #define CONFIG_SYS_I2C_EEPROM_ADDR 0x54 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 diff --git a/include/configs/G2000.h b/include/configs/G2000.h index 08ba840..5d8eb77 100644 --- a/include/configs/G2000.h +++ b/include/configs/G2000.h @@ -297,10 +297,11 @@ /*----------------------------------------------------------------------- * I2C EEPROM (CAT24WC16) for environment */ -#define CONFIG_HARD_I2C /* I2c with hardware support */ -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_PPC4XX +#define CONFIG_SYS_I2C_PPC4XX_CH0 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT24WC08 */ /* CAT24WC08/16... */ diff --git a/include/configs/HH405.h b/include/configs/HH405.h index 444413d..1435f03 100644 --- a/include/configs/HH405.h +++ b/include/configs/HH405.h @@ -333,14 +333,15 @@ /*----------------------------------------------------------------------- * I2C EEPROM (CAT24WC16) for environment */ -#define CONFIG_HARD_I2C /* I2c with hardware support */ -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_PPC4XX +#define CONFIG_SYS_I2C_PPC4XX_CH0 #if 0 /* test-only */ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 #else -#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */ +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000 #endif -#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT24WC08 */ #define CONFIG_SYS_EEPROM_WREN 1 diff --git a/include/configs/HUB405.h b/include/configs/HUB405.h index e90782f..ecfc4aa 100644 --- a/include/configs/HUB405.h +++ b/include/configs/HUB405.h @@ -246,10 +246,11 @@ /*----------------------------------------------------------------------- * I2C EEPROM (CAT24WC16) for environment */ -#define CONFIG_HARD_I2C /* I2c with hardware support */ -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_PPC4XX +#define CONFIG_SYS_I2C_PPC4XX_CH0 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */ diff --git a/include/configs/JSE.h b/include/configs/JSE.h index 713dcca..0ab6864 100644 --- a/include/configs/JSE.h +++ b/include/configs/JSE.h @@ -210,10 +210,11 @@ #define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */ -#define CONFIG_HARD_I2C 1 /* I2C with hardware support */ -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_PPC4XX +#define CONFIG_SYS_I2C_PPC4XX_CH0 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F /*----------------------------------------------------------------------- diff --git a/include/configs/KAREF.h b/include/configs/KAREF.h index f8da14d..4a60436 100644 --- a/include/configs/KAREF.h +++ b/include/configs/KAREF.h @@ -133,13 +133,15 @@ /*----------------------------------------------------------------------- * I2C *----------------------------------------------------------------------*/ -#define CONFIG_HARD_I2C 1 /* I2C hardware support */ -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed 400kHz */ -#define CONFIG_SYS_I2C_SLAVE 0x7F /* I2C slave address */ -#define CONFIG_SYS_I2C_NOPROBES {0x69} /* Don't probe these addrs */ -#define CONFIG_I2C_BUS1 1 /* Include i2c bus 1 supp */ - +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_PPC4XX +#define CONFIG_SYS_I2C_PPC4XX_CH0 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F +#define CONFIG_SYS_I2C_PPC4XX_CH1 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_1 400000 /* I2C speed 400kHz */ +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_1 0x7F +#define CONFIG_SYS_I2C_NOPROBES { { 0, 0x69} } /* Don't probe these addrs */ /*----------------------------------------------------------------------- * Environment diff --git a/include/configs/METROBOX.h b/include/configs/METROBOX.h index 7556ad5..96f3015 100644 --- a/include/configs/METROBOX.h +++ b/include/configs/METROBOX.h @@ -195,13 +195,15 @@ /*----------------------------------------------------------------------- * I2C *----------------------------------------------------------------------*/ -#define CONFIG_HARD_I2C 1 /* I2C hardware support */ -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed 400kHz */ -#define CONFIG_SYS_I2C_SLAVE 0x7F /* I2C slave address */ -#define CONFIG_SYS_I2C_NOPROBES {0x69} /* Don't probe these addrs */ -#define CONFIG_I2C_BUS1 1 /* Include i2c bus 1 supp */ - +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_PPC4XX +#define CONFIG_SYS_I2C_PPC4XX_CH0 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F +#define CONFIG_SYS_I2C_PPC4XX_CH1 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_1 400000 /* I2C speed 400kHz */ +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_1 0x7F +#define CONFIG_SYS_I2C_NOPROBES { { 0, 0x69} } /* Don't probe these addrs */ /*----------------------------------------------------------------------- * Environment diff --git a/include/configs/MIP405.h b/include/configs/MIP405.h index 979495a..831f5c9 100644 --- a/include/configs/MIP405.h +++ b/include/configs/MIP405.h @@ -98,10 +98,11 @@ * The Atmel EEPROM uses 16Bit addressing. ***************************************************************/ -#define CONFIG_HARD_I2C /* I2c with hardware support */ -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ -#define CONFIG_SYS_I2C_SPEED 50000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_PPC4XX +#define CONFIG_SYS_I2C_PPC4XX_CH0 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 50000 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F #define CONFIG_SYS_I2C_EEPROM_ADDR 0x53 /* EEPROM 24C128/256 */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* Bytes of address */ diff --git a/include/configs/OCRTC.h b/include/configs/OCRTC.h index 47110af..9b8b701 100644 --- a/include/configs/OCRTC.h +++ b/include/configs/OCRTC.h @@ -216,10 +216,11 @@ /*----------------------------------------------------------------------- * I2C EEPROM (CAT24WC08) for environment */ -#define CONFIG_HARD_I2C /* I2c with hardware support */ -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_PPC4XX +#define CONFIG_SYS_I2C_PPC4XX_CH0 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */ diff --git a/include/configs/ORSG.h b/include/configs/ORSG.h index 9f754c2..8f221f9 100644 --- a/include/configs/ORSG.h +++ b/include/configs/ORSG.h @@ -212,10 +212,11 @@ /*----------------------------------------------------------------------- * I2C EEPROM (CAT24WC08) for environment */ -#define CONFIG_HARD_I2C /* I2c with hardware support */ -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_PPC4XX +#define CONFIG_SYS_I2C_PPC4XX_CH0 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */ diff --git a/include/configs/PCI405.h b/include/configs/PCI405.h index 119819e..687340d 100644 --- a/include/configs/PCI405.h +++ b/include/configs/PCI405.h @@ -208,10 +208,11 @@ /*----------------------------------------------------------------------- * I2C EEPROM (CAT24WC16) for environment */ -#define CONFIG_HARD_I2C /* I2c with hardware support */ -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_PPC4XX +#define CONFIG_SYS_I2C_PPC4XX_CH0 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */ diff --git a/include/configs/PIP405.h b/include/configs/PIP405.h index 713ea12..b881609 100644 --- a/include/configs/PIP405.h +++ b/include/configs/PIP405.h @@ -87,10 +87,11 @@ * EEPROM of the SDRAM * The Atmel EEPROM uses 16Bit addressing. ***************************************************************/ -#define CONFIG_HARD_I2C /* I2c with hardware support */ -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ -#define CONFIG_SYS_I2C_SPEED 50000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_PPC4XX +#define CONFIG_SYS_I2C_PPC4XX_CH0 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 50000 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F #define CONFIG_SYS_I2C_EEPROM_ADDR 0x53 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 diff --git a/include/configs/PLU405.h b/include/configs/PLU405.h index 1ee0c48..7240d00 100644 --- a/include/configs/PLU405.h +++ b/include/configs/PLU405.h @@ -280,10 +280,11 @@ /* * I2C EEPROM (24WC16) for environment */ -#define CONFIG_HARD_I2C /* I2c with hardware support */ -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_PPC4XX +#define CONFIG_SYS_I2C_PPC4XX_CH0 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM 24WC16 */ #define CONFIG_SYS_EEPROM_WREN 1 diff --git a/include/configs/PMC405.h b/include/configs/PMC405.h index 8235b85..6cc8917 100644 --- a/include/configs/PMC405.h +++ b/include/configs/PMC405.h @@ -238,10 +238,11 @@ /* * I2C EEPROM (CAT24WC16) for environment */ -#define CONFIG_HARD_I2C /* I2c with hardware support */ -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ -#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_PPC4XX +#define CONFIG_SYS_I2C_PPC4XX_CH0 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT24W16 */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */ diff --git a/include/configs/PMC405DE.h b/include/configs/PMC405DE.h index 992443a..6ee3a8d 100644 --- a/include/configs/PMC405DE.h +++ b/include/configs/PMC405DE.h @@ -216,10 +216,11 @@ /* * I2C EEPROM (24W16) for environment */ -#define CONFIG_HARD_I2C /* I2c with hardware support */ -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_PPC4XX +#define CONFIG_SYS_I2C_PPC4XX_CH0 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM 24W16 */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */ diff --git a/include/configs/PMC440.h b/include/configs/PMC440.h index 2265d96..470ee69 100644 --- a/include/configs/PMC440.h +++ b/include/configs/PMC440.h @@ -225,12 +225,14 @@ /*----------------------------------------------------------------------- * I2C *----------------------------------------------------------------------*/ -#define CONFIG_HARD_I2C 1 /* I2C with hardware support */ -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F - -#define CONFIG_I2C_MULTI_BUS 1 +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_PPC4XX +#define CONFIG_SYS_I2C_PPC4XX_CH0 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F +#define CONFIG_SYS_I2C_PPC4XX_CH1 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_1 400000 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_1 0x7F #define CONFIG_SYS_I2C_MULTI_EEPROMS diff --git a/include/configs/PPChameleonEVB.h b/include/configs/PPChameleonEVB.h index 27a12b3..82739fe 100644 --- a/include/configs/PPChameleonEVB.h +++ b/include/configs/PPChameleonEVB.h @@ -418,10 +418,11 @@ /*----------------------------------------------------------------------- * I2C EEPROM (CAT24WC16) for environment */ -#define CONFIG_HARD_I2C /* I2c with hardware support */ -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_PPC4XX +#define CONFIG_SYS_I2C_PPC4XX_CH0 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */ diff --git a/include/configs/VOH405.h b/include/configs/VOH405.h index f1032f0..46e1674 100644 --- a/include/configs/VOH405.h +++ b/include/configs/VOH405.h @@ -279,10 +279,11 @@ /*----------------------------------------------------------------------- * I2C EEPROM (CAT24WC16) for environment */ -#define CONFIG_HARD_I2C /* I2c with hardware support */ -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ -#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_PPC4XX +#define CONFIG_SYS_I2C_PPC4XX_CH0 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT24WC08 */ #define CONFIG_SYS_EEPROM_WREN 1 diff --git a/include/configs/VOM405.h b/include/configs/VOM405.h index 43d6bb3..85722e4 100644 --- a/include/configs/VOM405.h +++ b/include/configs/VOM405.h @@ -205,10 +205,11 @@ /* * I2C EEPROM (CAT24WC16) for environment */ -#define CONFIG_HARD_I2C /* I2c with hardware support */ -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_PPC4XX +#define CONFIG_SYS_I2C_PPC4XX_CH0 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */ diff --git a/include/configs/W7OLMC.h b/include/configs/W7OLMC.h index 462b155..40cd8f8 100644 --- a/include/configs/W7OLMC.h +++ b/include/configs/W7OLMC.h @@ -278,10 +278,11 @@ /*----------------------------------------------------------------------- * I2C EEPROM (CAT24WC08) for environment */ -#define CONFIG_HARD_I2C /* I2c with hardware support */ -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_PPC4XX +#define CONFIG_SYS_I2C_PPC4XX_CH0 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */ diff --git a/include/configs/W7OLMG.h b/include/configs/W7OLMG.h index f28f3e4..f419d7e 100644 --- a/include/configs/W7OLMG.h +++ b/include/configs/W7OLMG.h @@ -285,10 +285,11 @@ /*----------------------------------------------------------------------- * I2C EEPROM (ATMEL 24C04N) */ -#define CONFIG_HARD_I2C 1 /* Hardware assisted I2C */ -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_PPC4XX +#define CONFIG_SYS_I2C_PPC4XX_CH0 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM ATMEL 24C04N */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */ diff --git a/include/configs/WUH405.h b/include/configs/WUH405.h index 5def36a..97983a6 100644 --- a/include/configs/WUH405.h +++ b/include/configs/WUH405.h @@ -243,10 +243,11 @@ /*----------------------------------------------------------------------- * I2C EEPROM (CAT24WC16) for environment */ -#define CONFIG_HARD_I2C /* I2c with hardware support */ -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_PPC4XX +#define CONFIG_SYS_I2C_PPC4XX_CH0 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */ diff --git a/include/configs/acadia.h b/include/configs/acadia.h index 8c447ca..52a64bf 100644 --- a/include/configs/acadia.h +++ b/include/configs/acadia.h @@ -206,7 +206,7 @@ /*----------------------------------------------------------------------- * I2C *----------------------------------------------------------------------*/ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 #define CONFIG_SYS_I2C_MULTI_EEPROMS #define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1) diff --git a/include/configs/alpr.h b/include/configs/alpr.h index a6add6b..99b1290 100644 --- a/include/configs/alpr.h +++ b/include/configs/alpr.h @@ -121,11 +121,12 @@ /*----------------------------------------------------------------------- * I2C *----------------------------------------------------------------------*/ -#define CONFIG_HARD_I2C 1 /* I2C with hardware support */ -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ -#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_NOPROBES {0x69} /* Don't probe these addrs */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_PPC4XX +#define CONFIG_SYS_I2C_PPC4XX_CH0 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F +#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} } /* Don't probe these addrs */ /*----------------------------------------------------------------------- * I2C EEPROM (PCF8594C) diff --git a/include/configs/amcc-common.h b/include/configs/amcc-common.h index f2f522d..d5dd67c 100644 --- a/include/configs/amcc-common.h +++ b/include/configs/amcc-common.h @@ -42,9 +42,10 @@ /* * I2C */ -#define CONFIG_HARD_I2C /* I2C with hardware support */ -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ -#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_PPC4XX +#define CONFIG_SYS_I2C_PPC4XX_CH0 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F /* * Ethernet/EMAC/PHY diff --git a/include/configs/bamboo.h b/include/configs/bamboo.h index 506a558..910b626 100644 --- a/include/configs/bamboo.h +++ b/include/configs/bamboo.h @@ -222,7 +222,7 @@ /*----------------------------------------------------------------------- * I2C *----------------------------------------------------------------------*/ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 #define CONFIG_SYS_I2C_MULTI_EEPROMS #define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1) diff --git a/include/configs/bluestone.h b/include/configs/bluestone.h index 3e691fd..934da81 100644 --- a/include/configs/bluestone.h +++ b/include/configs/bluestone.h @@ -122,7 +122,7 @@ /* * I2C */ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed */ +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 #define CONFIG_SYS_I2C_MULTI_EEPROMS #define CONFIG_SYS_I2C_EEPROM_ADDR 0x54 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 diff --git a/include/configs/bubinga.h b/include/configs/bubinga.h index da67ae3..e429ed2 100644 --- a/include/configs/bubinga.h +++ b/include/configs/bubinga.h @@ -134,9 +134,9 @@ * I2C stuff *----------------------------------------------------------------------- */ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 -#define CONFIG_SYS_I2C_NOPROBES { 0x69 } /* avoid i2c probe hangup (why?) */ +#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} } /* avoid i2c probe hangup (?) */ #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 6 /* 24C02 requires 5ms delay */ #if defined(CONFIG_CMD_EEPROM) diff --git a/include/configs/canyonlands.h b/include/configs/canyonlands.h index acb127c..61dbda6 100644 --- a/include/configs/canyonlands.h +++ b/include/configs/canyonlands.h @@ -329,7 +329,7 @@ /*----------------------------------------------------------------------- * I2C *----------------------------------------------------------------------*/ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed */ +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 #define CONFIG_SYS_I2C_MULTI_EEPROMS #define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1) diff --git a/include/configs/csb272.h b/include/configs/csb272.h index f21fa64..d1a1d2a 100644 --- a/include/configs/csb272.h +++ b/include/configs/csb272.h @@ -175,10 +175,11 @@ * I2C configuration * */ -#define CONFIG_HARD_I2C 1 /* I2C with hardware support */ -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ -#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed */ -#define CONFIG_SYS_I2C_SLAVE 0x7F /* I2C slave address */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_PPC4XX +#define CONFIG_SYS_I2C_PPC4XX_CH0 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F /* I2C slave address */ /* * MII PHY configuration diff --git a/include/configs/csb472.h b/include/configs/csb472.h index aed5fa6..4cd0057 100644 --- a/include/configs/csb472.h +++ b/include/configs/csb472.h @@ -174,10 +174,11 @@ * I2C configuration * */ -#define CONFIG_HARD_I2C 1 /* I2C with hardware support */ -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ -#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed */ -#define CONFIG_SYS_I2C_SLAVE 0x7F /* I2C slave address */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_PPC4XX +#define CONFIG_SYS_I2C_PPC4XX_CH0 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F /* I2C slave address */ /* * MII PHY configuration diff --git a/include/configs/dlvision-10g.h b/include/configs/dlvision-10g.h index 2cd2027..5d6308f 100644 --- a/include/configs/dlvision-10g.h +++ b/include/configs/dlvision-10g.h @@ -114,7 +114,7 @@ /* * I2C stuff */ -#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000 /* Temp sensor/hwmon/dtt */ #define CONFIG_DTT_LM63 1 /* National LM63 */ diff --git a/include/configs/dlvision.h b/include/configs/dlvision.h index c490ff6..24c9fa4 100644 --- a/include/configs/dlvision.h +++ b/include/configs/dlvision.h @@ -107,7 +107,7 @@ /* * I2C stuff */ -#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address*/ +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000 /* * FLASH organization diff --git a/include/configs/ebony.h b/include/configs/ebony.h index d6b6551..bb56d0f 100644 --- a/include/configs/ebony.h +++ b/include/configs/ebony.h @@ -138,7 +138,7 @@ /*----------------------------------------------------------------------- * I2C *----------------------------------------------------------------------*/ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 #define CONFIG_SYS_I2C_MULTI_EEPROMS #define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1) diff --git a/include/configs/gdppc440etx.h b/include/configs/gdppc440etx.h index 9efbb8e..ab35901 100644 --- a/include/configs/gdppc440etx.h +++ b/include/configs/gdppc440etx.h @@ -145,7 +145,7 @@ /* * I2C */ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed+slave address*/ +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 /* * Default environment variables diff --git a/include/configs/icon.h b/include/configs/icon.h index 2fac0ef..a55a851 100644 --- a/include/configs/icon.h +++ b/include/configs/icon.h @@ -120,9 +120,8 @@ /* * I2C */ -#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */ +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000 -#define CONFIG_I2C_MULTI_BUS #define CONFIG_SYS_SPD_BUS_NUM 0 /* The I2C bus for SPD */ #define CONFIG_SYS_I2C_MULTI_EEPROMS diff --git a/include/configs/intip.h b/include/configs/intip.h index 33364a8..04451b3 100644 --- a/include/configs/intip.h +++ b/include/configs/intip.h @@ -228,7 +228,7 @@ /* * I2C */ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed */ +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 #define CONFIG_SYS_I2C_MULTI_EEPROMS #define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1) diff --git a/include/configs/io.h b/include/configs/io.h index 03661cc..4950ad7 100644 --- a/include/configs/io.h +++ b/include/configs/io.h @@ -114,7 +114,7 @@ /* * I2C stuff */ -#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000 /* Temp sensor/hwmon/dtt */ #define CONFIG_DTT_LM63 1 /* National LM63 */ diff --git a/include/configs/io64.h b/include/configs/io64.h index 887aaef..bb29bed 100644 --- a/include/configs/io64.h +++ b/include/configs/io64.h @@ -340,7 +340,7 @@ /*----------------------------------------------------------------------- * I2C *----------------------------------------------------------------------*/ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 #define CONFIG_PCA9698 1 /* NXP PCA9698 */ diff --git a/include/configs/iocon.h b/include/configs/iocon.h index 695aa5c..5972711 100644 --- a/include/configs/iocon.h +++ b/include/configs/iocon.h @@ -110,11 +110,11 @@ /* * I2C stuff */ -#undef CONFIG_HARD_I2C #define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ -#define CONFIG_SYS_I2C_SOFT_SPEED 400000 -#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE +#define CONFIG_SYS_I2C_PPC4XX +#define CONFIG_SYS_I2C_PPC4XX_CH0 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F /* * Software (bit-bang) I2C driver configuration diff --git a/include/configs/katmai.h b/include/configs/katmai.h index 3ed8dc7..5b3ad74 100644 --- a/include/configs/katmai.h +++ b/include/configs/katmai.h @@ -119,9 +119,8 @@ /*----------------------------------------------------------------------- * I2C *----------------------------------------------------------------------*/ -#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */ +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000 -#define CONFIG_I2C_MULTI_BUS #define CONFIG_SYS_SPD_BUS_NUM 0 /* The I2C bus for SPD */ #define IIC0_BOOTPROM_ADDR 0x50 diff --git a/include/configs/kilauea.h b/include/configs/kilauea.h index d505a41..4af908d 100644 --- a/include/configs/kilauea.h +++ b/include/configs/kilauea.h @@ -385,7 +385,7 @@ /*----------------------------------------------------------------------- * I2C *----------------------------------------------------------------------*/ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x52 /* I2C boot EEPROM (24C02BN) */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */ diff --git a/include/configs/korat.h b/include/configs/korat.h index 7d5fb15..5744db3 100644 --- a/include/configs/korat.h +++ b/include/configs/korat.h @@ -155,10 +155,11 @@ /* * I2C */ -#define CONFIG_HARD_I2C 1 /* I2C with hardware support */ -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_PPC4XX +#define CONFIG_SYS_I2C_PPC4XX_CH0 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F #define CONFIG_SYS_I2C_MULTI_EEPROMS #define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1) diff --git a/include/configs/luan.h b/include/configs/luan.h index 3b4761b..ed275a1 100644 --- a/include/configs/luan.h +++ b/include/configs/luan.h @@ -134,7 +134,7 @@ /*----------------------------------------------------------------------- * I2C *----------------------------------------------------------------------*/ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 #define CONFIG_SYS_I2C_MULTI_EEPROMS #define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1) diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h index fec0d55..868e5c9 100644 --- a/include/configs/lwmon5.h +++ b/include/configs/lwmon5.h @@ -280,10 +280,11 @@ /* * I2C */ -#define CONFIG_HARD_I2C /* I2C with hardware support */ -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ -#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_PPC4XX +#define CONFIG_SYS_I2C_PPC4XX_CH0 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F #define CONFIG_SYS_I2C_RTC_ADDR 0x51 /* RTC */ #define CONFIG_SYS_I2C_EEPROM_CPU_ADDR 0x52 /* EEPROM (CPU Modul) */ diff --git a/include/configs/makalu.h b/include/configs/makalu.h index 6c1b136..5baba18 100644 --- a/include/configs/makalu.h +++ b/include/configs/makalu.h @@ -201,7 +201,7 @@ /*----------------------------------------------------------------------- * I2C *----------------------------------------------------------------------*/ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 6 /* 24C02 requires 5ms delay */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x52 /* I2C boot EEPROM (24C02BN) */ diff --git a/include/configs/neo.h b/include/configs/neo.h index 38b5bec..be1c9ff 100644 --- a/include/configs/neo.h +++ b/include/configs/neo.h @@ -117,7 +117,7 @@ /* * I2C stuff */ -#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */ +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000 /* RTC */ #define CONFIG_RTC_DS1337 diff --git a/include/configs/ocotea.h b/include/configs/ocotea.h index d0fe9da..de021e3 100644 --- a/include/configs/ocotea.h +++ b/include/configs/ocotea.h @@ -151,7 +151,7 @@ /*----------------------------------------------------------------------- * I2C *----------------------------------------------------------------------*/ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 #define CONFIG_SYS_I2C_MULTI_EEPROMS #define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1) diff --git a/include/configs/p3p440.h b/include/configs/p3p440.h index ba10e88..4c9fb6f 100644 --- a/include/configs/p3p440.h +++ b/include/configs/p3p440.h @@ -97,11 +97,12 @@ /*----------------------------------------------------------------------- * I2C *----------------------------------------------------------------------*/ -#define CONFIG_HARD_I2C 1 /* I2C with hardware support */ -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ -#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_NOPROBES {0x69} /* Don't probe these addrs */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_PPC4XX +#define CONFIG_SYS_I2C_PPC4XX_CH0 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F +#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} } /* Don't probe these addrs */ /*----------------------------------------------------------------------- * I2C RTC diff --git a/include/configs/pcs440ep.h b/include/configs/pcs440ep.h index 8d46607..51e26be 100644 --- a/include/configs/pcs440ep.h +++ b/include/configs/pcs440ep.h @@ -139,10 +139,11 @@ /*----------------------------------------------------------------------- * I2C *----------------------------------------------------------------------*/ -#define CONFIG_HARD_I2C 1 /* I2C with hardware support */ -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ -#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_PPC4XX +#define CONFIG_SYS_I2C_PPC4XX_CH0 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F #define CONFIG_SYS_I2C_EEPROM_ADDR (0xa4>>1) #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 diff --git a/include/configs/quad100hd.h b/include/configs/quad100hd.h index 30a8c55..809d764 100644 --- a/include/configs/quad100hd.h +++ b/include/configs/quad100hd.h @@ -152,10 +152,11 @@ /*----------------------------------------------------------------------- * I2C *----------------------------------------------------------------------*/ -#define CONFIG_HARD_I2C 1 /* I2C with hardware support */ -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_PPC4XX +#define CONFIG_SYS_I2C_PPC4XX_CH0 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* base address */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* bytes of address */ diff --git a/include/configs/redwood.h b/include/configs/redwood.h index f75ab67..355c330 100644 --- a/include/configs/redwood.h +++ b/include/configs/redwood.h @@ -110,13 +110,13 @@ /*----------------------------------------------------------------------- * I2C *----------------------------------------------------------------------*/ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed */ +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 #define IIC0_BOOTPROM_ADDR 0x50 #define IIC0_ALT_BOOTPROM_ADDR 0x54 /* Don't probe these addrs */ -#define CONFIG_SYS_I2C_NOPROBES {0x50, 0x52, 0x53, 0x54} +#define CONFIG_SYS_I2C_NOPROBES { {0, 0x50}, {0, 0x52}, {0, 0x53}, {0, 0x54} } #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* Bytes of address */ diff --git a/include/configs/sbc405.h b/include/configs/sbc405.h index 9918638..2342d7c 100644 --- a/include/configs/sbc405.h +++ b/include/configs/sbc405.h @@ -168,10 +168,11 @@ #define CONFIG_SYS_RX_ETH_BUFFER 16 /* use 16 rx buffer on 405 emac */ -#define CONFIG_HARD_I2C 1 /* I2C with hardware support */ -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_PPC4XX +#define CONFIG_SYS_I2C_PPC4XX_CH0 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F /*----------------------------------------------------------------------- * PCI stuff diff --git a/include/configs/sc3.h b/include/configs/sc3.h index abca9e0..cabe45e 100644 --- a/include/configs/sc3.h +++ b/include/configs/sc3.h @@ -246,15 +246,16 @@ * IIC stuff *----------------------------------------------------------------------- */ -#define CONFIG_HARD_I2C /* I2C with hardware support */ -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_PPC4XX +#define CONFIG_SYS_I2C_PPC4XX_CH0 #define I2C_INIT #define I2C_ACTIVE 0 #define I2C_TRISTATE 0 -#define CONFIG_SYS_I2C_SPEED 100000 /* use the standard 100kHz speed */ -#define CONFIG_SYS_I2C_SLAVE 0x7F /* mask valid bits */ +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F /* mask valid bits */ #define CONFIG_RTC_DS1337 #define CONFIG_SYS_I2C_RTC_ADDR 0x68 diff --git a/include/configs/sequoia.h b/include/configs/sequoia.h index dd5d7cd..3b8a0c6 100644 --- a/include/configs/sequoia.h +++ b/include/configs/sequoia.h @@ -232,7 +232,7 @@ /* * I2C */ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 #define CONFIG_SYS_I2C_MULTI_EEPROMS #define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1) diff --git a/include/configs/t3corp.h b/include/configs/t3corp.h index 2a731a6..a129013 100644 --- a/include/configs/t3corp.h +++ b/include/configs/t3corp.h @@ -319,7 +319,7 @@ /* * I2C */ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed */ +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 #define CONFIG_SYS_I2C_MULTI_EEPROMS #define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1) diff --git a/include/configs/taihu.h b/include/configs/taihu.h index a3738b7..9bc247d 100644 --- a/include/configs/taihu.h +++ b/include/configs/taihu.h @@ -138,9 +138,9 @@ * I2C stuff *----------------------------------------------------------------------- */ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 -#define CONFIG_SYS_I2C_NOPROBES { 0x69 } /* avoid i2c probe hangup (why?) */ +#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} } /* avoid i2c probe hangup (?) */ #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 6 /* 24C02 requires 5ms delay */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* I2C boot EEPROM (24C02W) */ diff --git a/include/configs/taishan.h b/include/configs/taishan.h index 3046081..a80eccc 100644 --- a/include/configs/taishan.h +++ b/include/configs/taishan.h @@ -133,7 +133,7 @@ /*----------------------------------------------------------------------- * I2C *----------------------------------------------------------------------*/ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 #undef CONFIG_SYS_I2C_MULTI_EEPROMS #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 diff --git a/include/configs/walnut.h b/include/configs/walnut.h index d10f748..7b97f13 100644 --- a/include/configs/walnut.h +++ b/include/configs/walnut.h @@ -95,7 +95,7 @@ * I2C stuff *----------------------------------------------------------------------- */ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 #define CONFIG_SYS_I2C_MULTI_EEPROMS #define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1) diff --git a/include/configs/xpedite1000.h b/include/configs/xpedite1000.h index 506d646..8077e39 100644 --- a/include/configs/xpedite1000.h +++ b/include/configs/xpedite1000.h @@ -145,11 +145,11 @@ extern void out32(unsigned int, unsigned long); /* * I2C */ -#define CONFIG_HARD_I2C 1 /* I2C with hardware support */ -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7f -#define CONFIG_I2C_MULTI_BUS +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_PPC4XX +#define CONFIG_SYS_I2C_PPC4XX_CH0 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7f /* I2C EEPROM */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 diff --git a/include/configs/yosemite.h b/include/configs/yosemite.h index 0cbef6f..c0b0177 100644 --- a/include/configs/yosemite.h +++ b/include/configs/yosemite.h @@ -137,7 +137,7 @@ /*----------------------------------------------------------------------- * I2C *----------------------------------------------------------------------*/ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 #define CONFIG_SYS_I2C_MULTI_EEPROMS #define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1) diff --git a/include/configs/yucca.h b/include/configs/yucca.h index fb684b5..7311c2d 100644 --- a/include/configs/yucca.h +++ b/include/configs/yucca.h @@ -120,13 +120,13 @@ /*----------------------------------------------------------------------- * I2C *----------------------------------------------------------------------*/ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 #define IIC0_BOOTPROM_ADDR 0x50 #define IIC0_ALT_BOOTPROM_ADDR 0x54 /* Don't probe these addrs */ -#define CONFIG_SYS_I2C_NOPROBES {0x50, 0x52, 0x53, 0x54} +#define CONFIG_SYS_I2C_NOPROBES { {0, 0x50}, {0, 0x52}, {0, 0x53}, {0, 0x54} } /* #if defined(CONFIG_CMD_EEPROM) */ /* #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 */ /* I2C boot EEPROM */ diff --git a/include/configs/zeus.h b/include/configs/zeus.h index 75195bc..b653993 100644 --- a/include/configs/zeus.h +++ b/include/configs/zeus.h @@ -168,10 +168,11 @@ /*----------------------------------------------------------------------- * I2C *----------------------------------------------------------------------*/ -#define CONFIG_HARD_I2C 1 /* I2C with hardware support */ -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_PPC4XX +#define CONFIG_SYS_I2C_PPC4XX_CH0 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F /* these are for the ST M24C02 2kbit serial i2c eeprom */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* base address */ -- 1.7.2.5

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