March 2013 - U-Boot

[U-Boot] [PATCH] i2c: s3c24xx: add hsi2c controller support
by Naveen Krishna Chatradhi 09 Dec '13

09 Dec '13

Add support for hsi2c controller available on exynos5420. Note: driver currently supports only fast speed mode 100kbps Signed-off-by: Naveen Krishna Chatradhi <ch.naveen(a)samsung.com> Signed-off-by: R. Chandrasekar <rc.sekar(a)samsung.com> --- drivers/i2c/s3c24x0_i2c.c | 389 ++++++++++++++++++++++++++++++++++++++++++--- drivers/i2c/s3c24x0_i2c.h | 33 ++++ 2 files changed, 397 insertions(+), 25 deletions(-) diff --git a/drivers/i2c/s3c24x0_i2c.c b/drivers/i2c/s3c24x0_i2c.c index 769a2ba..3117ab7 100644 --- a/drivers/i2c/s3c24x0_i2c.c +++ b/drivers/i2c/s3c24x0_i2c.c @@ -32,6 +32,7 @@ #include <asm/arch/clk.h> #include <asm/arch/cpu.h> #include <asm/arch/pinmux.h> +#include <asm/arch/clock.h> #else #include <asm/arch/s3c24x0_cpu.h> #endif @@ -50,6 +51,60 @@ #define I2C_NOK_LA 3 /* Lost arbitration */ #define I2C_NOK_TOUT 4 /* time out */ +/* HSI2C specific register description */ + +/* I2C_CTL Register bits */ +#define HSI2C_FUNC_MODE_I2C (1u << 0) +#define HSI2C_MASTER (1u << 3) +#define HSI2C_RXCHON (1u << 6) /* Write/Send */ +#define HSI2C_TXCHON (1u << 7) /* Read/Receive */ +#define HSI2C_SW_RST (1u << 31) + +/* I2C_FIFO_CTL Register bits */ +#define HSI2C_RXFIFO_EN (1u << 0) +#define HSI2C_TXFIFO_EN (1u << 1) +#define HSI2C_TXFIFO_TRIGGER_LEVEL (0x20 << 16) +#define HSI2C_RXFIFO_TRIGGER_LEVEL (0x20 << 4) + +/* I2C_TRAILING_CTL Register bits */ +#define HSI2C_TRAILING_COUNT (0xff) + +/* I2C_INT_EN Register bits */ +#define HSI2C_INT_TX_ALMOSTEMPTY_EN (1u << 0) +#define HSI2C_INT_RX_ALMOSTFULL_EN (1u << 1) +#define HSI2C_INT_TRAILING_EN (1u << 6) +#define HSI2C_INT_I2C_EN (1u << 9) + +/* I2C_CONF Register bits */ +#define HSI2C_AUTO_MODE (1u << 31) +#define HSI2C_10BIT_ADDR_MODE (1u << 30) +#define HSI2C_HS_MODE (1u << 29) + +/* I2C_AUTO_CONF Register bits */ +#define HSI2C_READ_WRITE (1u << 16) +#define HSI2C_STOP_AFTER_TRANS (1u << 17) +#define HSI2C_MASTER_RUN (1u << 31) + +/* I2C_TIMEOUT Register bits */ +#define HSI2C_TIMEOUT_EN (1u << 31) + +/* I2C_TRANS_STATUS register bits */ +#define HSI2C_MASTER_BUSY (1u << 17) +#define HSI2C_SLAVE_BUSY (1u << 16) +#define HSI2C_NO_DEV (1u << 3) +#define HSI2C_NO_DEV_ACK (1u << 2) +#define HSI2C_TRANS_ABORT (1u << 1) +#define HSI2C_TRANS_DONE (1u << 0) +#define HSI2C_TIMEOUT_AUTO (0u << 0) + +#define HSI2C_SLV_ADDR_MAS(x) ((x & 0x3ff) << 10) + +/* Controller operating frequency, timing values for operation + * are calculated against this frequency + */ +#define HSI2C_FS_TX_CLOCK 1000000 + +/* S3C I2C Controller bits */ #define I2CSTAT_BSY 0x20 /* Busy bit */ #define I2CSTAT_NACK 0x01 /* Nack bit */ #define I2CCON_ACKGEN 0x80 /* Acknowledge generation */ @@ -61,6 +116,7 @@ #define I2C_TIMEOUT 1 /* 1 second */ +#define HSI2C_TIMEOUT 100 /* * For SPL boot some boards need i2c before SDRAM is initialised so force @@ -120,9 +176,23 @@ static int WaitForXfer(struct s3c24x0_i2c *i2c) return (readl(&i2c->iiccon) & I2CCON_IRPND) ? I2C_OK : I2C_NOK_TOUT; } -static int IsACK(struct s3c24x0_i2c *i2c) +static int hsi2c_wait_for_irq(struct exynos5_hsi2c *i2c) { - return !(readl(&i2c->iicstat) & I2CSTAT_NACK); + int i = HSI2C_TIMEOUT * 10; + int ret = I2C_NOK_TOUT; + + while (i > 0) { + /* wait for a while and retry */ + udelay(50); + if (readl(&i2c->usi_int_stat) & + (HSI2C_INT_I2C_EN | HSI2C_INT_TX_ALMOSTEMPTY_EN)) { + ret = I2C_OK; + break; + } + i--; + } + + return ret; } static void ReadWriteByte(struct s3c24x0_i2c *i2c) @@ -130,6 +200,22 @@ static void ReadWriteByte(struct s3c24x0_i2c *i2c) writel(readl(&i2c->iiccon) & ~I2CCON_IRPND, &i2c->iiccon); } +static void hsi2c_clear_irqpd(struct exynos5_hsi2c *i2c) +{ + writel(readl(&i2c->usi_int_stat), &i2c->usi_int_stat); +} + +static int hsi2c_isack(struct exynos5_hsi2c *i2c) +{ + return readl(&i2c->usi_trans_status) & + (HSI2C_NO_DEV | HSI2C_NO_DEV_ACK); +} + +static int IsACK(struct s3c24x0_i2c *i2c) +{ + return !(readl(&i2c->iicstat) & I2CSTAT_NACK); +} + static struct s3c24x0_i2c *get_base_i2c(void) { #ifdef CONFIG_EXYNOS4 @@ -147,6 +233,18 @@ static struct s3c24x0_i2c *get_base_i2c(void) #endif } +static struct exynos5_hsi2c *get_base_hsi2c(void) +{ + struct exynos5_hsi2c *i2c = NULL; + int bus = g_current_bus; + + if (proid_is_exynos5420()) + i2c = (struct exynos5_hsi2c *)(EXYNOS5420_I2C_BASE + + ((bus) * EXYNOS5_I2C_SPACING)); + + return i2c; +} + static void i2c_ch_init(struct s3c24x0_i2c *i2c, int speed, int slaveadd) { ulong freq, pres = 16, div; @@ -174,6 +272,74 @@ static void i2c_ch_init(struct s3c24x0_i2c *i2c, int speed, int slaveadd) writel(I2C_MODE_MT | I2C_TXRX_ENA, &i2c->iicstat); } +static void hsi2c_ch_init(struct exynos5_hsi2c *i2c, int speed) +{ + u32 i2c_timeout; + ulong clkin = get_i2c_clk(); + u32 i2c_timing_s1; + u32 i2c_timing_s2; + u32 i2c_timing_s3; + u32 i2c_timing_sla; + unsigned int op_clk = HSI2C_FS_TX_CLOCK; + unsigned int n_clkdiv; + unsigned int t_start_su, t_start_hd; + unsigned int t_stop_su; + unsigned int t_data_su, t_data_hd; + unsigned int t_scl_l, t_scl_h; + unsigned int t_sr_release; + unsigned int t_ftl_cycle; + unsigned int i = 0, utemp0 = 0, utemp1 = 0, utemp2 = 0; + + /* FPCLK / FI2C = + * (CLK_DIV + 1) * (TSCLK_L + TSCLK_H + 2) + 8 + 2 * FLT_CYCLE + * uTemp0 = (CLK_DIV + 1) * (TSCLK_L + TSCLK_H + 2) + * uTemp1 = (TSCLK_L + TSCLK_H + 2) + * uTemp2 = TSCLK_L + TSCLK_H + */ + t_ftl_cycle = (readl(&i2c->usi_conf) >> 16) & 0x7; + utemp0 = (clkin / op_clk) - 8 - 2 * t_ftl_cycle; + + /* CLK_DIV max is 256 */ + for (i = 0; i < 256; i++) { + utemp1 = utemp0 / (i + 1); + /* SCLK_L/H max is 256 / 2 */ + if (utemp1 < 128) { + utemp2 = utemp1 - 2; + break; + } + } + + n_clkdiv = i; + t_scl_l = utemp2 / 2; + t_scl_h = utemp2 / 2; + t_start_su = t_scl_l; + t_start_hd = t_scl_l; + t_stop_su = t_scl_l; + t_data_su = t_scl_l / 2; + t_data_hd = t_scl_l / 2; + t_sr_release = utemp2; + + i2c_timing_s1 = t_start_su << 24 | t_start_hd << 16 | t_stop_su << 8; + i2c_timing_s2 = t_data_su << 24 | t_scl_l << 8 | t_scl_h << 0; + i2c_timing_s3 = n_clkdiv << 16 | t_sr_release << 0; + i2c_timing_sla = t_data_hd << 0; + + writel(HSI2C_TRAILING_COUNT, &i2c->usi_trailing_ctl); + + /* Clear to enable Timeout */ + i2c_timeout = readl(&i2c->usi_timeout); + i2c_timeout &= ~HSI2C_TIMEOUT_EN; + writel(i2c_timeout, &i2c->usi_timeout); + + writel(readl(&i2c->usi_conf) | HSI2C_AUTO_MODE, &i2c->usi_conf); + + /* Currently operating in Fast speed mode. */ + writel(i2c_timing_s1, &i2c->usi_timing_fs1); + writel(i2c_timing_s2, &i2c->usi_timing_fs2); + writel(i2c_timing_s3, &i2c->usi_timing_fs3); + writel(i2c_timing_sla, &i2c->usi_timing_sla); +} + /* * MULTI BUS I2C support */ @@ -181,16 +347,18 @@ static void i2c_ch_init(struct s3c24x0_i2c *i2c, int speed, int slaveadd) #ifdef CONFIG_I2C_MULTI_BUS int i2c_set_bus_num(unsigned int bus) { - struct s3c24x0_i2c *i2c; - if ((bus < 0) || (bus >= CONFIG_MAX_I2C_NUM)) { debug("Bad bus: %d\n", bus); return -1; } g_current_bus = bus; - i2c = get_base_i2c(); - i2c_ch_init(i2c, CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); + if (proid_is_exynos5420() && (bus > 3)) { + hsi2c_ch_init(get_base_hsi2c(), + CONFIG_SYS_I2C_SPEED); + } else + i2c_ch_init(get_base_i2c(), CONFIG_SYS_I2C_SPEED, + CONFIG_SYS_I2C_SLAVE); return 0; } @@ -269,24 +437,182 @@ void i2c_init(int speed, int slaveadd) } /* + * Send a STOP event and wait for it to have completed + * + * @param mode If it is a master transmitter or receiver + * @return I2C_OK if the line became idle before timeout I2C_NOK_TOUT otherwise + */ +static int hsi2c_send_stop(struct exynos5_hsi2c *i2c, int result) +{ + int timeout; + int ret = I2C_NOK_TOUT; + + /* Wait for the STOP to send and the bus to go idle */ + for (timeout = HSI2C_TIMEOUT; timeout > 0; timeout -= 5) { + if (!(readl(&i2c->usi_trans_status) & HSI2C_MASTER_BUSY)) { + ret = I2C_OK; + goto out; + } + udelay(5); + } + out: + /* Setting the STOP event to fire */ + writel(HSI2C_FUNC_MODE_I2C, &i2c->usi_ctl); + writel(0x0, &i2c->usi_int_en); + + return (result == I2C_OK) ? ret : result; +} + +static int hsi2c_write(unsigned char chip, + unsigned char addr[], + unsigned char alen, + unsigned char data[], + unsigned short len) +{ + struct exynos5_hsi2c *i2c = get_base_hsi2c(); + int i = 0, result = I2C_OK; + u32 i2c_auto_conf; + u32 stat; + + /* Check I2C bus idle */ + i = HSI2C_TIMEOUT * 20; + while ((readl(&i2c->usi_trans_status) & HSI2C_MASTER_BUSY) + && (i > 0)) { + udelay(50); + i--; + } + + stat = readl(&i2c->usi_trans_status); + + if (stat & HSI2C_MASTER_BUSY) { + debug("%s: bus busy\n", __func__); + return I2C_NOK_TOUT; + } + /* Disable TXFIFO and RXFIFO */ + writel(0, &i2c->usi_fifo_ctl); + + /* chip address */ + writel(HSI2C_SLV_ADDR_MAS(chip), &i2c->i2c_addr); + + /* Enable interrupts */ + writel((HSI2C_INT_I2C_EN | HSI2C_INT_TX_ALMOSTEMPTY_EN), + &i2c->usi_int_en); + + /* usi_ctl enable i2c func, master write configure */ + writel((HSI2C_TXCHON | HSI2C_FUNC_MODE_I2C | HSI2C_MASTER), + &i2c->usi_ctl); + + /* i2c_conf configure */ + writel(readl(&i2c->usi_conf) | HSI2C_AUTO_MODE, &i2c->usi_conf); + + /* auto_conf for write length and stop configure */ + i2c_auto_conf = ((len + alen) | HSI2C_STOP_AFTER_TRANS); + i2c_auto_conf &= ~HSI2C_READ_WRITE; + writel(i2c_auto_conf, &i2c->usi_auto_conf); + + /* Master run, start xfer */ + writel(readl(&i2c->usi_auto_conf) | HSI2C_MASTER_RUN, + &i2c->usi_auto_conf); + + result = hsi2c_wait_for_irq(i2c); + if ((result == I2C_OK) && hsi2c_isack(i2c)) { + result = I2C_NACK; + goto err; + } + + for (i = 0; i < alen && (result == I2C_OK); i++) { + writel(addr[i], &i2c->usi_txdata); + result = hsi2c_wait_for_irq(i2c); + } + + for (i = 0; i < len && (result == I2C_OK); i++) { + writel(data[i], &i2c->usi_txdata); + result = hsi2c_wait_for_irq(i2c); + } + + err: + hsi2c_clear_irqpd(i2c); + return hsi2c_send_stop(i2c, result); +} + +static int hsi2c_read(unsigned char chip, + unsigned char addr[], + unsigned char alen, + unsigned char data[], + unsigned short len, + int check) +{ + struct exynos5_hsi2c *i2c = get_base_hsi2c(); + int i, result; + u32 i2c_auto_conf; + + if (!check) { + result = hsi2c_write(chip, addr, alen, data, 0); + if (result != I2C_OK) { + debug("write failed Result = %d\n", result); + return result; + } + } + + /* start read */ + /* Disable TXFIFO and RXFIFO */ + writel(0, &i2c->usi_fifo_ctl); + + /* chip address */ + writel(HSI2C_SLV_ADDR_MAS(chip), &i2c->i2c_addr); + + /* Enable interrupts */ + writel(HSI2C_INT_I2C_EN, &i2c->usi_int_en); + + /* i2c_conf configure */ + writel(readl(&i2c->usi_conf) | HSI2C_AUTO_MODE, &i2c->usi_conf); + + /* auto_conf, length and stop configure */ + i2c_auto_conf = (len | HSI2C_STOP_AFTER_TRANS | HSI2C_READ_WRITE); + writel(i2c_auto_conf, &i2c->usi_auto_conf); + + /* usi_ctl enable i2c func, master WRITE configure */ + writel((HSI2C_RXCHON | HSI2C_FUNC_MODE_I2C | HSI2C_MASTER), + &i2c->usi_ctl); + + /* Master run, start xfer */ + writel(readl(&i2c->usi_auto_conf) | HSI2C_MASTER_RUN, + &i2c->usi_auto_conf); + + result = hsi2c_wait_for_irq(i2c); + if ((result == I2C_OK) && hsi2c_isack(i2c)) { + result = I2C_NACK; + goto err; + } + + for (i = 0; i < len && (result == I2C_OK); i++) { + result = hsi2c_wait_for_irq(i2c); + data[i] = readl(&i2c->usi_rxdata); + } + err: + /* Stop and quit */ + hsi2c_clear_irqpd(i2c); + return hsi2c_send_stop(i2c, result); +} + +/* * cmd_type is 0 for write, 1 for read. * * addr_len can take any value from 0-255, it is only limited * by the char, we could make it larger if needed. If it is * 0 we skip the address write cycle. */ -static int i2c_transfer(struct s3c24x0_i2c *i2c, - unsigned char cmd_type, +static int i2c_transfer(unsigned char cmd_type, unsigned char chip, unsigned char addr[], unsigned char addr_len, unsigned char data[], unsigned short data_len) { + struct s3c24x0_i2c *i2c = get_base_i2c(); int i, result; if (data == 0 || data_len == 0) { - /*Don't support data transfer of no length or to address 0 */ debug("i2c_transfer: bad call\n"); return I2C_NOK; } @@ -428,10 +754,8 @@ static int i2c_transfer(struct s3c24x0_i2c *i2c, int i2c_probe(uchar chip) { - struct s3c24x0_i2c *i2c; uchar buf[1]; - i2c = get_base_i2c(); buf[0] = 0; /* @@ -439,12 +763,15 @@ int i2c_probe(uchar chip) * address was <ACK>ed (i.e. there was a chip at that address which * drove the data line low). */ - return i2c_transfer(i2c, I2C_READ, chip << 1, 0, 0, buf, 1) != I2C_OK; + if (proid_is_exynos5420() && (g_current_bus > 3)) + return (hsi2c_read(chip, 0, 1, buf, 1, 1) != I2C_OK); + else + return i2c_transfer( + I2C_READ, chip << 1, 0, 0, buf, 1) != I2C_OK; } int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len) { - struct s3c24x0_i2c *i2c; uchar xaddr[4]; int ret; @@ -476,9 +803,13 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len) chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW); #endif - i2c = get_base_i2c(); - ret = i2c_transfer(i2c, I2C_READ, chip << 1, &xaddr[4 - alen], alen, - buffer, len); + if (proid_is_exynos5420() && (g_current_bus > 3)) + ret = hsi2c_read(chip, &xaddr[4 - alen], + alen, buffer, len, 0); + else + ret = i2c_transfer(I2C_READ, chip << 1, + &xaddr[4 - alen], alen, buffer, len); + if (ret != 0) { debug("I2c read: failed %d\n", ret); return 1; @@ -488,7 +819,6 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len) int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len) { - struct s3c24x0_i2c *i2c; uchar xaddr[4]; if (alen > 4) { @@ -518,31 +848,36 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len) chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW); #endif - i2c = get_base_i2c(); - return (i2c_transfer - (i2c, I2C_WRITE, chip << 1, &xaddr[4 - alen], alen, buffer, - len) != 0); + if (proid_is_exynos5420() && (g_current_bus > 3)) + return (hsi2c_write(chip, &xaddr[4 - alen], + alen, buffer, len) != 0); + else + return (i2c_transfer(I2C_WRITE, chip << 1, + &xaddr[4 - alen], alen, buffer, len) != 0); } #ifdef CONFIG_OF_CONTROL void board_i2c_init(const void *blob) { + struct s3c24x0_i2c_bus *bus; int node_list[CONFIG_MAX_I2C_NUM]; int count, i; count = fdtdec_find_aliases_for_id(blob, "i2c", COMPAT_SAMSUNG_S3C2440_I2C, node_list, CONFIG_MAX_I2C_NUM); - for (i = 0; i < count; i++) { - struct s3c24x0_i2c_bus *bus; int node = node_list[i]; if (node <= 0) continue; bus = &i2c_bus[i]; + bus->regs = (struct s3c24x0_i2c *) - fdtdec_get_addr(blob, node, "reg"); + fdtdec_get_addr(blob, node, "reg"); + bus->hsregs = (struct exynos5_hsi2c *) + fdtdec_get_addr(blob, node, "reg"); + bus->id = pinmux_decode_periph_id(blob, node); bus->node = node; bus->bus_num = i2c_busses++; @@ -589,7 +924,11 @@ int i2c_reset_port_fdt(const void *blob, int node) return -1; } - i2c_ch_init(i2c->regs, CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); + if (proid_is_exynos5420() && (bus > 3)) + hsi2c_ch_init(i2c->hsregs, CONFIG_SYS_I2C_SPEED); + else + i2c_ch_init(i2c->regs, CONFIG_SYS_I2C_SPEED, + CONFIG_SYS_I2C_SLAVE); return 0; } diff --git a/drivers/i2c/s3c24x0_i2c.h b/drivers/i2c/s3c24x0_i2c.h index a56d749..81ed19c 100644 --- a/drivers/i2c/s3c24x0_i2c.h +++ b/drivers/i2c/s3c24x0_i2c.h @@ -31,10 +31,43 @@ struct s3c24x0_i2c { u32 iiclc; }; +struct exynos5_hsi2c { + u32 usi_ctl; + u32 usi_fifo_ctl; + u32 usi_trailing_ctl; + u32 usi_clk_ctl; + u32 usi_clk_slot; + u32 spi_ctl; + u32 uart_ctl; + u32 res1; + u32 usi_int_en; + u32 usi_int_stat; + u32 usi_modem_stat; + u32 usi_error_stat; + u32 usi_fifo_stat; + u32 usi_txdata; + u32 usi_rxdata; + u32 res2; + u32 usi_conf; + u32 usi_auto_conf; + u32 usi_timeout; + u32 usi_manual_cmd; + u32 usi_trans_status; + u32 usi_timing_hs1; + u32 usi_timing_hs2; + u32 usi_timing_hs3; + u32 usi_timing_fs1; + u32 usi_timing_fs2; + u32 usi_timing_fs3; + u32 usi_timing_sla; + u32 i2c_addr; +}; + struct s3c24x0_i2c_bus { int node; /* device tree node */ int bus_num; /* i2c bus number */ struct s3c24x0_i2c *regs; + struct exynos5_hsi2c *hsregs; int id; }; #endif /* _S3C24X0_I2C_H */ -- 1.7.9.5

9 56

[U-Boot] FW: [PATCH 1/2] drivers/net/designware, do an explicit memory access instead of implicit, re-written assignments to use readl() and writel(), all of this as preperation for making the driver able to work in a cached environment (I$D$ support).
by Frank Dols 22 Nov '13

22 Nov '13

[[ ... to get attention again ... see below ...]] On 2/8/2013 6:22 PM, Frank Dols wrote: > Good afternoon Vipin and Albert, > I where wondering, is there any review/update news on the patches I submitted a short while ago? > Regards, Frank. > Sorry, first excluded " u-boot(a)lists.denx.de" from this email to prevent from noice on mailing list. > There is no reason to remove the list. This is not noise I believe. Infact by including the list, you are intimating other developers that such work would be available soon Albert, do you think any different. > Sorry, I have to clarify here a bit more. > The descriptors are 16 bytes in length and a cache line is in most architectures more than 16 bytes in length (in our case either 32 or 64). > This means that cached accesses is not an option for these descriptors. Background, two adjacent descriptors as be on one cache line may be owned by different entities (host cpu / network ip). Yes, this is a problem and I can't think of a clean solution. Specially because u-boot (as of today) does not support non-cached memory Albert? > Explicit cache calls that we are added in patch 2/2 are meant for payload of the package. And these are made cache line aligned with patch 1/2. Yes, that is what I thought > Unfortunately we can't align the descriptors on cache line boundaries due to hardware limitations (for architectures with cache line longer than 16 bytes) ! Yes, I know that. The descriptors are 16 bytes and they need to be contiguous in memory PS: I have not added the list but I strongly feel that this mail should also go to the uboot list -Vipin > With kind regards, greetings, Frank. > >

2 1

[U-Boot] [PATCH v5 00/11] S3C24XX: Add support to MINI2416 board
by José Miguel Gonçalves 14 Nov '13

14 Nov '13

Support for the MINI2416 board based on a Samsung's S3C2416 SoC with 64MB DDR2 SDRAM, 256MB NAND Flash, a LAN9220 Ethernet Controller and a WM8731 Audio CODEC. Changes for v2: - Coding style cleanup - Removed new serial and rtc drivers - Use of in-tree serial and rtc drivers Changes for v3: - Rebased on new SPL framework: http://github.com/trini/u-boot WIP/spl-improvements - Removed patch "ARM: fix relocation on ARM926EJS" - Add patch to configure printf() inclusion on SPL - Changed new binary target name from u-boot-ubl.bin to u-boot-pad.bin - Removed magic numbers - Checkpatch clean except: - False positive: ERROR: spaces required around that ':' (ctx:VxV) #692: FILE: include/configs/mini2416.h:165: +#define CONFIG_ETHADDR FE:11:22:33:44:55 - Following preexistent coding style: WARNING: please, no spaces at the start of a line #1716: FILE: include/common.h:631: + defined(CONFIG_S3C24XX) || \$ Changes for v4: - NAND Flash driver cleanup and optimization Changes for v5: - Changed image filename for SPL + u-boot - Minor change in the NAND Flash driver - Coding style cleanup - Removal of #define CONFIG_SYS_BAUDRATE_TABLE as this in the defaults now - Checkpatch clean with the exceptions indicated in the v3 changes José Miguel Gonçalves (11): Add configuration option to select printf() inclusion on SPL S3C24XX: Add core support for Samsung's S3C24XX SoCs serial: Add support to 4 ports in serial_s3c24x0 serial: Use a more precise baud rate generation for serial_s3c24x0 serial: Remove unnecessary delay in serial_s3c24x0 rtc: Improve rtc_get() on s3c24x0_rtc rtc: Fix rtc_reset() on s3c24x0_rtc rtc: Don't allow setting unsuported years on s3c24x0_rtc S3C24XX: Add NAND Flash driver Add u-boot-with-spl.bin target to the Makefile S3C24XX: Add support to MINI2416 board MAINTAINERS | 4 + Makefile | 11 +- README | 3 + arch/arm/cpu/arm926ejs/s3c24xx/Makefile | 56 +++ arch/arm/cpu/arm926ejs/s3c24xx/cpu.c | 57 +++ arch/arm/cpu/arm926ejs/s3c24xx/cpu_info.c | 57 +++ arch/arm/cpu/arm926ejs/s3c24xx/s3c2412_speed.c | 114 +++++ arch/arm/cpu/arm926ejs/s3c24xx/s3c2416_speed.c | 116 +++++ arch/arm/cpu/arm926ejs/s3c24xx/timer.c | 152 ++++++ arch/arm/include/asm/arch-s3c24xx/s3c2412.h | 130 +++++ arch/arm/include/asm/arch-s3c24xx/s3c2416.h | 183 +++++++ arch/arm/include/asm/arch-s3c24xx/s3c24x0_cpu.h | 41 ++ arch/arm/include/asm/arch-s3c24xx/s3c24xx.h | 615 +++++++++++++++++++++++ arch/arm/include/asm/arch-s3c24xx/s3c24xx_cpu.h | 30 ++ arch/arm/include/asm/arch-s3c24xx/spl.h | 29 ++ board/boardcon/mini2416/Makefile | 47 ++ board/boardcon/mini2416/config.mk | 4 + board/boardcon/mini2416/mini2416.c | 104 ++++ board/boardcon/mini2416/mini2416_spl.c | 202 ++++++++ board/boardcon/mini2416/u-boot-spl.lds | 63 +++ boards.cfg | 1 + drivers/mtd/nand/Makefile | 1 + drivers/mtd/nand/s3c24xx_nand.c | 255 ++++++++++ drivers/rtc/s3c24x0_rtc.c | 30 +- drivers/serial/serial_s3c24x0.c | 52 +- include/common.h | 12 + include/configs/VCMA9.h | 2 +- include/configs/mini2416.h | 202 ++++++++ include/configs/smdk2410.h | 2 +- spl/Makefile | 4 +- 30 files changed, 2550 insertions(+), 29 deletions(-) create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/Makefile create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/cpu.c create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/cpu_info.c create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/s3c2412_speed.c create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/s3c2416_speed.c create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/timer.c create mode 100644 arch/arm/include/asm/arch-s3c24xx/s3c2412.h create mode 100644 arch/arm/include/asm/arch-s3c24xx/s3c2416.h create mode 100644 arch/arm/include/asm/arch-s3c24xx/s3c24x0_cpu.h create mode 100644 arch/arm/include/asm/arch-s3c24xx/s3c24xx.h create mode 100644 arch/arm/include/asm/arch-s3c24xx/s3c24xx_cpu.h create mode 100644 arch/arm/include/asm/arch-s3c24xx/spl.h create mode 100644 board/boardcon/mini2416/Makefile create mode 100644 board/boardcon/mini2416/config.mk create mode 100644 board/boardcon/mini2416/mini2416.c create mode 100644 board/boardcon/mini2416/mini2416_spl.c create mode 100644 board/boardcon/mini2416/u-boot-spl.lds create mode 100644 drivers/mtd/nand/s3c24xx_nand.c create mode 100644 include/configs/mini2416.h -- 1.7.9.5

3 16

[U-Boot] [PATCH 1/1] [RFC] DM: early_malloc for DM added.
by Tomas Hlavacek 05 Nov '13

05 Nov '13

Modular early_malloc for DM with support for more heaps and lightweight first heap on stack. (RFC. Not intended for merging!) Signed-off-by: Tomas Hlavacek <tmshlvck(a)gmail.com> --- arch/arm/include/asm/global_data.h | 1 + arch/arm/lib/board.c | 5 ++ arch/avr32/include/asm/global_data.h | 1 + arch/avr32/lib/board.c | 4 ++ arch/blackfin/include/asm/global_data.h | 1 + arch/blackfin/lib/board.c | 4 ++ arch/m68k/include/asm/global_data.h | 1 + arch/m68k/lib/board.c | 4 ++ arch/microblaze/include/asm/global_data.h | 1 + arch/microblaze/lib/board.c | 5 ++ arch/mips/include/asm/global_data.h | 1 + arch/mips/lib/board.c | 4 ++ arch/nds32/include/asm/global_data.h | 1 + arch/nds32/lib/board.c | 4 ++ arch/nios2/include/asm/global_data.h | 1 + arch/nios2/lib/board.c | 4 ++ arch/openrisc/include/asm/global_data.h | 1 + arch/openrisc/lib/board.c | 4 ++ arch/powerpc/include/asm/global_data.h | 1 + arch/powerpc/lib/board.c | 4 ++ arch/sandbox/include/asm/global_data.h | 1 + arch/sandbox/lib/board.c | 4 ++ arch/sh/include/asm/global_data.h | 1 + arch/sparc/include/asm/global_data.h | 1 + arch/sparc/lib/board.c | 4 ++ arch/x86/include/asm/global_data.h | 1 + arch/x86/lib/board.c | 4 ++ common/Makefile | 1 + common/earlymalloc.c | 91 +++++++++++++++++++++++++++++ include/earlymalloc.h | 48 +++++++++++++++ 30 files changed, 208 insertions(+) create mode 100644 common/earlymalloc.c create mode 100644 include/earlymalloc.h diff --git a/arch/arm/include/asm/global_data.h b/arch/arm/include/asm/global_data.h index c3ff789..71ae6dc 100644 --- a/arch/arm/include/asm/global_data.h +++ b/arch/arm/include/asm/global_data.h @@ -84,6 +84,7 @@ typedef struct global_data { unsigned long post_log_res; /* success of POST test */ unsigned long post_init_f_time; /* When post_init_f started */ #endif + void *early_heap_first; /* early heap for early_malloc */ } gd_t; /* diff --git a/arch/arm/lib/board.c b/arch/arm/lib/board.c index 500e216..ad124c6 100644 --- a/arch/arm/lib/board.c +++ b/arch/arm/lib/board.c @@ -52,6 +52,7 @@ #include <fdtdec.h> #include <post.h> #include <logbuff.h> +#include <earlymalloc.h> #ifdef CONFIG_BITBANGMII #include <miiphy.h> @@ -273,6 +274,10 @@ void board_init_f(ulong bootflag) memset((void *)gd, 0, sizeof(gd_t)); + /* Initialize early_malloc */ + DECLARE_EARLY_HEAP_ON_STACK; + early_heap_init(gd->early_heap_first, CONFIG_SYS_EARLY_HEAP_SIZE); + gd->mon_len = _bss_end_ofs; #ifdef CONFIG_OF_EMBED /* Get a pointer to the FDT */ diff --git a/arch/avr32/include/asm/global_data.h b/arch/avr32/include/asm/global_data.h index 5c654bd..5edb1f0 100644 --- a/arch/avr32/include/asm/global_data.h +++ b/arch/avr32/include/asm/global_data.h @@ -50,6 +50,7 @@ typedef struct global_data { #endif void **jt; /* jump table */ char env_buf[32]; /* buffer for getenv() before reloc. */ + void *early_heap_first; /* early heap for early_malloc */ } gd_t; /* diff --git a/arch/avr32/lib/board.c b/arch/avr32/lib/board.c index 63fe297..8cb56df 100644 --- a/arch/avr32/lib/board.c +++ b/arch/avr32/lib/board.c @@ -149,6 +149,10 @@ void board_init_f(ulong board_type) memset(&gd_data, 0, sizeof(gd_data)); gd = &gd_data; + /* Initialize early_malloc */ + DECLARE_EARLY_HEAP_ON_STACK; + early_heap_init(gd->early_heap_first, CONFIG_SYS_EARLY_HEAP_SIZE); + /* Perform initialization sequence */ board_early_init_f(); cpu_init(); diff --git a/arch/blackfin/include/asm/global_data.h b/arch/blackfin/include/asm/global_data.h index 67aa30f..33d3cec 100644 --- a/arch/blackfin/include/asm/global_data.h +++ b/arch/blackfin/include/asm/global_data.h @@ -59,6 +59,7 @@ typedef struct global_data { void **jt; /* jump table */ char env_buf[32]; /* buffer for getenv() before reloc. */ + void *early_heap_first; /* early heap for early_malloc */ } gd_t; /* diff --git a/arch/blackfin/lib/board.c b/arch/blackfin/lib/board.c index e3ee4cd..f8dade6 100644 --- a/arch/blackfin/lib/board.c +++ b/arch/blackfin/lib/board.c @@ -250,6 +250,10 @@ void board_init_f(ulong bootflag) bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE; + /* Initialize early_malloc */ + DECLARE_EARLY_HEAP_ON_STACK; + early_heap_init(gd->early_heap_first, CONFIG_SYS_EARLY_HEAP_SIZE); + /* Initialize */ serial_early_puts("IRQ init\n"); irq_init(); diff --git a/arch/m68k/include/asm/global_data.h b/arch/m68k/include/asm/global_data.h index 0ba2b43..ddd76f9 100644 --- a/arch/m68k/include/asm/global_data.h +++ b/arch/m68k/include/asm/global_data.h @@ -68,6 +68,7 @@ typedef struct global_data { #endif void **jt; /* Standalone app jump table */ char env_buf[32]; /* buffer for getenv() before reloc. */ + void *early_heap_first; /* early heap for early_malloc */ } gd_t; /* diff --git a/arch/m68k/lib/board.c b/arch/m68k/lib/board.c index 1526967..a420d21 100644 --- a/arch/m68k/lib/board.c +++ b/arch/m68k/lib/board.c @@ -227,6 +227,10 @@ board_init_f (ulong bootflag) /* Clear initial global data */ memset ((void *) gd, 0, sizeof (gd_t)); + /* Initialize early_malloc */ + DECLARE_EARLY_HEAP_ON_STACK; + early_heap_init(gd->early_heap_first, CONFIG_SYS_EARLY_HEAP_SIZE); + for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) { if ((*init_fnc_ptr)() != 0) { hang (); diff --git a/arch/microblaze/include/asm/global_data.h b/arch/microblaze/include/asm/global_data.h index 6e8537c..4e340e6 100644 --- a/arch/microblaze/include/asm/global_data.h +++ b/arch/microblaze/include/asm/global_data.h @@ -47,6 +47,7 @@ typedef struct global_data { unsigned long fb_base; /* base address of frame buffer */ void **jt; /* jump table */ char env_buf[32]; /* buffer for getenv() before reloc. */ + void *early_heap_first; /* early heap for early_malloc */ } gd_t; /* diff --git a/arch/microblaze/lib/board.c b/arch/microblaze/lib/board.c index 9828b76..302a323 100644 --- a/arch/microblaze/lib/board.c +++ b/arch/microblaze/lib/board.c @@ -101,6 +101,11 @@ void board_init (void) asm ("nop"); /* FIXME gd is not initialize - wait */ memset ((void *)gd, 0, GENERATED_GBL_DATA_SIZE); memset ((void *)bd, 0, GENERATED_BD_INFO_SIZE); + + /* Initialize early_malloc */ + DECLARE_EARLY_HEAP_ON_STACK; + early_heap_init(gd->early_heap_first, CONFIG_SYS_EARLY_HEAP_SIZE); + gd->bd = bd; gd->baudrate = CONFIG_BAUDRATE; bd->bi_baudrate = CONFIG_BAUDRATE; diff --git a/arch/mips/include/asm/global_data.h b/arch/mips/include/asm/global_data.h index f6cf9fe..9656fd6 100644 --- a/arch/mips/include/asm/global_data.h +++ b/arch/mips/include/asm/global_data.h @@ -61,6 +61,7 @@ typedef struct global_data { unsigned long env_valid; /* Checksum of Environment valid? */ void **jt; /* jump table */ char env_buf[32]; /* buffer for getenv() before reloc. */ + void *early_heap_first; /* early heap for early_malloc */ } gd_t; /* diff --git a/arch/mips/lib/board.c b/arch/mips/lib/board.c index d998f0e..f40258c 100644 --- a/arch/mips/lib/board.c +++ b/arch/mips/lib/board.c @@ -160,6 +160,10 @@ void board_init_f(ulong bootflag) memset((void *)gd, 0, sizeof(gd_t)); + /* Initialize early_malloc */ + DECLARE_EARLY_HEAP_ON_STACK; + early_heap_init(gd->early_heap_first, CONFIG_SYS_EARLY_HEAP_SIZE); + for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) { if ((*init_fnc_ptr)() != 0) hang(); diff --git a/arch/nds32/include/asm/global_data.h b/arch/nds32/include/asm/global_data.h index de20a0a..313fecb 100644 --- a/arch/nds32/include/asm/global_data.h +++ b/arch/nds32/include/asm/global_data.h @@ -65,6 +65,7 @@ typedef struct global_data { void **jt; /* jump table */ char env_buf[32]; /* buffer for getenv() before reloc. */ + void *early_heap_first; /* early heap for early_malloc */ } gd_t; /* diff --git a/arch/nds32/lib/board.c b/arch/nds32/lib/board.c index 074aabf..34fff30 100644 --- a/arch/nds32/lib/board.c +++ b/arch/nds32/lib/board.c @@ -190,6 +190,10 @@ void board_init_f(ulong bootflag) memset((void *)gd, 0, GENERATED_GBL_DATA_SIZE); + /* Initialize early_malloc */ + DECLARE_EARLY_HEAP_ON_STACK; + early_heap_init(gd->early_heap_first, CONFIG_SYS_EARLY_HEAP_SIZE); + gd->mon_len = (unsigned int)(&__bss_end__) - (unsigned int)(&_start); for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) { diff --git a/arch/nios2/include/asm/global_data.h b/arch/nios2/include/asm/global_data.h index 4b86fbd..02f93d3 100644 --- a/arch/nios2/include/asm/global_data.h +++ b/arch/nios2/include/asm/global_data.h @@ -42,6 +42,7 @@ typedef struct global_data { #endif void **jt; /* Standalone app jump table */ char env_buf[32]; /* buffer for getenv() before reloc. */ + void *early_heap_first; /* early heap for early_malloc */ } gd_t; /* flags */ diff --git a/arch/nios2/lib/board.c b/arch/nios2/lib/board.c index 65de26e..87e0559 100644 --- a/arch/nios2/lib/board.c +++ b/arch/nios2/lib/board.c @@ -97,6 +97,10 @@ void board_init (void) memset( gd, 0, GENERATED_GBL_DATA_SIZE ); + /* Initialize early_malloc */ + DECLARE_EARLY_HEAP_ON_STACK; + early_heap_init(gd->early_heap_first, CONFIG_SYS_EARLY_HEAP_SIZE); + gd->bd = (bd_t *)(gd+1); /* At end of global data */ gd->baudrate = CONFIG_BAUDRATE; gd->cpu_clk = CONFIG_SYS_CLK_FREQ; diff --git a/arch/openrisc/include/asm/global_data.h b/arch/openrisc/include/asm/global_data.h index 36de9d0..032b6b2 100644 --- a/arch/openrisc/include/asm/global_data.h +++ b/arch/openrisc/include/asm/global_data.h @@ -46,6 +46,7 @@ typedef struct global_data { unsigned long fb_base; /* base address of frame buffer */ void **jt; /* jump table */ char env_buf[32]; /* buffer for getenv() before reloc. */ + void *early_heap_first; /* early heap for early_malloc */ } gd_t; /* diff --git a/arch/openrisc/lib/board.c b/arch/openrisc/lib/board.c index 85aa189..2a92899 100644 --- a/arch/openrisc/lib/board.c +++ b/arch/openrisc/lib/board.c @@ -86,6 +86,10 @@ void board_init(void) memset((void *)gd, 0, GENERATED_GBL_DATA_SIZE); + /* Initialize early_malloc */ + DECLARE_EARLY_HEAP_ON_STACK; + early_heap_init(gd->early_heap_first, CONFIG_SYS_EARLY_HEAP_SIZE); + gd->bd = (bd_t *)(gd+1); /* At end of global data */ gd->baudrate = CONFIG_BAUDRATE; gd->cpu_clk = CONFIG_SYS_CLK_FREQ; diff --git a/arch/powerpc/include/asm/global_data.h b/arch/powerpc/include/asm/global_data.h index 01f1d4a..0839d03 100644 --- a/arch/powerpc/include/asm/global_data.h +++ b/arch/powerpc/include/asm/global_data.h @@ -184,6 +184,7 @@ typedef struct global_data { #endif void **jt; /* jump table */ char env_buf[32]; /* buffer for getenv() before reloc. */ + void *early_heap_first; /* early heap for early_malloc */ } gd_t; /* diff --git a/arch/powerpc/lib/board.c b/arch/powerpc/lib/board.c index 3f9af1d..ac88ae2 100644 --- a/arch/powerpc/lib/board.c +++ b/arch/powerpc/lib/board.c @@ -389,6 +389,10 @@ void board_init_f(ulong bootflag) memset((void *) gd, 0, sizeof(gd_t)); #endif + /* Initialize early_malloc */ + DECLARE_EARLY_HEAP_ON_STACK; + early_heap_init(gd->early_heap_first, CONFIG_SYS_EARLY_HEAP_SIZE); + for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) if ((*init_fnc_ptr) () != 0) hang(); diff --git a/arch/sandbox/include/asm/global_data.h b/arch/sandbox/include/asm/global_data.h index 8d47191..54342c0 100644 --- a/arch/sandbox/include/asm/global_data.h +++ b/arch/sandbox/include/asm/global_data.h @@ -47,6 +47,7 @@ typedef struct global_data { phys_size_t ram_size; /* RAM size */ void **jt; /* jump table */ char env_buf[32]; /* buffer for getenv() before reloc. */ + void *early_heap_first; /* early heap for early_malloc */ } gd_t; /* diff --git a/arch/sandbox/lib/board.c b/arch/sandbox/lib/board.c index b7997e9..3d06cfc 100644 --- a/arch/sandbox/lib/board.c +++ b/arch/sandbox/lib/board.c @@ -156,6 +156,10 @@ void board_init_f(ulong bootflag) memset((void *)gd, 0, sizeof(gd_t)); + /* Initialize early_malloc */ + DECLARE_EARLY_HEAP_ON_STACK; + early_heap_init(gd->early_heap_first, CONFIG_SYS_EARLY_HEAP_SIZE); + for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) { if ((*init_fnc_ptr)() != 0) hang(); diff --git a/arch/sh/include/asm/global_data.h b/arch/sh/include/asm/global_data.h index 1b782fc..180f56e 100644 --- a/arch/sh/include/asm/global_data.h +++ b/arch/sh/include/asm/global_data.h @@ -42,6 +42,7 @@ typedef struct global_data unsigned long env_valid; /* Checksum of Environment valid */ void **jt; /* Standalone app jump table */ char env_buf[32]; /* buffer for getenv() before reloc. */ + void *early_heap_first; /* early heap for early_malloc */ } gd_t; #define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */ diff --git a/arch/sparc/include/asm/global_data.h b/arch/sparc/include/asm/global_data.h index 613e2d8..82ed56f 100644 --- a/arch/sparc/include/asm/global_data.h +++ b/arch/sparc/include/asm/global_data.h @@ -76,6 +76,7 @@ typedef struct global_data { #endif void **jt; /* jump table */ char env_buf[32]; /* buffer for getenv() before reloc. */ + void *early_heap_first; /* early heap for early_malloc */ } gd_t; /* diff --git a/arch/sparc/lib/board.c b/arch/sparc/lib/board.c index 519a4fb..86ee8db 100644 --- a/arch/sparc/lib/board.c +++ b/arch/sparc/lib/board.c @@ -179,6 +179,10 @@ void board_init_f(ulong bootflag) /* Clear initial global data */ memset((void *)gd, 0, sizeof(gd_t)); + /* Initialize early_malloc */ + DECLARE_EARLY_HEAP_ON_STACK; + early_heap_init(gd->early_heap_first, CONFIG_SYS_EARLY_HEAP_SIZE); + gd->bd = (bd_t *) (gd + 1); /* At end of global data */ gd->baudrate = CONFIG_BAUDRATE; gd->cpu_clk = CONFIG_SYS_CLK_FREQ; diff --git a/arch/x86/include/asm/global_data.h b/arch/x86/include/asm/global_data.h index 908a02c..171f85b 100644 --- a/arch/x86/include/asm/global_data.h +++ b/arch/x86/include/asm/global_data.h @@ -59,6 +59,7 @@ typedef struct global_data { unsigned long reset_status; /* reset status register at boot */ void **jt; /* jump table */ char env_buf[32]; /* buffer for getenv() before reloc. */ + void *early_heap_first; /* early heap for early_malloc */ } gd_t; static inline gd_t *get_fs_gd_ptr(void) diff --git a/arch/x86/lib/board.c b/arch/x86/lib/board.c index 5f0b62c..5ff4f42 100644 --- a/arch/x86/lib/board.c +++ b/arch/x86/lib/board.c @@ -220,6 +220,10 @@ void board_init_f(ulong boot_flags) { gd->flags = boot_flags; + /* Initialize early_malloc */ + DECLARE_EARLY_HEAP_ON_STACK; + early_heap_init(gd->early_heap_first, CONFIG_SYS_EARLY_HEAP_SIZE); + do_init_loop(init_sequence_f); /* diff --git a/common/Makefile b/common/Makefile index 2a31c62..744beb8 100644 --- a/common/Makefile +++ b/common/Makefile @@ -188,6 +188,7 @@ COBJS-y += console.o COBJS-y += dlmalloc.o COBJS-y += memsize.o COBJS-y += stdio.o +COBJS-y += earlymalloc.o COBJS := $(sort $(COBJS-y)) diff --git a/common/earlymalloc.c b/common/earlymalloc.c new file mode 100644 index 0000000..6ba4df6 --- /dev/null +++ b/common/earlymalloc.c @@ -0,0 +1,91 @@ +/* + * (C) Copyright 2012 + * Tomas Hlavacek (tmshlvck(a)gmail.com) + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> /* for ROUND_UP */ +#include <asm/u-boot.h> +#include <asm/global_data.h> /* for gd_t and gd */ +#include <asm/types.h> /* for phys_addr_t and size_addt_t */ + +#include <earlymalloc.h> + +DECLARE_GLOBAL_DATA_PTR; + + +void early_heap_init(void *heap, size_t size) +{ + struct early_heap_header *h = heap; + + h->free_space_pointer = (void *)(roundup((phys_addr_t)heap + + sizeof(struct early_heap_header), + sizeof(phys_addr_t))); + h->free_bytes = size - roundup(sizeof(struct early_heap_header), + sizeof(phys_addr_t)); + h->next_early_heap = NULL; +} + +void *early_malloc(size_t size) +{ + phys_addr_t addr; + struct early_heap_header *h; + + /* Align size. */ + size = roundup(size, sizeof(phys_addr_t)); + + /* Choose early_heap with enough space. */ + h = gd->early_heap_first; + while ((h->free_bytes < size)&&(h->next_early_heap != NULL)) + h = h->next_early_heap; + + if(h->free_bytes < size) { + debug("Early heap overflow. Heap %08lX, free %d, required %d.", + h, h->free_bytes, size); + return NULL; + } + + /* Choose block beginning address and mark next free space. */ + addr = h->free_space_pointer; + + h->free_space_pointer += size; + h->free_bytes -= size; + + return (void *)addr; +} + + +int early_malloc_isaddress(void *addr) +{ + if ((phys_addr_t)addr < (phys_addr_t)gd->early_heap_first) + return 0; + + if ((phys_addr_t)addr >= (phys_addr_t)gd->early_heap_first + + CONFIG_SYS_EARLY_HEAP_SIZE) + return 0; + + return 1; +} + +int early_malloc_finished(void) +{ + return gd->flags & GD_FLG_RELOC; +} + diff --git a/include/earlymalloc.h b/include/earlymalloc.h new file mode 100644 index 0000000..345bdef --- /dev/null +++ b/include/earlymalloc.h @@ -0,0 +1,48 @@ +/* + * (C) Copyright 2012 + * Tomas Hlavacek (tmshlvck(a)gmail.com) + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __INCLUDE_EARLYMALLOC_H +#define __INCLUDE_EARLYMALLOC_H + +#include <linux/stddef.h> /* for size_t */ + +struct early_heap_header { + void *free_space_pointer; + size_t free_bytes; + void *next_early_heap; +}; + +void early_heap_init(void *heap, size_t size); +void *early_malloc(size_t size); +int early_malloc_isaddress(void *addr); +int early_malloc_finished(void); + +#ifndef CONFIG_SYS_EARLY_HEAP_SIZE +#define CONFIG_SYS_EARLY_HEAP_SIZE 256 +#endif /* CONFIG_SYS_EARLY_HEAP_SIZE */ + +#define DECLARE_EARLY_HEAP_ON_STACK char __early_heap[CONFIG_SYS_EARLY_HEAP_SIZE]; \ + gd->early_heap_first = (void *)__early_heap + +#endif /* __INCLUDE_EARLYMALLOC_H */ + -- 1.7.10.4

7 47

[U-Boot] [PATCH 1/2] MMC: add sdhci generic framework
by Lei Wen 15 Oct '13

15 Oct '13

Nowdays, there are plenty of mmc driver in uboot adopt the sd standard host design, aka as sdhci. It is better to centralize the common logic together to better maintenance. Signed-off-by: Lei Wen <leiwen(a)marvell.com> --- drivers/mmc/Makefile | 1 + drivers/mmc/sdhci.c | 433 ++++++++++++++++++++++++++++++++++++++++++++++++++ include/sdhci.h | 325 +++++++++++++++++++++++++++++++++++++ 3 files changed, 759 insertions(+), 0 deletions(-) create mode 100644 drivers/mmc/sdhci.c create mode 100644 include/sdhci.h diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile index a8fe17a..50b5117 100644 --- a/drivers/mmc/Makefile +++ b/drivers/mmc/Makefile @@ -38,6 +38,7 @@ COBJS-$(CONFIG_OMAP3_MMC) += omap3_mmc.o COBJS-$(CONFIG_OMAP_HSMMC) += omap_hsmmc.o COBJS-$(CONFIG_PXA_MMC) += pxa_mmc.o COBJS-$(CONFIG_S5P_MMC) += s5p_mmc.o +COBJS-$(CONFIG_SDHCI) += sdhci.o COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c new file mode 100644 index 0000000..9ebd33d --- /dev/null +++ b/drivers/mmc/sdhci.c @@ -0,0 +1,433 @@ +/* + * Copyright 2011, Marvell Semiconductor Inc. + * Lei Wen <leiwen(a)marvell.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + * Back ported to the 8xx platform (from the 8260 platform) by + * Murray.Jensen(a)cmst.csiro.au, 27-Jan-01. + */ + +#include <common.h> +#include <malloc.h> +#include <mmc.h> +#include <sdhci.h> + +void *aligned_buffer; + +static void sdhci_reset(struct sdhci_host *host, u8 mask) +{ + unsigned long timeout; + + /* Wait max 100 ms */ + timeout = 100; + sdhci_writeb(host, mask, SDHCI_SOFTWARE_RESET); + while (sdhci_readb(host, SDHCI_SOFTWARE_RESET) & mask) { + if (timeout == 0) { + printf("Reset 0x%x never completed.\n", (int)mask); + return; + } + timeout--; + udelay(1000); + } +} + +static void sdhci_cmd_done(struct sdhci_host *host, struct mmc_cmd *cmd) +{ + int i; + if (cmd->resp_type & MMC_RSP_136) { + /* CRC is stripped so we need to do some shifting. */ + for (i = 0; i < 4; i++) { + cmd->response[i] = sdhci_readl(host, + SDHCI_RESPONSE + (3-i)*4) << 8; + if (i != 3) + cmd->response[i] |= sdhci_readb(host, + SDHCI_RESPONSE + (3-i)*4-1); + } + } else { + cmd->response[0] = sdhci_readl(host, SDHCI_RESPONSE); + } +} + +static void sdhci_transfer_pio(struct sdhci_host *host, struct mmc_data *data) +{ + int i; + char *offs; + for (i = 0; i < data->blocksize; i += 4) { + offs = data->dest + i; + if (data->flags == MMC_DATA_READ) + *(u32 *)offs = sdhci_readl(host, SDHCI_BUFFER); + else + sdhci_writel(host, *(u32 *)offs, SDHCI_BUFFER); + } +} + +static int sdhci_transfer_data(struct sdhci_host *host, struct mmc_data *data, + unsigned int start_addr) +{ + unsigned int stat, rdy, mask, block = 0; + + rdy = SDHCI_INT_SPACE_AVAIL | SDHCI_INT_DATA_AVAIL; + mask = SDHCI_DATA_AVAILABLE | SDHCI_SPACE_AVAILABLE; + do { + stat = sdhci_readl(host, SDHCI_INT_STATUS); + if (stat & SDHCI_INT_ERROR) { + printf("Error detected in status(0x%X)!\n", stat); + return -1; + } + if (stat & rdy) { + if (!(sdhci_readl(host, SDHCI_PRESENT_STATE) & mask)) + continue; + sdhci_writel(host, rdy, SDHCI_INT_STATUS); + sdhci_transfer_pio(host, data); + data->dest += data->blocksize; + if (++block >= data->blocks) + break; + } +#ifdef CONFIG_MMC_SDMA + if (stat & SDHCI_INT_DMA_END) { + sdhci_writel(host, SDHCI_INT_DMA_END, SDHCI_INT_STATUS); + start_addr &= SDHCI_DEFAULT_BOUNDARY_SIZE - 1; + start_addr += SDHCI_DEFAULT_BOUNDARY_SIZE; + sdhci_writel(host, start_addr, SDHCI_DMA_ADDRESS); + } +#endif + } while (!(stat & SDHCI_INT_DATA_END)); + return 0; +} + +int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd, + struct mmc_data *data) +{ + struct sdhci_host *host = (struct sdhci_host *)mmc->priv; + unsigned int stat = 0; + int ret = 0; + int trans_bytes = 0, is_aligned = 1; + u32 mask, flags, mode; + unsigned int timeout, start_addr = 0; + + /* Wait max 10 ms */ + timeout = 10; + + sdhci_writel(host, SDHCI_INT_ALL_MASK, SDHCI_INT_STATUS); + mask = SDHCI_CMD_INHIBIT | SDHCI_DATA_INHIBIT; + + /* We shouldn't wait for data inihibit for stop commands, even + though they might use busy signaling */ + if (cmd->cmdidx == MMC_CMD_STOP_TRANSMISSION) + mask &= ~SDHCI_DATA_INHIBIT; + + while (sdhci_readl(host, SDHCI_PRESENT_STATE) & mask) { + if (timeout == 0) { + printf("Controller never released inhibit bit(s).\n"); + return COMM_ERR; + } + timeout--; + udelay(1000); + } + + mask = SDHCI_INT_RESPONSE; + if (!(cmd->resp_type & MMC_RSP_PRESENT)) + flags = SDHCI_CMD_RESP_NONE; + else if (cmd->resp_type & MMC_RSP_136) + flags = SDHCI_CMD_RESP_LONG; + else if (cmd->resp_type & MMC_RSP_BUSY) { + flags = SDHCI_CMD_RESP_SHORT_BUSY; + mask |= SDHCI_INT_DATA_END; + } else + flags = SDHCI_CMD_RESP_SHORT; + + if (cmd->resp_type & MMC_RSP_CRC) + flags |= SDHCI_CMD_CRC; + if (cmd->resp_type & MMC_RSP_OPCODE) + flags |= SDHCI_CMD_INDEX; + if (data) + flags |= SDHCI_CMD_DATA; + + /*Set Transfer mode regarding to data flag*/ + if (data != 0) { + sdhci_writeb(host, 0xe, SDHCI_TIMEOUT_CONTROL); + mode = SDHCI_TRNS_BLK_CNT_EN; + trans_bytes = data->blocks * data->blocksize; + if (data->blocks > 1) + mode |= SDHCI_TRNS_MULTI; + + if (data->flags == MMC_DATA_READ) + mode |= SDHCI_TRNS_READ; + +#ifdef CONFIG_MMC_SDMA + if (data->flags == MMC_DATA_READ) + start_addr = (unsigned int)data->dest; + else + start_addr = (unsigned int)data->src; + if ((host->quirks & SDHCI_QUIRK_32BIT_DMA_ADDR) && + (start_addr & 0x7) != 0x0) { + is_aligned = 0; + start_addr = (unsigned int)aligned_buffer; + if (data->flags != MMC_DATA_READ) + memcpy(aligned_buffer, data->src, trans_bytes); + } + + sdhci_writel(host, start_addr, SDHCI_DMA_ADDRESS); + mode |= SDHCI_TRNS_DMA; +#endif + sdhci_writew(host, SDHCI_MAKE_BLKSZ(SDHCI_DEFAULT_BOUNDARY_ARG, + data->blocksize), + SDHCI_BLOCK_SIZE); + sdhci_writew(host, data->blocks, SDHCI_BLOCK_COUNT); + sdhci_writew(host, mode, SDHCI_TRANSFER_MODE); + } + + sdhci_writel(host, cmd->cmdarg, SDHCI_ARGUMENT); +#ifdef CONFIG_MMC_SDMA + flush_cache(0, ~0); +#endif + sdhci_writew(host, SDHCI_MAKE_CMD(cmd->cmdidx, flags), SDHCI_COMMAND); + do { + stat = sdhci_readl(host, SDHCI_INT_STATUS); + if (stat & SDHCI_INT_ERROR) + break; + } while ((stat & mask) != mask); + + if ((stat & (SDHCI_INT_ERROR | mask)) == mask) { + sdhci_cmd_done(host, cmd); + sdhci_writel(host, mask, SDHCI_INT_STATUS); + } else + ret = -1; + + if (!ret && data) + ret = sdhci_transfer_data(host, data, start_addr); + + stat = sdhci_readl(host, SDHCI_INT_STATUS); + sdhci_writel(host, SDHCI_INT_ALL_MASK, SDHCI_INT_STATUS); + if (!ret) { + if ((host->quirks & SDHCI_QUIRK_32BIT_DMA_ADDR) && + !is_aligned && (data->flags == MMC_DATA_READ)) + memcpy(data->dest, aligned_buffer, trans_bytes); + return 0; + } + + sdhci_reset(host, SDHCI_RESET_CMD); + sdhci_reset(host, SDHCI_RESET_DATA); + if (stat & SDHCI_INT_TIMEOUT) + return TIMEOUT; + else + return COMM_ERR; +} + +static int sdhci_set_clock(struct mmc *mmc, unsigned int clock) +{ + struct sdhci_host *host = (struct sdhci_host *)mmc->priv; + unsigned int div, clk, timeout; + + sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); + + if (clock == 0) + return 0; + + if (host->version >= SDHCI_SPEC_300) { + /* Version 3.00 divisors must be a multiple of 2. */ + if (mmc->f_max <= clock) + div = 1; + else { + for (div = 2; div < SDHCI_MAX_DIV_SPEC_300; div += 2) { + if ((mmc->f_max / div) <= clock) + break; + } + } + } else { + /* Version 2.00 divisors must be a power of 2. */ + for (div = 1; div < SDHCI_MAX_DIV_SPEC_200; div *= 2) { + if ((mmc->f_max / div) <= clock) + break; + } + } + div >>= 1; + + clk = (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT; + clk |= ((div & SDHCI_DIV_HI_MASK) >> SDHCI_DIV_MASK_LEN) + << SDHCI_DIVIDER_HI_SHIFT; + clk |= SDHCI_CLOCK_INT_EN; + sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); + + /* Wait max 20 ms */ + timeout = 20; + while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL)) + & SDHCI_CLOCK_INT_STABLE)) { + if (timeout == 0) { + printf("Internal clock never stabilised.\n"); + return -1; + } + timeout--; + udelay(1000); + } + + clk |= SDHCI_CLOCK_CARD_EN; + sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); + return 0; +} + +static void sdhci_set_power(struct sdhci_host *host, unsigned short power) +{ + u8 pwr = 0; + + if (power != (unsigned short)-1) { + switch (1 << power) { + case MMC_VDD_165_195: + pwr = SDHCI_POWER_180; + break; + case MMC_VDD_29_30: + case MMC_VDD_30_31: + pwr = SDHCI_POWER_300; + break; + case MMC_VDD_32_33: + case MMC_VDD_33_34: + pwr = SDHCI_POWER_330; + break; + } + } + + if (pwr == 0) { + sdhci_writeb(host, 0, SDHCI_POWER_CONTROL); + return; + } + + pwr |= SDHCI_POWER_ON; + + sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL); +} + +void sdhci_set_ios(struct mmc *mmc) +{ + u32 ctrl; + struct sdhci_host *host = (struct sdhci_host *)mmc->priv; + + if (mmc->clock != host->clock) + sdhci_set_clock(mmc, mmc->clock); + + /* Set bus width */ + ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); + if (mmc->bus_width == 8) { + ctrl &= ~SDHCI_CTRL_4BITBUS; + if (host->version >= SDHCI_SPEC_300) + ctrl |= SDHCI_CTRL_8BITBUS; + } else { + if (host->version >= SDHCI_SPEC_300) + ctrl &= ~SDHCI_CTRL_8BITBUS; + if (mmc->bus_width == 4) + ctrl |= SDHCI_CTRL_4BITBUS; + else + ctrl &= ~SDHCI_CTRL_4BITBUS; + } + + if (mmc->clock > 26000000) + ctrl |= SDHCI_CTRL_HISPD; + else + ctrl &= ~SDHCI_CTRL_HISPD; + + sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); +} + +int sdhci_init(struct mmc *mmc) +{ + struct sdhci_host *host = (struct sdhci_host *)mmc->priv; + + if ((host->quirks & SDHCI_QUIRK_32BIT_DMA_ADDR) && !aligned_buffer) { + aligned_buffer = memalign(8, 512*1024); + if (!aligned_buffer) { + printf("Aligned buffer alloc failed!!!"); + return -1; + } + } + + /* Eable all state */ + sdhci_writel(host, SDHCI_INT_ALL_MASK, SDHCI_INT_ENABLE); + sdhci_writel(host, SDHCI_INT_ALL_MASK, SDHCI_SIGNAL_ENABLE); + + sdhci_set_power(host, fls(mmc->voltages) - 1); + + return 0; +} + +int add_sdhci(struct sdhci_host *host, u32 max_clk, u32 min_clk) +{ + struct mmc *mmc; + unsigned int caps; + + mmc = malloc(sizeof(struct mmc)); + if (!mmc) { + printf("mmc malloc fail!\n"); + return -1; + } + + mmc->priv = host; + + sprintf(mmc->name, "%s", host->name); + mmc->send_cmd = sdhci_send_command; + mmc->set_ios = sdhci_set_ios; + mmc->init = sdhci_init; + + caps = sdhci_readl(host, SDHCI_CAPABILITIES); +#ifdef CONFIG_MMC_SDMA + if (!(caps & SDHCI_CAN_DO_SDMA)) { + printf("Your controller don't support sdma!!\n"); + return -1; + } +#endif + + if (max_clk) + mmc->f_max = max_clk; + else { + if (host->version >= SDHCI_SPEC_300) + mmc->f_max = (caps & SDHCI_CLOCK_V3_BASE_MASK) + >> SDHCI_CLOCK_BASE_SHIFT; + else + mmc->f_max = (caps & SDHCI_CLOCK_BASE_MASK) + >> SDHCI_CLOCK_BASE_SHIFT; + mmc->f_max *= 1000000; + } + if (mmc->f_max == 0) { + printf("Hardware doesn't specify base clock frequency\n"); + return -1; + } + if (min_clk) + mmc->f_min = min_clk; + else { + if (host->version >= SDHCI_SPEC_300) + mmc->f_min = mmc->f_max / SDHCI_MAX_DIV_SPEC_300; + else + mmc->f_min = mmc->f_max / SDHCI_MAX_DIV_SPEC_200; + } + + mmc->voltages = 0; + if (caps & SDHCI_CAN_VDD_330) + mmc->voltages |= MMC_VDD_32_33 | MMC_VDD_33_34; + if (caps & SDHCI_CAN_VDD_300) + mmc->voltages |= MMC_VDD_29_30 | MMC_VDD_30_31; + if (caps & SDHCI_CAN_VDD_180) + mmc->voltages |= MMC_VDD_165_195; + mmc->host_caps = MMC_MODE_HS | MMC_MODE_HS_52MHz | MMC_MODE_4BIT; + if (caps & SDHCI_CAN_DO_8BIT) + mmc->host_caps |= MMC_MODE_8BIT; + + sdhci_reset(host, SDHCI_RESET_ALL); + mmc_register(mmc); + + return 0; +} diff --git a/include/sdhci.h b/include/sdhci.h new file mode 100644 index 0000000..6d52ce9 --- /dev/null +++ b/include/sdhci.h @@ -0,0 +1,325 @@ +/* + * Copyright 2011, Marvell Semiconductor Inc. + * Lei Wen <leiwen(a)marvell.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + * Back ported to the 8xx platform (from the 8260 platform) by + * Murray.Jensen(a)cmst.csiro.au, 27-Jan-01. + */ +#ifndef __SDHCI_HW_H +#define __SDHCI_HW_H + +#include <asm/io.h> +/* + * Controller registers + */ + +#define SDHCI_DMA_ADDRESS 0x00 + +#define SDHCI_BLOCK_SIZE 0x04 +#define SDHCI_MAKE_BLKSZ(dma, blksz) (((dma & 0x7) << 12) | (blksz & 0xFFF)) + +#define SDHCI_BLOCK_COUNT 0x06 + +#define SDHCI_ARGUMENT 0x08 + +#define SDHCI_TRANSFER_MODE 0x0C +#define SDHCI_TRNS_DMA 0x01 +#define SDHCI_TRNS_BLK_CNT_EN 0x02 +#define SDHCI_TRNS_ACMD12 0x04 +#define SDHCI_TRNS_READ 0x10 +#define SDHCI_TRNS_MULTI 0x20 + +#define SDHCI_COMMAND 0x0E +#define SDHCI_CMD_RESP_MASK 0x03 +#define SDHCI_CMD_CRC 0x08 +#define SDHCI_CMD_INDEX 0x10 +#define SDHCI_CMD_DATA 0x20 +#define SDHCI_CMD_ABORTCMD 0xC0 + +#define SDHCI_CMD_RESP_NONE 0x00 +#define SDHCI_CMD_RESP_LONG 0x01 +#define SDHCI_CMD_RESP_SHORT 0x02 +#define SDHCI_CMD_RESP_SHORT_BUSY 0x03 + +#define SDHCI_MAKE_CMD(c, f) (((c & 0xff) << 8) | (f & 0xff)) +#define SDHCI_GET_CMD(c) ((c>>8) & 0x3f) + +#define SDHCI_RESPONSE 0x10 + +#define SDHCI_BUFFER 0x20 + +#define SDHCI_PRESENT_STATE 0x24 +#define SDHCI_CMD_INHIBIT 0x00000001 +#define SDHCI_DATA_INHIBIT 0x00000002 +#define SDHCI_DOING_WRITE 0x00000100 +#define SDHCI_DOING_READ 0x00000200 +#define SDHCI_SPACE_AVAILABLE 0x00000400 +#define SDHCI_DATA_AVAILABLE 0x00000800 +#define SDHCI_CARD_PRESENT 0x00010000 +#define SDHCI_WRITE_PROTECT 0x00080000 + +#define SDHCI_HOST_CONTROL 0x28 +#define SDHCI_CTRL_LED 0x01 +#define SDHCI_CTRL_4BITBUS 0x02 +#define SDHCI_CTRL_HISPD 0x04 +#define SDHCI_CTRL_DMA_MASK 0x18 +#define SDHCI_CTRL_SDMA 0x00 +#define SDHCI_CTRL_ADMA1 0x08 +#define SDHCI_CTRL_ADMA32 0x10 +#define SDHCI_CTRL_ADMA64 0x18 +#define SDHCI_CTRL_8BITBUS 0x20 + +#define SDHCI_POWER_CONTROL 0x29 +#define SDHCI_POWER_ON 0x01 +#define SDHCI_POWER_180 0x0A +#define SDHCI_POWER_300 0x0C +#define SDHCI_POWER_330 0x0E + +#define SDHCI_BLOCK_GAP_CONTROL 0x2A + +#define SDHCI_WAKE_UP_CONTROL 0x2B +#define SDHCI_WAKE_ON_INT 0x01 +#define SDHCI_WAKE_ON_INSERT 0x02 +#define SDHCI_WAKE_ON_REMOVE 0x04 + +#define SDHCI_CLOCK_CONTROL 0x2C +#define SDHCI_DIVIDER_SHIFT 8 +#define SDHCI_DIVIDER_HI_SHIFT 6 +#define SDHCI_DIV_MASK 0xFF +#define SDHCI_DIV_MASK_LEN 8 +#define SDHCI_DIV_HI_MASK 0x300 +#define SDHCI_CLOCK_CARD_EN 0x0004 +#define SDHCI_CLOCK_INT_STABLE 0x0002 +#define SDHCI_CLOCK_INT_EN 0x0001 + +#define SDHCI_TIMEOUT_CONTROL 0x2E + +#define SDHCI_SOFTWARE_RESET 0x2F +#define SDHCI_RESET_ALL 0x01 +#define SDHCI_RESET_CMD 0x02 +#define SDHCI_RESET_DATA 0x04 + +#define SDHCI_INT_STATUS 0x30 +#define SDHCI_INT_ENABLE 0x34 +#define SDHCI_SIGNAL_ENABLE 0x38 +#define SDHCI_INT_RESPONSE 0x00000001 +#define SDHCI_INT_DATA_END 0x00000002 +#define SDHCI_INT_DMA_END 0x00000008 +#define SDHCI_INT_SPACE_AVAIL 0x00000010 +#define SDHCI_INT_DATA_AVAIL 0x00000020 +#define SDHCI_INT_CARD_INSERT 0x00000040 +#define SDHCI_INT_CARD_REMOVE 0x00000080 +#define SDHCI_INT_CARD_INT 0x00000100 +#define SDHCI_INT_ERROR 0x00008000 +#define SDHCI_INT_TIMEOUT 0x00010000 +#define SDHCI_INT_CRC 0x00020000 +#define SDHCI_INT_END_BIT 0x00040000 +#define SDHCI_INT_INDEX 0x00080000 +#define SDHCI_INT_DATA_TIMEOUT 0x00100000 +#define SDHCI_INT_DATA_CRC 0x00200000 +#define SDHCI_INT_DATA_END_BIT 0x00400000 +#define SDHCI_INT_BUS_POWER 0x00800000 +#define SDHCI_INT_ACMD12ERR 0x01000000 +#define SDHCI_INT_ADMA_ERROR 0x02000000 + +#define SDHCI_INT_NORMAL_MASK 0x00007FFF +#define SDHCI_INT_ERROR_MASK 0xFFFF8000 + +#define SDHCI_INT_CMD_MASK (SDHCI_INT_RESPONSE | SDHCI_INT_TIMEOUT | \ + SDHCI_INT_CRC | SDHCI_INT_END_BIT | SDHCI_INT_INDEX) +#define SDHCI_INT_DATA_MASK (SDHCI_INT_DATA_END | SDHCI_INT_DMA_END | \ + SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL | \ + SDHCI_INT_DATA_TIMEOUT | SDHCI_INT_DATA_CRC | \ + SDHCI_INT_DATA_END_BIT | SDHCI_INT_ADMA_ERROR) +#define SDHCI_INT_ALL_MASK ((unsigned int)-1) + +#define SDHCI_ACMD12_ERR 0x3C + +/* 3E-3F reserved */ + +#define SDHCI_CAPABILITIES 0x40 +#define SDHCI_TIMEOUT_CLK_MASK 0x0000003F +#define SDHCI_TIMEOUT_CLK_SHIFT 0 +#define SDHCI_TIMEOUT_CLK_UNIT 0x00000080 +#define SDHCI_CLOCK_BASE_MASK 0x00003F00 +#define SDHCI_CLOCK_V3_BASE_MASK 0x0000FF00 +#define SDHCI_CLOCK_BASE_SHIFT 8 +#define SDHCI_MAX_BLOCK_MASK 0x00030000 +#define SDHCI_MAX_BLOCK_SHIFT 16 +#define SDHCI_CAN_DO_8BIT 0x00040000 +#define SDHCI_CAN_DO_ADMA2 0x00080000 +#define SDHCI_CAN_DO_ADMA1 0x00100000 +#define SDHCI_CAN_DO_HISPD 0x00200000 +#define SDHCI_CAN_DO_SDMA 0x00400000 +#define SDHCI_CAN_VDD_330 0x01000000 +#define SDHCI_CAN_VDD_300 0x02000000 +#define SDHCI_CAN_VDD_180 0x04000000 +#define SDHCI_CAN_64BIT 0x10000000 + +#define SDHCI_CAPABILITIES_1 0x44 + +#define SDHCI_MAX_CURRENT 0x48 + +/* 4C-4F reserved for more max current */ + +#define SDHCI_SET_ACMD12_ERROR 0x50 +#define SDHCI_SET_INT_ERROR 0x52 + +#define SDHCI_ADMA_ERROR 0x54 + +/* 55-57 reserved */ + +#define SDHCI_ADMA_ADDRESS 0x58 + +/* 60-FB reserved */ + +#define SDHCI_SLOT_INT_STATUS 0xFC + +#define SDHCI_HOST_VERSION 0xFE +#define SDHCI_VENDOR_VER_MASK 0xFF00 +#define SDHCI_VENDOR_VER_SHIFT 8 +#define SDHCI_SPEC_VER_MASK 0x00FF +#define SDHCI_SPEC_VER_SHIFT 0 +#define SDHCI_SPEC_100 0 +#define SDHCI_SPEC_200 1 +#define SDHCI_SPEC_300 2 + +/* + * End of controller registers. + */ + +#define SDHCI_MAX_DIV_SPEC_200 256 +#define SDHCI_MAX_DIV_SPEC_300 2046 + +/* + * quirks + */ +#define SDHCI_QUIRK_32BIT_DMA_ADDR (1 << 0) + +/* + * Host SDMA buffer boundary. Valid values from 4K to 512K in powers of 2. + */ +#define SDHCI_DEFAULT_BOUNDARY_SIZE (512 * 1024) +#define SDHCI_DEFAULT_BOUNDARY_ARG (7) +struct sdhci_ops { +#ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS + u32 (*read_l)(struct sdhci_host *host, int reg); + u16 (*read_w)(struct sdhci_host *host, int reg); + u8 (*read_b)(struct sdhci_host *host, int reg); + void (*write_l)(struct sdhci_host *host, u32 val, int reg); + void (*write_w)(struct sdhci_host *host, u16 val, int reg); + void (*write_b)(struct sdhci_host *host, u8 val, int reg); +#endif +}; + +struct sdhci_host { + char *name; + void *ioaddr; + unsigned int quirks; + unsigned int version; + unsigned int clock; + const struct sdhci_ops *ops; +}; + +#ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS + +static inline void sdhci_writel(struct sdhci_host *host, u32 val, int reg) +{ + if (unlikely(host->ops->write_l)) + host->ops->write_l(host, val, reg); + else + writel(val, host->ioaddr + reg); +} + +static inline void sdhci_writew(struct sdhci_host *host, u16 val, int reg) +{ + if (unlikely(host->ops->write_w)) + host->ops->write_w(host, val, reg); + else + writew(val, host->ioaddr + reg); +} + +static inline void sdhci_writeb(struct sdhci_host *host, u8 val, int reg) +{ + if (unlikely(host->ops->write_b)) + host->ops->write_b(host, val, reg); + else + writeb(val, host->ioaddr + reg); +} + +static inline u32 sdhci_readl(struct sdhci_host *host, int reg) +{ + if (unlikely(host->ops->read_l)) + return host->ops->read_l(host, reg); + else + return readl(host->ioaddr + reg); +} + +static inline u16 sdhci_readw(struct sdhci_host *host, int reg) +{ + if (unlikely(host->ops->read_w)) + return host->ops->read_w(host, reg); + else + return readw(host->ioaddr + reg); +} + +static inline u8 sdhci_readb(struct sdhci_host *host, int reg) +{ + if (unlikely(host->ops->read_b)) + return host->ops->read_b(host, reg); + else + return readb(host->ioaddr + reg); +} + +#else + +static inline void sdhci_writel(struct sdhci_host *host, u32 val, int reg) +{ + writel(val, host->ioaddr + reg); +} + +static inline void sdhci_writew(struct sdhci_host *host, u16 val, int reg) +{ + writew(val, host->ioaddr + reg); +} + +static inline void sdhci_writeb(struct sdhci_host *host, u8 val, int reg) +{ + writeb(val, host->ioaddr + reg); +} +static inline u32 sdhci_readl(struct sdhci_host *host, int reg) +{ + return readl(host->ioaddr + reg); +} + +static inline u16 sdhci_readw(struct sdhci_host *host, int reg) +{ + return readw(host->ioaddr + reg); +} + +static inline u8 sdhci_readb(struct sdhci_host *host, int reg) +{ + return readb(host->ioaddr + reg); +} +#endif + +int add_sdhci(struct sdhci_host *host, u32 max_clk, u32 min_clk); +#endif /* __SDHCI_HW_H */ -- 1.7.0.4

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[U-Boot] Possible GPL violation
by Mateusz Kulikowski 12 Sep '13

12 Sep '13

Hi, Short version: Is there anyone that can support me with enforcing GPL compliance on company that ships product with binary u-boot? Or did that in the past? Long version: Polish market is flooded with cheap DVB-T receivers (we're switching to digital tv now), android tablets etc. They're "made" (branded is probably better word) by local companies, and my guess is that most of them is violating GPL. Some time ago I've bought WIWA HD100 DVB-T receiver. I have coverage issues, so I decided to play a bit with this device, just to have fun (also to try to port Linux there). I already knew that other models made by this vendor are using u-boot, so I played a bit with HW, found serial port and: <log> Hello U-Boot U-Boot 1.1.6 (Oct 13 2011 - 00:32:14) Board: MSTAR KRNOUS (CPU Speed 552 MHz) DRAM: 64 X 0 MBytes U-Boot is running at DRAM 0x87600000 </log> I also disassembled parts of asm code (AFAIR it was mips_cache_reset, but I may be wrong). I'd love to have sources (porting Linux to unknown, closed SOC is painful without documentation, u-boot sources are very helpful), so I wrote to manufacturer and called them several times. Unfortunately they either don't understand what I'm asking for, or deliberately ignoring my requests. I can't do much myself (except for nagging them for source code), as it's not my copyrights that they're infringing. Is there a chance that you can help me or should I try using GPL-Violations mailing list? Regards, Mateusz

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[U-Boot] U-Boot mini-summit at ELCE 2013 in Edinburgh - call for participation!
by Detlev Zundel 12 Sep '13

12 Sep '13

Hi fellow U-Boot developers, people meeting us at our booth at the Embedded World trade show in Nürnberg this year may already have heard rumours about it but now it is official - there will be an U-Boot mini-summit at the Emdedd Linux Conference Europe in Edinburgh, UK [1]. Thanks to the wonderful people at the Linux Foundation, we will have some space in the afternoon of thursday 24th that we can use to present and discuss topics of interest for the immediate future of the project. Currently we believe that it makes sense to plan for 4-5 short talks in the range of 20-30 minutes with following Q&A. The audience will very likely be "tech level" and the presentations are thus allowed to have "indecent technical content" :) Of course everybody is invited to suggest a presentation, but an informal poll turned up these topics of interest: - Driver model - Kconfig - Patman tutorial - U-Boot configuration through device tree - Falcon boot for everybody - DFU - Android fastboot The organization of the mini-summit is up to our discretion and thus somewhat less formal than the "regular" ELCE tracks, but we would like to encourage people to also submit U-Boot related talks through the regular CFP[2] if they are of wide interest. Having agreed on our schedule, we will be able to get it included in the official conference schedule and thus hopefully get a broader visibility. To make this work we should finalize our schedule around the end of the official CFP which is July 21st, but of course the sooner, the better. Please inform us if you would like to attend in order to get an idea of the expected presence. If neccessary we will have to look for a larger place early on. Next to the official program I'm sure that we will be able to find a place in the evening to taste local culinary specialities (in solid and liquid form), so be sure to book your return flight no sooner than friday evening ;) Thanks Detlev [1] http://events.linuxfoundation.org/events/embedded-linux-conference-europe [2] http://events.linuxfoundation.org/events/embedded-linux-conference-europe/c… -- The only thing worse than generalizing from one example is generalizing from no examples at all. -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: dzu(a)denx.de

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[U-Boot] [PATCH] fsl: Fix compiler warnings from gcc-4.4 in sys_eeprom code
by Kumar Gala 30 Aug '13

30 Aug '13

sys_eeprom.c: In function 'do_mac': sys_eeprom.c:323: warning: dereferencing type-punned pointer will break strict-aliasing rules sys_eeprom.c: In function 'mac_read_from_eeprom': sys_eeprom.c:395: warning: dereferencing type-punned pointer will break strict-aliasing rules Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> --- board/freescale/common/sys_eeprom.c | 6 ++++-- 1 files changed, 4 insertions(+), 2 deletions(-) diff --git a/board/freescale/common/sys_eeprom.c b/board/freescale/common/sys_eeprom.c index ae5304a..3e1e332 100644 --- a/board/freescale/common/sys_eeprom.c +++ b/board/freescale/common/sys_eeprom.c @@ -78,12 +78,14 @@ static int has_been_read = 0; #ifdef CONFIG_SYS_I2C_EEPROM_NXID /* Is this a valid NXID EEPROM? */ -#define is_valid (*((u32 *)e.id) == (('N' << 24) | ('X' << 16) | ('I' << 8) | 'D')) +#define is_valid ((e.id[0] == 'N') || (e.id[1] == 'X') || \ + (e.id[2] == 'I') || (e.id[3] == 'D')) #endif #ifdef CONFIG_SYS_I2C_EEPROM_CCID /* Is this a valid CCID EEPROM? */ -#define is_valid (*((u32 *)e.id) == (('C' << 24) | ('C' << 16) | ('I' << 8) | 'D')) +#define is_valid ((e.id[0] == 'C') || (e.id[1] == 'C') || \ + (e.id[2] == 'I') || (e.id[3] == 'D')) #endif /** -- 1.6.0.6

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[U-Boot] [PATCH 1/4] Optimized nand_read_buf for kirkwood
by Phil Sutter 23 Aug '13

23 Aug '13

The basic idea is taken from the linux-kernel, but further optimized. First align the buffer to 8 bytes, then use ldrd/strd to read and store in 8 byte quantities, then do the final bytes. Signed-off-by: Nico Erfurth <ne(a)erfurth.eu> Cc: Prafulla Wadaskar <prafulla(a)marvell.com> --- drivers/mtd/nand/kirkwood_nand.c | 29 +++++++++++++++++++++++++++++ 1 files changed, 29 insertions(+), 0 deletions(-) diff --git a/drivers/mtd/nand/kirkwood_nand.c b/drivers/mtd/nand/kirkwood_nand.c index bdab5aa..e04a59f 100644 --- a/drivers/mtd/nand/kirkwood_nand.c +++ b/drivers/mtd/nand/kirkwood_nand.c @@ -38,6 +38,34 @@ struct kwnandf_registers { static struct kwnandf_registers *nf_reg = (struct kwnandf_registers *)KW_NANDF_BASE; + +/* The basic idea is stolen from the linux kernel, but the inner loop is optimized a bit more */ +static void kw_nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len) +{ + struct nand_chip *chip = mtd->priv; + + while (len && (unsigned long)buf & 7) + { + *buf++ = readb(chip->IO_ADDR_R); + len--; + }; + + asm volatile ( + ".LFlashLoop:\n" + " subs\t%0, #8\n" + " ldrpld\tr2, [%2]\n" // Read 2 words + " strpld\tr2, [%1], #8\n" // Read 2 words + " bpl\t.LFlashLoop\n" // This results in one additional loop if len%8 <> 0 + " addne\t%0, #8\n" + : "+&r" (len), "+&r" (buf) + : "r" (chip->IO_ADDR_R) + : "r2", "r3", "memory", "cc" + ); + + while (len--) + *buf++ = readb(chip->IO_ADDR_R); +} + /* * hardware specific access to control-lines/bits */ @@ -76,6 +104,7 @@ int board_nand_init(struct nand_chip *nand) nand->options = NAND_COPYBACK | NAND_CACHEPRG | NAND_NO_PADDING; nand->ecc.mode = NAND_ECC_SOFT; nand->cmd_ctrl = kw_nand_hwcontrol; + nand->read_buf = kw_nand_read_buf; nand->chip_delay = 40; nand->select_chip = kw_nand_select_chip; return 0; -- 1.7.3.4

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[U-Boot] [PATCH 0/5] FSL SECURE BOOT: Add support for next level image validation
by Ruchika Gupta 20 Aug '13

20 Aug '13

The patch set adds support for next level image validation (linux, rootfs, dtb) in secure boot scenarios. The patch set adds the following functaionality : 1. In secure boot, PAMU is not in bypassed mode. For validating next level images, CAAM block needs to be accessed. In order to access the CAAM block, first PAMU needs to be configured to allow access to CAAM block from core. This patch set adds the basic driver for PAMU. 2. Support has been added for using job ring interface of SEC block to do cryptographic operations. Descriptors for the following crypto operations have been added a) RSA modular exponentiation b) SHA-256 c) cryptographic blob encryption/decryption 3. esbc_validate command added which uses the SEC block and verifies the images. esbc_validate command is meant for validating header and signature of images (Boot Script and ESBC uboot client). SHA-256 and RSA operations are performed using SEC block in HW. This command works on both high-end (P4080) and low-end (P1010) platforms. Ruchika Gupta (5): arch/powerpc/cpu/mpc8xxx: PAMU driver support powerpc/pamu : PAMU configuration for accessing SEC block drivers/sec : Freescale SEC driver FSL SEC Driver : Add support for descriptor creation Added command for validation of images in case of secure boot Makefile | 1 + arch/powerpc/cpu/mpc85xx/Makefile | 2 + arch/powerpc/cpu/mpc85xx/cmd_esbc_validate.c | 54 + arch/powerpc/cpu/mpc85xx/cpu_init.c | 17 + arch/powerpc/cpu/mpc85xx/fsl_sfp_snvs.c | 163 +++ arch/powerpc/cpu/mpc85xx/fsl_validate.c | 543 +++++++++ arch/powerpc/cpu/mpc8xxx/Makefile | 3 +- arch/powerpc/cpu/mpc8xxx/fsl_pamu.c | 488 ++++++++ arch/powerpc/cpu/mpc8xxx/fsl_pamu_table.c | 68 ++ arch/powerpc/include/asm/fsl_pamu.h | 194 ++++ arch/powerpc/include/asm/fsl_secure_boot.h | 68 ++- arch/powerpc/include/asm/fsl_sfp_snvs.h | 42 + arch/powerpc/include/asm/immap_85xx.h | 121 ++- arch/powerpc/include/asm/types.h | 5 +- drivers/sec/Makefile | 46 + drivers/sec/error.c | 259 +++++ drivers/sec/jobdesc.c | 157 +++ drivers/sec/jr.c | 319 +++++ drivers/sec/rsa_sec.c | 95 ++ drivers/sec/sha.c | 111 ++ include/desc.h | 1605 ++++++++++++++++++++++++++ include/desc_constr.h | 200 ++++ include/jobdesc.h | 55 + include/jr.h | 129 ++ include/rsa_sec.h | 59 + include/sha.h | 100 ++ 26 files changed, 4900 insertions(+), 4 deletions(-) create mode 100644 arch/powerpc/cpu/mpc85xx/cmd_esbc_validate.c create mode 100644 arch/powerpc/cpu/mpc85xx/fsl_sfp_snvs.c create mode 100644 arch/powerpc/cpu/mpc85xx/fsl_validate.c create mode 100644 arch/powerpc/cpu/mpc8xxx/fsl_pamu.c create mode 100644 arch/powerpc/cpu/mpc8xxx/fsl_pamu_table.c create mode 100644 arch/powerpc/include/asm/fsl_pamu.h create mode 100644 arch/powerpc/include/asm/fsl_sfp_snvs.h create mode 100644 drivers/sec/Makefile create mode 100644 drivers/sec/error.c create mode 100644 drivers/sec/jobdesc.c create mode 100644 drivers/sec/jr.c create mode 100644 drivers/sec/rsa_sec.c create mode 100644 drivers/sec/sha.c create mode 100644 include/desc.h create mode 100644 include/desc_constr.h create mode 100644 include/jobdesc.h create mode 100644 include/jr.h create mode 100644 include/rsa_sec.h create mode 100644 include/sha.h -- 1.7.7.6

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